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path: root/drivers/net/ethernet/intel/igc/igc_mac.c
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Diffstat (limited to 'drivers/net/ethernet/intel/igc/igc_mac.c')
-rw-r--r--drivers/net/ethernet/intel/igc/igc_mac.c41
1 files changed, 16 insertions, 25 deletions
diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c
index 12aa6b5fcb5d..a5c4b19d71a2 100644
--- a/drivers/net/ethernet/intel/igc/igc_mac.c
+++ b/drivers/net/ethernet/intel/igc/igc_mac.c
@@ -193,7 +193,7 @@ s32 igc_force_mac_fc(struct igc_hw *hw)
* 1: Rx flow control is enabled (we can receive pause
* frames but not send pause frames).
* 2: Tx flow control is enabled (we can send pause frames
- * frames but we do not receive pause frames).
+ * but we do not receive pause frames).
* 3: Both Rx and TX flow control (symmetric) is enabled.
* other: No other values should be possible at this point.
*/
@@ -235,15 +235,14 @@ out:
void igc_clear_hw_cntrs_base(struct igc_hw *hw)
{
rd32(IGC_CRCERRS);
- rd32(IGC_SYMERRS);
rd32(IGC_MPC);
rd32(IGC_SCC);
rd32(IGC_ECOL);
rd32(IGC_MCC);
rd32(IGC_LATECOL);
rd32(IGC_COLC);
+ rd32(IGC_RERC);
rd32(IGC_DC);
- rd32(IGC_SEC);
rd32(IGC_RLEC);
rd32(IGC_XONRXC);
rd32(IGC_XONTXC);
@@ -288,31 +287,20 @@ void igc_clear_hw_cntrs_base(struct igc_hw *hw)
rd32(IGC_ALGNERRC);
rd32(IGC_RXERRC);
rd32(IGC_TNCRS);
- rd32(IGC_CEXTERR);
+ rd32(IGC_HTDPMC);
rd32(IGC_TSCTC);
- rd32(IGC_TSCTFC);
rd32(IGC_MGTPRC);
rd32(IGC_MGTPDC);
rd32(IGC_MGTPTC);
rd32(IGC_IAC);
- rd32(IGC_ICRXOC);
-
- rd32(IGC_ICRXPTC);
- rd32(IGC_ICRXATC);
- rd32(IGC_ICTXPTC);
- rd32(IGC_ICTXATC);
- rd32(IGC_ICTXQEC);
- rd32(IGC_ICTXQMTC);
- rd32(IGC_ICRXDMTC);
- rd32(IGC_CBTMPC);
- rd32(IGC_HTDPMC);
- rd32(IGC_CBRMPC);
rd32(IGC_RPTHC);
+ rd32(IGC_TLPIC);
+ rd32(IGC_RLPIC);
rd32(IGC_HGPTC);
- rd32(IGC_HTCBDPC);
+ rd32(IGC_RXDMTC);
rd32(IGC_HGORCL);
rd32(IGC_HGORCH);
rd32(IGC_HGOTCL);
@@ -367,8 +355,8 @@ void igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index)
s32 igc_check_for_copper_link(struct igc_hw *hw)
{
struct igc_mac_info *mac = &hw->mac;
+ bool link = false;
s32 ret_val;
- bool link;
/* We only want to go out to the PHY registers to see if Auto-Neg
* has completed and/or if our link status has changed. The
@@ -422,6 +410,11 @@ s32 igc_check_for_copper_link(struct igc_hw *hw)
hw_dbg("Error configuring flow control\n");
out:
+ /* Now that we are aware of our link settings, we can set the LTR
+ * thresholds.
+ */
+ ret_val = igc_set_ltr_i225(hw, link);
+
return ret_val;
}
@@ -467,10 +460,8 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)
* so we had to force link. In this case, we need to force the
* configuration of the MAC to match the "fc" parameter.
*/
- if (mac->autoneg_failed) {
- if (hw->phy.media_type == igc_media_type_copper)
- ret_val = igc_force_mac_fc(hw);
- }
+ if (mac->autoneg_failed)
+ ret_val = igc_force_mac_fc(hw);
if (ret_val) {
hw_dbg("Error forcing flow control settings\n");
@@ -482,7 +473,7 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)
* has completed, and if so, how the PHY and link partner has
* flow control configured.
*/
- if (hw->phy.media_type == igc_media_type_copper && mac->autoneg) {
+ if (mac->autoneg) {
/* Read the MII Status Register and check to see if AutoNeg
* has completed. We read this twice because this reg has
* some "sticky" (latched) bits.
@@ -647,7 +638,7 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)
}
out:
- return 0;
+ return ret_val;
}
/**