diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_phy.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.h | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h index 64e9bea93721..9fe6fbeb66d0 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h @@ -584,8 +584,6 @@ (AR_SREV_9485(ah) ? \ 0x3d0 : 0x450) + ((_i) << 2)) #define AR_PHY_RTT_CTRL (AR_SM_BASE + 0x380) -#define AR_PHY_RTT_TABLE_SW_INTF_B (AR_SM_BASE + 0x384) -#define AR_PHY_RTT_TABLE_SW_INTF_1_B0 (AR_SM_BASE + 0x388) #define AR_PHY_WATCHDOG_STATUS (AR_SM_BASE + 0x5c0) #define AR_PHY_WATCHDOG_CTL_1 (AR_SM_BASE + 0x5c4) @@ -825,6 +823,20 @@ #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000 #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24 #define AR_PHY_CHANNEL_STATUS_RX_CLEAR 0x00000004 +#define AR_PHY_RTT_CTRL_ENA_RADIO_RETENTION 0x00000001 +#define AR_PHY_RTT_CTRL_ENA_RADIO_RETENTION_S 0 +#define AR_PHY_RTT_CTRL_RESTORE_MASK 0x0000007E +#define AR_PHY_RTT_CTRL_RESTORE_MASK_S 1 +#define AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE 0x00000080 +#define AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE_S 7 +#define AR_PHY_RTT_SW_RTT_TABLE_ACCESS 0x00000001 +#define AR_PHY_RTT_SW_RTT_TABLE_ACCESS_S 0 +#define AR_PHY_RTT_SW_RTT_TABLE_WRITE 0x00000002 +#define AR_PHY_RTT_SW_RTT_TABLE_WRITE_S 1 +#define AR_PHY_RTT_SW_RTT_TABLE_ADDR 0x0000001C +#define AR_PHY_RTT_SW_RTT_TABLE_ADDR_S 2 +#define AR_PHY_RTT_SW_RTT_TABLE_DATA 0xFFFFFFF0 +#define AR_PHY_RTT_SW_RTT_TABLE_DATA_S 4 #define AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL 0x80000000 #define AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL_S 31 #define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT 0x01fc0000 @@ -919,6 +931,10 @@ #define AR_PHY_AIC_SRAM_ADDR_B1 (AR_SM1_BASE + 0x5f0) #define AR_PHY_AIC_SRAM_DATA_B1 (AR_SM1_BASE + 0x5f4) +#define AR_PHY_RTT_TABLE_SW_INTF_B(i) (0x384 + (i) ? \ + AR_SM1_BASE : AR_SM_BASE) +#define AR_PHY_RTT_TABLE_SW_INTF_1_B(i) (0x388 + (i) ? \ + AR_SM1_BASE : AR_SM_BASE) /* * Channel 2 Register Map */ |