diff options
Diffstat (limited to 'drivers/pinctrl/mvebu')
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-armada-370.c | 32 | ||||
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-armada-375.c | 32 | ||||
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 32 | ||||
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-armada-39x.c | 32 | ||||
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 199 | ||||
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-dove.c | 113 | ||||
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 41 | ||||
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-mvebu.c | 180 | ||||
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-mvebu.h | 65 | ||||
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-orion.c | 16 |
10 files changed, 439 insertions, 303 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c index 9cc1cc3f5c34..9feba9a5ccb7 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c @@ -14,7 +14,6 @@ #include <linux/err.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/module.h> #include <linux/platform_device.h> #include <linux/clk.h> #include <linux/of.h> @@ -23,18 +22,6 @@ #include "pinctrl-mvebu.h" -static void __iomem *mpp_base; - -static int armada_370_mpp_ctrl_get(unsigned pid, unsigned long *config) -{ - return default_mpp_ctrl_get(mpp_base, pid, config); -} - -static int armada_370_mpp_ctrl_set(unsigned pid, unsigned long config) -{ - return default_mpp_ctrl_set(mpp_base, pid, config); -} - static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = { MPP_MODE(0, MPP_FUNCTION(0x0, "gpio", NULL), @@ -384,8 +371,8 @@ static const struct of_device_id armada_370_pinctrl_of_match[] = { { }, }; -static struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = { - MPP_FUNC_CTRL(0, 65, NULL, armada_370_mpp_ctrl), +static const struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = { + MPP_FUNC_CTRL(0, 65, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = { @@ -397,12 +384,6 @@ static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = { static int armada_370_pinctrl_probe(struct platform_device *pdev) { struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info; - struct resource *res; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mpp_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(mpp_base)) - return PTR_ERR(mpp_base); soc->variant = 0; /* no variants for Armada 370 */ soc->controls = mv88f6710_mpp_controls; @@ -414,7 +395,7 @@ static int armada_370_pinctrl_probe(struct platform_device *pdev) pdev->dev.platform_data = soc; - return mvebu_pinctrl_probe(pdev); + return mvebu_pinctrl_simple_mmio_probe(pdev); } static struct platform_driver armada_370_pinctrl_driver = { @@ -424,9 +405,4 @@ static struct platform_driver armada_370_pinctrl_driver = { }, .probe = armada_370_pinctrl_probe, }; - -module_platform_driver(armada_370_pinctrl_driver); - -MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>"); -MODULE_DESCRIPTION("Marvell Armada 370 pinctrl driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(armada_370_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-375.c b/drivers/pinctrl/mvebu/pinctrl-armada-375.c index 070651431ca4..b7de8abccd48 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-375.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-375.c @@ -14,7 +14,6 @@ #include <linux/err.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/module.h> #include <linux/platform_device.h> #include <linux/clk.h> #include <linux/of.h> @@ -23,18 +22,6 @@ #include "pinctrl-mvebu.h" -static void __iomem *mpp_base; - -static int armada_375_mpp_ctrl_get(unsigned pid, unsigned long *config) -{ - return default_mpp_ctrl_get(mpp_base, pid, config); -} - -static int armada_375_mpp_ctrl_set(unsigned pid, unsigned long config) -{ - return default_mpp_ctrl_set(mpp_base, pid, config); -} - static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = { MPP_MODE(0, MPP_FUNCTION(0x0, "gpio", NULL), @@ -402,8 +389,8 @@ static const struct of_device_id armada_375_pinctrl_of_match[] = { { }, }; -static struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = { - MPP_FUNC_CTRL(0, 69, NULL, armada_375_mpp_ctrl), +static const struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = { + MPP_FUNC_CTRL(0, 69, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range mv88f6720_mpp_gpio_ranges[] = { @@ -415,12 +402,6 @@ static struct pinctrl_gpio_range mv88f6720_mpp_gpio_ranges[] = { static int armada_375_pinctrl_probe(struct platform_device *pdev) { struct mvebu_pinctrl_soc_info *soc = &armada_375_pinctrl_info; - struct resource *res; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mpp_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(mpp_base)) - return PTR_ERR(mpp_base); soc->variant = 0; /* no variants for Armada 375 */ soc->controls = mv88f6720_mpp_controls; @@ -432,7 +413,7 @@ static int armada_375_pinctrl_probe(struct platform_device *pdev) pdev->dev.platform_data = soc; - return mvebu_pinctrl_probe(pdev); + return mvebu_pinctrl_simple_mmio_probe(pdev); } static struct platform_driver armada_375_pinctrl_driver = { @@ -442,9 +423,4 @@ static struct platform_driver armada_375_pinctrl_driver = { }, .probe = armada_375_pinctrl_probe, }; - -module_platform_driver(armada_375_pinctrl_driver); - -MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>"); -MODULE_DESCRIPTION("Marvell Armada 375 pinctrl driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(armada_375_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c index 4e84c8e4938c..de2e1538a26f 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c @@ -14,7 +14,6 @@ #include <linux/err.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/module.h> #include <linux/platform_device.h> #include <linux/of.h> #include <linux/of_device.h> @@ -22,18 +21,6 @@ #include "pinctrl-mvebu.h" -static void __iomem *mpp_base; - -static int armada_38x_mpp_ctrl_get(unsigned pid, unsigned long *config) -{ - return default_mpp_ctrl_get(mpp_base, pid, config); -} - -static int armada_38x_mpp_ctrl_set(unsigned pid, unsigned long config) -{ - return default_mpp_ctrl_set(mpp_base, pid, config); -} - enum { V_88F6810 = BIT(0), V_88F6820 = BIT(1), @@ -409,8 +396,8 @@ static const struct of_device_id armada_38x_pinctrl_of_match[] = { { }, }; -static struct mvebu_mpp_ctrl armada_38x_mpp_controls[] = { - MPP_FUNC_CTRL(0, 59, NULL, armada_38x_mpp_ctrl), +static const struct mvebu_mpp_ctrl armada_38x_mpp_controls[] = { + MPP_FUNC_CTRL(0, 59, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range armada_38x_mpp_gpio_ranges[] = { @@ -423,16 +410,10 @@ static int armada_38x_pinctrl_probe(struct platform_device *pdev) struct mvebu_pinctrl_soc_info *soc = &armada_38x_pinctrl_info; const struct of_device_id *match = of_match_device(armada_38x_pinctrl_of_match, &pdev->dev); - struct resource *res; if (!match) return -ENODEV; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mpp_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(mpp_base)) - return PTR_ERR(mpp_base); - soc->variant = (unsigned) match->data & 0xff; soc->controls = armada_38x_mpp_controls; soc->ncontrols = ARRAY_SIZE(armada_38x_mpp_controls); @@ -443,7 +424,7 @@ static int armada_38x_pinctrl_probe(struct platform_device *pdev) pdev->dev.platform_data = soc; - return mvebu_pinctrl_probe(pdev); + return mvebu_pinctrl_simple_mmio_probe(pdev); } static struct platform_driver armada_38x_pinctrl_driver = { @@ -453,9 +434,4 @@ static struct platform_driver armada_38x_pinctrl_driver = { }, .probe = armada_38x_pinctrl_probe, }; - -module_platform_driver(armada_38x_pinctrl_driver); - -MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>"); -MODULE_DESCRIPTION("Marvell Armada 38x pinctrl driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(armada_38x_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-39x.c b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c index e288f8ba0bf1..627f57c88372 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-39x.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c @@ -14,7 +14,6 @@ #include <linux/err.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/module.h> #include <linux/platform_device.h> #include <linux/of.h> #include <linux/of_device.h> @@ -22,18 +21,6 @@ #include "pinctrl-mvebu.h" -static void __iomem *mpp_base; - -static int armada_39x_mpp_ctrl_get(unsigned pid, unsigned long *config) -{ - return default_mpp_ctrl_get(mpp_base, pid, config); -} - -static int armada_39x_mpp_ctrl_set(unsigned pid, unsigned long config) -{ - return default_mpp_ctrl_set(mpp_base, pid, config); -} - enum { V_88F6920 = BIT(0), V_88F6925 = BIT(1), @@ -391,8 +378,8 @@ static const struct of_device_id armada_39x_pinctrl_of_match[] = { { }, }; -static struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = { - MPP_FUNC_CTRL(0, 59, NULL, armada_39x_mpp_ctrl), +static const struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = { + MPP_FUNC_CTRL(0, 59, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range armada_39x_mpp_gpio_ranges[] = { @@ -405,16 +392,10 @@ static int armada_39x_pinctrl_probe(struct platform_device *pdev) struct mvebu_pinctrl_soc_info *soc = &armada_39x_pinctrl_info; const struct of_device_id *match = of_match_device(armada_39x_pinctrl_of_match, &pdev->dev); - struct resource *res; if (!match) return -ENODEV; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mpp_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(mpp_base)) - return PTR_ERR(mpp_base); - soc->variant = (unsigned) match->data & 0xff; soc->controls = armada_39x_mpp_controls; soc->ncontrols = ARRAY_SIZE(armada_39x_mpp_controls); @@ -425,7 +406,7 @@ static int armada_39x_pinctrl_probe(struct platform_device *pdev) pdev->dev.platform_data = soc; - return mvebu_pinctrl_probe(pdev); + return mvebu_pinctrl_simple_mmio_probe(pdev); } static struct platform_driver armada_39x_pinctrl_driver = { @@ -435,9 +416,4 @@ static struct platform_driver armada_39x_pinctrl_driver = { }, .probe = armada_39x_pinctrl_probe, }; - -module_platform_driver(armada_39x_pinctrl_driver); - -MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>"); -MODULE_DESCRIPTION("Marvell Armada 39x pinctrl driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(armada_39x_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c index e4ea71a9d985..b854f1ee5de5 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c @@ -20,7 +20,6 @@ #include <linux/err.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/module.h> #include <linux/platform_device.h> #include <linux/clk.h> #include <linux/of.h> @@ -30,25 +29,18 @@ #include "pinctrl-mvebu.h" -static void __iomem *mpp_base; static u32 *mpp_saved_regs; -static int armada_xp_mpp_ctrl_get(unsigned pid, unsigned long *config) -{ - return default_mpp_ctrl_get(mpp_base, pid, config); -} - -static int armada_xp_mpp_ctrl_set(unsigned pid, unsigned long config) -{ - return default_mpp_ctrl_set(mpp_base, pid, config); -} - enum armada_xp_variant { V_MV78230 = BIT(0), V_MV78260 = BIT(1), V_MV78460 = BIT(2), V_MV78230_PLUS = (V_MV78230 | V_MV78260 | V_MV78460), V_MV78260_PLUS = (V_MV78260 | V_MV78460), + V_98DX3236 = BIT(3), + V_98DX3336 = BIT(4), + V_98DX4251 = BIT(5), + V_98DX3236_PLUS = (V_98DX3236 | V_98DX3336 | V_98DX4251), }; static struct mvebu_mpp_mode armada_xp_mpp_modes[] = { @@ -360,6 +352,131 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = { MPP_VAR_FUNCTION(0x1, "dev", "ad31", V_MV78260_PLUS)), }; +static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = { + MPP_MODE(0, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "spi0", "mosi", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "ad8", V_98DX3236_PLUS)), + MPP_MODE(1, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "spi0", "miso", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "ad9", V_98DX3236_PLUS)), + MPP_MODE(2, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "spi0", "sck", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "ad10", V_98DX3236_PLUS)), + MPP_MODE(3, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "spi0", "cs0", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "ad11", V_98DX3236_PLUS)), + MPP_MODE(4, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "spi0", "cs1", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x3, "smi", "mdc", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "cs0", V_98DX3236_PLUS)), + MPP_MODE(5, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "pex", "rsto", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "sd0", "cmd", V_98DX4251), + MPP_VAR_FUNCTION(0x4, "dev", "bootcs", V_98DX3236_PLUS)), + MPP_MODE(6, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "sd0", "clk", V_98DX4251), + MPP_VAR_FUNCTION(0x4, "dev", "a2", V_98DX3236_PLUS)), + MPP_MODE(7, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "sd0", "d0", V_98DX4251), + MPP_VAR_FUNCTION(0x4, "dev", "ale0", V_98DX3236_PLUS)), + MPP_MODE(8, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "sd0", "d1", V_98DX4251), + MPP_VAR_FUNCTION(0x4, "dev", "ale1", V_98DX3236_PLUS)), + MPP_MODE(9, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "sd0", "d2", V_98DX4251), + MPP_VAR_FUNCTION(0x4, "dev", "ready0", V_98DX3236_PLUS)), + MPP_MODE(10, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "sd0", "d3", V_98DX4251), + MPP_VAR_FUNCTION(0x4, "dev", "ad12", V_98DX3236_PLUS)), + MPP_MODE(11, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "uart1", "rxd", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x3, "uart0", "cts", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "ad13", V_98DX3236_PLUS)), + MPP_MODE(12, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x2, "uart1", "txd", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x3, "uart0", "rts", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "ad14", V_98DX3236_PLUS)), + MPP_MODE(13, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "intr", "out", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "ad15", V_98DX3236_PLUS)), + MPP_MODE(14, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "i2c0", "sck", V_98DX3236_PLUS)), + MPP_MODE(15, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "i2c0", "sda", V_98DX3236_PLUS)), + MPP_MODE(16, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "oe", V_98DX3236_PLUS)), + MPP_MODE(17, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "clkout", V_98DX3236_PLUS)), + MPP_MODE(18, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x3, "uart1", "txd", V_98DX3236_PLUS)), + MPP_MODE(19, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "rb", V_98DX3236_PLUS)), + MPP_MODE(20, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "we0", V_98DX3236_PLUS)), + MPP_MODE(21, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "ad0", V_98DX3236_PLUS)), + MPP_MODE(22, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "ad1", V_98DX3236_PLUS)), + MPP_MODE(23, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "ad2", V_98DX3236_PLUS)), + MPP_MODE(24, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "ad3", V_98DX3236_PLUS)), + MPP_MODE(25, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "ad4", V_98DX3236_PLUS)), + MPP_MODE(26, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "ad5", V_98DX3236_PLUS)), + MPP_MODE(27, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "ad6", V_98DX3236_PLUS)), + MPP_MODE(28, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "ad7", V_98DX3236_PLUS)), + MPP_MODE(29, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "a0", V_98DX3236_PLUS)), + MPP_MODE(30, + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "dev", "a1", V_98DX3236_PLUS)), + MPP_MODE(31, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "slv_smi", "mdc", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x3, "smi", "mdc", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "we1", V_98DX3236_PLUS)), + MPP_MODE(32, + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x1, "slv_smi", "mdio", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x3, "smi", "mdio", V_98DX3236_PLUS), + MPP_VAR_FUNCTION(0x4, "dev", "cs1", V_98DX3236_PLUS)), +}; + static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info; static const struct of_device_id armada_xp_pinctrl_of_match[] = { @@ -375,11 +492,19 @@ static const struct of_device_id armada_xp_pinctrl_of_match[] = { .compatible = "marvell,mv78460-pinctrl", .data = (void *) V_MV78460, }, + { + .compatible = "marvell,98dx3236-pinctrl", + .data = (void *) V_98DX3236, + }, + { + .compatible = "marvell,98dx4251-pinctrl", + .data = (void *) V_98DX4251, + }, { }, }; -static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = { - MPP_FUNC_CTRL(0, 48, NULL, armada_xp_mpp_ctrl), +static const struct mvebu_mpp_ctrl mv78230_mpp_controls[] = { + MPP_FUNC_CTRL(0, 48, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = { @@ -387,8 +512,8 @@ static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = { MPP_GPIO_RANGE(1, 32, 32, 17), }; -static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = { - MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl), +static const struct mvebu_mpp_ctrl mv78260_mpp_controls[] = { + MPP_FUNC_CTRL(0, 66, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = { @@ -397,8 +522,8 @@ static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = { MPP_GPIO_RANGE(2, 64, 64, 3), }; -static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = { - MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl), +static const struct mvebu_mpp_ctrl mv78460_mpp_controls[] = { + MPP_FUNC_CTRL(0, 66, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = { @@ -407,6 +532,14 @@ static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = { MPP_GPIO_RANGE(2, 64, 64, 3), }; +static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = { + MPP_FUNC_CTRL(0, 32, NULL, mvebu_mmio_mpp_ctrl), +}; + +static struct pinctrl_gpio_range mv98dx3236_mpp_gpio_ranges[] = { + MPP_GPIO_RANGE(0, 0, 0, 32), +}; + static int armada_xp_pinctrl_suspend(struct platform_device *pdev, pm_message_t state) { @@ -417,7 +550,7 @@ static int armada_xp_pinctrl_suspend(struct platform_device *pdev, nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); for (i = 0; i < nregs; i++) - mpp_saved_regs[i] = readl(mpp_base + i * 4); + mpp_saved_regs[i] = readl(soc->control_data[0].base + i * 4); return 0; } @@ -431,7 +564,7 @@ static int armada_xp_pinctrl_resume(struct platform_device *pdev) nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); for (i = 0; i < nregs; i++) - writel(mpp_saved_regs[i], mpp_base + i * 4); + writel(mpp_saved_regs[i], soc->control_data[0].base + i * 4); return 0; } @@ -441,17 +574,11 @@ static int armada_xp_pinctrl_probe(struct platform_device *pdev) struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info; const struct of_device_id *match = of_match_device(armada_xp_pinctrl_of_match, &pdev->dev); - struct resource *res; int nregs; if (!match) return -ENODEV; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mpp_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(mpp_base)) - return PTR_ERR(mpp_base); - soc->variant = (unsigned) match->data & 0xff; switch (soc->variant) { @@ -488,6 +615,17 @@ static int armada_xp_pinctrl_probe(struct platform_device *pdev) soc->gpioranges = mv78460_mpp_gpio_ranges; soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges); break; + case V_98DX3236: + case V_98DX3336: + case V_98DX4251: + /* fall-through */ + soc->controls = mv98dx3236_mpp_controls; + soc->ncontrols = ARRAY_SIZE(mv98dx3236_mpp_controls); + soc->modes = mv98dx3236_mpp_modes; + soc->nmodes = mv98dx3236_mpp_controls[0].npins; + soc->gpioranges = mv98dx3236_mpp_gpio_ranges; + soc->ngpioranges = ARRAY_SIZE(mv98dx3236_mpp_gpio_ranges); + break; } nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); @@ -499,7 +637,7 @@ static int armada_xp_pinctrl_probe(struct platform_device *pdev) pdev->dev.platform_data = soc; - return mvebu_pinctrl_probe(pdev); + return mvebu_pinctrl_simple_mmio_probe(pdev); } static struct platform_driver armada_xp_pinctrl_driver = { @@ -511,9 +649,4 @@ static struct platform_driver armada_xp_pinctrl_driver = { .suspend = armada_xp_pinctrl_suspend, .resume = armada_xp_pinctrl_resume, }; - -module_platform_driver(armada_xp_pinctrl_driver); - -MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>"); -MODULE_DESCRIPTION("Marvell Armada XP pinctrl driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(armada_xp_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c index f93ae0dcef9c..8472f61f2bbe 100644 --- a/drivers/pinctrl/mvebu/pinctrl-dove.c +++ b/drivers/pinctrl/mvebu/pinctrl-dove.c @@ -12,7 +12,6 @@ #include <linux/err.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/module.h> #include <linux/bitops.h> #include <linux/platform_device.h> #include <linux/clk.h> @@ -61,30 +60,20 @@ #define CONFIG_PMU BIT(4) -static void __iomem *mpp_base; static void __iomem *mpp4_base; static void __iomem *pmu_base; static struct regmap *gconfmap; -static int dove_mpp_ctrl_get(unsigned pid, unsigned long *config) -{ - return default_mpp_ctrl_get(mpp_base, pid, config); -} - -static int dove_mpp_ctrl_set(unsigned pid, unsigned long config) -{ - return default_mpp_ctrl_set(mpp_base, pid, config); -} - -static int dove_pmu_mpp_ctrl_get(unsigned pid, unsigned long *config) +static int dove_pmu_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, + unsigned pid, unsigned long *config) { unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; - unsigned long pmu = readl(mpp_base + PMU_MPP_GENERAL_CTRL); + unsigned long pmu = readl(data->base + PMU_MPP_GENERAL_CTRL); unsigned long func; if ((pmu & BIT(pid)) == 0) - return default_mpp_ctrl_get(mpp_base, pid, config); + return mvebu_mmio_mpp_ctrl_get(data, pid, config); func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); *config = (func >> shift) & MVEBU_MPP_MASK; @@ -93,19 +82,20 @@ static int dove_pmu_mpp_ctrl_get(unsigned pid, unsigned long *config) return 0; } -static int dove_pmu_mpp_ctrl_set(unsigned pid, unsigned long config) +static int dove_pmu_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, + unsigned pid, unsigned long config) { unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; - unsigned long pmu = readl(mpp_base + PMU_MPP_GENERAL_CTRL); + unsigned long pmu = readl(data->base + PMU_MPP_GENERAL_CTRL); unsigned long func; if ((config & CONFIG_PMU) == 0) { - writel(pmu & ~BIT(pid), mpp_base + PMU_MPP_GENERAL_CTRL); - return default_mpp_ctrl_set(mpp_base, pid, config); + writel(pmu & ~BIT(pid), data->base + PMU_MPP_GENERAL_CTRL); + return mvebu_mmio_mpp_ctrl_set(data, pid, config); } - writel(pmu | BIT(pid), mpp_base + PMU_MPP_GENERAL_CTRL); + writel(pmu | BIT(pid), data->base + PMU_MPP_GENERAL_CTRL); func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); func &= ~(MVEBU_MPP_MASK << shift); func |= (config & MVEBU_MPP_MASK) << shift; @@ -114,7 +104,8 @@ static int dove_pmu_mpp_ctrl_set(unsigned pid, unsigned long config) return 0; } -static int dove_mpp4_ctrl_get(unsigned pid, unsigned long *config) +static int dove_mpp4_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long *config) { unsigned long mpp4 = readl(mpp4_base); unsigned long mask; @@ -144,7 +135,8 @@ static int dove_mpp4_ctrl_get(unsigned pid, unsigned long *config) return 0; } -static int dove_mpp4_ctrl_set(unsigned pid, unsigned long config) +static int dove_mpp4_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long config) { unsigned long mpp4 = readl(mpp4_base); unsigned long mask; @@ -178,7 +170,8 @@ static int dove_mpp4_ctrl_set(unsigned pid, unsigned long config) return 0; } -static int dove_nand_ctrl_get(unsigned pid, unsigned long *config) +static int dove_nand_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long *config) { unsigned int gmpp; @@ -188,7 +181,8 @@ static int dove_nand_ctrl_get(unsigned pid, unsigned long *config) return 0; } -static int dove_nand_ctrl_set(unsigned pid, unsigned long config) +static int dove_nand_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long config) { regmap_update_bits(gconfmap, MPP_GENERAL_CONFIG, NAND_GPIO_EN, @@ -196,28 +190,31 @@ static int dove_nand_ctrl_set(unsigned pid, unsigned long config) return 0; } -static int dove_audio0_ctrl_get(unsigned pid, unsigned long *config) +static int dove_audio0_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long *config) { - unsigned long pmu = readl(mpp_base + PMU_MPP_GENERAL_CTRL); + unsigned long pmu = readl(data->base + PMU_MPP_GENERAL_CTRL); *config = ((pmu & AU0_AC97_SEL) != 0); return 0; } -static int dove_audio0_ctrl_set(unsigned pid, unsigned long config) +static int dove_audio0_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long config) { - unsigned long pmu = readl(mpp_base + PMU_MPP_GENERAL_CTRL); + unsigned long pmu = readl(data->base + PMU_MPP_GENERAL_CTRL); pmu &= ~AU0_AC97_SEL; if (config) pmu |= AU0_AC97_SEL; - writel(pmu, mpp_base + PMU_MPP_GENERAL_CTRL); + writel(pmu, data->base + PMU_MPP_GENERAL_CTRL); return 0; } -static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config) +static int dove_audio1_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long *config) { unsigned int mpp4 = readl(mpp4_base); unsigned int sspc1; @@ -247,7 +244,8 @@ static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config) return 0; } -static int dove_audio1_ctrl_set(unsigned pid, unsigned long config) +static int dove_audio1_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long config) { unsigned int mpp4 = readl(mpp4_base); @@ -274,11 +272,12 @@ static int dove_audio1_ctrl_set(unsigned pid, unsigned long config) * break other functions. If you require all mpps as gpio * enforce gpio setting by pinctrl mapping. */ -static int dove_audio1_ctrl_gpio_req(unsigned pid) +static int dove_audio1_ctrl_gpio_req(struct mvebu_mpp_ctrl_data *data, + unsigned pid) { unsigned long config; - dove_audio1_ctrl_get(pid, &config); + dove_audio1_ctrl_get(data, pid, &config); switch (config) { case 0x02: /* i2s1 : gpio[56:57] */ @@ -301,14 +300,16 @@ static int dove_audio1_ctrl_gpio_req(unsigned pid) } /* mpp[52:57] has gpio pins capable of in and out */ -static int dove_audio1_ctrl_gpio_dir(unsigned pid, bool input) +static int dove_audio1_ctrl_gpio_dir(struct mvebu_mpp_ctrl_data *data, + unsigned pid, bool input) { if (pid < 52 || pid > 57) return -ENOTSUPP; return 0; } -static int dove_twsi_ctrl_get(unsigned pid, unsigned long *config) +static int dove_twsi_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long *config) { unsigned int gcfg1; unsigned int gcfg2; @@ -327,7 +328,8 @@ static int dove_twsi_ctrl_get(unsigned pid, unsigned long *config) return 0; } -static int dove_twsi_ctrl_set(unsigned pid, unsigned long config) +static int dove_twsi_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long config) { unsigned int gcfg1 = 0; unsigned int gcfg2 = 0; @@ -354,9 +356,9 @@ static int dove_twsi_ctrl_set(unsigned pid, unsigned long config) return 0; } -static struct mvebu_mpp_ctrl dove_mpp_controls[] = { +static const struct mvebu_mpp_ctrl dove_mpp_controls[] = { MPP_FUNC_CTRL(0, 15, NULL, dove_pmu_mpp_ctrl), - MPP_FUNC_CTRL(16, 23, NULL, dove_mpp_ctrl), + MPP_FUNC_CTRL(16, 23, NULL, mvebu_mmio_mpp_ctrl), MPP_FUNC_CTRL(24, 39, "mpp_camera", dove_mpp4_ctrl), MPP_FUNC_CTRL(40, 45, "mpp_sdio0", dove_mpp4_ctrl), MPP_FUNC_CTRL(46, 51, "mpp_sdio1", dove_mpp4_ctrl), @@ -769,6 +771,10 @@ static int dove_pinctrl_probe(struct platform_device *pdev) struct resource fb_res; const struct of_device_id *match = of_match_device(dove_pinctrl_of_match, &pdev->dev); + struct mvebu_mpp_ctrl_data *mpp_data; + void __iomem *base; + int i; + pdev->dev.platform_data = (void *)match->data; /* @@ -783,9 +789,18 @@ static int dove_pinctrl_probe(struct platform_device *pdev) clk_prepare_enable(clk); mpp_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mpp_base = devm_ioremap_resource(&pdev->dev, mpp_res); - if (IS_ERR(mpp_base)) - return PTR_ERR(mpp_base); + base = devm_ioremap_resource(&pdev->dev, mpp_res); + if (IS_ERR(base)) + return PTR_ERR(base); + + mpp_data = devm_kcalloc(&pdev->dev, dove_pinctrl_info.ncontrols, + sizeof(*mpp_data), GFP_KERNEL); + if (!mpp_data) + return -ENOMEM; + + dove_pinctrl_info.control_data = mpp_data; + for (i = 0; i < ARRAY_SIZE(dove_mpp_controls); i++) + mpp_data[i].base = base; /* prepare fallback resource */ memcpy(&fb_res, mpp_res, sizeof(struct resource)); @@ -838,24 +853,12 @@ static int dove_pinctrl_probe(struct platform_device *pdev) return mvebu_pinctrl_probe(pdev); } -static int dove_pinctrl_remove(struct platform_device *pdev) -{ - if (!IS_ERR(clk)) - clk_disable_unprepare(clk); - return 0; -} - static struct platform_driver dove_pinctrl_driver = { .driver = { .name = "dove-pinctrl", + .suppress_bind_attrs = true, .of_match_table = dove_pinctrl_of_match, }, .probe = dove_pinctrl_probe, - .remove = dove_pinctrl_remove, }; - -module_platform_driver(dove_pinctrl_driver); - -MODULE_AUTHOR("Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>"); -MODULE_DESCRIPTION("Marvell Dove pinctrl driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(dove_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c index 5f89c26f3292..5995a19abde5 100644 --- a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c +++ b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c @@ -12,7 +12,6 @@ #include <linux/err.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/module.h> #include <linux/platform_device.h> #include <linux/clk.h> #include <linux/of.h> @@ -21,18 +20,6 @@ #include "pinctrl-mvebu.h" -static void __iomem *mpp_base; - -static int kirkwood_mpp_ctrl_get(unsigned pid, unsigned long *config) -{ - return default_mpp_ctrl_get(mpp_base, pid, config); -} - -static int kirkwood_mpp_ctrl_set(unsigned pid, unsigned long config) -{ - return default_mpp_ctrl_set(mpp_base, pid, config); -} - #define V(f6180, f6190, f6192, f6281, f6282, dx4122) \ ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \ (f6281 << 3) | (f6282 << 4) | (dx4122 << 5)) @@ -370,8 +357,8 @@ static struct mvebu_mpp_mode mv88f6xxx_mpp_modes[] = { MPP_VAR_FUNCTION(0xb, "lcd", "d17", V(0, 0, 0, 0, 1, 0))), }; -static struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = { - MPP_FUNC_CTRL(0, 44, NULL, kirkwood_mpp_ctrl), +static const struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = { + MPP_FUNC_CTRL(0, 44, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range mv88f6180_gpio_ranges[] = { @@ -379,8 +366,8 @@ static struct pinctrl_gpio_range mv88f6180_gpio_ranges[] = { MPP_GPIO_RANGE(1, 35, 35, 10), }; -static struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = { - MPP_FUNC_CTRL(0, 35, NULL, kirkwood_mpp_ctrl), +static const struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = { + MPP_FUNC_CTRL(0, 35, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range mv88f619x_gpio_ranges[] = { @@ -388,8 +375,8 @@ static struct pinctrl_gpio_range mv88f619x_gpio_ranges[] = { MPP_GPIO_RANGE(1, 32, 32, 4), }; -static struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = { - MPP_FUNC_CTRL(0, 49, NULL, kirkwood_mpp_ctrl), +static const struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = { + MPP_FUNC_CTRL(0, 49, NULL, mvebu_mmio_mpp_ctrl), }; static struct pinctrl_gpio_range mv88f628x_gpio_ranges[] = { @@ -469,17 +456,12 @@ static const struct of_device_id kirkwood_pinctrl_of_match[] = { static int kirkwood_pinctrl_probe(struct platform_device *pdev) { - struct resource *res; const struct of_device_id *match = of_match_device(kirkwood_pinctrl_of_match, &pdev->dev); - pdev->dev.platform_data = (void *)match->data; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mpp_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(mpp_base)) - return PTR_ERR(mpp_base); + pdev->dev.platform_data = (void *)match->data; - return mvebu_pinctrl_probe(pdev); + return mvebu_pinctrl_simple_mmio_probe(pdev); } static struct platform_driver kirkwood_pinctrl_driver = { @@ -489,9 +471,4 @@ static struct platform_driver kirkwood_pinctrl_driver = { }, .probe = kirkwood_pinctrl_probe, }; - -module_platform_driver(kirkwood_pinctrl_driver); - -MODULE_AUTHOR("Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>"); -MODULE_DESCRIPTION("Marvell Kirkwood pinctrl driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(kirkwood_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c index b6ec6db78351..e4dda12d371a 100644 --- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c +++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c @@ -11,7 +11,6 @@ */ #include <linux/platform_device.h> -#include <linux/module.h> #include <linux/slab.h> #include <linux/io.h> #include <linux/of.h> @@ -23,6 +22,8 @@ #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinmux.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> #include "pinctrl-mvebu.h" @@ -38,7 +39,8 @@ struct mvebu_pinctrl_function { struct mvebu_pinctrl_group { const char *name; - struct mvebu_mpp_ctrl *ctrl; + const struct mvebu_mpp_ctrl *ctrl; + struct mvebu_mpp_ctrl_data *data; struct mvebu_mpp_ctrl_setting *settings; unsigned num_settings; unsigned gid; @@ -57,6 +59,30 @@ struct mvebu_pinctrl { u8 variant; }; +int mvebu_mmio_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, + unsigned int pid, unsigned long *config) +{ + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + + *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; + + return 0; +} + +int mvebu_mmio_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, + unsigned int pid, unsigned long config) +{ + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned long reg; + + reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); + writel(reg | (config << shift), data->base + off); + + return 0; +} + static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_pid( struct mvebu_pinctrl *pctl, unsigned pid) { @@ -146,7 +172,7 @@ static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev, if (!grp->ctrl) return -EINVAL; - return grp->ctrl->mpp_get(grp->pins[0], config); + return grp->ctrl->mpp_get(grp->data, grp->pins[0], config); } static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev, @@ -161,7 +187,7 @@ static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev, return -EINVAL; for (i = 0; i < num_configs; i++) { - ret = grp->ctrl->mpp_set(grp->pins[0], configs[i]); + ret = grp->ctrl->mpp_set(grp->data, grp->pins[0], configs[i]); if (ret) return ret; } /* for each config */ @@ -188,18 +214,19 @@ static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, if (curr->subname) seq_printf(s, "(%s)", curr->subname); if (curr->flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { - seq_printf(s, "("); + seq_putc(s, '('); if (curr->flags & MVEBU_SETTING_GPI) - seq_printf(s, "i"); + seq_putc(s, 'i'); if (curr->flags & MVEBU_SETTING_GPO) - seq_printf(s, "o"); - seq_printf(s, ")"); + seq_putc(s, 'o'); + seq_putc(s, ')'); } - } else - seq_printf(s, "current: UNKNOWN"); + } else { + seq_puts(s, "current: UNKNOWN"); + } if (grp->num_settings > 1) { - seq_printf(s, ", available = ["); + seq_puts(s, ", available = ["); for (n = 0; n < grp->num_settings; n++) { if (curr == &grp->settings[n]) continue; @@ -214,17 +241,16 @@ static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, seq_printf(s, "(%s)", grp->settings[n].subname); if (grp->settings[n].flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { - seq_printf(s, "("); + seq_putc(s, '('); if (grp->settings[n].flags & MVEBU_SETTING_GPI) - seq_printf(s, "i"); + seq_putc(s, 'i'); if (grp->settings[n].flags & MVEBU_SETTING_GPO) - seq_printf(s, "o"); - seq_printf(s, ")"); + seq_putc(s, 'o'); + seq_putc(s, ')'); } } - seq_printf(s, " ]"); + seq_puts(s, " ]"); } - return; } static const struct pinconf_ops mvebu_pinconf_ops = { @@ -302,7 +328,7 @@ static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, return -EINVAL; if (grp->ctrl->mpp_gpio_req) - return grp->ctrl->mpp_gpio_req(offset); + return grp->ctrl->mpp_gpio_req(grp->data, offset); setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); if (!setting) @@ -325,7 +351,7 @@ static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, return -EINVAL; if (grp->ctrl->mpp_gpio_dir) - return grp->ctrl->mpp_gpio_dir(offset, input); + return grp->ctrl->mpp_gpio_dir(grp->data, offset, input); setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); if (!setting) @@ -398,13 +424,9 @@ static int mvebu_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, return 0; } - *map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL); - if (*map == NULL) { - dev_err(pctl->dev, - "cannot allocate pinctrl_map memory for %s\n", - np->name); + *map = kmalloc_array(nmaps, sizeof(**map), GFP_KERNEL); + if (!*map) return -ENOMEM; - } n = 0; of_property_for_each_string(np, "marvell,pins", prop, group) { @@ -563,10 +585,8 @@ int mvebu_pinctrl_probe(struct platform_device *pdev) pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl), GFP_KERNEL); - if (!pctl) { - dev_err(&pdev->dev, "unable to alloc driver\n"); + if (!pctl) return -ENOMEM; - } pctl->desc.name = dev_name(&pdev->dev); pctl->desc.owner = THIS_MODULE; @@ -582,7 +602,7 @@ int mvebu_pinctrl_probe(struct platform_device *pdev) pctl->num_groups = 0; pctl->desc.npins = 0; for (n = 0; n < soc->ncontrols; n++) { - struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; + const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; pctl->desc.npins += ctrl->npins; /* initialize control's pins[] array */ @@ -604,10 +624,8 @@ int mvebu_pinctrl_probe(struct platform_device *pdev) pdesc = devm_kzalloc(&pdev->dev, pctl->desc.npins * sizeof(struct pinctrl_pin_desc), GFP_KERNEL); - if (!pdesc) { - dev_err(&pdev->dev, "failed to alloc pinctrl pins\n"); + if (!pdesc) return -ENOMEM; - } for (n = 0; n < pctl->desc.npins; n++) pdesc[n].number = n; @@ -628,9 +646,13 @@ int mvebu_pinctrl_probe(struct platform_device *pdev) /* assign mpp controls to groups */ gid = 0; for (n = 0; n < soc->ncontrols; n++) { - struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; + const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; + struct mvebu_mpp_ctrl_data *data = soc->control_data ? + &soc->control_data[n] : NULL; + pctl->groups[gid].gid = gid; pctl->groups[gid].ctrl = ctrl; + pctl->groups[gid].data = data; pctl->groups[gid].name = ctrl->name; pctl->groups[gid].pins = ctrl->pins; pctl->groups[gid].npins = ctrl->npins; @@ -650,6 +672,7 @@ int mvebu_pinctrl_probe(struct platform_device *pdev) gid++; pctl->groups[gid].gid = gid; pctl->groups[gid].ctrl = ctrl; + pctl->groups[gid].data = data; pctl->groups[gid].name = noname_buf; pctl->groups[gid].pins = &ctrl->pins[k]; pctl->groups[gid].npins = 1; @@ -725,3 +748,94 @@ int mvebu_pinctrl_probe(struct platform_device *pdev) return 0; } + +/* + * mvebu_pinctrl_simple_mmio_probe - probe a simple mmio pinctrl + * @pdev: platform device (with platform data already attached) + * + * Initialise a simple (single base address) mmio pinctrl driver, + * assigning the MMIO base address to all mvebu mpp ctrl instances. + */ +int mvebu_pinctrl_simple_mmio_probe(struct platform_device *pdev) +{ + struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); + struct mvebu_mpp_ctrl_data *mpp_data; + struct resource *res; + void __iomem *base; + int i; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data), + GFP_KERNEL); + if (!mpp_data) + return -ENOMEM; + + for (i = 0; i < soc->ncontrols; i++) + mpp_data[i].base = base; + + soc->control_data = mpp_data; + + return mvebu_pinctrl_probe(pdev); +} + +int mvebu_regmap_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, + unsigned int pid, unsigned long *config) +{ + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned int val; + int err; + + err = regmap_read(data->regmap.map, data->regmap.offset + off, &val); + if (err) + return err; + + *config = (val >> shift) & MVEBU_MPP_MASK; + + return 0; +} + +int mvebu_regmap_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, + unsigned int pid, unsigned long config) +{ + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + + return regmap_update_bits(data->regmap.map, data->regmap.offset + off, + MVEBU_MPP_MASK << shift, config << shift); +} + +int mvebu_pinctrl_simple_regmap_probe(struct platform_device *pdev, + struct device *syscon_dev) +{ + struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); + struct mvebu_mpp_ctrl_data *mpp_data; + struct regmap *regmap; + u32 offset; + int i; + + regmap = syscon_node_to_regmap(syscon_dev->of_node); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + if (of_property_read_u32(pdev->dev.of_node, "offset", &offset)) + return -EINVAL; + + mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data), + GFP_KERNEL); + if (!mpp_data) + return -ENOMEM; + + for (i = 0; i < soc->ncontrols; i++) { + mpp_data[i].regmap.map = regmap; + mpp_data[i].regmap.offset = offset; + } + + soc->control_data = mpp_data; + + return mvebu_pinctrl_probe(pdev); +} diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.h b/drivers/pinctrl/mvebu/pinctrl-mvebu.h index b75a5f4adf3b..c90704e74884 100644 --- a/drivers/pinctrl/mvebu/pinctrl-mvebu.h +++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.h @@ -14,6 +14,22 @@ #define __PINCTRL_MVEBU_H__ /** + * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations + * @base: base address of pinctrl hardware + * @regmap.map: regmap structure + * @regmap.offset: regmap offset + */ +struct mvebu_mpp_ctrl_data { + union { + void __iomem *base; + struct { + struct regmap *map; + u32 offset; + } regmap; + }; +}; + +/** * struct mvebu_mpp_ctrl - describe a mpp control * @name: name of the control group * @pid: first pin id handled by this control @@ -37,10 +53,13 @@ struct mvebu_mpp_ctrl { u8 pid; u8 npins; unsigned *pins; - int (*mpp_get)(unsigned pid, unsigned long *config); - int (*mpp_set)(unsigned pid, unsigned long config); - int (*mpp_gpio_req)(unsigned pid); - int (*mpp_gpio_dir)(unsigned pid, bool input); + int (*mpp_get)(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long *config); + int (*mpp_set)(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long config); + int (*mpp_gpio_req)(struct mvebu_mpp_ctrl_data *data, unsigned pid); + int (*mpp_gpio_dir)(struct mvebu_mpp_ctrl_data *data, unsigned pid, + bool input); }; /** @@ -93,6 +112,7 @@ struct mvebu_mpp_mode { * struct mvebu_pinctrl_soc_info - SoC specific info passed to pinctrl-mvebu * @variant: variant mask of soc_info * @controls: list of available mvebu_mpp_ctrls + * @control_data: optional array, one entry for each control * @ncontrols: number of available mvebu_mpp_ctrls * @modes: list of available mvebu_mpp_modes * @nmodes: number of available mvebu_mpp_modes @@ -105,7 +125,8 @@ struct mvebu_mpp_mode { */ struct mvebu_pinctrl_soc_info { u8 variant; - struct mvebu_mpp_ctrl *controls; + const struct mvebu_mpp_ctrl *controls; + struct mvebu_mpp_ctrl_data *control_data; int ncontrols; struct mvebu_mpp_mode *modes; int nmodes; @@ -177,30 +198,18 @@ struct mvebu_pinctrl_soc_info { #define MVEBU_MPP_BITS 4 #define MVEBU_MPP_MASK 0xf -static inline int default_mpp_ctrl_get(void __iomem *base, unsigned int pid, - unsigned long *config) -{ - unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; - unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; - - *config = (readl(base + off) >> shift) & MVEBU_MPP_MASK; - - return 0; -} - -static inline int default_mpp_ctrl_set(void __iomem *base, unsigned int pid, - unsigned long config) -{ - unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; - unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; - unsigned long reg; - - reg = readl(base + off) & ~(MVEBU_MPP_MASK << shift); - writel(reg | (config << shift), base + off); - - return 0; -} +int mvebu_mmio_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long *config); +int mvebu_mmio_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long config); +int mvebu_regmap_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long *config); +int mvebu_regmap_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid, + unsigned long config); int mvebu_pinctrl_probe(struct platform_device *pdev); +int mvebu_pinctrl_simple_mmio_probe(struct platform_device *pdev); +int mvebu_pinctrl_simple_regmap_probe(struct platform_device *pdev, + struct device *syscon_dev); #endif diff --git a/drivers/pinctrl/mvebu/pinctrl-orion.c b/drivers/pinctrl/mvebu/pinctrl-orion.c index 84e144167b44..69cb4d9f0114 100644 --- a/drivers/pinctrl/mvebu/pinctrl-orion.c +++ b/drivers/pinctrl/mvebu/pinctrl-orion.c @@ -20,7 +20,6 @@ #include <linux/err.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/module.h> #include <linux/platform_device.h> #include <linux/clk.h> #include <linux/of.h> @@ -32,7 +31,8 @@ static void __iomem *mpp_base; static void __iomem *high_mpp_base; -static int orion_mpp_ctrl_get(unsigned pid, unsigned long *config) +static int orion_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, + unsigned pid, unsigned long *config) { unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; @@ -47,7 +47,8 @@ static int orion_mpp_ctrl_get(unsigned pid, unsigned long *config) return 0; } -static int orion_mpp_ctrl_set(unsigned pid, unsigned long config) +static int orion_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, + unsigned pid, unsigned long config) { unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; @@ -161,7 +162,7 @@ static struct mvebu_mpp_mode orion_mpp_modes[] = { MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)), }; -static struct mvebu_mpp_ctrl orion_mpp_controls[] = { +static const struct mvebu_mpp_ctrl orion_mpp_controls[] = { MPP_FUNC_CTRL(0, 19, NULL, orion_mpp_ctrl), }; @@ -247,9 +248,4 @@ static struct platform_driver orion_pinctrl_driver = { }, .probe = orion_pinctrl_probe, }; - -module_platform_driver(orion_pinctrl_driver); - -MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>"); -MODULE_DESCRIPTION("Marvell Orion pinctrl driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(orion_pinctrl_driver); |