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Diffstat (limited to 'drivers/pinctrl/sunxi/pinctrl-sunxi.h')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.h18
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index ee15ab067b5f..44e30deeee38 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -95,6 +95,22 @@
#define PINCTRL_SUN7I_A20 BIT(7)
#define PINCTRL_SUN8I_R40 BIT(8)
+#define PIO_POW_MOD_SEL_REG 0x340
+
+enum sunxi_desc_bias_voltage {
+ BIAS_VOLTAGE_NONE,
+ /*
+ * Bias voltage configuration is done through
+ * Pn_GRP_CONFIG registers, as seen on A80 SoC.
+ */
+ BIAS_VOLTAGE_GRP_CONFIG,
+ /*
+ * Bias voltage is set through PIO_POW_MOD_SEL_REG
+ * register, as seen on H6 SoC, for example.
+ */
+ BIAS_VOLTAGE_PIO_POW_MODE_SEL,
+};
+
struct sunxi_desc_function {
unsigned long variant;
const char *name;
@@ -117,7 +133,7 @@ struct sunxi_pinctrl_desc {
const unsigned int *irq_bank_map;
bool irq_read_needs_mux;
bool disable_strict_mode;
- bool has_io_bias_cfg;
+ enum sunxi_desc_bias_voltage io_bias_cfg_variant;
};
struct sunxi_pinctrl_function {