diff options
Diffstat (limited to 'drivers/staging/ath6kl/include/common')
30 files changed, 0 insertions, 8093 deletions
diff --git a/drivers/staging/ath6kl/include/common/AR6002/AR6K_version.h b/drivers/staging/ath6kl/include/common/AR6002/AR6K_version.h deleted file mode 100644 index 5407e05d9b05..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/AR6K_version.h +++ /dev/null @@ -1,52 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="AR6K_version.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#define __VER_MAJOR_ 3 -#define __VER_MINOR_ 0 -#define __VER_PATCH_ 0 - -/* The makear6ksdk script (used for release builds) modifies the following line. */ -#define __BUILD_NUMBER_ 233 - - -/* Format of the version number. */ -#define VER_MAJOR_BIT_OFFSET 28 -#define VER_MINOR_BIT_OFFSET 24 -#define VER_PATCH_BIT_OFFSET 16 -#define VER_BUILD_NUM_BIT_OFFSET 0 - - -/* - * The version has the following format: - * Bits 28-31: Major version - * Bits 24-27: Minor version - * Bits 16-23: Patch version - * Bits 0-15: Build number (automatically generated during build process ) - * E.g. Build 1.1.3.7 would be represented as 0x11030007. - * - * DO NOT split the following macro into multiple lines as this may confuse the build scripts. - */ -#define AR6K_SW_VERSION ( ( __VER_MAJOR_ << VER_MAJOR_BIT_OFFSET ) + ( __VER_MINOR_ << VER_MINOR_BIT_OFFSET ) + ( __VER_PATCH_ << VER_PATCH_BIT_OFFSET ) + ( __BUILD_NUMBER_ << VER_BUILD_NUM_BIT_OFFSET ) ) - -/* ABI Version. Reflects the version of binary interface exposed by AR6K target firmware. Needs to be incremented by 1 for any change in the firmware that requires upgrade of the driver on the host side for the change to work correctly */ -#define AR6K_ABI_VERSION 1 diff --git a/drivers/staging/ath6kl/include/common/AR6002/addrs.h b/drivers/staging/ath6kl/include/common/AR6002/addrs.h deleted file mode 100644 index bbf8d42828c1..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/addrs.h +++ /dev/null @@ -1,90 +0,0 @@ -//------------------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// -// Author(s): ="Atheros" -//------------------------------------------------------------------------------ - -#ifndef __ADDRS_H__ -#define __ADDRS_H__ - -/* - * Special AR6002 Addresses that may be needed by special - * applications (e.g. ART) on the Host as well as Target. - */ - -#if defined(AR6002_REV2) -#define AR6K_RAM_START 0x00500000 -#define TARG_RAM_OFFSET(vaddr) ((u32)(vaddr) & 0xfffff) -#define TARG_RAM_SZ (184*1024) -#define TARG_ROM_SZ (80*1024) -#endif -#if defined(AR6002_REV4) || defined(AR6003) -#define AR6K_RAM_START 0x00540000 -#define TARG_RAM_OFFSET(vaddr) (((u32)(vaddr) & 0xfffff) - 0x40000) -#define TARG_RAM_SZ (256*1024) -#define TARG_ROM_SZ (256*1024) -#endif - -#define AR6002_BOARD_DATA_SZ 768 -#define AR6002_BOARD_EXT_DATA_SZ 0 -#define AR6003_BOARD_DATA_SZ 1024 -#define AR6003_BOARD_EXT_DATA_SZ 768 - -#define AR6K_RAM_ADDR(byte_offset) (AR6K_RAM_START+(byte_offset)) -#define TARG_RAM_ADDRS(byte_offset) AR6K_RAM_ADDR(byte_offset) - -#define AR6K_ROM_START 0x004e0000 -#define TARG_ROM_OFFSET(vaddr) (((u32)(vaddr) & 0x1fffff) - 0xe0000) -#define AR6K_ROM_ADDR(byte_offset) (AR6K_ROM_START+(byte_offset)) -#define TARG_ROM_ADDRS(byte_offset) AR6K_ROM_ADDR(byte_offset) - -/* - * At this ROM address is a pointer to the start of the ROM DataSet Index. - * If there are no ROM DataSets, there's a 0 at this address. - */ -#define ROM_DATASET_INDEX_ADDR (TARG_ROM_ADDRS(TARG_ROM_SZ)-8) -#define ROM_MBIST_CKSUM_ADDR (TARG_ROM_ADDRS(TARG_ROM_SZ)-4) - -/* - * The API A_BOARD_DATA_ADDR() is the proper way to get a read pointer to - * board data. - */ - -/* Size of Board Data, in bytes */ -#if defined(AR6002_REV4) || defined(AR6003) -#define BOARD_DATA_SZ AR6003_BOARD_DATA_SZ -#else -#define BOARD_DATA_SZ AR6002_BOARD_DATA_SZ -#endif - - -/* - * Constants used by ASM code to access fields of host_interest_s, - * which is at a fixed location in RAM. - */ -#if defined(AR6002_REV4) || defined(AR6003) -#define HOST_INTEREST_FLASH_IS_PRESENT_ADDR (AR6K_RAM_START + 0x60c) -#else -#define HOST_INTEREST_FLASH_IS_PRESENT_ADDR (AR6K_RAM_START + 0x40c) -#endif -#define FLASH_IS_PRESENT_TARGADDR HOST_INTEREST_FLASH_IS_PRESENT_ADDR - -#endif /* __ADDRS_H__ */ - - - diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/apb_athr_wlan_map.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/apb_athr_wlan_map.h deleted file mode 100644 index 609eb9841f59..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/apb_athr_wlan_map.h +++ /dev/null @@ -1,40 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#ifndef _APB_ATHR_WLAN_MAP_H_ -#define _APB_ATHR_WLAN_MAP_H_ - -#define WLAN_RTC_BASE_ADDRESS 0x00004000 -#define WLAN_VMC_BASE_ADDRESS 0x00008000 -#define WLAN_UART_BASE_ADDRESS 0x0000c000 -#define WLAN_DBG_UART_BASE_ADDRESS 0x0000d000 -#define WLAN_UMBOX_BASE_ADDRESS 0x0000e000 -#define WLAN_SI_BASE_ADDRESS 0x00010000 -#define WLAN_GPIO_BASE_ADDRESS 0x00014000 -#define WLAN_MBOX_BASE_ADDRESS 0x00018000 -#define WLAN_ANALOG_INTF_BASE_ADDRESS 0x0001c000 -#define WLAN_MAC_BASE_ADDRESS 0x00020000 -#define WLAN_RDMA_BASE_ADDRESS 0x00030100 -#define EFUSE_BASE_ADDRESS 0x00031000 - -#endif /* _APB_ATHR_WLAN_MAP_REG_H_ */ diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/apb_map.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/apb_map.h deleted file mode 100644 index 0068ca31b051..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/apb_map.h +++ /dev/null @@ -1,40 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#include "apb_athr_wlan_map.h" - -#ifndef BT_HEADERS - -#define RTC_BASE_ADDRESS WLAN_RTC_BASE_ADDRESS -#define VMC_BASE_ADDRESS WLAN_VMC_BASE_ADDRESS -#define UART_BASE_ADDRESS WLAN_UART_BASE_ADDRESS -#define DBG_UART_BASE_ADDRESS WLAN_DBG_UART_BASE_ADDRESS -#define UMBOX_BASE_ADDRESS WLAN_UMBOX_BASE_ADDRESS -#define SI_BASE_ADDRESS WLAN_SI_BASE_ADDRESS -#define GPIO_BASE_ADDRESS WLAN_GPIO_BASE_ADDRESS -#define MBOX_BASE_ADDRESS WLAN_MBOX_BASE_ADDRESS -#define ANALOG_INTF_BASE_ADDRESS WLAN_ANALOG_INTF_BASE_ADDRESS -#define MAC_BASE_ADDRESS WLAN_MAC_BASE_ADDRESS -#define RDMA_BASE_ADDRESS WLAN_RDMA_BASE_ADDRESS - -#endif diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_host_reg.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_host_reg.h deleted file mode 100644 index 109f24e10a65..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_host_reg.h +++ /dev/null @@ -1,24 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#include "mbox_wlan_host_reg.h" diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_reg.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_reg.h deleted file mode 100644 index 72fa483450d6..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_reg.h +++ /dev/null @@ -1,552 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#include "mbox_wlan_reg.h" - -#ifndef BT_HEADERS - -#define MBOX_FIFO_ADDRESS WLAN_MBOX_FIFO_ADDRESS -#define MBOX_FIFO_OFFSET WLAN_MBOX_FIFO_OFFSET -#define MBOX_FIFO_DATA_MSB WLAN_MBOX_FIFO_DATA_MSB -#define MBOX_FIFO_DATA_LSB WLAN_MBOX_FIFO_DATA_LSB -#define MBOX_FIFO_DATA_MASK WLAN_MBOX_FIFO_DATA_MASK -#define MBOX_FIFO_DATA_GET(x) WLAN_MBOX_FIFO_DATA_GET(x) -#define MBOX_FIFO_DATA_SET(x) WLAN_MBOX_FIFO_DATA_SET(x) -#define MBOX_FIFO_STATUS_ADDRESS WLAN_MBOX_FIFO_STATUS_ADDRESS -#define MBOX_FIFO_STATUS_OFFSET WLAN_MBOX_FIFO_STATUS_OFFSET -#define MBOX_FIFO_STATUS_EMPTY_MSB WLAN_MBOX_FIFO_STATUS_EMPTY_MSB -#define MBOX_FIFO_STATUS_EMPTY_LSB WLAN_MBOX_FIFO_STATUS_EMPTY_LSB -#define MBOX_FIFO_STATUS_EMPTY_MASK WLAN_MBOX_FIFO_STATUS_EMPTY_MASK -#define MBOX_FIFO_STATUS_EMPTY_GET(x) WLAN_MBOX_FIFO_STATUS_EMPTY_GET(x) -#define MBOX_FIFO_STATUS_EMPTY_SET(x) WLAN_MBOX_FIFO_STATUS_EMPTY_SET(x) -#define MBOX_FIFO_STATUS_FULL_MSB WLAN_MBOX_FIFO_STATUS_FULL_MSB -#define MBOX_FIFO_STATUS_FULL_LSB WLAN_MBOX_FIFO_STATUS_FULL_LSB -#define MBOX_FIFO_STATUS_FULL_MASK WLAN_MBOX_FIFO_STATUS_FULL_MASK -#define MBOX_FIFO_STATUS_FULL_GET(x) WLAN_MBOX_FIFO_STATUS_FULL_GET(x) -#define MBOX_FIFO_STATUS_FULL_SET(x) WLAN_MBOX_FIFO_STATUS_FULL_SET(x) -#define MBOX_DMA_POLICY_ADDRESS WLAN_MBOX_DMA_POLICY_ADDRESS -#define MBOX_DMA_POLICY_OFFSET WLAN_MBOX_DMA_POLICY_OFFSET -#define MBOX_DMA_POLICY_TX_QUANTUM_MSB WLAN_MBOX_DMA_POLICY_TX_QUANTUM_MSB -#define MBOX_DMA_POLICY_TX_QUANTUM_LSB WLAN_MBOX_DMA_POLICY_TX_QUANTUM_LSB -#define MBOX_DMA_POLICY_TX_QUANTUM_MASK WLAN_MBOX_DMA_POLICY_TX_QUANTUM_MASK -#define MBOX_DMA_POLICY_TX_QUANTUM_GET(x) WLAN_MBOX_DMA_POLICY_TX_QUANTUM_GET(x) -#define MBOX_DMA_POLICY_TX_QUANTUM_SET(x) WLAN_MBOX_DMA_POLICY_TX_QUANTUM_SET(x) -#define MBOX_DMA_POLICY_TX_ORDER_MSB WLAN_MBOX_DMA_POLICY_TX_ORDER_MSB -#define MBOX_DMA_POLICY_TX_ORDER_LSB WLAN_MBOX_DMA_POLICY_TX_ORDER_LSB -#define MBOX_DMA_POLICY_TX_ORDER_MASK WLAN_MBOX_DMA_POLICY_TX_ORDER_MASK -#define MBOX_DMA_POLICY_TX_ORDER_GET(x) WLAN_MBOX_DMA_POLICY_TX_ORDER_GET(x) -#define MBOX_DMA_POLICY_TX_ORDER_SET(x) WLAN_MBOX_DMA_POLICY_TX_ORDER_SET(x) -#define MBOX_DMA_POLICY_RX_QUANTUM_MSB WLAN_MBOX_DMA_POLICY_RX_QUANTUM_MSB -#define MBOX_DMA_POLICY_RX_QUANTUM_LSB WLAN_MBOX_DMA_POLICY_RX_QUANTUM_LSB -#define MBOX_DMA_POLICY_RX_QUANTUM_MASK WLAN_MBOX_DMA_POLICY_RX_QUANTUM_MASK -#define MBOX_DMA_POLICY_RX_QUANTUM_GET(x) WLAN_MBOX_DMA_POLICY_RX_QUANTUM_GET(x) -#define MBOX_DMA_POLICY_RX_QUANTUM_SET(x) WLAN_MBOX_DMA_POLICY_RX_QUANTUM_SET(x) -#define MBOX_DMA_POLICY_RX_ORDER_MSB WLAN_MBOX_DMA_POLICY_RX_ORDER_MSB -#define MBOX_DMA_POLICY_RX_ORDER_LSB WLAN_MBOX_DMA_POLICY_RX_ORDER_LSB -#define MBOX_DMA_POLICY_RX_ORDER_MASK WLAN_MBOX_DMA_POLICY_RX_ORDER_MASK -#define MBOX_DMA_POLICY_RX_ORDER_GET(x) WLAN_MBOX_DMA_POLICY_RX_ORDER_GET(x) -#define MBOX_DMA_POLICY_RX_ORDER_SET(x) WLAN_MBOX_DMA_POLICY_RX_ORDER_SET(x) -#define MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS -#define MBOX0_DMA_RX_DESCRIPTOR_BASE_OFFSET WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_OFFSET -#define MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB -#define MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB -#define MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK -#define MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define MBOX0_DMA_RX_CONTROL_ADDRESS WLAN_MBOX0_DMA_RX_CONTROL_ADDRESS -#define MBOX0_DMA_RX_CONTROL_OFFSET WLAN_MBOX0_DMA_RX_CONTROL_OFFSET -#define MBOX0_DMA_RX_CONTROL_RESUME_MSB WLAN_MBOX0_DMA_RX_CONTROL_RESUME_MSB -#define MBOX0_DMA_RX_CONTROL_RESUME_LSB WLAN_MBOX0_DMA_RX_CONTROL_RESUME_LSB -#define MBOX0_DMA_RX_CONTROL_RESUME_MASK WLAN_MBOX0_DMA_RX_CONTROL_RESUME_MASK -#define MBOX0_DMA_RX_CONTROL_RESUME_GET(x) WLAN_MBOX0_DMA_RX_CONTROL_RESUME_GET(x) -#define MBOX0_DMA_RX_CONTROL_RESUME_SET(x) WLAN_MBOX0_DMA_RX_CONTROL_RESUME_SET(x) -#define MBOX0_DMA_RX_CONTROL_START_MSB WLAN_MBOX0_DMA_RX_CONTROL_START_MSB -#define MBOX0_DMA_RX_CONTROL_START_LSB WLAN_MBOX0_DMA_RX_CONTROL_START_LSB -#define MBOX0_DMA_RX_CONTROL_START_MASK WLAN_MBOX0_DMA_RX_CONTROL_START_MASK -#define MBOX0_DMA_RX_CONTROL_START_GET(x) WLAN_MBOX0_DMA_RX_CONTROL_START_GET(x) -#define MBOX0_DMA_RX_CONTROL_START_SET(x) WLAN_MBOX0_DMA_RX_CONTROL_START_SET(x) -#define MBOX0_DMA_RX_CONTROL_STOP_MSB WLAN_MBOX0_DMA_RX_CONTROL_STOP_MSB -#define MBOX0_DMA_RX_CONTROL_STOP_LSB WLAN_MBOX0_DMA_RX_CONTROL_STOP_LSB -#define MBOX0_DMA_RX_CONTROL_STOP_MASK WLAN_MBOX0_DMA_RX_CONTROL_STOP_MASK -#define MBOX0_DMA_RX_CONTROL_STOP_GET(x) WLAN_MBOX0_DMA_RX_CONTROL_STOP_GET(x) -#define MBOX0_DMA_RX_CONTROL_STOP_SET(x) WLAN_MBOX0_DMA_RX_CONTROL_STOP_SET(x) -#define MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS -#define MBOX0_DMA_TX_DESCRIPTOR_BASE_OFFSET WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_OFFSET -#define MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB -#define MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB -#define MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK -#define MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define MBOX0_DMA_TX_CONTROL_ADDRESS WLAN_MBOX0_DMA_TX_CONTROL_ADDRESS -#define MBOX0_DMA_TX_CONTROL_OFFSET WLAN_MBOX0_DMA_TX_CONTROL_OFFSET -#define MBOX0_DMA_TX_CONTROL_RESUME_MSB WLAN_MBOX0_DMA_TX_CONTROL_RESUME_MSB -#define MBOX0_DMA_TX_CONTROL_RESUME_LSB WLAN_MBOX0_DMA_TX_CONTROL_RESUME_LSB -#define MBOX0_DMA_TX_CONTROL_RESUME_MASK WLAN_MBOX0_DMA_TX_CONTROL_RESUME_MASK -#define MBOX0_DMA_TX_CONTROL_RESUME_GET(x) WLAN_MBOX0_DMA_TX_CONTROL_RESUME_GET(x) -#define MBOX0_DMA_TX_CONTROL_RESUME_SET(x) WLAN_MBOX0_DMA_TX_CONTROL_RESUME_SET(x) -#define MBOX0_DMA_TX_CONTROL_START_MSB WLAN_MBOX0_DMA_TX_CONTROL_START_MSB -#define MBOX0_DMA_TX_CONTROL_START_LSB WLAN_MBOX0_DMA_TX_CONTROL_START_LSB -#define MBOX0_DMA_TX_CONTROL_START_MASK WLAN_MBOX0_DMA_TX_CONTROL_START_MASK -#define MBOX0_DMA_TX_CONTROL_START_GET(x) WLAN_MBOX0_DMA_TX_CONTROL_START_GET(x) -#define MBOX0_DMA_TX_CONTROL_START_SET(x) WLAN_MBOX0_DMA_TX_CONTROL_START_SET(x) -#define MBOX0_DMA_TX_CONTROL_STOP_MSB WLAN_MBOX0_DMA_TX_CONTROL_STOP_MSB -#define MBOX0_DMA_TX_CONTROL_STOP_LSB WLAN_MBOX0_DMA_TX_CONTROL_STOP_LSB -#define MBOX0_DMA_TX_CONTROL_STOP_MASK WLAN_MBOX0_DMA_TX_CONTROL_STOP_MASK -#define MBOX0_DMA_TX_CONTROL_STOP_GET(x) WLAN_MBOX0_DMA_TX_CONTROL_STOP_GET(x) -#define MBOX0_DMA_TX_CONTROL_STOP_SET(x) WLAN_MBOX0_DMA_TX_CONTROL_STOP_SET(x) -#define MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS -#define MBOX1_DMA_RX_DESCRIPTOR_BASE_OFFSET WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_OFFSET -#define MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB -#define MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB -#define MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK -#define MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define MBOX1_DMA_RX_CONTROL_ADDRESS WLAN_MBOX1_DMA_RX_CONTROL_ADDRESS -#define MBOX1_DMA_RX_CONTROL_OFFSET WLAN_MBOX1_DMA_RX_CONTROL_OFFSET -#define MBOX1_DMA_RX_CONTROL_RESUME_MSB WLAN_MBOX1_DMA_RX_CONTROL_RESUME_MSB -#define MBOX1_DMA_RX_CONTROL_RESUME_LSB WLAN_MBOX1_DMA_RX_CONTROL_RESUME_LSB -#define MBOX1_DMA_RX_CONTROL_RESUME_MASK WLAN_MBOX1_DMA_RX_CONTROL_RESUME_MASK -#define MBOX1_DMA_RX_CONTROL_RESUME_GET(x) WLAN_MBOX1_DMA_RX_CONTROL_RESUME_GET(x) -#define MBOX1_DMA_RX_CONTROL_RESUME_SET(x) WLAN_MBOX1_DMA_RX_CONTROL_RESUME_SET(x) -#define MBOX1_DMA_RX_CONTROL_START_MSB WLAN_MBOX1_DMA_RX_CONTROL_START_MSB -#define MBOX1_DMA_RX_CONTROL_START_LSB WLAN_MBOX1_DMA_RX_CONTROL_START_LSB -#define MBOX1_DMA_RX_CONTROL_START_MASK WLAN_MBOX1_DMA_RX_CONTROL_START_MASK -#define MBOX1_DMA_RX_CONTROL_START_GET(x) WLAN_MBOX1_DMA_RX_CONTROL_START_GET(x) -#define MBOX1_DMA_RX_CONTROL_START_SET(x) WLAN_MBOX1_DMA_RX_CONTROL_START_SET(x) -#define MBOX1_DMA_RX_CONTROL_STOP_MSB WLAN_MBOX1_DMA_RX_CONTROL_STOP_MSB -#define MBOX1_DMA_RX_CONTROL_STOP_LSB WLAN_MBOX1_DMA_RX_CONTROL_STOP_LSB -#define MBOX1_DMA_RX_CONTROL_STOP_MASK WLAN_MBOX1_DMA_RX_CONTROL_STOP_MASK -#define MBOX1_DMA_RX_CONTROL_STOP_GET(x) WLAN_MBOX1_DMA_RX_CONTROL_STOP_GET(x) -#define MBOX1_DMA_RX_CONTROL_STOP_SET(x) WLAN_MBOX1_DMA_RX_CONTROL_STOP_SET(x) -#define MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS -#define MBOX1_DMA_TX_DESCRIPTOR_BASE_OFFSET WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_OFFSET -#define MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB -#define MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB -#define MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK -#define MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define MBOX1_DMA_TX_CONTROL_ADDRESS WLAN_MBOX1_DMA_TX_CONTROL_ADDRESS -#define MBOX1_DMA_TX_CONTROL_OFFSET WLAN_MBOX1_DMA_TX_CONTROL_OFFSET -#define MBOX1_DMA_TX_CONTROL_RESUME_MSB WLAN_MBOX1_DMA_TX_CONTROL_RESUME_MSB -#define MBOX1_DMA_TX_CONTROL_RESUME_LSB WLAN_MBOX1_DMA_TX_CONTROL_RESUME_LSB -#define MBOX1_DMA_TX_CONTROL_RESUME_MASK WLAN_MBOX1_DMA_TX_CONTROL_RESUME_MASK -#define MBOX1_DMA_TX_CONTROL_RESUME_GET(x) WLAN_MBOX1_DMA_TX_CONTROL_RESUME_GET(x) -#define MBOX1_DMA_TX_CONTROL_RESUME_SET(x) WLAN_MBOX1_DMA_TX_CONTROL_RESUME_SET(x) -#define MBOX1_DMA_TX_CONTROL_START_MSB WLAN_MBOX1_DMA_TX_CONTROL_START_MSB -#define MBOX1_DMA_TX_CONTROL_START_LSB WLAN_MBOX1_DMA_TX_CONTROL_START_LSB -#define MBOX1_DMA_TX_CONTROL_START_MASK WLAN_MBOX1_DMA_TX_CONTROL_START_MASK -#define MBOX1_DMA_TX_CONTROL_START_GET(x) WLAN_MBOX1_DMA_TX_CONTROL_START_GET(x) -#define MBOX1_DMA_TX_CONTROL_START_SET(x) WLAN_MBOX1_DMA_TX_CONTROL_START_SET(x) -#define MBOX1_DMA_TX_CONTROL_STOP_MSB WLAN_MBOX1_DMA_TX_CONTROL_STOP_MSB -#define MBOX1_DMA_TX_CONTROL_STOP_LSB WLAN_MBOX1_DMA_TX_CONTROL_STOP_LSB -#define MBOX1_DMA_TX_CONTROL_STOP_MASK WLAN_MBOX1_DMA_TX_CONTROL_STOP_MASK -#define MBOX1_DMA_TX_CONTROL_STOP_GET(x) WLAN_MBOX1_DMA_TX_CONTROL_STOP_GET(x) -#define MBOX1_DMA_TX_CONTROL_STOP_SET(x) WLAN_MBOX1_DMA_TX_CONTROL_STOP_SET(x) -#define MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS -#define MBOX2_DMA_RX_DESCRIPTOR_BASE_OFFSET WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_OFFSET -#define MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB -#define MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB -#define MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK -#define MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define MBOX2_DMA_RX_CONTROL_ADDRESS WLAN_MBOX2_DMA_RX_CONTROL_ADDRESS -#define MBOX2_DMA_RX_CONTROL_OFFSET WLAN_MBOX2_DMA_RX_CONTROL_OFFSET -#define MBOX2_DMA_RX_CONTROL_RESUME_MSB WLAN_MBOX2_DMA_RX_CONTROL_RESUME_MSB -#define MBOX2_DMA_RX_CONTROL_RESUME_LSB WLAN_MBOX2_DMA_RX_CONTROL_RESUME_LSB -#define MBOX2_DMA_RX_CONTROL_RESUME_MASK WLAN_MBOX2_DMA_RX_CONTROL_RESUME_MASK -#define MBOX2_DMA_RX_CONTROL_RESUME_GET(x) WLAN_MBOX2_DMA_RX_CONTROL_RESUME_GET(x) -#define MBOX2_DMA_RX_CONTROL_RESUME_SET(x) WLAN_MBOX2_DMA_RX_CONTROL_RESUME_SET(x) -#define MBOX2_DMA_RX_CONTROL_START_MSB WLAN_MBOX2_DMA_RX_CONTROL_START_MSB -#define MBOX2_DMA_RX_CONTROL_START_LSB WLAN_MBOX2_DMA_RX_CONTROL_START_LSB -#define MBOX2_DMA_RX_CONTROL_START_MASK WLAN_MBOX2_DMA_RX_CONTROL_START_MASK -#define MBOX2_DMA_RX_CONTROL_START_GET(x) WLAN_MBOX2_DMA_RX_CONTROL_START_GET(x) -#define MBOX2_DMA_RX_CONTROL_START_SET(x) WLAN_MBOX2_DMA_RX_CONTROL_START_SET(x) -#define MBOX2_DMA_RX_CONTROL_STOP_MSB WLAN_MBOX2_DMA_RX_CONTROL_STOP_MSB -#define MBOX2_DMA_RX_CONTROL_STOP_LSB WLAN_MBOX2_DMA_RX_CONTROL_STOP_LSB -#define MBOX2_DMA_RX_CONTROL_STOP_MASK WLAN_MBOX2_DMA_RX_CONTROL_STOP_MASK -#define MBOX2_DMA_RX_CONTROL_STOP_GET(x) WLAN_MBOX2_DMA_RX_CONTROL_STOP_GET(x) -#define MBOX2_DMA_RX_CONTROL_STOP_SET(x) WLAN_MBOX2_DMA_RX_CONTROL_STOP_SET(x) -#define MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS -#define MBOX2_DMA_TX_DESCRIPTOR_BASE_OFFSET WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_OFFSET -#define MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB -#define MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB -#define MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK -#define MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define MBOX2_DMA_TX_CONTROL_ADDRESS WLAN_MBOX2_DMA_TX_CONTROL_ADDRESS -#define MBOX2_DMA_TX_CONTROL_OFFSET WLAN_MBOX2_DMA_TX_CONTROL_OFFSET -#define MBOX2_DMA_TX_CONTROL_RESUME_MSB WLAN_MBOX2_DMA_TX_CONTROL_RESUME_MSB -#define MBOX2_DMA_TX_CONTROL_RESUME_LSB WLAN_MBOX2_DMA_TX_CONTROL_RESUME_LSB -#define MBOX2_DMA_TX_CONTROL_RESUME_MASK WLAN_MBOX2_DMA_TX_CONTROL_RESUME_MASK -#define MBOX2_DMA_TX_CONTROL_RESUME_GET(x) WLAN_MBOX2_DMA_TX_CONTROL_RESUME_GET(x) -#define MBOX2_DMA_TX_CONTROL_RESUME_SET(x) WLAN_MBOX2_DMA_TX_CONTROL_RESUME_SET(x) -#define MBOX2_DMA_TX_CONTROL_START_MSB WLAN_MBOX2_DMA_TX_CONTROL_START_MSB -#define MBOX2_DMA_TX_CONTROL_START_LSB WLAN_MBOX2_DMA_TX_CONTROL_START_LSB -#define MBOX2_DMA_TX_CONTROL_START_MASK WLAN_MBOX2_DMA_TX_CONTROL_START_MASK -#define MBOX2_DMA_TX_CONTROL_START_GET(x) WLAN_MBOX2_DMA_TX_CONTROL_START_GET(x) -#define MBOX2_DMA_TX_CONTROL_START_SET(x) WLAN_MBOX2_DMA_TX_CONTROL_START_SET(x) -#define MBOX2_DMA_TX_CONTROL_STOP_MSB WLAN_MBOX2_DMA_TX_CONTROL_STOP_MSB -#define MBOX2_DMA_TX_CONTROL_STOP_LSB WLAN_MBOX2_DMA_TX_CONTROL_STOP_LSB -#define MBOX2_DMA_TX_CONTROL_STOP_MASK WLAN_MBOX2_DMA_TX_CONTROL_STOP_MASK -#define MBOX2_DMA_TX_CONTROL_STOP_GET(x) WLAN_MBOX2_DMA_TX_CONTROL_STOP_GET(x) -#define MBOX2_DMA_TX_CONTROL_STOP_SET(x) WLAN_MBOX2_DMA_TX_CONTROL_STOP_SET(x) -#define MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS -#define MBOX3_DMA_RX_DESCRIPTOR_BASE_OFFSET WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_OFFSET -#define MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB -#define MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB -#define MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK -#define MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define MBOX3_DMA_RX_CONTROL_ADDRESS WLAN_MBOX3_DMA_RX_CONTROL_ADDRESS -#define MBOX3_DMA_RX_CONTROL_OFFSET WLAN_MBOX3_DMA_RX_CONTROL_OFFSET -#define MBOX3_DMA_RX_CONTROL_RESUME_MSB WLAN_MBOX3_DMA_RX_CONTROL_RESUME_MSB -#define MBOX3_DMA_RX_CONTROL_RESUME_LSB WLAN_MBOX3_DMA_RX_CONTROL_RESUME_LSB -#define MBOX3_DMA_RX_CONTROL_RESUME_MASK WLAN_MBOX3_DMA_RX_CONTROL_RESUME_MASK -#define MBOX3_DMA_RX_CONTROL_RESUME_GET(x) WLAN_MBOX3_DMA_RX_CONTROL_RESUME_GET(x) -#define MBOX3_DMA_RX_CONTROL_RESUME_SET(x) WLAN_MBOX3_DMA_RX_CONTROL_RESUME_SET(x) -#define MBOX3_DMA_RX_CONTROL_START_MSB WLAN_MBOX3_DMA_RX_CONTROL_START_MSB -#define MBOX3_DMA_RX_CONTROL_START_LSB WLAN_MBOX3_DMA_RX_CONTROL_START_LSB -#define MBOX3_DMA_RX_CONTROL_START_MASK WLAN_MBOX3_DMA_RX_CONTROL_START_MASK -#define MBOX3_DMA_RX_CONTROL_START_GET(x) WLAN_MBOX3_DMA_RX_CONTROL_START_GET(x) -#define MBOX3_DMA_RX_CONTROL_START_SET(x) WLAN_MBOX3_DMA_RX_CONTROL_START_SET(x) -#define MBOX3_DMA_RX_CONTROL_STOP_MSB WLAN_MBOX3_DMA_RX_CONTROL_STOP_MSB -#define MBOX3_DMA_RX_CONTROL_STOP_LSB WLAN_MBOX3_DMA_RX_CONTROL_STOP_LSB -#define MBOX3_DMA_RX_CONTROL_STOP_MASK WLAN_MBOX3_DMA_RX_CONTROL_STOP_MASK -#define MBOX3_DMA_RX_CONTROL_STOP_GET(x) WLAN_MBOX3_DMA_RX_CONTROL_STOP_GET(x) -#define MBOX3_DMA_RX_CONTROL_STOP_SET(x) WLAN_MBOX3_DMA_RX_CONTROL_STOP_SET(x) -#define MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS -#define MBOX3_DMA_TX_DESCRIPTOR_BASE_OFFSET WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_OFFSET -#define MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB -#define MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB -#define MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK -#define MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define MBOX3_DMA_TX_CONTROL_ADDRESS WLAN_MBOX3_DMA_TX_CONTROL_ADDRESS -#define MBOX3_DMA_TX_CONTROL_OFFSET WLAN_MBOX3_DMA_TX_CONTROL_OFFSET -#define MBOX3_DMA_TX_CONTROL_RESUME_MSB WLAN_MBOX3_DMA_TX_CONTROL_RESUME_MSB -#define MBOX3_DMA_TX_CONTROL_RESUME_LSB WLAN_MBOX3_DMA_TX_CONTROL_RESUME_LSB -#define MBOX3_DMA_TX_CONTROL_RESUME_MASK WLAN_MBOX3_DMA_TX_CONTROL_RESUME_MASK -#define MBOX3_DMA_TX_CONTROL_RESUME_GET(x) WLAN_MBOX3_DMA_TX_CONTROL_RESUME_GET(x) -#define MBOX3_DMA_TX_CONTROL_RESUME_SET(x) WLAN_MBOX3_DMA_TX_CONTROL_RESUME_SET(x) -#define MBOX3_DMA_TX_CONTROL_START_MSB WLAN_MBOX3_DMA_TX_CONTROL_START_MSB -#define MBOX3_DMA_TX_CONTROL_START_LSB WLAN_MBOX3_DMA_TX_CONTROL_START_LSB -#define MBOX3_DMA_TX_CONTROL_START_MASK WLAN_MBOX3_DMA_TX_CONTROL_START_MASK -#define MBOX3_DMA_TX_CONTROL_START_GET(x) WLAN_MBOX3_DMA_TX_CONTROL_START_GET(x) -#define MBOX3_DMA_TX_CONTROL_START_SET(x) WLAN_MBOX3_DMA_TX_CONTROL_START_SET(x) -#define MBOX3_DMA_TX_CONTROL_STOP_MSB WLAN_MBOX3_DMA_TX_CONTROL_STOP_MSB -#define MBOX3_DMA_TX_CONTROL_STOP_LSB WLAN_MBOX3_DMA_TX_CONTROL_STOP_LSB -#define MBOX3_DMA_TX_CONTROL_STOP_MASK WLAN_MBOX3_DMA_TX_CONTROL_STOP_MASK -#define MBOX3_DMA_TX_CONTROL_STOP_GET(x) WLAN_MBOX3_DMA_TX_CONTROL_STOP_GET(x) -#define MBOX3_DMA_TX_CONTROL_STOP_SET(x) WLAN_MBOX3_DMA_TX_CONTROL_STOP_SET(x) -#define MBOX_INT_STATUS_ADDRESS WLAN_MBOX_INT_STATUS_ADDRESS -#define MBOX_INT_STATUS_OFFSET WLAN_MBOX_INT_STATUS_OFFSET -#define MBOX_INT_STATUS_RX_DMA_COMPLETE_MSB WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_MSB -#define MBOX_INT_STATUS_RX_DMA_COMPLETE_LSB WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_LSB -#define MBOX_INT_STATUS_RX_DMA_COMPLETE_MASK WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_MASK -#define MBOX_INT_STATUS_RX_DMA_COMPLETE_GET(x) WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_GET(x) -#define MBOX_INT_STATUS_RX_DMA_COMPLETE_SET(x) WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_SET(x) -#define MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MSB WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MSB -#define MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB -#define MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK -#define MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_GET(x) WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_GET(x) -#define MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_SET(x) WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_SET(x) -#define MBOX_INT_STATUS_TX_DMA_COMPLETE_MSB WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_MSB -#define MBOX_INT_STATUS_TX_DMA_COMPLETE_LSB WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_LSB -#define MBOX_INT_STATUS_TX_DMA_COMPLETE_MASK WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_MASK -#define MBOX_INT_STATUS_TX_DMA_COMPLETE_GET(x) WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_GET(x) -#define MBOX_INT_STATUS_TX_DMA_COMPLETE_SET(x) WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_SET(x) -#define MBOX_INT_STATUS_TX_OVERFLOW_MSB WLAN_MBOX_INT_STATUS_TX_OVERFLOW_MSB -#define MBOX_INT_STATUS_TX_OVERFLOW_LSB WLAN_MBOX_INT_STATUS_TX_OVERFLOW_LSB -#define MBOX_INT_STATUS_TX_OVERFLOW_MASK WLAN_MBOX_INT_STATUS_TX_OVERFLOW_MASK -#define MBOX_INT_STATUS_TX_OVERFLOW_GET(x) WLAN_MBOX_INT_STATUS_TX_OVERFLOW_GET(x) -#define MBOX_INT_STATUS_TX_OVERFLOW_SET(x) WLAN_MBOX_INT_STATUS_TX_OVERFLOW_SET(x) -#define MBOX_INT_STATUS_RX_UNDERFLOW_MSB WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_MSB -#define MBOX_INT_STATUS_RX_UNDERFLOW_LSB WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_LSB -#define MBOX_INT_STATUS_RX_UNDERFLOW_MASK WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_MASK -#define MBOX_INT_STATUS_RX_UNDERFLOW_GET(x) WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_GET(x) -#define MBOX_INT_STATUS_RX_UNDERFLOW_SET(x) WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_SET(x) -#define MBOX_INT_STATUS_TX_NOT_EMPTY_MSB WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_MSB -#define MBOX_INT_STATUS_TX_NOT_EMPTY_LSB WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_LSB -#define MBOX_INT_STATUS_TX_NOT_EMPTY_MASK WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_MASK -#define MBOX_INT_STATUS_TX_NOT_EMPTY_GET(x) WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_GET(x) -#define MBOX_INT_STATUS_TX_NOT_EMPTY_SET(x) WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_SET(x) -#define MBOX_INT_STATUS_RX_NOT_FULL_MSB WLAN_MBOX_INT_STATUS_RX_NOT_FULL_MSB -#define MBOX_INT_STATUS_RX_NOT_FULL_LSB WLAN_MBOX_INT_STATUS_RX_NOT_FULL_LSB -#define MBOX_INT_STATUS_RX_NOT_FULL_MASK WLAN_MBOX_INT_STATUS_RX_NOT_FULL_MASK -#define MBOX_INT_STATUS_RX_NOT_FULL_GET(x) WLAN_MBOX_INT_STATUS_RX_NOT_FULL_GET(x) -#define MBOX_INT_STATUS_RX_NOT_FULL_SET(x) WLAN_MBOX_INT_STATUS_RX_NOT_FULL_SET(x) -#define MBOX_INT_STATUS_HOST_MSB WLAN_MBOX_INT_STATUS_HOST_MSB -#define MBOX_INT_STATUS_HOST_LSB WLAN_MBOX_INT_STATUS_HOST_LSB -#define MBOX_INT_STATUS_HOST_MASK WLAN_MBOX_INT_STATUS_HOST_MASK -#define MBOX_INT_STATUS_HOST_GET(x) WLAN_MBOX_INT_STATUS_HOST_GET(x) -#define MBOX_INT_STATUS_HOST_SET(x) WLAN_MBOX_INT_STATUS_HOST_SET(x) -#define MBOX_INT_ENABLE_ADDRESS WLAN_MBOX_INT_ENABLE_ADDRESS -#define MBOX_INT_ENABLE_OFFSET WLAN_MBOX_INT_ENABLE_OFFSET -#define MBOX_INT_ENABLE_RX_DMA_COMPLETE_MSB WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_MSB -#define MBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB -#define MBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK -#define MBOX_INT_ENABLE_RX_DMA_COMPLETE_GET(x) WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_GET(x) -#define MBOX_INT_ENABLE_RX_DMA_COMPLETE_SET(x) WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_SET(x) -#define MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MSB WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MSB -#define MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB -#define MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK -#define MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_GET(x) WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_GET(x) -#define MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_SET(x) WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_SET(x) -#define MBOX_INT_ENABLE_TX_DMA_COMPLETE_MSB WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_MSB -#define MBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB -#define MBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK -#define MBOX_INT_ENABLE_TX_DMA_COMPLETE_GET(x) WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_GET(x) -#define MBOX_INT_ENABLE_TX_DMA_COMPLETE_SET(x) WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_SET(x) -#define MBOX_INT_ENABLE_TX_OVERFLOW_MSB WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_MSB -#define MBOX_INT_ENABLE_TX_OVERFLOW_LSB WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_LSB -#define MBOX_INT_ENABLE_TX_OVERFLOW_MASK WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_MASK -#define MBOX_INT_ENABLE_TX_OVERFLOW_GET(x) WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_GET(x) -#define MBOX_INT_ENABLE_TX_OVERFLOW_SET(x) WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_SET(x) -#define MBOX_INT_ENABLE_RX_UNDERFLOW_MSB WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_MSB -#define MBOX_INT_ENABLE_RX_UNDERFLOW_LSB WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_LSB -#define MBOX_INT_ENABLE_RX_UNDERFLOW_MASK WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_MASK -#define MBOX_INT_ENABLE_RX_UNDERFLOW_GET(x) WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_GET(x) -#define MBOX_INT_ENABLE_RX_UNDERFLOW_SET(x) WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_SET(x) -#define MBOX_INT_ENABLE_TX_NOT_EMPTY_MSB WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_MSB -#define MBOX_INT_ENABLE_TX_NOT_EMPTY_LSB WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_LSB -#define MBOX_INT_ENABLE_TX_NOT_EMPTY_MASK WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_MASK -#define MBOX_INT_ENABLE_TX_NOT_EMPTY_GET(x) WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_GET(x) -#define MBOX_INT_ENABLE_TX_NOT_EMPTY_SET(x) WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_SET(x) -#define MBOX_INT_ENABLE_RX_NOT_FULL_MSB WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_MSB -#define MBOX_INT_ENABLE_RX_NOT_FULL_LSB WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_LSB -#define MBOX_INT_ENABLE_RX_NOT_FULL_MASK WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_MASK -#define MBOX_INT_ENABLE_RX_NOT_FULL_GET(x) WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_GET(x) -#define MBOX_INT_ENABLE_RX_NOT_FULL_SET(x) WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_SET(x) -#define MBOX_INT_ENABLE_HOST_MSB WLAN_MBOX_INT_ENABLE_HOST_MSB -#define MBOX_INT_ENABLE_HOST_LSB WLAN_MBOX_INT_ENABLE_HOST_LSB -#define MBOX_INT_ENABLE_HOST_MASK WLAN_MBOX_INT_ENABLE_HOST_MASK -#define MBOX_INT_ENABLE_HOST_GET(x) WLAN_MBOX_INT_ENABLE_HOST_GET(x) -#define MBOX_INT_ENABLE_HOST_SET(x) WLAN_MBOX_INT_ENABLE_HOST_SET(x) -#define INT_HOST_ADDRESS WLAN_INT_HOST_ADDRESS -#define INT_HOST_OFFSET WLAN_INT_HOST_OFFSET -#define INT_HOST_VECTOR_MSB WLAN_INT_HOST_VECTOR_MSB -#define INT_HOST_VECTOR_LSB WLAN_INT_HOST_VECTOR_LSB -#define INT_HOST_VECTOR_MASK WLAN_INT_HOST_VECTOR_MASK -#define INT_HOST_VECTOR_GET(x) WLAN_INT_HOST_VECTOR_GET(x) -#define INT_HOST_VECTOR_SET(x) WLAN_INT_HOST_VECTOR_SET(x) -#define LOCAL_COUNT_ADDRESS WLAN_LOCAL_COUNT_ADDRESS -#define LOCAL_COUNT_OFFSET WLAN_LOCAL_COUNT_OFFSET -#define LOCAL_COUNT_VALUE_MSB WLAN_LOCAL_COUNT_VALUE_MSB -#define LOCAL_COUNT_VALUE_LSB WLAN_LOCAL_COUNT_VALUE_LSB -#define LOCAL_COUNT_VALUE_MASK WLAN_LOCAL_COUNT_VALUE_MASK -#define LOCAL_COUNT_VALUE_GET(x) WLAN_LOCAL_COUNT_VALUE_GET(x) -#define LOCAL_COUNT_VALUE_SET(x) WLAN_LOCAL_COUNT_VALUE_SET(x) -#define COUNT_INC_ADDRESS WLAN_COUNT_INC_ADDRESS -#define COUNT_INC_OFFSET WLAN_COUNT_INC_OFFSET -#define COUNT_INC_VALUE_MSB WLAN_COUNT_INC_VALUE_MSB -#define COUNT_INC_VALUE_LSB WLAN_COUNT_INC_VALUE_LSB -#define COUNT_INC_VALUE_MASK WLAN_COUNT_INC_VALUE_MASK -#define COUNT_INC_VALUE_GET(x) WLAN_COUNT_INC_VALUE_GET(x) -#define COUNT_INC_VALUE_SET(x) WLAN_COUNT_INC_VALUE_SET(x) -#define LOCAL_SCRATCH_ADDRESS WLAN_LOCAL_SCRATCH_ADDRESS -#define LOCAL_SCRATCH_OFFSET WLAN_LOCAL_SCRATCH_OFFSET -#define LOCAL_SCRATCH_VALUE_MSB WLAN_LOCAL_SCRATCH_VALUE_MSB -#define LOCAL_SCRATCH_VALUE_LSB WLAN_LOCAL_SCRATCH_VALUE_LSB -#define LOCAL_SCRATCH_VALUE_MASK WLAN_LOCAL_SCRATCH_VALUE_MASK -#define LOCAL_SCRATCH_VALUE_GET(x) WLAN_LOCAL_SCRATCH_VALUE_GET(x) -#define LOCAL_SCRATCH_VALUE_SET(x) WLAN_LOCAL_SCRATCH_VALUE_SET(x) -#define USE_LOCAL_BUS_ADDRESS WLAN_USE_LOCAL_BUS_ADDRESS -#define USE_LOCAL_BUS_OFFSET WLAN_USE_LOCAL_BUS_OFFSET -#define USE_LOCAL_BUS_PIN_INIT_MSB WLAN_USE_LOCAL_BUS_PIN_INIT_MSB -#define USE_LOCAL_BUS_PIN_INIT_LSB WLAN_USE_LOCAL_BUS_PIN_INIT_LSB -#define USE_LOCAL_BUS_PIN_INIT_MASK WLAN_USE_LOCAL_BUS_PIN_INIT_MASK -#define USE_LOCAL_BUS_PIN_INIT_GET(x) WLAN_USE_LOCAL_BUS_PIN_INIT_GET(x) -#define USE_LOCAL_BUS_PIN_INIT_SET(x) WLAN_USE_LOCAL_BUS_PIN_INIT_SET(x) -#define SDIO_CONFIG_ADDRESS WLAN_SDIO_CONFIG_ADDRESS -#define SDIO_CONFIG_OFFSET WLAN_SDIO_CONFIG_OFFSET -#define SDIO_CONFIG_CCCR_IOR1_MSB WLAN_SDIO_CONFIG_CCCR_IOR1_MSB -#define SDIO_CONFIG_CCCR_IOR1_LSB WLAN_SDIO_CONFIG_CCCR_IOR1_LSB -#define SDIO_CONFIG_CCCR_IOR1_MASK WLAN_SDIO_CONFIG_CCCR_IOR1_MASK -#define SDIO_CONFIG_CCCR_IOR1_GET(x) WLAN_SDIO_CONFIG_CCCR_IOR1_GET(x) -#define SDIO_CONFIG_CCCR_IOR1_SET(x) WLAN_SDIO_CONFIG_CCCR_IOR1_SET(x) -#define MBOX_DEBUG_ADDRESS WLAN_MBOX_DEBUG_ADDRESS -#define MBOX_DEBUG_OFFSET WLAN_MBOX_DEBUG_OFFSET -#define MBOX_DEBUG_SEL_MSB WLAN_MBOX_DEBUG_SEL_MSB -#define MBOX_DEBUG_SEL_LSB WLAN_MBOX_DEBUG_SEL_LSB -#define MBOX_DEBUG_SEL_MASK WLAN_MBOX_DEBUG_SEL_MASK -#define MBOX_DEBUG_SEL_GET(x) WLAN_MBOX_DEBUG_SEL_GET(x) -#define MBOX_DEBUG_SEL_SET(x) WLAN_MBOX_DEBUG_SEL_SET(x) -#define MBOX_FIFO_RESET_ADDRESS WLAN_MBOX_FIFO_RESET_ADDRESS -#define MBOX_FIFO_RESET_OFFSET WLAN_MBOX_FIFO_RESET_OFFSET -#define MBOX_FIFO_RESET_INIT_MSB WLAN_MBOX_FIFO_RESET_INIT_MSB -#define MBOX_FIFO_RESET_INIT_LSB WLAN_MBOX_FIFO_RESET_INIT_LSB -#define MBOX_FIFO_RESET_INIT_MASK WLAN_MBOX_FIFO_RESET_INIT_MASK -#define MBOX_FIFO_RESET_INIT_GET(x) WLAN_MBOX_FIFO_RESET_INIT_GET(x) -#define MBOX_FIFO_RESET_INIT_SET(x) WLAN_MBOX_FIFO_RESET_INIT_SET(x) -#define MBOX_TXFIFO_POP_ADDRESS WLAN_MBOX_TXFIFO_POP_ADDRESS -#define MBOX_TXFIFO_POP_OFFSET WLAN_MBOX_TXFIFO_POP_OFFSET -#define MBOX_TXFIFO_POP_DATA_MSB WLAN_MBOX_TXFIFO_POP_DATA_MSB -#define MBOX_TXFIFO_POP_DATA_LSB WLAN_MBOX_TXFIFO_POP_DATA_LSB -#define MBOX_TXFIFO_POP_DATA_MASK WLAN_MBOX_TXFIFO_POP_DATA_MASK -#define MBOX_TXFIFO_POP_DATA_GET(x) WLAN_MBOX_TXFIFO_POP_DATA_GET(x) -#define MBOX_TXFIFO_POP_DATA_SET(x) WLAN_MBOX_TXFIFO_POP_DATA_SET(x) -#define MBOX_RXFIFO_POP_ADDRESS WLAN_MBOX_RXFIFO_POP_ADDRESS -#define MBOX_RXFIFO_POP_OFFSET WLAN_MBOX_RXFIFO_POP_OFFSET -#define MBOX_RXFIFO_POP_DATA_MSB WLAN_MBOX_RXFIFO_POP_DATA_MSB -#define MBOX_RXFIFO_POP_DATA_LSB WLAN_MBOX_RXFIFO_POP_DATA_LSB -#define MBOX_RXFIFO_POP_DATA_MASK WLAN_MBOX_RXFIFO_POP_DATA_MASK -#define MBOX_RXFIFO_POP_DATA_GET(x) WLAN_MBOX_RXFIFO_POP_DATA_GET(x) -#define MBOX_RXFIFO_POP_DATA_SET(x) WLAN_MBOX_RXFIFO_POP_DATA_SET(x) -#define SDIO_DEBUG_ADDRESS WLAN_SDIO_DEBUG_ADDRESS -#define SDIO_DEBUG_OFFSET WLAN_SDIO_DEBUG_OFFSET -#define SDIO_DEBUG_SEL_MSB WLAN_SDIO_DEBUG_SEL_MSB -#define SDIO_DEBUG_SEL_LSB WLAN_SDIO_DEBUG_SEL_LSB -#define SDIO_DEBUG_SEL_MASK WLAN_SDIO_DEBUG_SEL_MASK -#define SDIO_DEBUG_SEL_GET(x) WLAN_SDIO_DEBUG_SEL_GET(x) -#define SDIO_DEBUG_SEL_SET(x) WLAN_SDIO_DEBUG_SEL_SET(x) -#define GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS -#define GMBOX0_DMA_RX_DESCRIPTOR_BASE_OFFSET WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_OFFSET -#define GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB -#define GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB -#define GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK -#define GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define GMBOX0_DMA_RX_CONTROL_ADDRESS WLAN_GMBOX0_DMA_RX_CONTROL_ADDRESS -#define GMBOX0_DMA_RX_CONTROL_OFFSET WLAN_GMBOX0_DMA_RX_CONTROL_OFFSET -#define GMBOX0_DMA_RX_CONTROL_RESUME_MSB WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_MSB -#define GMBOX0_DMA_RX_CONTROL_RESUME_LSB WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_LSB -#define GMBOX0_DMA_RX_CONTROL_RESUME_MASK WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_MASK -#define GMBOX0_DMA_RX_CONTROL_RESUME_GET(x) WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_GET(x) -#define GMBOX0_DMA_RX_CONTROL_RESUME_SET(x) WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_SET(x) -#define GMBOX0_DMA_RX_CONTROL_START_MSB WLAN_GMBOX0_DMA_RX_CONTROL_START_MSB -#define GMBOX0_DMA_RX_CONTROL_START_LSB WLAN_GMBOX0_DMA_RX_CONTROL_START_LSB -#define GMBOX0_DMA_RX_CONTROL_START_MASK WLAN_GMBOX0_DMA_RX_CONTROL_START_MASK -#define GMBOX0_DMA_RX_CONTROL_START_GET(x) WLAN_GMBOX0_DMA_RX_CONTROL_START_GET(x) -#define GMBOX0_DMA_RX_CONTROL_START_SET(x) WLAN_GMBOX0_DMA_RX_CONTROL_START_SET(x) -#define GMBOX0_DMA_RX_CONTROL_STOP_MSB WLAN_GMBOX0_DMA_RX_CONTROL_STOP_MSB -#define GMBOX0_DMA_RX_CONTROL_STOP_LSB WLAN_GMBOX0_DMA_RX_CONTROL_STOP_LSB -#define GMBOX0_DMA_RX_CONTROL_STOP_MASK WLAN_GMBOX0_DMA_RX_CONTROL_STOP_MASK -#define GMBOX0_DMA_RX_CONTROL_STOP_GET(x) WLAN_GMBOX0_DMA_RX_CONTROL_STOP_GET(x) -#define GMBOX0_DMA_RX_CONTROL_STOP_SET(x) WLAN_GMBOX0_DMA_RX_CONTROL_STOP_SET(x) -#define GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS -#define GMBOX0_DMA_TX_DESCRIPTOR_BASE_OFFSET WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_OFFSET -#define GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB -#define GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB -#define GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK -#define GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) -#define GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) -#define GMBOX0_DMA_TX_CONTROL_ADDRESS WLAN_GMBOX0_DMA_TX_CONTROL_ADDRESS -#define GMBOX0_DMA_TX_CONTROL_OFFSET WLAN_GMBOX0_DMA_TX_CONTROL_OFFSET -#define GMBOX0_DMA_TX_CONTROL_RESUME_MSB WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_MSB -#define GMBOX0_DMA_TX_CONTROL_RESUME_LSB WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_LSB -#define GMBOX0_DMA_TX_CONTROL_RESUME_MASK WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_MASK -#define GMBOX0_DMA_TX_CONTROL_RESUME_GET(x) WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_GET(x) -#define GMBOX0_DMA_TX_CONTROL_RESUME_SET(x) WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_SET(x) -#define GMBOX0_DMA_TX_CONTROL_START_MSB WLAN_GMBOX0_DMA_TX_CONTROL_START_MSB -#define GMBOX0_DMA_TX_CONTROL_START_LSB WLAN_GMBOX0_DMA_TX_CONTROL_START_LSB -#define GMBOX0_DMA_TX_CONTROL_START_MASK WLAN_GMBOX0_DMA_TX_CONTROL_START_MASK -#define GMBOX0_DMA_TX_CONTROL_START_GET(x) WLAN_GMBOX0_DMA_TX_CONTROL_START_GET(x) -#define GMBOX0_DMA_TX_CONTROL_START_SET(x) WLAN_GMBOX0_DMA_TX_CONTROL_START_SET(x) -#define GMBOX0_DMA_TX_CONTROL_STOP_MSB WLAN_GMBOX0_DMA_TX_CONTROL_STOP_MSB -#define GMBOX0_DMA_TX_CONTROL_STOP_LSB WLAN_GMBOX0_DMA_TX_CONTROL_STOP_LSB -#define GMBOX0_DMA_TX_CONTROL_STOP_MASK WLAN_GMBOX0_DMA_TX_CONTROL_STOP_MASK -#define GMBOX0_DMA_TX_CONTROL_STOP_GET(x) WLAN_GMBOX0_DMA_TX_CONTROL_STOP_GET(x) -#define GMBOX0_DMA_TX_CONTROL_STOP_SET(x) WLAN_GMBOX0_DMA_TX_CONTROL_STOP_SET(x) -#define GMBOX_INT_STATUS_ADDRESS WLAN_GMBOX_INT_STATUS_ADDRESS -#define GMBOX_INT_STATUS_OFFSET WLAN_GMBOX_INT_STATUS_OFFSET -#define GMBOX_INT_STATUS_TX_OVERFLOW_MSB WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_MSB -#define GMBOX_INT_STATUS_TX_OVERFLOW_LSB WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_LSB -#define GMBOX_INT_STATUS_TX_OVERFLOW_MASK WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_MASK -#define GMBOX_INT_STATUS_TX_OVERFLOW_GET(x) WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_GET(x) -#define GMBOX_INT_STATUS_TX_OVERFLOW_SET(x) WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_SET(x) -#define GMBOX_INT_STATUS_RX_UNDERFLOW_MSB WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_MSB -#define GMBOX_INT_STATUS_RX_UNDERFLOW_LSB WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_LSB -#define GMBOX_INT_STATUS_RX_UNDERFLOW_MASK WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_MASK -#define GMBOX_INT_STATUS_RX_UNDERFLOW_GET(x) WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_GET(x) -#define GMBOX_INT_STATUS_RX_UNDERFLOW_SET(x) WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_SET(x) -#define GMBOX_INT_STATUS_RX_DMA_COMPLETE_MSB WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_MSB -#define GMBOX_INT_STATUS_RX_DMA_COMPLETE_LSB WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_LSB -#define GMBOX_INT_STATUS_RX_DMA_COMPLETE_MASK WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_MASK -#define GMBOX_INT_STATUS_RX_DMA_COMPLETE_GET(x) WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_GET(x) -#define GMBOX_INT_STATUS_RX_DMA_COMPLETE_SET(x) WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_SET(x) -#define GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MSB WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MSB -#define GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB -#define GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK -#define GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_GET(x) WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_GET(x) -#define GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_SET(x) WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_SET(x) -#define GMBOX_INT_STATUS_TX_DMA_COMPLETE_MSB WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_MSB -#define GMBOX_INT_STATUS_TX_DMA_COMPLETE_LSB WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_LSB -#define GMBOX_INT_STATUS_TX_DMA_COMPLETE_MASK WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_MASK -#define GMBOX_INT_STATUS_TX_DMA_COMPLETE_GET(x) WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_GET(x) -#define GMBOX_INT_STATUS_TX_DMA_COMPLETE_SET(x) WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_SET(x) -#define GMBOX_INT_STATUS_TX_NOT_EMPTY_MSB WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_MSB -#define GMBOX_INT_STATUS_TX_NOT_EMPTY_LSB WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_LSB -#define GMBOX_INT_STATUS_TX_NOT_EMPTY_MASK WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_MASK -#define GMBOX_INT_STATUS_TX_NOT_EMPTY_GET(x) WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_GET(x) -#define GMBOX_INT_STATUS_TX_NOT_EMPTY_SET(x) WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_SET(x) -#define GMBOX_INT_STATUS_RX_NOT_FULL_MSB WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_MSB -#define GMBOX_INT_STATUS_RX_NOT_FULL_LSB WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_LSB -#define GMBOX_INT_STATUS_RX_NOT_FULL_MASK WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_MASK -#define GMBOX_INT_STATUS_RX_NOT_FULL_GET(x) WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_GET(x) -#define GMBOX_INT_STATUS_RX_NOT_FULL_SET(x) WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_SET(x) -#define GMBOX_INT_ENABLE_ADDRESS WLAN_GMBOX_INT_ENABLE_ADDRESS -#define GMBOX_INT_ENABLE_OFFSET WLAN_GMBOX_INT_ENABLE_OFFSET -#define GMBOX_INT_ENABLE_TX_OVERFLOW_MSB WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_MSB -#define GMBOX_INT_ENABLE_TX_OVERFLOW_LSB WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_LSB -#define GMBOX_INT_ENABLE_TX_OVERFLOW_MASK WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_MASK -#define GMBOX_INT_ENABLE_TX_OVERFLOW_GET(x) WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_GET(x) -#define GMBOX_INT_ENABLE_TX_OVERFLOW_SET(x) WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_SET(x) -#define GMBOX_INT_ENABLE_RX_UNDERFLOW_MSB WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_MSB -#define GMBOX_INT_ENABLE_RX_UNDERFLOW_LSB WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_LSB -#define GMBOX_INT_ENABLE_RX_UNDERFLOW_MASK WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_MASK -#define GMBOX_INT_ENABLE_RX_UNDERFLOW_GET(x) WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_GET(x) -#define GMBOX_INT_ENABLE_RX_UNDERFLOW_SET(x) WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_SET(x) -#define GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MSB WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MSB -#define GMBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB -#define GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK -#define GMBOX_INT_ENABLE_RX_DMA_COMPLETE_GET(x) WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_GET(x) -#define GMBOX_INT_ENABLE_RX_DMA_COMPLETE_SET(x) WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_SET(x) -#define GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MSB WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MSB -#define GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB -#define GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK -#define GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_GET(x) WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_GET(x) -#define GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_SET(x) WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_SET(x) -#define GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MSB WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MSB -#define GMBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB -#define GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK -#define GMBOX_INT_ENABLE_TX_DMA_COMPLETE_GET(x) WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_GET(x) -#define GMBOX_INT_ENABLE_TX_DMA_COMPLETE_SET(x) WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_SET(x) -#define GMBOX_INT_ENABLE_TX_NOT_EMPTY_MSB WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_MSB -#define GMBOX_INT_ENABLE_TX_NOT_EMPTY_LSB WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_LSB -#define GMBOX_INT_ENABLE_TX_NOT_EMPTY_MASK WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_MASK -#define GMBOX_INT_ENABLE_TX_NOT_EMPTY_GET(x) WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_GET(x) -#define GMBOX_INT_ENABLE_TX_NOT_EMPTY_SET(x) WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_SET(x) -#define GMBOX_INT_ENABLE_RX_NOT_FULL_MSB WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_MSB -#define GMBOX_INT_ENABLE_RX_NOT_FULL_LSB WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_LSB -#define GMBOX_INT_ENABLE_RX_NOT_FULL_MASK WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_MASK -#define GMBOX_INT_ENABLE_RX_NOT_FULL_GET(x) WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_GET(x) -#define GMBOX_INT_ENABLE_RX_NOT_FULL_SET(x) WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_SET(x) -#define HOST_IF_WINDOW_ADDRESS WLAN_HOST_IF_WINDOW_ADDRESS -#define HOST_IF_WINDOW_OFFSET WLAN_HOST_IF_WINDOW_OFFSET -#define HOST_IF_WINDOW_DATA_MSB WLAN_HOST_IF_WINDOW_DATA_MSB -#define HOST_IF_WINDOW_DATA_LSB WLAN_HOST_IF_WINDOW_DATA_LSB -#define HOST_IF_WINDOW_DATA_MASK WLAN_HOST_IF_WINDOW_DATA_MASK -#define HOST_IF_WINDOW_DATA_GET(x) WLAN_HOST_IF_WINDOW_DATA_GET(x) -#define HOST_IF_WINDOW_DATA_SET(x) WLAN_HOST_IF_WINDOW_DATA_SET(x) - -#endif diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_wlan_host_reg.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_wlan_host_reg.h deleted file mode 100644 index 038d0d019273..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_wlan_host_reg.h +++ /dev/null @@ -1,471 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#ifndef _MBOX_WLAN_HOST_REG_REG_H_ -#define _MBOX_WLAN_HOST_REG_REG_H_ - -#define HOST_INT_STATUS_ADDRESS 0x00000400 -#define HOST_INT_STATUS_OFFSET 0x00000400 -#define HOST_INT_STATUS_ERROR_MSB 7 -#define HOST_INT_STATUS_ERROR_LSB 7 -#define HOST_INT_STATUS_ERROR_MASK 0x00000080 -#define HOST_INT_STATUS_ERROR_GET(x) (((x) & HOST_INT_STATUS_ERROR_MASK) >> HOST_INT_STATUS_ERROR_LSB) -#define HOST_INT_STATUS_ERROR_SET(x) (((x) << HOST_INT_STATUS_ERROR_LSB) & HOST_INT_STATUS_ERROR_MASK) -#define HOST_INT_STATUS_CPU_MSB 6 -#define HOST_INT_STATUS_CPU_LSB 6 -#define HOST_INT_STATUS_CPU_MASK 0x00000040 -#define HOST_INT_STATUS_CPU_GET(x) (((x) & HOST_INT_STATUS_CPU_MASK) >> HOST_INT_STATUS_CPU_LSB) -#define HOST_INT_STATUS_CPU_SET(x) (((x) << HOST_INT_STATUS_CPU_LSB) & HOST_INT_STATUS_CPU_MASK) -#define HOST_INT_STATUS_INT_MSB 5 -#define HOST_INT_STATUS_INT_LSB 5 -#define HOST_INT_STATUS_INT_MASK 0x00000020 -#define HOST_INT_STATUS_INT_GET(x) (((x) & HOST_INT_STATUS_INT_MASK) >> HOST_INT_STATUS_INT_LSB) -#define HOST_INT_STATUS_INT_SET(x) (((x) << HOST_INT_STATUS_INT_LSB) & HOST_INT_STATUS_INT_MASK) -#define HOST_INT_STATUS_COUNTER_MSB 4 -#define HOST_INT_STATUS_COUNTER_LSB 4 -#define HOST_INT_STATUS_COUNTER_MASK 0x00000010 -#define HOST_INT_STATUS_COUNTER_GET(x) (((x) & HOST_INT_STATUS_COUNTER_MASK) >> HOST_INT_STATUS_COUNTER_LSB) -#define HOST_INT_STATUS_COUNTER_SET(x) (((x) << HOST_INT_STATUS_COUNTER_LSB) & HOST_INT_STATUS_COUNTER_MASK) -#define HOST_INT_STATUS_MBOX_DATA_MSB 3 -#define HOST_INT_STATUS_MBOX_DATA_LSB 0 -#define HOST_INT_STATUS_MBOX_DATA_MASK 0x0000000f -#define HOST_INT_STATUS_MBOX_DATA_GET(x) (((x) & HOST_INT_STATUS_MBOX_DATA_MASK) >> HOST_INT_STATUS_MBOX_DATA_LSB) -#define HOST_INT_STATUS_MBOX_DATA_SET(x) (((x) << HOST_INT_STATUS_MBOX_DATA_LSB) & HOST_INT_STATUS_MBOX_DATA_MASK) - -#define CPU_INT_STATUS_ADDRESS 0x00000401 -#define CPU_INT_STATUS_OFFSET 0x00000401 -#define CPU_INT_STATUS_BIT_MSB 7 -#define CPU_INT_STATUS_BIT_LSB 0 -#define CPU_INT_STATUS_BIT_MASK 0x000000ff -#define CPU_INT_STATUS_BIT_GET(x) (((x) & CPU_INT_STATUS_BIT_MASK) >> CPU_INT_STATUS_BIT_LSB) -#define CPU_INT_STATUS_BIT_SET(x) (((x) << CPU_INT_STATUS_BIT_LSB) & CPU_INT_STATUS_BIT_MASK) - -#define ERROR_INT_STATUS_ADDRESS 0x00000402 -#define ERROR_INT_STATUS_OFFSET 0x00000402 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_SYNC_ERROR_MSB 6 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_SYNC_ERROR_LSB 6 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_SYNC_ERROR_MASK 0x00000040 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_SYNC_ERROR_GET(x) (((x) & ERROR_INT_STATUS_UART_HCI_FRAMER_SYNC_ERROR_MASK) >> ERROR_INT_STATUS_UART_HCI_FRAMER_SYNC_ERROR_LSB) -#define ERROR_INT_STATUS_UART_HCI_FRAMER_SYNC_ERROR_SET(x) (((x) << ERROR_INT_STATUS_UART_HCI_FRAMER_SYNC_ERROR_LSB) & ERROR_INT_STATUS_UART_HCI_FRAMER_SYNC_ERROR_MASK) -#define ERROR_INT_STATUS_UART_HCI_FRAMER_OVERFLOW_MSB 5 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_OVERFLOW_LSB 5 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_OVERFLOW_MASK 0x00000020 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_OVERFLOW_GET(x) (((x) & ERROR_INT_STATUS_UART_HCI_FRAMER_OVERFLOW_MASK) >> ERROR_INT_STATUS_UART_HCI_FRAMER_OVERFLOW_LSB) -#define ERROR_INT_STATUS_UART_HCI_FRAMER_OVERFLOW_SET(x) (((x) << ERROR_INT_STATUS_UART_HCI_FRAMER_OVERFLOW_LSB) & ERROR_INT_STATUS_UART_HCI_FRAMER_OVERFLOW_MASK) -#define ERROR_INT_STATUS_UART_HCI_FRAMER_UNDERFLOW_MSB 4 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_UNDERFLOW_LSB 4 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_UNDERFLOW_MASK 0x00000010 -#define ERROR_INT_STATUS_UART_HCI_FRAMER_UNDERFLOW_GET(x) (((x) & ERROR_INT_STATUS_UART_HCI_FRAMER_UNDERFLOW_MASK) >> ERROR_INT_STATUS_UART_HCI_FRAMER_UNDERFLOW_LSB) -#define ERROR_INT_STATUS_UART_HCI_FRAMER_UNDERFLOW_SET(x) (((x) << ERROR_INT_STATUS_UART_HCI_FRAMER_UNDERFLOW_LSB) & ERROR_INT_STATUS_UART_HCI_FRAMER_UNDERFLOW_MASK) -#define ERROR_INT_STATUS_SPI_MSB 3 -#define ERROR_INT_STATUS_SPI_LSB 3 -#define ERROR_INT_STATUS_SPI_MASK 0x00000008 -#define ERROR_INT_STATUS_SPI_GET(x) (((x) & ERROR_INT_STATUS_SPI_MASK) >> ERROR_INT_STATUS_SPI_LSB) -#define ERROR_INT_STATUS_SPI_SET(x) (((x) << ERROR_INT_STATUS_SPI_LSB) & ERROR_INT_STATUS_SPI_MASK) -#define ERROR_INT_STATUS_WAKEUP_MSB 2 -#define ERROR_INT_STATUS_WAKEUP_LSB 2 -#define ERROR_INT_STATUS_WAKEUP_MASK 0x00000004 -#define ERROR_INT_STATUS_WAKEUP_GET(x) (((x) & ERROR_INT_STATUS_WAKEUP_MASK) >> ERROR_INT_STATUS_WAKEUP_LSB) -#define ERROR_INT_STATUS_WAKEUP_SET(x) (((x) << ERROR_INT_STATUS_WAKEUP_LSB) & ERROR_INT_STATUS_WAKEUP_MASK) -#define ERROR_INT_STATUS_RX_UNDERFLOW_MSB 1 -#define ERROR_INT_STATUS_RX_UNDERFLOW_LSB 1 -#define ERROR_INT_STATUS_RX_UNDERFLOW_MASK 0x00000002 -#define ERROR_INT_STATUS_RX_UNDERFLOW_GET(x) (((x) & ERROR_INT_STATUS_RX_UNDERFLOW_MASK) >> ERROR_INT_STATUS_RX_UNDERFLOW_LSB) -#define ERROR_INT_STATUS_RX_UNDERFLOW_SET(x) (((x) << ERROR_INT_STATUS_RX_UNDERFLOW_LSB) & ERROR_INT_STATUS_RX_UNDERFLOW_MASK) -#define ERROR_INT_STATUS_TX_OVERFLOW_MSB 0 -#define ERROR_INT_STATUS_TX_OVERFLOW_LSB 0 -#define ERROR_INT_STATUS_TX_OVERFLOW_MASK 0x00000001 -#define ERROR_INT_STATUS_TX_OVERFLOW_GET(x) (((x) & ERROR_INT_STATUS_TX_OVERFLOW_MASK) >> ERROR_INT_STATUS_TX_OVERFLOW_LSB) -#define ERROR_INT_STATUS_TX_OVERFLOW_SET(x) (((x) << ERROR_INT_STATUS_TX_OVERFLOW_LSB) & ERROR_INT_STATUS_TX_OVERFLOW_MASK) - -#define COUNTER_INT_STATUS_ADDRESS 0x00000403 -#define COUNTER_INT_STATUS_OFFSET 0x00000403 -#define COUNTER_INT_STATUS_COUNTER_MSB 7 -#define COUNTER_INT_STATUS_COUNTER_LSB 0 -#define COUNTER_INT_STATUS_COUNTER_MASK 0x000000ff -#define COUNTER_INT_STATUS_COUNTER_GET(x) (((x) & COUNTER_INT_STATUS_COUNTER_MASK) >> COUNTER_INT_STATUS_COUNTER_LSB) -#define COUNTER_INT_STATUS_COUNTER_SET(x) (((x) << COUNTER_INT_STATUS_COUNTER_LSB) & COUNTER_INT_STATUS_COUNTER_MASK) - -#define MBOX_FRAME_ADDRESS 0x00000404 -#define MBOX_FRAME_OFFSET 0x00000404 -#define MBOX_FRAME_RX_EOM_MSB 7 -#define MBOX_FRAME_RX_EOM_LSB 4 -#define MBOX_FRAME_RX_EOM_MASK 0x000000f0 -#define MBOX_FRAME_RX_EOM_GET(x) (((x) & MBOX_FRAME_RX_EOM_MASK) >> MBOX_FRAME_RX_EOM_LSB) -#define MBOX_FRAME_RX_EOM_SET(x) (((x) << MBOX_FRAME_RX_EOM_LSB) & MBOX_FRAME_RX_EOM_MASK) -#define MBOX_FRAME_RX_SOM_MSB 3 -#define MBOX_FRAME_RX_SOM_LSB 0 -#define MBOX_FRAME_RX_SOM_MASK 0x0000000f -#define MBOX_FRAME_RX_SOM_GET(x) (((x) & MBOX_FRAME_RX_SOM_MASK) >> MBOX_FRAME_RX_SOM_LSB) -#define MBOX_FRAME_RX_SOM_SET(x) (((x) << MBOX_FRAME_RX_SOM_LSB) & MBOX_FRAME_RX_SOM_MASK) - -#define RX_LOOKAHEAD_VALID_ADDRESS 0x00000405 -#define RX_LOOKAHEAD_VALID_OFFSET 0x00000405 -#define RX_LOOKAHEAD_VALID_MBOX_MSB 3 -#define RX_LOOKAHEAD_VALID_MBOX_LSB 0 -#define RX_LOOKAHEAD_VALID_MBOX_MASK 0x0000000f -#define RX_LOOKAHEAD_VALID_MBOX_GET(x) (((x) & RX_LOOKAHEAD_VALID_MBOX_MASK) >> RX_LOOKAHEAD_VALID_MBOX_LSB) -#define RX_LOOKAHEAD_VALID_MBOX_SET(x) (((x) << RX_LOOKAHEAD_VALID_MBOX_LSB) & RX_LOOKAHEAD_VALID_MBOX_MASK) - -#define HOST_INT_STATUS2_ADDRESS 0x00000406 -#define HOST_INT_STATUS2_OFFSET 0x00000406 -#define HOST_INT_STATUS2_GMBOX_RX_UNDERFLOW_MSB 2 -#define HOST_INT_STATUS2_GMBOX_RX_UNDERFLOW_LSB 2 -#define HOST_INT_STATUS2_GMBOX_RX_UNDERFLOW_MASK 0x00000004 -#define HOST_INT_STATUS2_GMBOX_RX_UNDERFLOW_GET(x) (((x) & HOST_INT_STATUS2_GMBOX_RX_UNDERFLOW_MASK) >> HOST_INT_STATUS2_GMBOX_RX_UNDERFLOW_LSB) -#define HOST_INT_STATUS2_GMBOX_RX_UNDERFLOW_SET(x) (((x) << HOST_INT_STATUS2_GMBOX_RX_UNDERFLOW_LSB) & HOST_INT_STATUS2_GMBOX_RX_UNDERFLOW_MASK) -#define HOST_INT_STATUS2_GMBOX_TX_OVERFLOW_MSB 1 -#define HOST_INT_STATUS2_GMBOX_TX_OVERFLOW_LSB 1 -#define HOST_INT_STATUS2_GMBOX_TX_OVERFLOW_MASK 0x00000002 -#define HOST_INT_STATUS2_GMBOX_TX_OVERFLOW_GET(x) (((x) & HOST_INT_STATUS2_GMBOX_TX_OVERFLOW_MASK) >> HOST_INT_STATUS2_GMBOX_TX_OVERFLOW_LSB) -#define HOST_INT_STATUS2_GMBOX_TX_OVERFLOW_SET(x) (((x) << HOST_INT_STATUS2_GMBOX_TX_OVERFLOW_LSB) & HOST_INT_STATUS2_GMBOX_TX_OVERFLOW_MASK) -#define HOST_INT_STATUS2_GMBOX_DATA_MSB 0 -#define HOST_INT_STATUS2_GMBOX_DATA_LSB 0 -#define HOST_INT_STATUS2_GMBOX_DATA_MASK 0x00000001 -#define HOST_INT_STATUS2_GMBOX_DATA_GET(x) (((x) & HOST_INT_STATUS2_GMBOX_DATA_MASK) >> HOST_INT_STATUS2_GMBOX_DATA_LSB) -#define HOST_INT_STATUS2_GMBOX_DATA_SET(x) (((x) << HOST_INT_STATUS2_GMBOX_DATA_LSB) & HOST_INT_STATUS2_GMBOX_DATA_MASK) - -#define GMBOX_RX_AVAIL_ADDRESS 0x00000407 -#define GMBOX_RX_AVAIL_OFFSET 0x00000407 -#define GMBOX_RX_AVAIL_BYTE_MSB 6 -#define GMBOX_RX_AVAIL_BYTE_LSB 0 -#define GMBOX_RX_AVAIL_BYTE_MASK 0x0000007f -#define GMBOX_RX_AVAIL_BYTE_GET(x) (((x) & GMBOX_RX_AVAIL_BYTE_MASK) >> GMBOX_RX_AVAIL_BYTE_LSB) -#define GMBOX_RX_AVAIL_BYTE_SET(x) (((x) << GMBOX_RX_AVAIL_BYTE_LSB) & GMBOX_RX_AVAIL_BYTE_MASK) - -#define RX_LOOKAHEAD0_ADDRESS 0x00000408 -#define RX_LOOKAHEAD0_OFFSET 0x00000408 -#define RX_LOOKAHEAD0_DATA_MSB 7 -#define RX_LOOKAHEAD0_DATA_LSB 0 -#define RX_LOOKAHEAD0_DATA_MASK 0x000000ff -#define RX_LOOKAHEAD0_DATA_GET(x) (((x) & RX_LOOKAHEAD0_DATA_MASK) >> RX_LOOKAHEAD0_DATA_LSB) -#define RX_LOOKAHEAD0_DATA_SET(x) (((x) << RX_LOOKAHEAD0_DATA_LSB) & RX_LOOKAHEAD0_DATA_MASK) - -#define RX_LOOKAHEAD1_ADDRESS 0x0000040c -#define RX_LOOKAHEAD1_OFFSET 0x0000040c -#define RX_LOOKAHEAD1_DATA_MSB 7 -#define RX_LOOKAHEAD1_DATA_LSB 0 -#define RX_LOOKAHEAD1_DATA_MASK 0x000000ff -#define RX_LOOKAHEAD1_DATA_GET(x) (((x) & RX_LOOKAHEAD1_DATA_MASK) >> RX_LOOKAHEAD1_DATA_LSB) -#define RX_LOOKAHEAD1_DATA_SET(x) (((x) << RX_LOOKAHEAD1_DATA_LSB) & RX_LOOKAHEAD1_DATA_MASK) - -#define RX_LOOKAHEAD2_ADDRESS 0x00000410 -#define RX_LOOKAHEAD2_OFFSET 0x00000410 -#define RX_LOOKAHEAD2_DATA_MSB 7 -#define RX_LOOKAHEAD2_DATA_LSB 0 -#define RX_LOOKAHEAD2_DATA_MASK 0x000000ff -#define RX_LOOKAHEAD2_DATA_GET(x) (((x) & RX_LOOKAHEAD2_DATA_MASK) >> RX_LOOKAHEAD2_DATA_LSB) -#define RX_LOOKAHEAD2_DATA_SET(x) (((x) << RX_LOOKAHEAD2_DATA_LSB) & RX_LOOKAHEAD2_DATA_MASK) - -#define RX_LOOKAHEAD3_ADDRESS 0x00000414 -#define RX_LOOKAHEAD3_OFFSET 0x00000414 -#define RX_LOOKAHEAD3_DATA_MSB 7 -#define RX_LOOKAHEAD3_DATA_LSB 0 -#define RX_LOOKAHEAD3_DATA_MASK 0x000000ff -#define RX_LOOKAHEAD3_DATA_GET(x) (((x) & RX_LOOKAHEAD3_DATA_MASK) >> RX_LOOKAHEAD3_DATA_LSB) -#define RX_LOOKAHEAD3_DATA_SET(x) (((x) << RX_LOOKAHEAD3_DATA_LSB) & RX_LOOKAHEAD3_DATA_MASK) - -#define INT_STATUS_ENABLE_ADDRESS 0x00000418 -#define INT_STATUS_ENABLE_OFFSET 0x00000418 -#define INT_STATUS_ENABLE_ERROR_MSB 7 -#define INT_STATUS_ENABLE_ERROR_LSB 7 -#define INT_STATUS_ENABLE_ERROR_MASK 0x00000080 -#define INT_STATUS_ENABLE_ERROR_GET(x) (((x) & INT_STATUS_ENABLE_ERROR_MASK) >> INT_STATUS_ENABLE_ERROR_LSB) -#define INT_STATUS_ENABLE_ERROR_SET(x) (((x) << INT_STATUS_ENABLE_ERROR_LSB) & INT_STATUS_ENABLE_ERROR_MASK) -#define INT_STATUS_ENABLE_CPU_MSB 6 -#define INT_STATUS_ENABLE_CPU_LSB 6 -#define INT_STATUS_ENABLE_CPU_MASK 0x00000040 -#define INT_STATUS_ENABLE_CPU_GET(x) (((x) & INT_STATUS_ENABLE_CPU_MASK) >> INT_STATUS_ENABLE_CPU_LSB) -#define INT_STATUS_ENABLE_CPU_SET(x) (((x) << INT_STATUS_ENABLE_CPU_LSB) & INT_STATUS_ENABLE_CPU_MASK) -#define INT_STATUS_ENABLE_INT_MSB 5 -#define INT_STATUS_ENABLE_INT_LSB 5 -#define INT_STATUS_ENABLE_INT_MASK 0x00000020 -#define INT_STATUS_ENABLE_INT_GET(x) (((x) & INT_STATUS_ENABLE_INT_MASK) >> INT_STATUS_ENABLE_INT_LSB) -#define INT_STATUS_ENABLE_INT_SET(x) (((x) << INT_STATUS_ENABLE_INT_LSB) & INT_STATUS_ENABLE_INT_MASK) -#define INT_STATUS_ENABLE_COUNTER_MSB 4 -#define INT_STATUS_ENABLE_COUNTER_LSB 4 -#define INT_STATUS_ENABLE_COUNTER_MASK 0x00000010 -#define INT_STATUS_ENABLE_COUNTER_GET(x) (((x) & INT_STATUS_ENABLE_COUNTER_MASK) >> INT_STATUS_ENABLE_COUNTER_LSB) -#define INT_STATUS_ENABLE_COUNTER_SET(x) (((x) << INT_STATUS_ENABLE_COUNTER_LSB) & INT_STATUS_ENABLE_COUNTER_MASK) -#define INT_STATUS_ENABLE_MBOX_DATA_MSB 3 -#define INT_STATUS_ENABLE_MBOX_DATA_LSB 0 -#define INT_STATUS_ENABLE_MBOX_DATA_MASK 0x0000000f -#define INT_STATUS_ENABLE_MBOX_DATA_GET(x) (((x) & INT_STATUS_ENABLE_MBOX_DATA_MASK) >> INT_STATUS_ENABLE_MBOX_DATA_LSB) -#define INT_STATUS_ENABLE_MBOX_DATA_SET(x) (((x) << INT_STATUS_ENABLE_MBOX_DATA_LSB) & INT_STATUS_ENABLE_MBOX_DATA_MASK) - -#define CPU_INT_STATUS_ENABLE_ADDRESS 0x00000419 -#define CPU_INT_STATUS_ENABLE_OFFSET 0x00000419 -#define CPU_INT_STATUS_ENABLE_BIT_MSB 7 -#define CPU_INT_STATUS_ENABLE_BIT_LSB 0 -#define CPU_INT_STATUS_ENABLE_BIT_MASK 0x000000ff -#define CPU_INT_STATUS_ENABLE_BIT_GET(x) (((x) & CPU_INT_STATUS_ENABLE_BIT_MASK) >> CPU_INT_STATUS_ENABLE_BIT_LSB) -#define CPU_INT_STATUS_ENABLE_BIT_SET(x) (((x) << CPU_INT_STATUS_ENABLE_BIT_LSB) & CPU_INT_STATUS_ENABLE_BIT_MASK) - -#define ERROR_STATUS_ENABLE_ADDRESS 0x0000041a -#define ERROR_STATUS_ENABLE_OFFSET 0x0000041a -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_SYNC_ERROR_MSB 6 -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_SYNC_ERROR_LSB 6 -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_SYNC_ERROR_MASK 0x00000040 -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_SYNC_ERROR_GET(x) (((x) & ERROR_STATUS_ENABLE_UART_HCI_FRAMER_SYNC_ERROR_MASK) >> ERROR_STATUS_ENABLE_UART_HCI_FRAMER_SYNC_ERROR_LSB) -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_SYNC_ERROR_SET(x) (((x) << ERROR_STATUS_ENABLE_UART_HCI_FRAMER_SYNC_ERROR_LSB) & ERROR_STATUS_ENABLE_UART_HCI_FRAMER_SYNC_ERROR_MASK) -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_OVERFLOW_MSB 5 -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_OVERFLOW_LSB 5 -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_OVERFLOW_MASK 0x00000020 -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_OVERFLOW_GET(x) (((x) & ERROR_STATUS_ENABLE_UART_HCI_FRAMER_OVERFLOW_MASK) >> ERROR_STATUS_ENABLE_UART_HCI_FRAMER_OVERFLOW_LSB) -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_OVERFLOW_SET(x) (((x) << ERROR_STATUS_ENABLE_UART_HCI_FRAMER_OVERFLOW_LSB) & ERROR_STATUS_ENABLE_UART_HCI_FRAMER_OVERFLOW_MASK) -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_UNDERFLOW_MSB 4 -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_UNDERFLOW_LSB 4 -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_UNDERFLOW_MASK 0x00000010 -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_UNDERFLOW_GET(x) (((x) & ERROR_STATUS_ENABLE_UART_HCI_FRAMER_UNDERFLOW_MASK) >> ERROR_STATUS_ENABLE_UART_HCI_FRAMER_UNDERFLOW_LSB) -#define ERROR_STATUS_ENABLE_UART_HCI_FRAMER_UNDERFLOW_SET(x) (((x) << ERROR_STATUS_ENABLE_UART_HCI_FRAMER_UNDERFLOW_LSB) & ERROR_STATUS_ENABLE_UART_HCI_FRAMER_UNDERFLOW_MASK) -#define ERROR_STATUS_ENABLE_WAKEUP_MSB 2 -#define ERROR_STATUS_ENABLE_WAKEUP_LSB 2 -#define ERROR_STATUS_ENABLE_WAKEUP_MASK 0x00000004 -#define ERROR_STATUS_ENABLE_WAKEUP_GET(x) (((x) & ERROR_STATUS_ENABLE_WAKEUP_MASK) >> ERROR_STATUS_ENABLE_WAKEUP_LSB) -#define ERROR_STATUS_ENABLE_WAKEUP_SET(x) (((x) << ERROR_STATUS_ENABLE_WAKEUP_LSB) & ERROR_STATUS_ENABLE_WAKEUP_MASK) -#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MSB 1 -#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB 1 -#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK 0x00000002 -#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_GET(x) (((x) & ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK) >> ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB) -#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_SET(x) (((x) << ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB) & ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK) -#define ERROR_STATUS_ENABLE_TX_OVERFLOW_MSB 0 -#define ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB 0 -#define ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK 0x00000001 -#define ERROR_STATUS_ENABLE_TX_OVERFLOW_GET(x) (((x) & ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK) >> ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB) -#define ERROR_STATUS_ENABLE_TX_OVERFLOW_SET(x) (((x) << ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB) & ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK) - -#define COUNTER_INT_STATUS_ENABLE_ADDRESS 0x0000041b -#define COUNTER_INT_STATUS_ENABLE_OFFSET 0x0000041b -#define COUNTER_INT_STATUS_ENABLE_BIT_MSB 7 -#define COUNTER_INT_STATUS_ENABLE_BIT_LSB 0 -#define COUNTER_INT_STATUS_ENABLE_BIT_MASK 0x000000ff -#define COUNTER_INT_STATUS_ENABLE_BIT_GET(x) (((x) & COUNTER_INT_STATUS_ENABLE_BIT_MASK) >> COUNTER_INT_STATUS_ENABLE_BIT_LSB) -#define COUNTER_INT_STATUS_ENABLE_BIT_SET(x) (((x) << COUNTER_INT_STATUS_ENABLE_BIT_LSB) & COUNTER_INT_STATUS_ENABLE_BIT_MASK) - -#define COUNT_ADDRESS 0x00000420 -#define COUNT_OFFSET 0x00000420 -#define COUNT_VALUE_MSB 7 -#define COUNT_VALUE_LSB 0 -#define COUNT_VALUE_MASK 0x000000ff -#define COUNT_VALUE_GET(x) (((x) & COUNT_VALUE_MASK) >> COUNT_VALUE_LSB) -#define COUNT_VALUE_SET(x) (((x) << COUNT_VALUE_LSB) & COUNT_VALUE_MASK) - -#define COUNT_DEC_ADDRESS 0x00000440 -#define COUNT_DEC_OFFSET 0x00000440 -#define COUNT_DEC_VALUE_MSB 7 -#define COUNT_DEC_VALUE_LSB 0 -#define COUNT_DEC_VALUE_MASK 0x000000ff -#define COUNT_DEC_VALUE_GET(x) (((x) & COUNT_DEC_VALUE_MASK) >> COUNT_DEC_VALUE_LSB) -#define COUNT_DEC_VALUE_SET(x) (((x) << COUNT_DEC_VALUE_LSB) & COUNT_DEC_VALUE_MASK) - -#define SCRATCH_ADDRESS 0x00000460 -#define SCRATCH_OFFSET 0x00000460 -#define SCRATCH_VALUE_MSB 7 -#define SCRATCH_VALUE_LSB 0 -#define SCRATCH_VALUE_MASK 0x000000ff -#define SCRATCH_VALUE_GET(x) (((x) & SCRATCH_VALUE_MASK) >> SCRATCH_VALUE_LSB) -#define SCRATCH_VALUE_SET(x) (((x) << SCRATCH_VALUE_LSB) & SCRATCH_VALUE_MASK) - -#define FIFO_TIMEOUT_ADDRESS 0x00000468 -#define FIFO_TIMEOUT_OFFSET 0x00000468 -#define FIFO_TIMEOUT_VALUE_MSB 7 -#define FIFO_TIMEOUT_VALUE_LSB 0 -#define FIFO_TIMEOUT_VALUE_MASK 0x000000ff -#define FIFO_TIMEOUT_VALUE_GET(x) (((x) & FIFO_TIMEOUT_VALUE_MASK) >> FIFO_TIMEOUT_VALUE_LSB) -#define FIFO_TIMEOUT_VALUE_SET(x) (((x) << FIFO_TIMEOUT_VALUE_LSB) & FIFO_TIMEOUT_VALUE_MASK) - -#define FIFO_TIMEOUT_ENABLE_ADDRESS 0x00000469 -#define FIFO_TIMEOUT_ENABLE_OFFSET 0x00000469 -#define FIFO_TIMEOUT_ENABLE_SET_MSB 0 -#define FIFO_TIMEOUT_ENABLE_SET_LSB 0 -#define FIFO_TIMEOUT_ENABLE_SET_MASK 0x00000001 -#define FIFO_TIMEOUT_ENABLE_SET_GET(x) (((x) & FIFO_TIMEOUT_ENABLE_SET_MASK) >> FIFO_TIMEOUT_ENABLE_SET_LSB) -#define FIFO_TIMEOUT_ENABLE_SET_SET(x) (((x) << FIFO_TIMEOUT_ENABLE_SET_LSB) & FIFO_TIMEOUT_ENABLE_SET_MASK) - -#define DISABLE_SLEEP_ADDRESS 0x0000046a -#define DISABLE_SLEEP_OFFSET 0x0000046a -#define DISABLE_SLEEP_FOR_INT_MSB 1 -#define DISABLE_SLEEP_FOR_INT_LSB 1 -#define DISABLE_SLEEP_FOR_INT_MASK 0x00000002 -#define DISABLE_SLEEP_FOR_INT_GET(x) (((x) & DISABLE_SLEEP_FOR_INT_MASK) >> DISABLE_SLEEP_FOR_INT_LSB) -#define DISABLE_SLEEP_FOR_INT_SET(x) (((x) << DISABLE_SLEEP_FOR_INT_LSB) & DISABLE_SLEEP_FOR_INT_MASK) -#define DISABLE_SLEEP_ON_MSB 0 -#define DISABLE_SLEEP_ON_LSB 0 -#define DISABLE_SLEEP_ON_MASK 0x00000001 -#define DISABLE_SLEEP_ON_GET(x) (((x) & DISABLE_SLEEP_ON_MASK) >> DISABLE_SLEEP_ON_LSB) -#define DISABLE_SLEEP_ON_SET(x) (((x) << DISABLE_SLEEP_ON_LSB) & DISABLE_SLEEP_ON_MASK) - -#define LOCAL_BUS_ADDRESS 0x00000470 -#define LOCAL_BUS_OFFSET 0x00000470 -#define LOCAL_BUS_STATE_MSB 1 -#define LOCAL_BUS_STATE_LSB 0 -#define LOCAL_BUS_STATE_MASK 0x00000003 -#define LOCAL_BUS_STATE_GET(x) (((x) & LOCAL_BUS_STATE_MASK) >> LOCAL_BUS_STATE_LSB) -#define LOCAL_BUS_STATE_SET(x) (((x) << LOCAL_BUS_STATE_LSB) & LOCAL_BUS_STATE_MASK) - -#define INT_WLAN_ADDRESS 0x00000472 -#define INT_WLAN_OFFSET 0x00000472 -#define INT_WLAN_VECTOR_MSB 7 -#define INT_WLAN_VECTOR_LSB 0 -#define INT_WLAN_VECTOR_MASK 0x000000ff -#define INT_WLAN_VECTOR_GET(x) (((x) & INT_WLAN_VECTOR_MASK) >> INT_WLAN_VECTOR_LSB) -#define INT_WLAN_VECTOR_SET(x) (((x) << INT_WLAN_VECTOR_LSB) & INT_WLAN_VECTOR_MASK) - -#define WINDOW_DATA_ADDRESS 0x00000474 -#define WINDOW_DATA_OFFSET 0x00000474 -#define WINDOW_DATA_DATA_MSB 7 -#define WINDOW_DATA_DATA_LSB 0 -#define WINDOW_DATA_DATA_MASK 0x000000ff -#define WINDOW_DATA_DATA_GET(x) (((x) & WINDOW_DATA_DATA_MASK) >> WINDOW_DATA_DATA_LSB) -#define WINDOW_DATA_DATA_SET(x) (((x) << WINDOW_DATA_DATA_LSB) & WINDOW_DATA_DATA_MASK) - -#define WINDOW_WRITE_ADDR_ADDRESS 0x00000478 -#define WINDOW_WRITE_ADDR_OFFSET 0x00000478 -#define WINDOW_WRITE_ADDR_ADDR_MSB 7 -#define WINDOW_WRITE_ADDR_ADDR_LSB 0 -#define WINDOW_WRITE_ADDR_ADDR_MASK 0x000000ff -#define WINDOW_WRITE_ADDR_ADDR_GET(x) (((x) & WINDOW_WRITE_ADDR_ADDR_MASK) >> WINDOW_WRITE_ADDR_ADDR_LSB) -#define WINDOW_WRITE_ADDR_ADDR_SET(x) (((x) << WINDOW_WRITE_ADDR_ADDR_LSB) & WINDOW_WRITE_ADDR_ADDR_MASK) - -#define WINDOW_READ_ADDR_ADDRESS 0x0000047c -#define WINDOW_READ_ADDR_OFFSET 0x0000047c -#define WINDOW_READ_ADDR_ADDR_MSB 7 -#define WINDOW_READ_ADDR_ADDR_LSB 0 -#define WINDOW_READ_ADDR_ADDR_MASK 0x000000ff -#define WINDOW_READ_ADDR_ADDR_GET(x) (((x) & WINDOW_READ_ADDR_ADDR_MASK) >> WINDOW_READ_ADDR_ADDR_LSB) -#define WINDOW_READ_ADDR_ADDR_SET(x) (((x) << WINDOW_READ_ADDR_ADDR_LSB) & WINDOW_READ_ADDR_ADDR_MASK) - -#define HOST_CTRL_SPI_CONFIG_ADDRESS 0x00000480 -#define HOST_CTRL_SPI_CONFIG_OFFSET 0x00000480 -#define HOST_CTRL_SPI_CONFIG_SPI_RESET_MSB 4 -#define HOST_CTRL_SPI_CONFIG_SPI_RESET_LSB 4 -#define HOST_CTRL_SPI_CONFIG_SPI_RESET_MASK 0x00000010 -#define HOST_CTRL_SPI_CONFIG_SPI_RESET_GET(x) (((x) & HOST_CTRL_SPI_CONFIG_SPI_RESET_MASK) >> HOST_CTRL_SPI_CONFIG_SPI_RESET_LSB) -#define HOST_CTRL_SPI_CONFIG_SPI_RESET_SET(x) (((x) << HOST_CTRL_SPI_CONFIG_SPI_RESET_LSB) & HOST_CTRL_SPI_CONFIG_SPI_RESET_MASK) -#define HOST_CTRL_SPI_CONFIG_INTERRUPT_ENABLE_MSB 3 -#define HOST_CTRL_SPI_CONFIG_INTERRUPT_ENABLE_LSB 3 -#define HOST_CTRL_SPI_CONFIG_INTERRUPT_ENABLE_MASK 0x00000008 -#define HOST_CTRL_SPI_CONFIG_INTERRUPT_ENABLE_GET(x) (((x) & HOST_CTRL_SPI_CONFIG_INTERRUPT_ENABLE_MASK) >> HOST_CTRL_SPI_CONFIG_INTERRUPT_ENABLE_LSB) -#define HOST_CTRL_SPI_CONFIG_INTERRUPT_ENABLE_SET(x) (((x) << HOST_CTRL_SPI_CONFIG_INTERRUPT_ENABLE_LSB) & HOST_CTRL_SPI_CONFIG_INTERRUPT_ENABLE_MASK) -#define HOST_CTRL_SPI_CONFIG_TEST_MODE_MSB 2 -#define HOST_CTRL_SPI_CONFIG_TEST_MODE_LSB 2 -#define HOST_CTRL_SPI_CONFIG_TEST_MODE_MASK 0x00000004 -#define HOST_CTRL_SPI_CONFIG_TEST_MODE_GET(x) (((x) & HOST_CTRL_SPI_CONFIG_TEST_MODE_MASK) >> HOST_CTRL_SPI_CONFIG_TEST_MODE_LSB) -#define HOST_CTRL_SPI_CONFIG_TEST_MODE_SET(x) (((x) << HOST_CTRL_SPI_CONFIG_TEST_MODE_LSB) & HOST_CTRL_SPI_CONFIG_TEST_MODE_MASK) -#define HOST_CTRL_SPI_CONFIG_DATA_SIZE_MSB 1 -#define HOST_CTRL_SPI_CONFIG_DATA_SIZE_LSB 0 -#define HOST_CTRL_SPI_CONFIG_DATA_SIZE_MASK 0x00000003 -#define HOST_CTRL_SPI_CONFIG_DATA_SIZE_GET(x) (((x) & HOST_CTRL_SPI_CONFIG_DATA_SIZE_MASK) >> HOST_CTRL_SPI_CONFIG_DATA_SIZE_LSB) -#define HOST_CTRL_SPI_CONFIG_DATA_SIZE_SET(x) (((x) << HOST_CTRL_SPI_CONFIG_DATA_SIZE_LSB) & HOST_CTRL_SPI_CONFIG_DATA_SIZE_MASK) - -#define HOST_CTRL_SPI_STATUS_ADDRESS 0x00000481 -#define HOST_CTRL_SPI_STATUS_OFFSET 0x00000481 -#define HOST_CTRL_SPI_STATUS_ADDR_ERR_MSB 3 -#define HOST_CTRL_SPI_STATUS_ADDR_ERR_LSB 3 -#define HOST_CTRL_SPI_STATUS_ADDR_ERR_MASK 0x00000008 -#define HOST_CTRL_SPI_STATUS_ADDR_ERR_GET(x) (((x) & HOST_CTRL_SPI_STATUS_ADDR_ERR_MASK) >> HOST_CTRL_SPI_STATUS_ADDR_ERR_LSB) -#define HOST_CTRL_SPI_STATUS_ADDR_ERR_SET(x) (((x) << HOST_CTRL_SPI_STATUS_ADDR_ERR_LSB) & HOST_CTRL_SPI_STATUS_ADDR_ERR_MASK) -#define HOST_CTRL_SPI_STATUS_RD_ERR_MSB 2 -#define HOST_CTRL_SPI_STATUS_RD_ERR_LSB 2 -#define HOST_CTRL_SPI_STATUS_RD_ERR_MASK 0x00000004 -#define HOST_CTRL_SPI_STATUS_RD_ERR_GET(x) (((x) & HOST_CTRL_SPI_STATUS_RD_ERR_MASK) >> HOST_CTRL_SPI_STATUS_RD_ERR_LSB) -#define HOST_CTRL_SPI_STATUS_RD_ERR_SET(x) (((x) << HOST_CTRL_SPI_STATUS_RD_ERR_LSB) & HOST_CTRL_SPI_STATUS_RD_ERR_MASK) -#define HOST_CTRL_SPI_STATUS_WR_ERR_MSB 1 -#define HOST_CTRL_SPI_STATUS_WR_ERR_LSB 1 -#define HOST_CTRL_SPI_STATUS_WR_ERR_MASK 0x00000002 -#define HOST_CTRL_SPI_STATUS_WR_ERR_GET(x) (((x) & HOST_CTRL_SPI_STATUS_WR_ERR_MASK) >> HOST_CTRL_SPI_STATUS_WR_ERR_LSB) -#define HOST_CTRL_SPI_STATUS_WR_ERR_SET(x) (((x) << HOST_CTRL_SPI_STATUS_WR_ERR_LSB) & HOST_CTRL_SPI_STATUS_WR_ERR_MASK) -#define HOST_CTRL_SPI_STATUS_READY_MSB 0 -#define HOST_CTRL_SPI_STATUS_READY_LSB 0 -#define HOST_CTRL_SPI_STATUS_READY_MASK 0x00000001 -#define HOST_CTRL_SPI_STATUS_READY_GET(x) (((x) & HOST_CTRL_SPI_STATUS_READY_MASK) >> HOST_CTRL_SPI_STATUS_READY_LSB) -#define HOST_CTRL_SPI_STATUS_READY_SET(x) (((x) << HOST_CTRL_SPI_STATUS_READY_LSB) & HOST_CTRL_SPI_STATUS_READY_MASK) - -#define NON_ASSOC_SLEEP_EN_ADDRESS 0x00000482 -#define NON_ASSOC_SLEEP_EN_OFFSET 0x00000482 -#define NON_ASSOC_SLEEP_EN_BIT_MSB 0 -#define NON_ASSOC_SLEEP_EN_BIT_LSB 0 -#define NON_ASSOC_SLEEP_EN_BIT_MASK 0x00000001 -#define NON_ASSOC_SLEEP_EN_BIT_GET(x) (((x) & NON_ASSOC_SLEEP_EN_BIT_MASK) >> NON_ASSOC_SLEEP_EN_BIT_LSB) -#define NON_ASSOC_SLEEP_EN_BIT_SET(x) (((x) << NON_ASSOC_SLEEP_EN_BIT_LSB) & NON_ASSOC_SLEEP_EN_BIT_MASK) - -#define CPU_DBG_SEL_ADDRESS 0x00000483 -#define CPU_DBG_SEL_OFFSET 0x00000483 -#define CPU_DBG_SEL_BIT_MSB 5 -#define CPU_DBG_SEL_BIT_LSB 0 -#define CPU_DBG_SEL_BIT_MASK 0x0000003f -#define CPU_DBG_SEL_BIT_GET(x) (((x) & CPU_DBG_SEL_BIT_MASK) >> CPU_DBG_SEL_BIT_LSB) -#define CPU_DBG_SEL_BIT_SET(x) (((x) << CPU_DBG_SEL_BIT_LSB) & CPU_DBG_SEL_BIT_MASK) - -#define CPU_DBG_ADDRESS 0x00000484 -#define CPU_DBG_OFFSET 0x00000484 -#define CPU_DBG_DATA_MSB 7 -#define CPU_DBG_DATA_LSB 0 -#define CPU_DBG_DATA_MASK 0x000000ff -#define CPU_DBG_DATA_GET(x) (((x) & CPU_DBG_DATA_MASK) >> CPU_DBG_DATA_LSB) -#define CPU_DBG_DATA_SET(x) (((x) << CPU_DBG_DATA_LSB) & CPU_DBG_DATA_MASK) - -#define INT_STATUS2_ENABLE_ADDRESS 0x00000488 -#define INT_STATUS2_ENABLE_OFFSET 0x00000488 -#define INT_STATUS2_ENABLE_GMBOX_RX_UNDERFLOW_MSB 2 -#define INT_STATUS2_ENABLE_GMBOX_RX_UNDERFLOW_LSB 2 -#define INT_STATUS2_ENABLE_GMBOX_RX_UNDERFLOW_MASK 0x00000004 -#define INT_STATUS2_ENABLE_GMBOX_RX_UNDERFLOW_GET(x) (((x) & INT_STATUS2_ENABLE_GMBOX_RX_UNDERFLOW_MASK) >> INT_STATUS2_ENABLE_GMBOX_RX_UNDERFLOW_LSB) -#define INT_STATUS2_ENABLE_GMBOX_RX_UNDERFLOW_SET(x) (((x) << INT_STATUS2_ENABLE_GMBOX_RX_UNDERFLOW_LSB) & INT_STATUS2_ENABLE_GMBOX_RX_UNDERFLOW_MASK) -#define INT_STATUS2_ENABLE_GMBOX_TX_OVERFLOW_MSB 1 -#define INT_STATUS2_ENABLE_GMBOX_TX_OVERFLOW_LSB 1 -#define INT_STATUS2_ENABLE_GMBOX_TX_OVERFLOW_MASK 0x00000002 -#define INT_STATUS2_ENABLE_GMBOX_TX_OVERFLOW_GET(x) (((x) & INT_STATUS2_ENABLE_GMBOX_TX_OVERFLOW_MASK) >> INT_STATUS2_ENABLE_GMBOX_TX_OVERFLOW_LSB) -#define INT_STATUS2_ENABLE_GMBOX_TX_OVERFLOW_SET(x) (((x) << INT_STATUS2_ENABLE_GMBOX_TX_OVERFLOW_LSB) & INT_STATUS2_ENABLE_GMBOX_TX_OVERFLOW_MASK) -#define INT_STATUS2_ENABLE_GMBOX_DATA_MSB 0 -#define INT_STATUS2_ENABLE_GMBOX_DATA_LSB 0 -#define INT_STATUS2_ENABLE_GMBOX_DATA_MASK 0x00000001 -#define INT_STATUS2_ENABLE_GMBOX_DATA_GET(x) (((x) & INT_STATUS2_ENABLE_GMBOX_DATA_MASK) >> INT_STATUS2_ENABLE_GMBOX_DATA_LSB) -#define INT_STATUS2_ENABLE_GMBOX_DATA_SET(x) (((x) << INT_STATUS2_ENABLE_GMBOX_DATA_LSB) & INT_STATUS2_ENABLE_GMBOX_DATA_MASK) - -#define GMBOX_RX_LOOKAHEAD_ADDRESS 0x00000490 -#define GMBOX_RX_LOOKAHEAD_OFFSET 0x00000490 -#define GMBOX_RX_LOOKAHEAD_DATA_MSB 7 -#define GMBOX_RX_LOOKAHEAD_DATA_LSB 0 -#define GMBOX_RX_LOOKAHEAD_DATA_MASK 0x000000ff -#define GMBOX_RX_LOOKAHEAD_DATA_GET(x) (((x) & GMBOX_RX_LOOKAHEAD_DATA_MASK) >> GMBOX_RX_LOOKAHEAD_DATA_LSB) -#define GMBOX_RX_LOOKAHEAD_DATA_SET(x) (((x) << GMBOX_RX_LOOKAHEAD_DATA_LSB) & GMBOX_RX_LOOKAHEAD_DATA_MASK) - -#define GMBOX_RX_LOOKAHEAD_MUX_ADDRESS 0x00000498 -#define GMBOX_RX_LOOKAHEAD_MUX_OFFSET 0x00000498 -#define GMBOX_RX_LOOKAHEAD_MUX_SEL_MSB 0 -#define GMBOX_RX_LOOKAHEAD_MUX_SEL_LSB 0 -#define GMBOX_RX_LOOKAHEAD_MUX_SEL_MASK 0x00000001 -#define GMBOX_RX_LOOKAHEAD_MUX_SEL_GET(x) (((x) & GMBOX_RX_LOOKAHEAD_MUX_SEL_MASK) >> GMBOX_RX_LOOKAHEAD_MUX_SEL_LSB) -#define GMBOX_RX_LOOKAHEAD_MUX_SEL_SET(x) (((x) << GMBOX_RX_LOOKAHEAD_MUX_SEL_LSB) & GMBOX_RX_LOOKAHEAD_MUX_SEL_MASK) - -#define CIS_WINDOW_ADDRESS 0x00000600 -#define CIS_WINDOW_OFFSET 0x00000600 -#define CIS_WINDOW_DATA_MSB 7 -#define CIS_WINDOW_DATA_LSB 0 -#define CIS_WINDOW_DATA_MASK 0x000000ff -#define CIS_WINDOW_DATA_GET(x) (((x) & CIS_WINDOW_DATA_MASK) >> CIS_WINDOW_DATA_LSB) -#define CIS_WINDOW_DATA_SET(x) (((x) << CIS_WINDOW_DATA_LSB) & CIS_WINDOW_DATA_MASK) - - -#endif /* _MBOX_WLAN_HOST_REG_H_ */ diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_wlan_reg.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_wlan_reg.h deleted file mode 100644 index f5167b9ae8d0..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_wlan_reg.h +++ /dev/null @@ -1,589 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#ifndef _MBOX_WLAN_REG_REG_H_ -#define _MBOX_WLAN_REG_REG_H_ - -#define WLAN_MBOX_FIFO_ADDRESS 0x00000000 -#define WLAN_MBOX_FIFO_OFFSET 0x00000000 -#define WLAN_MBOX_FIFO_DATA_MSB 19 -#define WLAN_MBOX_FIFO_DATA_LSB 0 -#define WLAN_MBOX_FIFO_DATA_MASK 0x000fffff -#define WLAN_MBOX_FIFO_DATA_GET(x) (((x) & WLAN_MBOX_FIFO_DATA_MASK) >> WLAN_MBOX_FIFO_DATA_LSB) -#define WLAN_MBOX_FIFO_DATA_SET(x) (((x) << WLAN_MBOX_FIFO_DATA_LSB) & WLAN_MBOX_FIFO_DATA_MASK) - -#define WLAN_MBOX_FIFO_STATUS_ADDRESS 0x00000010 -#define WLAN_MBOX_FIFO_STATUS_OFFSET 0x00000010 -#define WLAN_MBOX_FIFO_STATUS_EMPTY_MSB 19 -#define WLAN_MBOX_FIFO_STATUS_EMPTY_LSB 16 -#define WLAN_MBOX_FIFO_STATUS_EMPTY_MASK 0x000f0000 -#define WLAN_MBOX_FIFO_STATUS_EMPTY_GET(x) (((x) & WLAN_MBOX_FIFO_STATUS_EMPTY_MASK) >> WLAN_MBOX_FIFO_STATUS_EMPTY_LSB) -#define WLAN_MBOX_FIFO_STATUS_EMPTY_SET(x) (((x) << WLAN_MBOX_FIFO_STATUS_EMPTY_LSB) & WLAN_MBOX_FIFO_STATUS_EMPTY_MASK) -#define WLAN_MBOX_FIFO_STATUS_FULL_MSB 15 -#define WLAN_MBOX_FIFO_STATUS_FULL_LSB 12 -#define WLAN_MBOX_FIFO_STATUS_FULL_MASK 0x0000f000 -#define WLAN_MBOX_FIFO_STATUS_FULL_GET(x) (((x) & WLAN_MBOX_FIFO_STATUS_FULL_MASK) >> WLAN_MBOX_FIFO_STATUS_FULL_LSB) -#define WLAN_MBOX_FIFO_STATUS_FULL_SET(x) (((x) << WLAN_MBOX_FIFO_STATUS_FULL_LSB) & WLAN_MBOX_FIFO_STATUS_FULL_MASK) - -#define WLAN_MBOX_DMA_POLICY_ADDRESS 0x00000014 -#define WLAN_MBOX_DMA_POLICY_OFFSET 0x00000014 -#define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_MSB 3 -#define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_LSB 3 -#define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_MASK 0x00000008 -#define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_GET(x) (((x) & WLAN_MBOX_DMA_POLICY_TX_QUANTUM_MASK) >> WLAN_MBOX_DMA_POLICY_TX_QUANTUM_LSB) -#define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_SET(x) (((x) << WLAN_MBOX_DMA_POLICY_TX_QUANTUM_LSB) & WLAN_MBOX_DMA_POLICY_TX_QUANTUM_MASK) -#define WLAN_MBOX_DMA_POLICY_TX_ORDER_MSB 2 -#define WLAN_MBOX_DMA_POLICY_TX_ORDER_LSB 2 -#define WLAN_MBOX_DMA_POLICY_TX_ORDER_MASK 0x00000004 -#define WLAN_MBOX_DMA_POLICY_TX_ORDER_GET(x) (((x) & WLAN_MBOX_DMA_POLICY_TX_ORDER_MASK) >> WLAN_MBOX_DMA_POLICY_TX_ORDER_LSB) -#define WLAN_MBOX_DMA_POLICY_TX_ORDER_SET(x) (((x) << WLAN_MBOX_DMA_POLICY_TX_ORDER_LSB) & WLAN_MBOX_DMA_POLICY_TX_ORDER_MASK) -#define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_MSB 1 -#define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_LSB 1 -#define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_MASK 0x00000002 -#define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_GET(x) (((x) & WLAN_MBOX_DMA_POLICY_RX_QUANTUM_MASK) >> WLAN_MBOX_DMA_POLICY_RX_QUANTUM_LSB) -#define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_SET(x) (((x) << WLAN_MBOX_DMA_POLICY_RX_QUANTUM_LSB) & WLAN_MBOX_DMA_POLICY_RX_QUANTUM_MASK) -#define WLAN_MBOX_DMA_POLICY_RX_ORDER_MSB 0 -#define WLAN_MBOX_DMA_POLICY_RX_ORDER_LSB 0 -#define WLAN_MBOX_DMA_POLICY_RX_ORDER_MASK 0x00000001 -#define WLAN_MBOX_DMA_POLICY_RX_ORDER_GET(x) (((x) & WLAN_MBOX_DMA_POLICY_RX_ORDER_MASK) >> WLAN_MBOX_DMA_POLICY_RX_ORDER_LSB) -#define WLAN_MBOX_DMA_POLICY_RX_ORDER_SET(x) (((x) << WLAN_MBOX_DMA_POLICY_RX_ORDER_LSB) & WLAN_MBOX_DMA_POLICY_RX_ORDER_MASK) - -#define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000018 -#define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000018 -#define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_MBOX0_DMA_RX_CONTROL_ADDRESS 0x0000001c -#define WLAN_MBOX0_DMA_RX_CONTROL_OFFSET 0x0000001c -#define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_MSB 2 -#define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_LSB 2 -#define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX0_DMA_RX_CONTROL_RESUME_MASK) >> WLAN_MBOX0_DMA_RX_CONTROL_RESUME_LSB) -#define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX0_DMA_RX_CONTROL_RESUME_LSB) & WLAN_MBOX0_DMA_RX_CONTROL_RESUME_MASK) -#define WLAN_MBOX0_DMA_RX_CONTROL_START_MSB 1 -#define WLAN_MBOX0_DMA_RX_CONTROL_START_LSB 1 -#define WLAN_MBOX0_DMA_RX_CONTROL_START_MASK 0x00000002 -#define WLAN_MBOX0_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_MBOX0_DMA_RX_CONTROL_START_MASK) >> WLAN_MBOX0_DMA_RX_CONTROL_START_LSB) -#define WLAN_MBOX0_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_MBOX0_DMA_RX_CONTROL_START_LSB) & WLAN_MBOX0_DMA_RX_CONTROL_START_MASK) -#define WLAN_MBOX0_DMA_RX_CONTROL_STOP_MSB 0 -#define WLAN_MBOX0_DMA_RX_CONTROL_STOP_LSB 0 -#define WLAN_MBOX0_DMA_RX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_MBOX0_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX0_DMA_RX_CONTROL_STOP_MASK) >> WLAN_MBOX0_DMA_RX_CONTROL_STOP_LSB) -#define WLAN_MBOX0_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX0_DMA_RX_CONTROL_STOP_LSB) & WLAN_MBOX0_DMA_RX_CONTROL_STOP_MASK) - -#define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x00000020 -#define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x00000020 -#define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_MBOX0_DMA_TX_CONTROL_ADDRESS 0x00000024 -#define WLAN_MBOX0_DMA_TX_CONTROL_OFFSET 0x00000024 -#define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_MSB 2 -#define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_LSB 2 -#define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX0_DMA_TX_CONTROL_RESUME_MASK) >> WLAN_MBOX0_DMA_TX_CONTROL_RESUME_LSB) -#define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX0_DMA_TX_CONTROL_RESUME_LSB) & WLAN_MBOX0_DMA_TX_CONTROL_RESUME_MASK) -#define WLAN_MBOX0_DMA_TX_CONTROL_START_MSB 1 -#define WLAN_MBOX0_DMA_TX_CONTROL_START_LSB 1 -#define WLAN_MBOX0_DMA_TX_CONTROL_START_MASK 0x00000002 -#define WLAN_MBOX0_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_MBOX0_DMA_TX_CONTROL_START_MASK) >> WLAN_MBOX0_DMA_TX_CONTROL_START_LSB) -#define WLAN_MBOX0_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_MBOX0_DMA_TX_CONTROL_START_LSB) & WLAN_MBOX0_DMA_TX_CONTROL_START_MASK) -#define WLAN_MBOX0_DMA_TX_CONTROL_STOP_MSB 0 -#define WLAN_MBOX0_DMA_TX_CONTROL_STOP_LSB 0 -#define WLAN_MBOX0_DMA_TX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_MBOX0_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX0_DMA_TX_CONTROL_STOP_MASK) >> WLAN_MBOX0_DMA_TX_CONTROL_STOP_LSB) -#define WLAN_MBOX0_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX0_DMA_TX_CONTROL_STOP_LSB) & WLAN_MBOX0_DMA_TX_CONTROL_STOP_MASK) - -#define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000028 -#define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000028 -#define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_MBOX1_DMA_RX_CONTROL_ADDRESS 0x0000002c -#define WLAN_MBOX1_DMA_RX_CONTROL_OFFSET 0x0000002c -#define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_MSB 2 -#define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_LSB 2 -#define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX1_DMA_RX_CONTROL_RESUME_MASK) >> WLAN_MBOX1_DMA_RX_CONTROL_RESUME_LSB) -#define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX1_DMA_RX_CONTROL_RESUME_LSB) & WLAN_MBOX1_DMA_RX_CONTROL_RESUME_MASK) -#define WLAN_MBOX1_DMA_RX_CONTROL_START_MSB 1 -#define WLAN_MBOX1_DMA_RX_CONTROL_START_LSB 1 -#define WLAN_MBOX1_DMA_RX_CONTROL_START_MASK 0x00000002 -#define WLAN_MBOX1_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_MBOX1_DMA_RX_CONTROL_START_MASK) >> WLAN_MBOX1_DMA_RX_CONTROL_START_LSB) -#define WLAN_MBOX1_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_MBOX1_DMA_RX_CONTROL_START_LSB) & WLAN_MBOX1_DMA_RX_CONTROL_START_MASK) -#define WLAN_MBOX1_DMA_RX_CONTROL_STOP_MSB 0 -#define WLAN_MBOX1_DMA_RX_CONTROL_STOP_LSB 0 -#define WLAN_MBOX1_DMA_RX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_MBOX1_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX1_DMA_RX_CONTROL_STOP_MASK) >> WLAN_MBOX1_DMA_RX_CONTROL_STOP_LSB) -#define WLAN_MBOX1_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX1_DMA_RX_CONTROL_STOP_LSB) & WLAN_MBOX1_DMA_RX_CONTROL_STOP_MASK) - -#define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x00000030 -#define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x00000030 -#define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_MBOX1_DMA_TX_CONTROL_ADDRESS 0x00000034 -#define WLAN_MBOX1_DMA_TX_CONTROL_OFFSET 0x00000034 -#define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_MSB 2 -#define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_LSB 2 -#define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX1_DMA_TX_CONTROL_RESUME_MASK) >> WLAN_MBOX1_DMA_TX_CONTROL_RESUME_LSB) -#define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX1_DMA_TX_CONTROL_RESUME_LSB) & WLAN_MBOX1_DMA_TX_CONTROL_RESUME_MASK) -#define WLAN_MBOX1_DMA_TX_CONTROL_START_MSB 1 -#define WLAN_MBOX1_DMA_TX_CONTROL_START_LSB 1 -#define WLAN_MBOX1_DMA_TX_CONTROL_START_MASK 0x00000002 -#define WLAN_MBOX1_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_MBOX1_DMA_TX_CONTROL_START_MASK) >> WLAN_MBOX1_DMA_TX_CONTROL_START_LSB) -#define WLAN_MBOX1_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_MBOX1_DMA_TX_CONTROL_START_LSB) & WLAN_MBOX1_DMA_TX_CONTROL_START_MASK) -#define WLAN_MBOX1_DMA_TX_CONTROL_STOP_MSB 0 -#define WLAN_MBOX1_DMA_TX_CONTROL_STOP_LSB 0 -#define WLAN_MBOX1_DMA_TX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_MBOX1_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX1_DMA_TX_CONTROL_STOP_MASK) >> WLAN_MBOX1_DMA_TX_CONTROL_STOP_LSB) -#define WLAN_MBOX1_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX1_DMA_TX_CONTROL_STOP_LSB) & WLAN_MBOX1_DMA_TX_CONTROL_STOP_MASK) - -#define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000038 -#define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000038 -#define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_MBOX2_DMA_RX_CONTROL_ADDRESS 0x0000003c -#define WLAN_MBOX2_DMA_RX_CONTROL_OFFSET 0x0000003c -#define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_MSB 2 -#define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_LSB 2 -#define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX2_DMA_RX_CONTROL_RESUME_MASK) >> WLAN_MBOX2_DMA_RX_CONTROL_RESUME_LSB) -#define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX2_DMA_RX_CONTROL_RESUME_LSB) & WLAN_MBOX2_DMA_RX_CONTROL_RESUME_MASK) -#define WLAN_MBOX2_DMA_RX_CONTROL_START_MSB 1 -#define WLAN_MBOX2_DMA_RX_CONTROL_START_LSB 1 -#define WLAN_MBOX2_DMA_RX_CONTROL_START_MASK 0x00000002 -#define WLAN_MBOX2_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_MBOX2_DMA_RX_CONTROL_START_MASK) >> WLAN_MBOX2_DMA_RX_CONTROL_START_LSB) -#define WLAN_MBOX2_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_MBOX2_DMA_RX_CONTROL_START_LSB) & WLAN_MBOX2_DMA_RX_CONTROL_START_MASK) -#define WLAN_MBOX2_DMA_RX_CONTROL_STOP_MSB 0 -#define WLAN_MBOX2_DMA_RX_CONTROL_STOP_LSB 0 -#define WLAN_MBOX2_DMA_RX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_MBOX2_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX2_DMA_RX_CONTROL_STOP_MASK) >> WLAN_MBOX2_DMA_RX_CONTROL_STOP_LSB) -#define WLAN_MBOX2_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX2_DMA_RX_CONTROL_STOP_LSB) & WLAN_MBOX2_DMA_RX_CONTROL_STOP_MASK) - -#define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x00000040 -#define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x00000040 -#define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_MBOX2_DMA_TX_CONTROL_ADDRESS 0x00000044 -#define WLAN_MBOX2_DMA_TX_CONTROL_OFFSET 0x00000044 -#define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_MSB 2 -#define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_LSB 2 -#define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX2_DMA_TX_CONTROL_RESUME_MASK) >> WLAN_MBOX2_DMA_TX_CONTROL_RESUME_LSB) -#define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX2_DMA_TX_CONTROL_RESUME_LSB) & WLAN_MBOX2_DMA_TX_CONTROL_RESUME_MASK) -#define WLAN_MBOX2_DMA_TX_CONTROL_START_MSB 1 -#define WLAN_MBOX2_DMA_TX_CONTROL_START_LSB 1 -#define WLAN_MBOX2_DMA_TX_CONTROL_START_MASK 0x00000002 -#define WLAN_MBOX2_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_MBOX2_DMA_TX_CONTROL_START_MASK) >> WLAN_MBOX2_DMA_TX_CONTROL_START_LSB) -#define WLAN_MBOX2_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_MBOX2_DMA_TX_CONTROL_START_LSB) & WLAN_MBOX2_DMA_TX_CONTROL_START_MASK) -#define WLAN_MBOX2_DMA_TX_CONTROL_STOP_MSB 0 -#define WLAN_MBOX2_DMA_TX_CONTROL_STOP_LSB 0 -#define WLAN_MBOX2_DMA_TX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_MBOX2_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX2_DMA_TX_CONTROL_STOP_MASK) >> WLAN_MBOX2_DMA_TX_CONTROL_STOP_LSB) -#define WLAN_MBOX2_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX2_DMA_TX_CONTROL_STOP_LSB) & WLAN_MBOX2_DMA_TX_CONTROL_STOP_MASK) - -#define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000048 -#define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000048 -#define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_MBOX3_DMA_RX_CONTROL_ADDRESS 0x0000004c -#define WLAN_MBOX3_DMA_RX_CONTROL_OFFSET 0x0000004c -#define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_MSB 2 -#define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_LSB 2 -#define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX3_DMA_RX_CONTROL_RESUME_MASK) >> WLAN_MBOX3_DMA_RX_CONTROL_RESUME_LSB) -#define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX3_DMA_RX_CONTROL_RESUME_LSB) & WLAN_MBOX3_DMA_RX_CONTROL_RESUME_MASK) -#define WLAN_MBOX3_DMA_RX_CONTROL_START_MSB 1 -#define WLAN_MBOX3_DMA_RX_CONTROL_START_LSB 1 -#define WLAN_MBOX3_DMA_RX_CONTROL_START_MASK 0x00000002 -#define WLAN_MBOX3_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_MBOX3_DMA_RX_CONTROL_START_MASK) >> WLAN_MBOX3_DMA_RX_CONTROL_START_LSB) -#define WLAN_MBOX3_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_MBOX3_DMA_RX_CONTROL_START_LSB) & WLAN_MBOX3_DMA_RX_CONTROL_START_MASK) -#define WLAN_MBOX3_DMA_RX_CONTROL_STOP_MSB 0 -#define WLAN_MBOX3_DMA_RX_CONTROL_STOP_LSB 0 -#define WLAN_MBOX3_DMA_RX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_MBOX3_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX3_DMA_RX_CONTROL_STOP_MASK) >> WLAN_MBOX3_DMA_RX_CONTROL_STOP_LSB) -#define WLAN_MBOX3_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX3_DMA_RX_CONTROL_STOP_LSB) & WLAN_MBOX3_DMA_RX_CONTROL_STOP_MASK) - -#define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x00000050 -#define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x00000050 -#define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_MBOX3_DMA_TX_CONTROL_ADDRESS 0x00000054 -#define WLAN_MBOX3_DMA_TX_CONTROL_OFFSET 0x00000054 -#define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_MSB 2 -#define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_LSB 2 -#define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX3_DMA_TX_CONTROL_RESUME_MASK) >> WLAN_MBOX3_DMA_TX_CONTROL_RESUME_LSB) -#define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX3_DMA_TX_CONTROL_RESUME_LSB) & WLAN_MBOX3_DMA_TX_CONTROL_RESUME_MASK) -#define WLAN_MBOX3_DMA_TX_CONTROL_START_MSB 1 -#define WLAN_MBOX3_DMA_TX_CONTROL_START_LSB 1 -#define WLAN_MBOX3_DMA_TX_CONTROL_START_MASK 0x00000002 -#define WLAN_MBOX3_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_MBOX3_DMA_TX_CONTROL_START_MASK) >> WLAN_MBOX3_DMA_TX_CONTROL_START_LSB) -#define WLAN_MBOX3_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_MBOX3_DMA_TX_CONTROL_START_LSB) & WLAN_MBOX3_DMA_TX_CONTROL_START_MASK) -#define WLAN_MBOX3_DMA_TX_CONTROL_STOP_MSB 0 -#define WLAN_MBOX3_DMA_TX_CONTROL_STOP_LSB 0 -#define WLAN_MBOX3_DMA_TX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_MBOX3_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX3_DMA_TX_CONTROL_STOP_MASK) >> WLAN_MBOX3_DMA_TX_CONTROL_STOP_LSB) -#define WLAN_MBOX3_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX3_DMA_TX_CONTROL_STOP_LSB) & WLAN_MBOX3_DMA_TX_CONTROL_STOP_MASK) - -#define WLAN_MBOX_INT_STATUS_ADDRESS 0x00000058 -#define WLAN_MBOX_INT_STATUS_OFFSET 0x00000058 -#define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_MSB 31 -#define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_LSB 28 -#define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_MASK 0xf0000000 -#define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_MASK) >> WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_LSB) -#define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_LSB) & WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_MASK) -#define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MSB 27 -#define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB 24 -#define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK 0x0f000000 -#define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK) >> WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB) -#define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB) & WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK) -#define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_MSB 23 -#define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_LSB 20 -#define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_MASK 0x00f00000 -#define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_MASK) >> WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_LSB) -#define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_LSB) & WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_MASK) -#define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_MSB 17 -#define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_LSB 17 -#define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_MASK 0x00020000 -#define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_GET(x) (((x) & WLAN_MBOX_INT_STATUS_TX_OVERFLOW_MASK) >> WLAN_MBOX_INT_STATUS_TX_OVERFLOW_LSB) -#define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_SET(x) (((x) << WLAN_MBOX_INT_STATUS_TX_OVERFLOW_LSB) & WLAN_MBOX_INT_STATUS_TX_OVERFLOW_MASK) -#define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_MSB 16 -#define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_LSB 16 -#define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_MASK 0x00010000 -#define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_GET(x) (((x) & WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_MASK) >> WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_LSB) -#define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_SET(x) (((x) << WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_LSB) & WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_MASK) -#define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_MSB 15 -#define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_LSB 12 -#define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_MASK 0x0000f000 -#define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_GET(x) (((x) & WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_MASK) >> WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_LSB) -#define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_SET(x) (((x) << WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_LSB) & WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_MASK) -#define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_MSB 11 -#define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_LSB 8 -#define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_MASK 0x00000f00 -#define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_GET(x) (((x) & WLAN_MBOX_INT_STATUS_RX_NOT_FULL_MASK) >> WLAN_MBOX_INT_STATUS_RX_NOT_FULL_LSB) -#define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_SET(x) (((x) << WLAN_MBOX_INT_STATUS_RX_NOT_FULL_LSB) & WLAN_MBOX_INT_STATUS_RX_NOT_FULL_MASK) -#define WLAN_MBOX_INT_STATUS_HOST_MSB 7 -#define WLAN_MBOX_INT_STATUS_HOST_LSB 0 -#define WLAN_MBOX_INT_STATUS_HOST_MASK 0x000000ff -#define WLAN_MBOX_INT_STATUS_HOST_GET(x) (((x) & WLAN_MBOX_INT_STATUS_HOST_MASK) >> WLAN_MBOX_INT_STATUS_HOST_LSB) -#define WLAN_MBOX_INT_STATUS_HOST_SET(x) (((x) << WLAN_MBOX_INT_STATUS_HOST_LSB) & WLAN_MBOX_INT_STATUS_HOST_MASK) - -#define WLAN_MBOX_INT_ENABLE_ADDRESS 0x0000005c -#define WLAN_MBOX_INT_ENABLE_OFFSET 0x0000005c -#define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_MSB 31 -#define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB 28 -#define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK 0xf0000000 -#define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK) >> WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB) -#define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB) & WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK) -#define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MSB 27 -#define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB 24 -#define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK 0x0f000000 -#define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK) >> WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB) -#define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB) & WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK) -#define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_MSB 23 -#define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB 20 -#define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK 0x00f00000 -#define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK) >> WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB) -#define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB) & WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK) -#define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_MSB 17 -#define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_LSB 17 -#define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_MASK 0x00020000 -#define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_MASK) >> WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_LSB) -#define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_LSB) & WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_MASK) -#define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_MSB 16 -#define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_LSB 16 -#define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_MASK 0x00010000 -#define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_MASK) >> WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_LSB) -#define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_LSB) & WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_MASK) -#define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_MSB 15 -#define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_LSB 12 -#define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_MASK 0x0000f000 -#define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_MASK) >> WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_LSB) -#define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_LSB) & WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_MASK) -#define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_MSB 11 -#define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_LSB 8 -#define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_MASK 0x00000f00 -#define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_MASK) >> WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_LSB) -#define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_LSB) & WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_MASK) -#define WLAN_MBOX_INT_ENABLE_HOST_MSB 7 -#define WLAN_MBOX_INT_ENABLE_HOST_LSB 0 -#define WLAN_MBOX_INT_ENABLE_HOST_MASK 0x000000ff -#define WLAN_MBOX_INT_ENABLE_HOST_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_HOST_MASK) >> WLAN_MBOX_INT_ENABLE_HOST_LSB) -#define WLAN_MBOX_INT_ENABLE_HOST_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_HOST_LSB) & WLAN_MBOX_INT_ENABLE_HOST_MASK) - -#define WLAN_INT_HOST_ADDRESS 0x00000060 -#define WLAN_INT_HOST_OFFSET 0x00000060 -#define WLAN_INT_HOST_VECTOR_MSB 7 -#define WLAN_INT_HOST_VECTOR_LSB 0 -#define WLAN_INT_HOST_VECTOR_MASK 0x000000ff -#define WLAN_INT_HOST_VECTOR_GET(x) (((x) & WLAN_INT_HOST_VECTOR_MASK) >> WLAN_INT_HOST_VECTOR_LSB) -#define WLAN_INT_HOST_VECTOR_SET(x) (((x) << WLAN_INT_HOST_VECTOR_LSB) & WLAN_INT_HOST_VECTOR_MASK) - -#define WLAN_LOCAL_COUNT_ADDRESS 0x00000080 -#define WLAN_LOCAL_COUNT_OFFSET 0x00000080 -#define WLAN_LOCAL_COUNT_VALUE_MSB 7 -#define WLAN_LOCAL_COUNT_VALUE_LSB 0 -#define WLAN_LOCAL_COUNT_VALUE_MASK 0x000000ff -#define WLAN_LOCAL_COUNT_VALUE_GET(x) (((x) & WLAN_LOCAL_COUNT_VALUE_MASK) >> WLAN_LOCAL_COUNT_VALUE_LSB) -#define WLAN_LOCAL_COUNT_VALUE_SET(x) (((x) << WLAN_LOCAL_COUNT_VALUE_LSB) & WLAN_LOCAL_COUNT_VALUE_MASK) - -#define WLAN_COUNT_INC_ADDRESS 0x000000a0 -#define WLAN_COUNT_INC_OFFSET 0x000000a0 -#define WLAN_COUNT_INC_VALUE_MSB 7 -#define WLAN_COUNT_INC_VALUE_LSB 0 -#define WLAN_COUNT_INC_VALUE_MASK 0x000000ff -#define WLAN_COUNT_INC_VALUE_GET(x) (((x) & WLAN_COUNT_INC_VALUE_MASK) >> WLAN_COUNT_INC_VALUE_LSB) -#define WLAN_COUNT_INC_VALUE_SET(x) (((x) << WLAN_COUNT_INC_VALUE_LSB) & WLAN_COUNT_INC_VALUE_MASK) - -#define WLAN_LOCAL_SCRATCH_ADDRESS 0x000000c0 -#define WLAN_LOCAL_SCRATCH_OFFSET 0x000000c0 -#define WLAN_LOCAL_SCRATCH_VALUE_MSB 7 -#define WLAN_LOCAL_SCRATCH_VALUE_LSB 0 -#define WLAN_LOCAL_SCRATCH_VALUE_MASK 0x000000ff -#define WLAN_LOCAL_SCRATCH_VALUE_GET(x) (((x) & WLAN_LOCAL_SCRATCH_VALUE_MASK) >> WLAN_LOCAL_SCRATCH_VALUE_LSB) -#define WLAN_LOCAL_SCRATCH_VALUE_SET(x) (((x) << WLAN_LOCAL_SCRATCH_VALUE_LSB) & WLAN_LOCAL_SCRATCH_VALUE_MASK) - -#define WLAN_USE_LOCAL_BUS_ADDRESS 0x000000e0 -#define WLAN_USE_LOCAL_BUS_OFFSET 0x000000e0 -#define WLAN_USE_LOCAL_BUS_PIN_INIT_MSB 0 -#define WLAN_USE_LOCAL_BUS_PIN_INIT_LSB 0 -#define WLAN_USE_LOCAL_BUS_PIN_INIT_MASK 0x00000001 -#define WLAN_USE_LOCAL_BUS_PIN_INIT_GET(x) (((x) & WLAN_USE_LOCAL_BUS_PIN_INIT_MASK) >> WLAN_USE_LOCAL_BUS_PIN_INIT_LSB) -#define WLAN_USE_LOCAL_BUS_PIN_INIT_SET(x) (((x) << WLAN_USE_LOCAL_BUS_PIN_INIT_LSB) & WLAN_USE_LOCAL_BUS_PIN_INIT_MASK) - -#define WLAN_SDIO_CONFIG_ADDRESS 0x000000e4 -#define WLAN_SDIO_CONFIG_OFFSET 0x000000e4 -#define WLAN_SDIO_CONFIG_CCCR_IOR1_MSB 0 -#define WLAN_SDIO_CONFIG_CCCR_IOR1_LSB 0 -#define WLAN_SDIO_CONFIG_CCCR_IOR1_MASK 0x00000001 -#define WLAN_SDIO_CONFIG_CCCR_IOR1_GET(x) (((x) & WLAN_SDIO_CONFIG_CCCR_IOR1_MASK) >> WLAN_SDIO_CONFIG_CCCR_IOR1_LSB) -#define WLAN_SDIO_CONFIG_CCCR_IOR1_SET(x) (((x) << WLAN_SDIO_CONFIG_CCCR_IOR1_LSB) & WLAN_SDIO_CONFIG_CCCR_IOR1_MASK) - -#define WLAN_MBOX_DEBUG_ADDRESS 0x000000e8 -#define WLAN_MBOX_DEBUG_OFFSET 0x000000e8 -#define WLAN_MBOX_DEBUG_SEL_MSB 2 -#define WLAN_MBOX_DEBUG_SEL_LSB 0 -#define WLAN_MBOX_DEBUG_SEL_MASK 0x00000007 -#define WLAN_MBOX_DEBUG_SEL_GET(x) (((x) & WLAN_MBOX_DEBUG_SEL_MASK) >> WLAN_MBOX_DEBUG_SEL_LSB) -#define WLAN_MBOX_DEBUG_SEL_SET(x) (((x) << WLAN_MBOX_DEBUG_SEL_LSB) & WLAN_MBOX_DEBUG_SEL_MASK) - -#define WLAN_MBOX_FIFO_RESET_ADDRESS 0x000000ec -#define WLAN_MBOX_FIFO_RESET_OFFSET 0x000000ec -#define WLAN_MBOX_FIFO_RESET_INIT_MSB 0 -#define WLAN_MBOX_FIFO_RESET_INIT_LSB 0 -#define WLAN_MBOX_FIFO_RESET_INIT_MASK 0x00000001 -#define WLAN_MBOX_FIFO_RESET_INIT_GET(x) (((x) & WLAN_MBOX_FIFO_RESET_INIT_MASK) >> WLAN_MBOX_FIFO_RESET_INIT_LSB) -#define WLAN_MBOX_FIFO_RESET_INIT_SET(x) (((x) << WLAN_MBOX_FIFO_RESET_INIT_LSB) & WLAN_MBOX_FIFO_RESET_INIT_MASK) - -#define WLAN_MBOX_TXFIFO_POP_ADDRESS 0x000000f0 -#define WLAN_MBOX_TXFIFO_POP_OFFSET 0x000000f0 -#define WLAN_MBOX_TXFIFO_POP_DATA_MSB 0 -#define WLAN_MBOX_TXFIFO_POP_DATA_LSB 0 -#define WLAN_MBOX_TXFIFO_POP_DATA_MASK 0x00000001 -#define WLAN_MBOX_TXFIFO_POP_DATA_GET(x) (((x) & WLAN_MBOX_TXFIFO_POP_DATA_MASK) >> WLAN_MBOX_TXFIFO_POP_DATA_LSB) -#define WLAN_MBOX_TXFIFO_POP_DATA_SET(x) (((x) << WLAN_MBOX_TXFIFO_POP_DATA_LSB) & WLAN_MBOX_TXFIFO_POP_DATA_MASK) - -#define WLAN_MBOX_RXFIFO_POP_ADDRESS 0x00000100 -#define WLAN_MBOX_RXFIFO_POP_OFFSET 0x00000100 -#define WLAN_MBOX_RXFIFO_POP_DATA_MSB 0 -#define WLAN_MBOX_RXFIFO_POP_DATA_LSB 0 -#define WLAN_MBOX_RXFIFO_POP_DATA_MASK 0x00000001 -#define WLAN_MBOX_RXFIFO_POP_DATA_GET(x) (((x) & WLAN_MBOX_RXFIFO_POP_DATA_MASK) >> WLAN_MBOX_RXFIFO_POP_DATA_LSB) -#define WLAN_MBOX_RXFIFO_POP_DATA_SET(x) (((x) << WLAN_MBOX_RXFIFO_POP_DATA_LSB) & WLAN_MBOX_RXFIFO_POP_DATA_MASK) - -#define WLAN_SDIO_DEBUG_ADDRESS 0x00000110 -#define WLAN_SDIO_DEBUG_OFFSET 0x00000110 -#define WLAN_SDIO_DEBUG_SEL_MSB 3 -#define WLAN_SDIO_DEBUG_SEL_LSB 0 -#define WLAN_SDIO_DEBUG_SEL_MASK 0x0000000f -#define WLAN_SDIO_DEBUG_SEL_GET(x) (((x) & WLAN_SDIO_DEBUG_SEL_MASK) >> WLAN_SDIO_DEBUG_SEL_LSB) -#define WLAN_SDIO_DEBUG_SEL_SET(x) (((x) << WLAN_SDIO_DEBUG_SEL_LSB) & WLAN_SDIO_DEBUG_SEL_MASK) - -#define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000114 -#define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000114 -#define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_GMBOX0_DMA_RX_CONTROL_ADDRESS 0x00000118 -#define WLAN_GMBOX0_DMA_RX_CONTROL_OFFSET 0x00000118 -#define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_MSB 2 -#define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_LSB 2 -#define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_MASK) >> WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_LSB) -#define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_LSB) & WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_MASK) -#define WLAN_GMBOX0_DMA_RX_CONTROL_START_MSB 1 -#define WLAN_GMBOX0_DMA_RX_CONTROL_START_LSB 1 -#define WLAN_GMBOX0_DMA_RX_CONTROL_START_MASK 0x00000002 -#define WLAN_GMBOX0_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_GMBOX0_DMA_RX_CONTROL_START_MASK) >> WLAN_GMBOX0_DMA_RX_CONTROL_START_LSB) -#define WLAN_GMBOX0_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_GMBOX0_DMA_RX_CONTROL_START_LSB) & WLAN_GMBOX0_DMA_RX_CONTROL_START_MASK) -#define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_MSB 0 -#define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_LSB 0 -#define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_GMBOX0_DMA_RX_CONTROL_STOP_MASK) >> WLAN_GMBOX0_DMA_RX_CONTROL_STOP_LSB) -#define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_GMBOX0_DMA_RX_CONTROL_STOP_LSB) & WLAN_GMBOX0_DMA_RX_CONTROL_STOP_MASK) - -#define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x0000011c -#define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x0000011c -#define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 -#define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 -#define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc -#define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) -#define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK) - -#define WLAN_GMBOX0_DMA_TX_CONTROL_ADDRESS 0x00000120 -#define WLAN_GMBOX0_DMA_TX_CONTROL_OFFSET 0x00000120 -#define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_MSB 2 -#define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_LSB 2 -#define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_MASK 0x00000004 -#define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_MASK) >> WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_LSB) -#define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_LSB) & WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_MASK) -#define WLAN_GMBOX0_DMA_TX_CONTROL_START_MSB 1 -#define WLAN_GMBOX0_DMA_TX_CONTROL_START_LSB 1 -#define WLAN_GMBOX0_DMA_TX_CONTROL_START_MASK 0x00000002 -#define WLAN_GMBOX0_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_GMBOX0_DMA_TX_CONTROL_START_MASK) >> WLAN_GMBOX0_DMA_TX_CONTROL_START_LSB) -#define WLAN_GMBOX0_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_GMBOX0_DMA_TX_CONTROL_START_LSB) & WLAN_GMBOX0_DMA_TX_CONTROL_START_MASK) -#define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_MSB 0 -#define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_LSB 0 -#define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_MASK 0x00000001 -#define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_GMBOX0_DMA_TX_CONTROL_STOP_MASK) >> WLAN_GMBOX0_DMA_TX_CONTROL_STOP_LSB) -#define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_GMBOX0_DMA_TX_CONTROL_STOP_LSB) & WLAN_GMBOX0_DMA_TX_CONTROL_STOP_MASK) - -#define WLAN_GMBOX_INT_STATUS_ADDRESS 0x00000124 -#define WLAN_GMBOX_INT_STATUS_OFFSET 0x00000124 -#define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_MSB 6 -#define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_LSB 6 -#define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_MASK 0x00000040 -#define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_MASK) >> WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_LSB) -#define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_SET(x) (((x) << WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_LSB) & WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_MASK) -#define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_MSB 5 -#define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_LSB 5 -#define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_MASK 0x00000020 -#define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_MASK) >> WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_LSB) -#define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_SET(x) (((x) << WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_LSB) & WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_MASK) -#define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_MSB 4 -#define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_LSB 4 -#define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_MASK 0x00000010 -#define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_MASK) >> WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_LSB) -#define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_LSB) & WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_MASK) -#define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MSB 3 -#define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB 3 -#define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK 0x00000008 -#define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK) >> WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB) -#define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB) & WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK) -#define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_MSB 2 -#define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_LSB 2 -#define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_MASK 0x00000004 -#define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_MASK) >> WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_LSB) -#define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_LSB) & WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_MASK) -#define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_MSB 1 -#define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_LSB 1 -#define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_MASK 0x00000002 -#define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_MASK) >> WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_LSB) -#define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_SET(x) (((x) << WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_LSB) & WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_MASK) -#define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_MSB 0 -#define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_LSB 0 -#define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_MASK 0x00000001 -#define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_MASK) >> WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_LSB) -#define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_SET(x) (((x) << WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_LSB) & WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_MASK) - -#define WLAN_GMBOX_INT_ENABLE_ADDRESS 0x00000128 -#define WLAN_GMBOX_INT_ENABLE_OFFSET 0x00000128 -#define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_MSB 6 -#define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_LSB 6 -#define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_MASK 0x00000040 -#define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_MASK) >> WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_LSB) -#define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_LSB) & WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_MASK) -#define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_MSB 5 -#define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_LSB 5 -#define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_MASK 0x00000020 -#define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_MASK) >> WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_LSB) -#define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_LSB) & WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_MASK) -#define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MSB 4 -#define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB 4 -#define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK 0x00000010 -#define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK) >> WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB) -#define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB) & WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK) -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MSB 3 -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB 3 -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK 0x00000008 -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK) >> WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB) -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB) & WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK) -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MSB 2 -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB 2 -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK 0x00000004 -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK) >> WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB) -#define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB) & WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK) -#define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_MSB 1 -#define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_LSB 1 -#define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_MASK 0x00000002 -#define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_MASK) >> WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_LSB) -#define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_LSB) & WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_MASK) -#define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_MSB 0 -#define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_LSB 0 -#define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_MASK 0x00000001 -#define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_MASK) >> WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_LSB) -#define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_LSB) & WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_MASK) - -#define WLAN_HOST_IF_WINDOW_ADDRESS 0x00002000 -#define WLAN_HOST_IF_WINDOW_OFFSET 0x00002000 -#define WLAN_HOST_IF_WINDOW_DATA_MSB 7 -#define WLAN_HOST_IF_WINDOW_DATA_LSB 0 -#define WLAN_HOST_IF_WINDOW_DATA_MASK 0x000000ff -#define WLAN_HOST_IF_WINDOW_DATA_GET(x) (((x) & WLAN_HOST_IF_WINDOW_DATA_MASK) >> WLAN_HOST_IF_WINDOW_DATA_LSB) -#define WLAN_HOST_IF_WINDOW_DATA_SET(x) (((x) << WLAN_HOST_IF_WINDOW_DATA_LSB) & WLAN_HOST_IF_WINDOW_DATA_MASK) - -#endif /* _MBOX_WLAN_REG_H_ */ diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/rtc_reg.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/rtc_reg.h deleted file mode 100644 index fcafec88a6b9..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/rtc_reg.h +++ /dev/null @@ -1,187 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#include "rtc_wlan_reg.h" - -#ifndef BT_HEADERS - -#define RESET_CONTROL_ADDRESS WLAN_RESET_CONTROL_ADDRESS -#define RESET_CONTROL_OFFSET WLAN_RESET_CONTROL_OFFSET -#define RESET_CONTROL_DEBUG_UART_RST_MSB WLAN_RESET_CONTROL_DEBUG_UART_RST_MSB -#define RESET_CONTROL_DEBUG_UART_RST_LSB WLAN_RESET_CONTROL_DEBUG_UART_RST_LSB -#define RESET_CONTROL_DEBUG_UART_RST_MASK WLAN_RESET_CONTROL_DEBUG_UART_RST_MASK -#define RESET_CONTROL_DEBUG_UART_RST_GET(x) WLAN_RESET_CONTROL_DEBUG_UART_RST_GET(x) -#define RESET_CONTROL_DEBUG_UART_RST_SET(x) WLAN_RESET_CONTROL_DEBUG_UART_RST_SET(x) -#define RESET_CONTROL_BB_COLD_RST_MSB WLAN_RESET_CONTROL_BB_COLD_RST_MSB -#define RESET_CONTROL_BB_COLD_RST_LSB WLAN_RESET_CONTROL_BB_COLD_RST_LSB -#define RESET_CONTROL_BB_COLD_RST_MASK WLAN_RESET_CONTROL_BB_COLD_RST_MASK -#define RESET_CONTROL_BB_COLD_RST_GET(x) WLAN_RESET_CONTROL_BB_COLD_RST_GET(x) -#define RESET_CONTROL_BB_COLD_RST_SET(x) WLAN_RESET_CONTROL_BB_COLD_RST_SET(x) -#define RESET_CONTROL_BB_WARM_RST_MSB WLAN_RESET_CONTROL_BB_WARM_RST_MSB -#define RESET_CONTROL_BB_WARM_RST_LSB WLAN_RESET_CONTROL_BB_WARM_RST_LSB -#define RESET_CONTROL_BB_WARM_RST_MASK WLAN_RESET_CONTROL_BB_WARM_RST_MASK -#define RESET_CONTROL_BB_WARM_RST_GET(x) WLAN_RESET_CONTROL_BB_WARM_RST_GET(x) -#define RESET_CONTROL_BB_WARM_RST_SET(x) WLAN_RESET_CONTROL_BB_WARM_RST_SET(x) -#define RESET_CONTROL_CPU_INIT_RESET_MSB WLAN_RESET_CONTROL_CPU_INIT_RESET_MSB -#define RESET_CONTROL_CPU_INIT_RESET_LSB WLAN_RESET_CONTROL_CPU_INIT_RESET_LSB -#define RESET_CONTROL_CPU_INIT_RESET_MASK WLAN_RESET_CONTROL_CPU_INIT_RESET_MASK -#define RESET_CONTROL_CPU_INIT_RESET_GET(x) WLAN_RESET_CONTROL_CPU_INIT_RESET_GET(x) -#define RESET_CONTROL_CPU_INIT_RESET_SET(x) WLAN_RESET_CONTROL_CPU_INIT_RESET_SET(x) -#define RESET_CONTROL_VMC_REMAP_RESET_MSB WLAN_RESET_CONTROL_VMC_REMAP_RESET_MSB -#define RESET_CONTROL_VMC_REMAP_RESET_LSB WLAN_RESET_CONTROL_VMC_REMAP_RESET_LSB -#define RESET_CONTROL_VMC_REMAP_RESET_MASK WLAN_RESET_CONTROL_VMC_REMAP_RESET_MASK -#define RESET_CONTROL_VMC_REMAP_RESET_GET(x) WLAN_RESET_CONTROL_VMC_REMAP_RESET_GET(x) -#define RESET_CONTROL_VMC_REMAP_RESET_SET(x) WLAN_RESET_CONTROL_VMC_REMAP_RESET_SET(x) -#define RESET_CONTROL_RST_OUT_MSB WLAN_RESET_CONTROL_RST_OUT_MSB -#define RESET_CONTROL_RST_OUT_LSB WLAN_RESET_CONTROL_RST_OUT_LSB -#define RESET_CONTROL_RST_OUT_MASK WLAN_RESET_CONTROL_RST_OUT_MASK -#define RESET_CONTROL_RST_OUT_GET(x) WLAN_RESET_CONTROL_RST_OUT_GET(x) -#define RESET_CONTROL_RST_OUT_SET(x) WLAN_RESET_CONTROL_RST_OUT_SET(x) -#define RESET_CONTROL_COLD_RST_MSB WLAN_RESET_CONTROL_COLD_RST_MSB -#define RESET_CONTROL_COLD_RST_LSB WLAN_RESET_CONTROL_COLD_RST_LSB -#define RESET_CONTROL_COLD_RST_MASK WLAN_RESET_CONTROL_COLD_RST_MASK -#define RESET_CONTROL_COLD_RST_GET(x) WLAN_RESET_CONTROL_COLD_RST_GET(x) -#define RESET_CONTROL_COLD_RST_SET(x) WLAN_RESET_CONTROL_COLD_RST_SET(x) -#define RESET_CONTROL_WARM_RST_MSB WLAN_RESET_CONTROL_WARM_RST_MSB -#define RESET_CONTROL_WARM_RST_LSB WLAN_RESET_CONTROL_WARM_RST_LSB -#define RESET_CONTROL_WARM_RST_MASK WLAN_RESET_CONTROL_WARM_RST_MASK -#define RESET_CONTROL_WARM_RST_GET(x) WLAN_RESET_CONTROL_WARM_RST_GET(x) -#define RESET_CONTROL_WARM_RST_SET(x) WLAN_RESET_CONTROL_WARM_RST_SET(x) -#define RESET_CONTROL_CPU_WARM_RST_MSB WLAN_RESET_CONTROL_CPU_WARM_RST_MSB -#define RESET_CONTROL_CPU_WARM_RST_LSB WLAN_RESET_CONTROL_CPU_WARM_RST_LSB -#define RESET_CONTROL_CPU_WARM_RST_MASK WLAN_RESET_CONTROL_CPU_WARM_RST_MASK -#define RESET_CONTROL_CPU_WARM_RST_GET(x) WLAN_RESET_CONTROL_CPU_WARM_RST_GET(x) -#define RESET_CONTROL_CPU_WARM_RST_SET(x) WLAN_RESET_CONTROL_CPU_WARM_RST_SET(x) -#define RESET_CONTROL_MAC_COLD_RST_MSB WLAN_RESET_CONTROL_MAC_COLD_RST_MSB -#define RESET_CONTROL_MAC_COLD_RST_LSB WLAN_RESET_CONTROL_MAC_COLD_RST_LSB -#define RESET_CONTROL_MAC_COLD_RST_MASK WLAN_RESET_CONTROL_MAC_COLD_RST_MASK -#define RESET_CONTROL_MAC_COLD_RST_GET(x) WLAN_RESET_CONTROL_MAC_COLD_RST_GET(x) -#define RESET_CONTROL_MAC_COLD_RST_SET(x) WLAN_RESET_CONTROL_MAC_COLD_RST_SET(x) -#define RESET_CONTROL_MAC_WARM_RST_MSB WLAN_RESET_CONTROL_MAC_WARM_RST_MSB -#define RESET_CONTROL_MAC_WARM_RST_LSB WLAN_RESET_CONTROL_MAC_WARM_RST_LSB -#define RESET_CONTROL_MAC_WARM_RST_MASK WLAN_RESET_CONTROL_MAC_WARM_RST_MASK -#define RESET_CONTROL_MAC_WARM_RST_GET(x) WLAN_RESET_CONTROL_MAC_WARM_RST_GET(x) -#define RESET_CONTROL_MAC_WARM_RST_SET(x) WLAN_RESET_CONTROL_MAC_WARM_RST_SET(x) -#define RESET_CONTROL_MBOX_RST_MSB WLAN_RESET_CONTROL_MBOX_RST_MSB -#define RESET_CONTROL_MBOX_RST_LSB WLAN_RESET_CONTROL_MBOX_RST_LSB -#define RESET_CONTROL_MBOX_RST_MASK WLAN_RESET_CONTROL_MBOX_RST_MASK -#define RESET_CONTROL_MBOX_RST_GET(x) WLAN_RESET_CONTROL_MBOX_RST_GET(x) -#define RESET_CONTROL_MBOX_RST_SET(x) WLAN_RESET_CONTROL_MBOX_RST_SET(x) -#define RESET_CONTROL_UART_RST_MSB WLAN_RESET_CONTROL_UART_RST_MSB -#define RESET_CONTROL_UART_RST_LSB WLAN_RESET_CONTROL_UART_RST_LSB -#define RESET_CONTROL_UART_RST_MASK WLAN_RESET_CONTROL_UART_RST_MASK -#define RESET_CONTROL_UART_RST_GET(x) WLAN_RESET_CONTROL_UART_RST_GET(x) -#define RESET_CONTROL_UART_RST_SET(x) WLAN_RESET_CONTROL_UART_RST_SET(x) -#define RESET_CONTROL_SI0_RST_MSB WLAN_RESET_CONTROL_SI0_RST_MSB -#define RESET_CONTROL_SI0_RST_LSB WLAN_RESET_CONTROL_SI0_RST_LSB -#define RESET_CONTROL_SI0_RST_MASK WLAN_RESET_CONTROL_SI0_RST_MASK -#define RESET_CONTROL_SI0_RST_GET(x) WLAN_RESET_CONTROL_SI0_RST_GET(x) -#define RESET_CONTROL_SI0_RST_SET(x) WLAN_RESET_CONTROL_SI0_RST_SET(x) -#define CPU_CLOCK_ADDRESS WLAN_CPU_CLOCK_ADDRESS -#define CPU_CLOCK_OFFSET WLAN_CPU_CLOCK_OFFSET -#define CPU_CLOCK_STANDARD_MSB WLAN_CPU_CLOCK_STANDARD_MSB -#define CPU_CLOCK_STANDARD_LSB WLAN_CPU_CLOCK_STANDARD_LSB -#define CPU_CLOCK_STANDARD_MASK WLAN_CPU_CLOCK_STANDARD_MASK -#define CPU_CLOCK_STANDARD_GET(x) WLAN_CPU_CLOCK_STANDARD_GET(x) -#define CPU_CLOCK_STANDARD_SET(x) WLAN_CPU_CLOCK_STANDARD_SET(x) -#define CLOCK_OUT_ADDRESS WLAN_CLOCK_OUT_ADDRESS -#define CLOCK_OUT_OFFSET WLAN_CLOCK_OUT_OFFSET -#define CLOCK_OUT_SELECT_MSB WLAN_CLOCK_OUT_SELECT_MSB -#define CLOCK_OUT_SELECT_LSB WLAN_CLOCK_OUT_SELECT_LSB -#define CLOCK_OUT_SELECT_MASK WLAN_CLOCK_OUT_SELECT_MASK -#define CLOCK_OUT_SELECT_GET(x) WLAN_CLOCK_OUT_SELECT_GET(x) -#define CLOCK_OUT_SELECT_SET(x) WLAN_CLOCK_OUT_SELECT_SET(x) -#define CLOCK_CONTROL_ADDRESS WLAN_CLOCK_CONTROL_ADDRESS -#define CLOCK_CONTROL_OFFSET WLAN_CLOCK_CONTROL_OFFSET -#define CLOCK_CONTROL_LF_CLK32_MSB WLAN_CLOCK_CONTROL_LF_CLK32_MSB -#define CLOCK_CONTROL_LF_CLK32_LSB WLAN_CLOCK_CONTROL_LF_CLK32_LSB -#define CLOCK_CONTROL_LF_CLK32_MASK WLAN_CLOCK_CONTROL_LF_CLK32_MASK -#define CLOCK_CONTROL_LF_CLK32_GET(x) WLAN_CLOCK_CONTROL_LF_CLK32_GET(x) -#define CLOCK_CONTROL_LF_CLK32_SET(x) WLAN_CLOCK_CONTROL_LF_CLK32_SET(x) -#define CLOCK_CONTROL_SI0_CLK_MSB WLAN_CLOCK_CONTROL_SI0_CLK_MSB -#define CLOCK_CONTROL_SI0_CLK_LSB WLAN_CLOCK_CONTROL_SI0_CLK_LSB -#define CLOCK_CONTROL_SI0_CLK_MASK WLAN_CLOCK_CONTROL_SI0_CLK_MASK -#define CLOCK_CONTROL_SI0_CLK_GET(x) WLAN_CLOCK_CONTROL_SI0_CLK_GET(x) -#define CLOCK_CONTROL_SI0_CLK_SET(x) WLAN_CLOCK_CONTROL_SI0_CLK_SET(x) -#define RESET_CAUSE_ADDRESS WLAN_RESET_CAUSE_ADDRESS -#define RESET_CAUSE_OFFSET WLAN_RESET_CAUSE_OFFSET -#define RESET_CAUSE_LAST_MSB WLAN_RESET_CAUSE_LAST_MSB -#define RESET_CAUSE_LAST_LSB WLAN_RESET_CAUSE_LAST_LSB -#define RESET_CAUSE_LAST_MASK WLAN_RESET_CAUSE_LAST_MASK -#define RESET_CAUSE_LAST_GET(x) WLAN_RESET_CAUSE_LAST_GET(x) -#define RESET_CAUSE_LAST_SET(x) WLAN_RESET_CAUSE_LAST_SET(x) -#define SYSTEM_SLEEP_ADDRESS WLAN_SYSTEM_SLEEP_ADDRESS -#define SYSTEM_SLEEP_OFFSET WLAN_SYSTEM_SLEEP_OFFSET -#define SYSTEM_SLEEP_HOST_IF_MSB WLAN_SYSTEM_SLEEP_HOST_IF_MSB -#define SYSTEM_SLEEP_HOST_IF_LSB WLAN_SYSTEM_SLEEP_HOST_IF_LSB -#define SYSTEM_SLEEP_HOST_IF_MASK WLAN_SYSTEM_SLEEP_HOST_IF_MASK -#define SYSTEM_SLEEP_HOST_IF_GET(x) WLAN_SYSTEM_SLEEP_HOST_IF_GET(x) -#define SYSTEM_SLEEP_HOST_IF_SET(x) WLAN_SYSTEM_SLEEP_HOST_IF_SET(x) -#define SYSTEM_SLEEP_MBOX_MSB WLAN_SYSTEM_SLEEP_MBOX_MSB -#define SYSTEM_SLEEP_MBOX_LSB WLAN_SYSTEM_SLEEP_MBOX_LSB -#define SYSTEM_SLEEP_MBOX_MASK WLAN_SYSTEM_SLEEP_MBOX_MASK -#define SYSTEM_SLEEP_MBOX_GET(x) WLAN_SYSTEM_SLEEP_MBOX_GET(x) -#define SYSTEM_SLEEP_MBOX_SET(x) WLAN_SYSTEM_SLEEP_MBOX_SET(x) -#define SYSTEM_SLEEP_MAC_IF_MSB WLAN_SYSTEM_SLEEP_MAC_IF_MSB -#define SYSTEM_SLEEP_MAC_IF_LSB WLAN_SYSTEM_SLEEP_MAC_IF_LSB -#define SYSTEM_SLEEP_MAC_IF_MASK WLAN_SYSTEM_SLEEP_MAC_IF_MASK -#define SYSTEM_SLEEP_MAC_IF_GET(x) WLAN_SYSTEM_SLEEP_MAC_IF_GET(x) -#define SYSTEM_SLEEP_MAC_IF_SET(x) WLAN_SYSTEM_SLEEP_MAC_IF_SET(x) -#define SYSTEM_SLEEP_LIGHT_MSB WLAN_SYSTEM_SLEEP_LIGHT_MSB -#define SYSTEM_SLEEP_LIGHT_LSB WLAN_SYSTEM_SLEEP_LIGHT_LSB -#define SYSTEM_SLEEP_LIGHT_MASK WLAN_SYSTEM_SLEEP_LIGHT_MASK -#define SYSTEM_SLEEP_LIGHT_GET(x) WLAN_SYSTEM_SLEEP_LIGHT_GET(x) -#define SYSTEM_SLEEP_LIGHT_SET(x) WLAN_SYSTEM_SLEEP_LIGHT_SET(x) -#define SYSTEM_SLEEP_DISABLE_MSB WLAN_SYSTEM_SLEEP_DISABLE_MSB -#define SYSTEM_SLEEP_DISABLE_LSB WLAN_SYSTEM_SLEEP_DISABLE_LSB -#define SYSTEM_SLEEP_DISABLE_MASK WLAN_SYSTEM_SLEEP_DISABLE_MASK -#define SYSTEM_SLEEP_DISABLE_GET(x) WLAN_SYSTEM_SLEEP_DISABLE_GET(x) -#define SYSTEM_SLEEP_DISABLE_SET(x) WLAN_SYSTEM_SLEEP_DISABLE_SET(x) -#define LPO_INIT_DIVIDEND_INT_ADDRESS WLAN_LPO_INIT_DIVIDEND_INT_ADDRESS -#define LPO_INIT_DIVIDEND_INT_OFFSET WLAN_LPO_INIT_DIVIDEND_INT_OFFSET -#define LPO_INIT_DIVIDEND_INT_VALUE_MSB WLAN_LPO_INIT_DIVIDEND_INT_VALUE_MSB -#define LPO_INIT_DIVIDEND_INT_VALUE_LSB WLAN_LPO_INIT_DIVIDEND_INT_VALUE_LSB -#define LPO_INIT_DIVIDEND_INT_VALUE_MASK WLAN_LPO_INIT_DIVIDEND_INT_VALUE_MASK -#define LPO_INIT_DIVIDEND_INT_VALUE_GET(x) WLAN_LPO_INIT_DIVIDEND_INT_VALUE_GET(x) -#define LPO_INIT_DIVIDEND_INT_VALUE_SET(x) WLAN_LPO_INIT_DIVIDEND_INT_VALUE_SET(x) -#define LPO_INIT_DIVIDEND_FRACTION_ADDRESS WLAN_LPO_INIT_DIVIDEND_FRACTION_ADDRESS -#define LPO_INIT_DIVIDEND_FRACTION_OFFSET WLAN_LPO_INIT_DIVIDEND_FRACTION_OFFSET -#define LPO_INIT_DIVIDEND_FRACTION_VALUE_MSB WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_MSB -#define LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB -#define LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK -#define LPO_INIT_DIVIDEND_FRACTION_VALUE_GET(x) WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_GET(x) -#define LPO_INIT_DIVIDEND_FRACTION_VALUE_SET(x) WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_SET(x) -#define LPO_CAL_ADDRESS WLAN_LPO_CAL_ADDRESS -#define LPO_CAL_OFFSET WLAN_LPO_CAL_OFFSET -#define LPO_CAL_ENABLE_MSB WLAN_LPO_CAL_ENABLE_MSB -#define LPO_CAL_ENABLE_LSB WLAN_LPO_CAL_ENABLE_LSB -#define LPO_CAL_ENABLE_MASK WLAN_LPO_CAL_ENABLE_MASK -#define LPO_CAL_ENABLE_GET(x) WLAN_LPO_CAL_ENABLE_GET(x) -#define LPO_CAL_ENABLE_SET(x) WLAN_LPO_CAL_ENABLE_SET(x) -#define LPO_CAL_COUNT_MSB WLAN_LPO_CAL_COUNT_MSB -#define LPO_CAL_COUNT_LSB WLAN_LPO_CAL_COUNT_LSB -#define LPO_CAL_COUNT_MASK WLAN_LPO_CAL_COUNT_MASK -#define LPO_CAL_COUNT_GET(x) WLAN_LPO_CAL_COUNT_GET(x) -#define LPO_CAL_COUNT_SET(x) WLAN_LPO_CAL_COUNT_SET(x) - -#endif diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/rtc_wlan_reg.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/rtc_wlan_reg.h deleted file mode 100644 index 5c048ff51b07..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/rtc_wlan_reg.h +++ /dev/null @@ -1,162 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#ifndef _RTC_WLAN_REG_REG_H_ -#define _RTC_WLAN_REG_REG_H_ - -#define WLAN_RESET_CONTROL_ADDRESS 0x00000000 -#define WLAN_RESET_CONTROL_OFFSET 0x00000000 -#define WLAN_RESET_CONTROL_DEBUG_UART_RST_MSB 14 -#define WLAN_RESET_CONTROL_DEBUG_UART_RST_LSB 14 -#define WLAN_RESET_CONTROL_DEBUG_UART_RST_MASK 0x00004000 -#define WLAN_RESET_CONTROL_DEBUG_UART_RST_GET(x) (((x) & WLAN_RESET_CONTROL_DEBUG_UART_RST_MASK) >> WLAN_RESET_CONTROL_DEBUG_UART_RST_LSB) -#define WLAN_RESET_CONTROL_DEBUG_UART_RST_SET(x) (((x) << WLAN_RESET_CONTROL_DEBUG_UART_RST_LSB) & WLAN_RESET_CONTROL_DEBUG_UART_RST_MASK) -#define WLAN_RESET_CONTROL_BB_COLD_RST_MSB 13 -#define WLAN_RESET_CONTROL_BB_COLD_RST_LSB 13 -#define WLAN_RESET_CONTROL_BB_COLD_RST_MASK 0x00002000 -#define WLAN_RESET_CONTROL_BB_COLD_RST_GET(x) (((x) & WLAN_RESET_CONTROL_BB_COLD_RST_MASK) >> WLAN_RESET_CONTROL_BB_COLD_RST_LSB) -#define WLAN_RESET_CONTROL_BB_COLD_RST_SET(x) (((x) << WLAN_RESET_CONTROL_BB_COLD_RST_LSB) & WLAN_RESET_CONTROL_BB_COLD_RST_MASK) -#define WLAN_RESET_CONTROL_BB_WARM_RST_MSB 12 -#define WLAN_RESET_CONTROL_BB_WARM_RST_LSB 12 -#define WLAN_RESET_CONTROL_BB_WARM_RST_MASK 0x00001000 -#define WLAN_RESET_CONTROL_BB_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_BB_WARM_RST_MASK) >> WLAN_RESET_CONTROL_BB_WARM_RST_LSB) -#define WLAN_RESET_CONTROL_BB_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_BB_WARM_RST_LSB) & WLAN_RESET_CONTROL_BB_WARM_RST_MASK) -#define WLAN_RESET_CONTROL_CPU_INIT_RESET_MSB 11 -#define WLAN_RESET_CONTROL_CPU_INIT_RESET_LSB 11 -#define WLAN_RESET_CONTROL_CPU_INIT_RESET_MASK 0x00000800 -#define WLAN_RESET_CONTROL_CPU_INIT_RESET_GET(x) (((x) & WLAN_RESET_CONTROL_CPU_INIT_RESET_MASK) >> WLAN_RESET_CONTROL_CPU_INIT_RESET_LSB) -#define WLAN_RESET_CONTROL_CPU_INIT_RESET_SET(x) (((x) << WLAN_RESET_CONTROL_CPU_INIT_RESET_LSB) & WLAN_RESET_CONTROL_CPU_INIT_RESET_MASK) -#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_MSB 10 -#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_LSB 10 -#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_MASK 0x00000400 -#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_GET(x) (((x) & WLAN_RESET_CONTROL_VMC_REMAP_RESET_MASK) >> WLAN_RESET_CONTROL_VMC_REMAP_RESET_LSB) -#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_SET(x) (((x) << WLAN_RESET_CONTROL_VMC_REMAP_RESET_LSB) & WLAN_RESET_CONTROL_VMC_REMAP_RESET_MASK) -#define WLAN_RESET_CONTROL_RST_OUT_MSB 9 -#define WLAN_RESET_CONTROL_RST_OUT_LSB 9 -#define WLAN_RESET_CONTROL_RST_OUT_MASK 0x00000200 -#define WLAN_RESET_CONTROL_RST_OUT_GET(x) (((x) & WLAN_RESET_CONTROL_RST_OUT_MASK) >> WLAN_RESET_CONTROL_RST_OUT_LSB) -#define WLAN_RESET_CONTROL_RST_OUT_SET(x) (((x) << WLAN_RESET_CONTROL_RST_OUT_LSB) & WLAN_RESET_CONTROL_RST_OUT_MASK) -#define WLAN_RESET_CONTROL_COLD_RST_MSB 8 -#define WLAN_RESET_CONTROL_COLD_RST_LSB 8 -#define WLAN_RESET_CONTROL_COLD_RST_MASK 0x00000100 -#define WLAN_RESET_CONTROL_COLD_RST_GET(x) (((x) & WLAN_RESET_CONTROL_COLD_RST_MASK) >> WLAN_RESET_CONTROL_COLD_RST_LSB) -#define WLAN_RESET_CONTROL_COLD_RST_SET(x) (((x) << WLAN_RESET_CONTROL_COLD_RST_LSB) & WLAN_RESET_CONTROL_COLD_RST_MASK) -#define WLAN_RESET_CONTROL_WARM_RST_MSB 7 -#define WLAN_RESET_CONTROL_WARM_RST_LSB 7 -#define WLAN_RESET_CONTROL_WARM_RST_MASK 0x00000080 -#define WLAN_RESET_CONTROL_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_WARM_RST_MASK) >> WLAN_RESET_CONTROL_WARM_RST_LSB) -#define WLAN_RESET_CONTROL_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_WARM_RST_LSB) & WLAN_RESET_CONTROL_WARM_RST_MASK) -#define WLAN_RESET_CONTROL_CPU_WARM_RST_MSB 6 -#define WLAN_RESET_CONTROL_CPU_WARM_RST_LSB 6 -#define WLAN_RESET_CONTROL_CPU_WARM_RST_MASK 0x00000040 -#define WLAN_RESET_CONTROL_CPU_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_CPU_WARM_RST_MASK) >> WLAN_RESET_CONTROL_CPU_WARM_RST_LSB) -#define WLAN_RESET_CONTROL_CPU_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_CPU_WARM_RST_LSB) & WLAN_RESET_CONTROL_CPU_WARM_RST_MASK) -#define WLAN_RESET_CONTROL_MAC_COLD_RST_MSB 5 -#define WLAN_RESET_CONTROL_MAC_COLD_RST_LSB 5 -#define WLAN_RESET_CONTROL_MAC_COLD_RST_MASK 0x00000020 -#define WLAN_RESET_CONTROL_MAC_COLD_RST_GET(x) (((x) & WLAN_RESET_CONTROL_MAC_COLD_RST_MASK) >> WLAN_RESET_CONTROL_MAC_COLD_RST_LSB) -#define WLAN_RESET_CONTROL_MAC_COLD_RST_SET(x) (((x) << WLAN_RESET_CONTROL_MAC_COLD_RST_LSB) & WLAN_RESET_CONTROL_MAC_COLD_RST_MASK) -#define WLAN_RESET_CONTROL_MAC_WARM_RST_MSB 4 -#define WLAN_RESET_CONTROL_MAC_WARM_RST_LSB 4 -#define WLAN_RESET_CONTROL_MAC_WARM_RST_MASK 0x00000010 -#define WLAN_RESET_CONTROL_MAC_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_MAC_WARM_RST_MASK) >> WLAN_RESET_CONTROL_MAC_WARM_RST_LSB) -#define WLAN_RESET_CONTROL_MAC_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_MAC_WARM_RST_LSB) & WLAN_RESET_CONTROL_MAC_WARM_RST_MASK) -#define WLAN_RESET_CONTROL_MBOX_RST_MSB 2 -#define WLAN_RESET_CONTROL_MBOX_RST_LSB 2 -#define WLAN_RESET_CONTROL_MBOX_RST_MASK 0x00000004 -#define WLAN_RESET_CONTROL_MBOX_RST_GET(x) (((x) & WLAN_RESET_CONTROL_MBOX_RST_MASK) >> WLAN_RESET_CONTROL_MBOX_RST_LSB) -#define WLAN_RESET_CONTROL_MBOX_RST_SET(x) (((x) << WLAN_RESET_CONTROL_MBOX_RST_LSB) & WLAN_RESET_CONTROL_MBOX_RST_MASK) -#define WLAN_RESET_CONTROL_UART_RST_MSB 1 -#define WLAN_RESET_CONTROL_UART_RST_LSB 1 -#define WLAN_RESET_CONTROL_UART_RST_MASK 0x00000002 -#define WLAN_RESET_CONTROL_UART_RST_GET(x) (((x) & WLAN_RESET_CONTROL_UART_RST_MASK) >> WLAN_RESET_CONTROL_UART_RST_LSB) -#define WLAN_RESET_CONTROL_UART_RST_SET(x) (((x) << WLAN_RESET_CONTROL_UART_RST_LSB) & WLAN_RESET_CONTROL_UART_RST_MASK) -#define WLAN_RESET_CONTROL_SI0_RST_MSB 0 -#define WLAN_RESET_CONTROL_SI0_RST_LSB 0 -#define WLAN_RESET_CONTROL_SI0_RST_MASK 0x00000001 -#define WLAN_RESET_CONTROL_SI0_RST_GET(x) (((x) & WLAN_RESET_CONTROL_SI0_RST_MASK) >> WLAN_RESET_CONTROL_SI0_RST_LSB) -#define WLAN_RESET_CONTROL_SI0_RST_SET(x) (((x) << WLAN_RESET_CONTROL_SI0_RST_LSB) & WLAN_RESET_CONTROL_SI0_RST_MASK) - -#define WLAN_CPU_CLOCK_ADDRESS 0x00000020 -#define WLAN_CPU_CLOCK_OFFSET 0x00000020 -#define WLAN_CPU_CLOCK_STANDARD_MSB 1 -#define WLAN_CPU_CLOCK_STANDARD_LSB 0 -#define WLAN_CPU_CLOCK_STANDARD_MASK 0x00000003 -#define WLAN_CPU_CLOCK_STANDARD_GET(x) (((x) & WLAN_CPU_CLOCK_STANDARD_MASK) >> WLAN_CPU_CLOCK_STANDARD_LSB) -#define WLAN_CPU_CLOCK_STANDARD_SET(x) (((x) << WLAN_CPU_CLOCK_STANDARD_LSB) & WLAN_CPU_CLOCK_STANDARD_MASK) - -#define WLAN_CLOCK_CONTROL_ADDRESS 0x00000028 -#define WLAN_CLOCK_CONTROL_OFFSET 0x00000028 -#define WLAN_CLOCK_CONTROL_LF_CLK32_MSB 2 -#define WLAN_CLOCK_CONTROL_LF_CLK32_LSB 2 -#define WLAN_CLOCK_CONTROL_LF_CLK32_MASK 0x00000004 -#define WLAN_CLOCK_CONTROL_LF_CLK32_GET(x) (((x) & WLAN_CLOCK_CONTROL_LF_CLK32_MASK) >> WLAN_CLOCK_CONTROL_LF_CLK32_LSB) -#define WLAN_CLOCK_CONTROL_LF_CLK32_SET(x) (((x) << WLAN_CLOCK_CONTROL_LF_CLK32_LSB) & WLAN_CLOCK_CONTROL_LF_CLK32_MASK) -#define WLAN_CLOCK_CONTROL_SI0_CLK_MSB 0 -#define WLAN_CLOCK_CONTROL_SI0_CLK_LSB 0 -#define WLAN_CLOCK_CONTROL_SI0_CLK_MASK 0x00000001 -#define WLAN_CLOCK_CONTROL_SI0_CLK_GET(x) (((x) & WLAN_CLOCK_CONTROL_SI0_CLK_MASK) >> WLAN_CLOCK_CONTROL_SI0_CLK_LSB) -#define WLAN_CLOCK_CONTROL_SI0_CLK_SET(x) (((x) << WLAN_CLOCK_CONTROL_SI0_CLK_LSB) & WLAN_CLOCK_CONTROL_SI0_CLK_MASK) - -#define WLAN_SYSTEM_SLEEP_ADDRESS 0x000000c4 -#define WLAN_SYSTEM_SLEEP_OFFSET 0x000000c4 -#define WLAN_SYSTEM_SLEEP_HOST_IF_MSB 4 -#define WLAN_SYSTEM_SLEEP_HOST_IF_LSB 4 -#define WLAN_SYSTEM_SLEEP_HOST_IF_MASK 0x00000010 -#define WLAN_SYSTEM_SLEEP_HOST_IF_GET(x) (((x) & WLAN_SYSTEM_SLEEP_HOST_IF_MASK) >> WLAN_SYSTEM_SLEEP_HOST_IF_LSB) -#define WLAN_SYSTEM_SLEEP_HOST_IF_SET(x) (((x) << WLAN_SYSTEM_SLEEP_HOST_IF_LSB) & WLAN_SYSTEM_SLEEP_HOST_IF_MASK) -#define WLAN_SYSTEM_SLEEP_MBOX_MSB 3 -#define WLAN_SYSTEM_SLEEP_MBOX_LSB 3 -#define WLAN_SYSTEM_SLEEP_MBOX_MASK 0x00000008 -#define WLAN_SYSTEM_SLEEP_MBOX_GET(x) (((x) & WLAN_SYSTEM_SLEEP_MBOX_MASK) >> WLAN_SYSTEM_SLEEP_MBOX_LSB) -#define WLAN_SYSTEM_SLEEP_MBOX_SET(x) (((x) << WLAN_SYSTEM_SLEEP_MBOX_LSB) & WLAN_SYSTEM_SLEEP_MBOX_MASK) -#define WLAN_SYSTEM_SLEEP_MAC_IF_MSB 2 -#define WLAN_SYSTEM_SLEEP_MAC_IF_LSB 2 -#define WLAN_SYSTEM_SLEEP_MAC_IF_MASK 0x00000004 -#define WLAN_SYSTEM_SLEEP_MAC_IF_GET(x) (((x) & WLAN_SYSTEM_SLEEP_MAC_IF_MASK) >> WLAN_SYSTEM_SLEEP_MAC_IF_LSB) -#define WLAN_SYSTEM_SLEEP_MAC_IF_SET(x) (((x) << WLAN_SYSTEM_SLEEP_MAC_IF_LSB) & WLAN_SYSTEM_SLEEP_MAC_IF_MASK) -#define WLAN_SYSTEM_SLEEP_LIGHT_MSB 1 -#define WLAN_SYSTEM_SLEEP_LIGHT_LSB 1 -#define WLAN_SYSTEM_SLEEP_LIGHT_MASK 0x00000002 -#define WLAN_SYSTEM_SLEEP_LIGHT_GET(x) (((x) & WLAN_SYSTEM_SLEEP_LIGHT_MASK) >> WLAN_SYSTEM_SLEEP_LIGHT_LSB) -#define WLAN_SYSTEM_SLEEP_LIGHT_SET(x) (((x) << WLAN_SYSTEM_SLEEP_LIGHT_LSB) & WLAN_SYSTEM_SLEEP_LIGHT_MASK) -#define WLAN_SYSTEM_SLEEP_DISABLE_MSB 0 -#define WLAN_SYSTEM_SLEEP_DISABLE_LSB 0 -#define WLAN_SYSTEM_SLEEP_DISABLE_MASK 0x00000001 -#define WLAN_SYSTEM_SLEEP_DISABLE_GET(x) (((x) & WLAN_SYSTEM_SLEEP_DISABLE_MASK) >> WLAN_SYSTEM_SLEEP_DISABLE_LSB) -#define WLAN_SYSTEM_SLEEP_DISABLE_SET(x) (((x) << WLAN_SYSTEM_SLEEP_DISABLE_LSB) & WLAN_SYSTEM_SLEEP_DISABLE_MASK) - -#define WLAN_LPO_CAL_ADDRESS 0x000000e0 -#define WLAN_LPO_CAL_OFFSET 0x000000e0 -#define WLAN_LPO_CAL_ENABLE_MSB 20 -#define WLAN_LPO_CAL_ENABLE_LSB 20 -#define WLAN_LPO_CAL_ENABLE_MASK 0x00100000 -#define WLAN_LPO_CAL_ENABLE_GET(x) (((x) & WLAN_LPO_CAL_ENABLE_MASK) >> WLAN_LPO_CAL_ENABLE_LSB) -#define WLAN_LPO_CAL_ENABLE_SET(x) (((x) << WLAN_LPO_CAL_ENABLE_LSB) & WLAN_LPO_CAL_ENABLE_MASK) -#define WLAN_LPO_CAL_COUNT_MSB 19 -#define WLAN_LPO_CAL_COUNT_LSB 0 -#define WLAN_LPO_CAL_COUNT_MASK 0x000fffff -#define WLAN_LPO_CAL_COUNT_GET(x) (((x) & WLAN_LPO_CAL_COUNT_MASK) >> WLAN_LPO_CAL_COUNT_LSB) -#define WLAN_LPO_CAL_COUNT_SET(x) (((x) << WLAN_LPO_CAL_COUNT_LSB) & WLAN_LPO_CAL_COUNT_MASK) - -#endif /* _RTC_WLAN_REG_H_ */ diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/uart_reg.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/uart_reg.h deleted file mode 100644 index 302b20bc1bad..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/uart_reg.h +++ /dev/null @@ -1,40 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#ifndef _UART_REG_REG_H_ -#define _UART_REG_REG_H_ - -#define UART_CLKDIV_ADDRESS 0x00000008 -#define UART_CLKDIV_OFFSET 0x00000008 -#define UART_CLKDIV_CLK_SCALE_MSB 23 -#define UART_CLKDIV_CLK_SCALE_LSB 16 -#define UART_CLKDIV_CLK_SCALE_MASK 0x00ff0000 -#define UART_CLKDIV_CLK_SCALE_GET(x) (((x) & UART_CLKDIV_CLK_SCALE_MASK) >> UART_CLKDIV_CLK_SCALE_LSB) -#define UART_CLKDIV_CLK_SCALE_SET(x) (((x) << UART_CLKDIV_CLK_SCALE_LSB) & UART_CLKDIV_CLK_SCALE_MASK) -#define UART_CLKDIV_CLK_STEP_MSB 15 -#define UART_CLKDIV_CLK_STEP_LSB 0 -#define UART_CLKDIV_CLK_STEP_MASK 0x0000ffff -#define UART_CLKDIV_CLK_STEP_GET(x) (((x) & UART_CLKDIV_CLK_STEP_MASK) >> UART_CLKDIV_CLK_STEP_LSB) -#define UART_CLKDIV_CLK_STEP_SET(x) (((x) << UART_CLKDIV_CLK_STEP_LSB) & UART_CLKDIV_CLK_STEP_MASK) - -#endif /* _UART_REG_H_ */ diff --git a/drivers/staging/ath6kl/include/common/athdefs.h b/drivers/staging/ath6kl/include/common/athdefs.h deleted file mode 100644 index 74922481e065..000000000000 --- a/drivers/staging/ath6kl/include/common/athdefs.h +++ /dev/null @@ -1,75 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="athdefs.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== -#ifndef __ATHDEFS_H__ -#define __ATHDEFS_H__ - -/* - * This file contains definitions that may be used across both - * Host and Target software. Nothing here is module-dependent - * or platform-dependent. - */ - -/* - * Generic error codes that can be used by hw, sta, ap, sim, dk - * and any other environments. - * Feel free to add any more non-zero codes that you need. - */ - -#define A_ERROR (-1) /* Generic error return */ -#define A_DEVICE_NOT_FOUND 1 /* not able to find PCI device */ -#define A_NO_MEMORY 2 /* not able to allocate memory, - * not avail#defineable */ -#define A_MEMORY_NOT_AVAIL 3 /* memory region is not free for - * mapping */ -#define A_NO_FREE_DESC 4 /* no free descriptors available */ -#define A_BAD_ADDRESS 5 /* address does not match descriptor */ -#define A_WIN_DRIVER_ERROR 6 /* used in NT_HW version, - * if problem at init */ -#define A_REGS_NOT_MAPPED 7 /* registers not correctly mapped */ -#define A_EPERM 8 /* Not superuser */ -#define A_EACCES 0 /* Access denied */ -#define A_ENOENT 10 /* No such entry, search failed, etc. */ -#define A_EEXIST 11 /* The object already exists - * (can't create) */ -#define A_EFAULT 12 /* Bad address fault */ -#define A_EBUSY 13 /* Object is busy */ -#define A_EINVAL 14 /* Invalid parameter */ -#define A_EMSGSIZE 15 /* Bad message buffer length */ -#define A_ECANCELED 16 /* Operation canceled */ -#define A_ENOTSUP 17 /* Operation not supported */ -#define A_ECOMM 18 /* Communication error on send */ -#define A_EPROTO 19 /* Protocol error */ -#define A_ENODEV 20 /* No such device */ -#define A_EDEVNOTUP 21 /* device is not UP */ -#define A_NO_RESOURCE 22 /* No resources for - * requested operation */ -#define A_HARDWARE 23 /* Hardware failure */ -#define A_PENDING 24 /* Asynchronous routine; will send up - * results later - * (typically in callback) */ -#define A_EBADCHANNEL 25 /* The channel cannot be used */ -#define A_DECRYPT_ERROR 26 /* Decryption error */ -#define A_PHY_ERROR 27 /* RX PHY error */ -#define A_CONSUMED 28 /* Object was consumed */ - -#endif /* __ATHDEFS_H__ */ diff --git a/drivers/staging/ath6kl/include/common/bmi_msg.h b/drivers/staging/ath6kl/include/common/bmi_msg.h deleted file mode 100644 index 84e8db569a9f..000000000000 --- a/drivers/staging/ath6kl/include/common/bmi_msg.h +++ /dev/null @@ -1,233 +0,0 @@ -//------------------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// -// Author(s): ="Atheros" -//------------------------------------------------------------------------------ - -#ifndef __BMI_MSG_H__ -#define __BMI_MSG_H__ - -/* - * Bootloader Messaging Interface (BMI) - * - * BMI is a very simple messaging interface used during initialization - * to read memory, write memory, execute code, and to define an - * application entry PC. - * - * It is used to download an application to AR6K, to provide - * patches to code that is already resident on AR6K, and generally - * to examine and modify state. The Host has an opportunity to use - * BMI only once during bootup. Once the Host issues a BMI_DONE - * command, this opportunity ends. - * - * The Host writes BMI requests to mailbox0, and reads BMI responses - * from mailbox0. BMI requests all begin with a command - * (see below for specific commands), and are followed by - * command-specific data. - * - * Flow control: - * The Host can only issue a command once the Target gives it a - * "BMI Command Credit", using AR6K Counter #4. As soon as the - * Target has completed a command, it issues another BMI Command - * Credit (so the Host can issue the next command). - * - * BMI handles all required Target-side cache flushing. - */ - - -/* Maximum data size used for BMI transfers */ -#define BMI_DATASZ_MAX 256 - -/* BMI Commands */ - -#define BMI_NO_COMMAND 0 - -#define BMI_DONE 1 - /* - * Semantics: Host is done using BMI - * Request format: - * u32 command (BMI_DONE) - * Response format: none - */ - -#define BMI_READ_MEMORY 2 - /* - * Semantics: Host reads AR6K memory - * Request format: - * u32 command (BMI_READ_MEMORY) - * u32 address - * u32 length, at most BMI_DATASZ_MAX - * Response format: - * u8 data[length] - */ - -#define BMI_WRITE_MEMORY 3 - /* - * Semantics: Host writes AR6K memory - * Request format: - * u32 command (BMI_WRITE_MEMORY) - * u32 address - * u32 length, at most BMI_DATASZ_MAX - * u8 data[length] - * Response format: none - */ - -#define BMI_EXECUTE 4 - /* - * Semantics: Causes AR6K to execute code - * Request format: - * u32 command (BMI_EXECUTE) - * u32 address - * u32 parameter - * Response format: - * u32 return value - */ - -#define BMI_SET_APP_START 5 - /* - * Semantics: Set Target application starting address - * Request format: - * u32 command (BMI_SET_APP_START) - * u32 address - * Response format: none - */ - -#define BMI_READ_SOC_REGISTER 6 - /* - * Semantics: Read a 32-bit Target SOC register. - * Request format: - * u32 command (BMI_READ_REGISTER) - * u32 address - * Response format: - * u32 value - */ - -#define BMI_WRITE_SOC_REGISTER 7 - /* - * Semantics: Write a 32-bit Target SOC register. - * Request format: - * u32 command (BMI_WRITE_REGISTER) - * u32 address - * u32 value - * - * Response format: none - */ - -#define BMI_GET_TARGET_ID 8 -#define BMI_GET_TARGET_INFO 8 - /* - * Semantics: Fetch the 4-byte Target information - * Request format: - * u32 command (BMI_GET_TARGET_ID/INFO) - * Response format1 (old firmware): - * u32 TargetVersionID - * Response format2 (newer firmware): - * u32 TARGET_VERSION_SENTINAL - * struct bmi_target_info; - */ - -PREPACK struct bmi_target_info { - u32 target_info_byte_count; /* size of this structure */ - u32 target_ver; /* Target Version ID */ - u32 target_type; /* Target type */ -} POSTPACK; -#define TARGET_VERSION_SENTINAL 0xffffffff -#define TARGET_TYPE_AR6001 1 -#define TARGET_TYPE_AR6002 2 -#define TARGET_TYPE_AR6003 3 - - -#define BMI_ROMPATCH_INSTALL 9 - /* - * Semantics: Install a ROM Patch. - * Request format: - * u32 command (BMI_ROMPATCH_INSTALL) - * u32 Target ROM Address - * u32 Target RAM Address or Value (depending on Target Type) - * u32 Size, in bytes - * u32 Activate? 1-->activate; - * 0-->install but do not activate - * Response format: - * u32 PatchID - */ - -#define BMI_ROMPATCH_UNINSTALL 10 - /* - * Semantics: Uninstall a previously-installed ROM Patch, - * automatically deactivating, if necessary. - * Request format: - * u32 command (BMI_ROMPATCH_UNINSTALL) - * u32 PatchID - * - * Response format: none - */ - -#define BMI_ROMPATCH_ACTIVATE 11 - /* - * Semantics: Activate a list of previously-installed ROM Patches. - * Request format: - * u32 command (BMI_ROMPATCH_ACTIVATE) - * u32 rompatch_count - * u32 PatchID[rompatch_count] - * - * Response format: none - */ - -#define BMI_ROMPATCH_DEACTIVATE 12 - /* - * Semantics: Deactivate a list of active ROM Patches. - * Request format: - * u32 command (BMI_ROMPATCH_DEACTIVATE) - * u32 rompatch_count - * u32 PatchID[rompatch_count] - * - * Response format: none - */ - - -#define BMI_LZ_STREAM_START 13 - /* - * Semantics: Begin an LZ-compressed stream of input - * which is to be uncompressed by the Target to an - * output buffer at address. The output buffer must - * be sufficiently large to hold the uncompressed - * output from the compressed input stream. This BMI - * command should be followed by a series of 1 or more - * BMI_LZ_DATA commands. - * u32 command (BMI_LZ_STREAM_START) - * u32 address - * Note: Not supported on all versions of ROM firmware. - */ - -#define BMI_LZ_DATA 14 - /* - * Semantics: Host writes AR6K memory with LZ-compressed - * data which is uncompressed by the Target. This command - * must be preceded by a BMI_LZ_STREAM_START command. A series - * of BMI_LZ_DATA commands are considered part of a single - * input stream until another BMI_LZ_STREAM_START is issued. - * Request format: - * u32 command (BMI_LZ_DATA) - * u32 length (of compressed data), - * at most BMI_DATASZ_MAX - * u8 CompressedData[length] - * Response format: none - * Note: Not supported on all versions of ROM firmware. - */ - -#endif /* __BMI_MSG_H__ */ diff --git a/drivers/staging/ath6kl/include/common/cnxmgmt.h b/drivers/staging/ath6kl/include/common/cnxmgmt.h deleted file mode 100644 index 7a902cb54831..000000000000 --- a/drivers/staging/ath6kl/include/common/cnxmgmt.h +++ /dev/null @@ -1,36 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="cnxmgmt.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef _CNXMGMT_H_ -#define _CNXMGMT_H_ - -typedef enum { - CM_CONNECT_WITHOUT_SCAN = 0x0001, - CM_CONNECT_ASSOC_POLICY_USER = 0x0002, - CM_CONNECT_SEND_REASSOC = 0x0004, - CM_CONNECT_WITHOUT_ROAMTABLE_UPDATE = 0x0008, - CM_CONNECT_DO_WPA_OFFLOAD = 0x0010, - CM_CONNECT_DO_NOT_DEAUTH = 0x0020, -} CM_CONNECT_TYPE; - -#endif /* _CNXMGMT_H_ */ diff --git a/drivers/staging/ath6kl/include/common/dbglog.h b/drivers/staging/ath6kl/include/common/dbglog.h deleted file mode 100644 index 5566e568b83d..000000000000 --- a/drivers/staging/ath6kl/include/common/dbglog.h +++ /dev/null @@ -1,126 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="dbglog.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef _DBGLOG_H_ -#define _DBGLOG_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#define DBGLOG_TIMESTAMP_OFFSET 0 -#define DBGLOG_TIMESTAMP_MASK 0x0000FFFF /* Bit 0-15. Contains bit - 8-23 of the LF0 timer */ -#define DBGLOG_DBGID_OFFSET 16 -#define DBGLOG_DBGID_MASK 0x03FF0000 /* Bit 16-25 */ -#define DBGLOG_DBGID_NUM_MAX 256 /* Upper limit is width of mask */ - -#define DBGLOG_MODULEID_OFFSET 26 -#define DBGLOG_MODULEID_MASK 0x3C000000 /* Bit 26-29 */ -#define DBGLOG_MODULEID_NUM_MAX 16 /* Upper limit is width of mask */ - -/* - * Please ensure that the definition of any new module introduced is captured - * between the DBGLOG_MODULEID_START and DBGLOG_MODULEID_END defines. The - * structure is required for the parser to correctly pick up the values for - * different modules. - */ -#define DBGLOG_MODULEID_START -#define DBGLOG_MODULEID_INF 0 -#define DBGLOG_MODULEID_WMI 1 -#define DBGLOG_MODULEID_MISC 2 -#define DBGLOG_MODULEID_PM 3 -#define DBGLOG_MODULEID_TXRX_MGMTBUF 4 -#define DBGLOG_MODULEID_TXRX_TXBUF 5 -#define DBGLOG_MODULEID_TXRX_RXBUF 6 -#define DBGLOG_MODULEID_WOW 7 -#define DBGLOG_MODULEID_WHAL 8 -#define DBGLOG_MODULEID_DC 9 -#define DBGLOG_MODULEID_CO 10 -#define DBGLOG_MODULEID_RO 11 -#define DBGLOG_MODULEID_CM 12 -#define DBGLOG_MODULEID_MGMT 13 -#define DBGLOG_MODULEID_TMR 14 -#define DBGLOG_MODULEID_BTCOEX 15 -#define DBGLOG_MODULEID_END - -#define DBGLOG_NUM_ARGS_OFFSET 30 -#define DBGLOG_NUM_ARGS_MASK 0xC0000000 /* Bit 30-31 */ -#define DBGLOG_NUM_ARGS_MAX 2 /* Upper limit is width of mask */ - -#define DBGLOG_MODULE_LOG_ENABLE_OFFSET 0 -#define DBGLOG_MODULE_LOG_ENABLE_MASK 0x0000FFFF - -#define DBGLOG_REPORTING_ENABLED_OFFSET 16 -#define DBGLOG_REPORTING_ENABLED_MASK 0x00010000 - -#define DBGLOG_TIMESTAMP_RESOLUTION_OFFSET 17 -#define DBGLOG_TIMESTAMP_RESOLUTION_MASK 0x000E0000 - -#define DBGLOG_REPORT_SIZE_OFFSET 20 -#define DBGLOG_REPORT_SIZE_MASK 0x3FF00000 - -#define DBGLOG_LOG_BUFFER_SIZE 1500 -#define DBGLOG_DBGID_DEFINITION_LEN_MAX 90 - -PREPACK struct dbglog_buf_s { - struct dbglog_buf_s *next; - u8 *buffer; - u32 bufsize; - u32 length; - u32 count; - u32 free; -} POSTPACK; - -PREPACK struct dbglog_hdr_s { - struct dbglog_buf_s *dbuf; - u32 dropped; -} POSTPACK; - -PREPACK struct dbglog_config_s { - u32 cfgvalid; /* Mask with valid config bits */ - union { - /* TODO: Take care of endianness */ - struct { - u32 mmask:16; /* Mask of modules with logging on */ - u32 rep:1; /* Reporting enabled or not */ - u32 tsr:3; /* Time stamp resolution. Def: 1 ms */ - u32 size:10; /* Report size in number of messages */ - u32 reserved:2; - } dbglog_config; - - u32 value; - } u; -} POSTPACK; - -#define cfgmmask u.dbglog_config.mmask -#define cfgrep u.dbglog_config.rep -#define cfgtsr u.dbglog_config.tsr -#define cfgsize u.dbglog_config.size -#define cfgvalue u.value - -#ifdef __cplusplus -} -#endif - -#endif /* _DBGLOG_H_ */ diff --git a/drivers/staging/ath6kl/include/common/dbglog_id.h b/drivers/staging/ath6kl/include/common/dbglog_id.h deleted file mode 100644 index 15ef829cab20..000000000000 --- a/drivers/staging/ath6kl/include/common/dbglog_id.h +++ /dev/null @@ -1,558 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="dbglog_id.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef _DBGLOG_ID_H_ -#define _DBGLOG_ID_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * The nomenclature for the debug identifiers is MODULE_DESCRIPTION. - * Please ensure that the definition of any new debugid introduced is captured - * between the <MODULE>_DBGID_DEFINITION_START and - * <MODULE>_DBGID_DEFINITION_END defines. The structure is required for the - * parser to correctly pick up the values for different debug identifiers. - */ - -/* INF debug identifier definitions */ -#define INF_DBGID_DEFINITION_START -#define INF_ASSERTION_FAILED 1 -#define INF_TARGET_ID 2 -#define INF_DBGID_DEFINITION_END - -/* WMI debug identifier definitions */ -#define WMI_DBGID_DEFINITION_START -#define WMI_CMD_RX_XTND_PKT_TOO_SHORT 1 -#define WMI_EXTENDED_CMD_NOT_HANDLED 2 -#define WMI_CMD_RX_PKT_TOO_SHORT 3 -#define WMI_CALLING_WMI_EXTENSION_FN 4 -#define WMI_CMD_NOT_HANDLED 5 -#define WMI_IN_SYNC 6 -#define WMI_TARGET_WMI_SYNC_CMD 7 -#define WMI_SET_SNR_THRESHOLD_PARAMS 8 -#define WMI_SET_RSSI_THRESHOLD_PARAMS 9 -#define WMI_SET_LQ_TRESHOLD_PARAMS 10 -#define WMI_TARGET_CREATE_PSTREAM_CMD 11 -#define WMI_WI_DTM_INUSE 12 -#define WMI_TARGET_DELETE_PSTREAM_CMD 13 -#define WMI_TARGET_IMPLICIT_DELETE_PSTREAM_CMD 14 -#define WMI_TARGET_GET_BIT_RATE_CMD 15 -#define WMI_GET_RATE_MASK_CMD_FIX_RATE_MASK_IS 16 -#define WMI_TARGET_GET_AVAILABLE_CHANNELS_CMD 17 -#define WMI_TARGET_GET_TX_PWR_CMD 18 -#define WMI_FREE_EVBUF_WMIBUF 19 -#define WMI_FREE_EVBUF_DATABUF 20 -#define WMI_FREE_EVBUF_BADFLAG 21 -#define WMI_HTC_RX_ERROR_DATA_PACKET 22 -#define WMI_HTC_RX_SYNC_PAUSING_FOR_MBOX 23 -#define WMI_INCORRECT_WMI_DATA_HDR_DROPPING_PKT 24 -#define WMI_SENDING_READY_EVENT 25 -#define WMI_SETPOWER_MDOE_TO_MAXPERF 26 -#define WMI_SETPOWER_MDOE_TO_REC 27 -#define WMI_BSSINFO_EVENT_FROM 28 -#define WMI_TARGET_GET_STATS_CMD 29 -#define WMI_SENDING_SCAN_COMPLETE_EVENT 30 -#define WMI_SENDING_RSSI_INDB_THRESHOLD_EVENT 31 -#define WMI_SENDING_RSSI_INDBM_THRESHOLD_EVENT 32 -#define WMI_SENDING_LINK_QUALITY_THRESHOLD_EVENT 33 -#define WMI_SENDING_ERROR_REPORT_EVENT 34 -#define WMI_SENDING_CAC_EVENT 35 -#define WMI_TARGET_GET_ROAM_TABLE_CMD 36 -#define WMI_TARGET_GET_ROAM_DATA_CMD 37 -#define WMI_SENDING_GPIO_INTR_EVENT 38 -#define WMI_SENDING_GPIO_ACK_EVENT 39 -#define WMI_SENDING_GPIO_DATA_EVENT 40 -#define WMI_CMD_RX 41 -#define WMI_CMD_RX_XTND 42 -#define WMI_EVENT_SEND 43 -#define WMI_EVENT_SEND_XTND 44 -#define WMI_CMD_PARAMS_DUMP_START 45 -#define WMI_CMD_PARAMS_DUMP_END 46 -#define WMI_CMD_PARAMS 47 -#define WMI_DBGID_DEFINITION_END - -/* MISC debug identifier definitions */ -#define MISC_DBGID_DEFINITION_START -#define MISC_WLAN_SCHEDULER_EVENT_REGISTER_ERROR 1 -#define TLPM_INIT 2 -#define TLPM_FILTER_POWER_STATE 3 -#define TLPM_NOTIFY_NOT_IDLE 4 -#define TLPM_TIMEOUT_IDLE_HANDLER 5 -#define TLPM_TIMEOUT_WAKEUP_HANDLER 6 -#define TLPM_WAKEUP_SIGNAL_HANDLER 7 -#define TLPM_UNEXPECTED_GPIO_INTR_ERROR 8 -#define TLPM_BREAK_ON_NOT_RECEIVED_ERROR 9 -#define TLPM_BREAK_OFF_NOT_RECIVED_ERROR 10 -#define TLPM_ACK_GPIO_INTR 11 -#define TLPM_ON 12 -#define TLPM_OFF 13 -#define TLPM_WAKEUP_FROM_HOST 14 -#define TLPM_WAKEUP_FROM_BT 15 -#define TLPM_TX_BREAK_RECIVED 16 -#define TLPM_IDLE_TIMER_NOT_RUNNING 17 -#define MISC_DBGID_DEFINITION_END - -/* TXRX debug identifier definitions */ -#define TXRX_TXBUF_DBGID_DEFINITION_START -#define TXRX_TXBUF_ALLOCATE_BUF 1 -#define TXRX_TXBUF_QUEUE_BUF_TO_MBOX 2 -#define TXRX_TXBUF_QUEUE_BUF_TO_TXQ 3 -#define TXRX_TXBUF_TXQ_DEPTH 4 -#define TXRX_TXBUF_IBSS_QUEUE_TO_SFQ 5 -#define TXRX_TXBUF_IBSS_QUEUE_TO_TXQ_FRM_SFQ 6 -#define TXRX_TXBUF_INITIALIZE_TIMER 7 -#define TXRX_TXBUF_ARM_TIMER 8 -#define TXRX_TXBUF_DISARM_TIMER 9 -#define TXRX_TXBUF_UNINITIALIZE_TIMER 10 -#define TXRX_TXBUF_DBGID_DEFINITION_END - -#define TXRX_RXBUF_DBGID_DEFINITION_START -#define TXRX_RXBUF_ALLOCATE_BUF 1 -#define TXRX_RXBUF_QUEUE_TO_HOST 2 -#define TXRX_RXBUF_QUEUE_TO_WLAN 3 -#define TXRX_RXBUF_ZERO_LEN_BUF 4 -#define TXRX_RXBUF_QUEUE_TO_HOST_LASTBUF_IN_RXCHAIN 5 -#define TXRX_RXBUF_LASTBUF_IN_RXCHAIN_ZEROBUF 6 -#define TXRX_RXBUF_QUEUE_EMPTY_QUEUE_TO_WLAN 7 -#define TXRX_RXBUF_SEND_TO_RECV_MGMT 8 -#define TXRX_RXBUF_SEND_TO_IEEE_LAYER 9 -#define TXRX_RXBUF_REQUEUE_ERROR 10 -#define TXRX_RXBUF_DBGID_DEFINITION_END - -#define TXRX_MGMTBUF_DBGID_DEFINITION_START -#define TXRX_MGMTBUF_ALLOCATE_BUF 1 -#define TXRX_MGMTBUF_ALLOCATE_SM_BUF 2 -#define TXRX_MGMTBUF_ALLOCATE_RMBUF 3 -#define TXRX_MGMTBUF_GET_BUF 4 -#define TXRX_MGMTBUF_GET_SM_BUF 5 -#define TXRX_MGMTBUF_QUEUE_BUF_TO_TXQ 6 -#define TXRX_MGMTBUF_REAPED_BUF 7 -#define TXRX_MGMTBUF_REAPED_SM_BUF 8 -#define TXRX_MGMTBUF_WAIT_FOR_TXQ_DRAIN 9 -#define TXRX_MGMTBUF_WAIT_FOR_TXQ_SFQ_DRAIN 10 -#define TXRX_MGMTBUF_ENQUEUE_INTO_DATA_SFQ 11 -#define TXRX_MGMTBUF_DEQUEUE_FROM_DATA_SFQ 12 -#define TXRX_MGMTBUF_PAUSE_DATA_TXQ 13 -#define TXRX_MGMTBUF_RESUME_DATA_TXQ 14 -#define TXRX_MGMTBUF_WAIT_FORTXQ_DRAIN_TIMEOUT 15 -#define TXRX_MGMTBUF_DRAINQ 16 -#define TXRX_MGMTBUF_INDICATE_Q_DRAINED 17 -#define TXRX_MGMTBUF_ENQUEUE_INTO_HW_SFQ 18 -#define TXRX_MGMTBUF_DEQUEUE_FROM_HW_SFQ 19 -#define TXRX_MGMTBUF_PAUSE_HW_TXQ 20 -#define TXRX_MGMTBUF_RESUME_HW_TXQ 21 -#define TXRX_MGMTBUF_TEAR_DOWN_BA 22 -#define TXRX_MGMTBUF_PROCESS_ADDBA_REQ 23 -#define TXRX_MGMTBUF_PROCESS_DELBA 24 -#define TXRX_MGMTBUF_PERFORM_BA 25 -#define TXRX_MGMTBUF_WLAN_RESET_ON_ERROR 26 -#define TXRX_MGMTBUF_DBGID_DEFINITION_END - -/* PM (Power Module) debug identifier definitions */ -#define PM_DBGID_DEFINITION_START -#define PM_INIT 1 -#define PM_ENABLE 2 -#define PM_SET_STATE 3 -#define PM_SET_POWERMODE 4 -#define PM_CONN_NOTIFY 5 -#define PM_REF_COUNT_NEGATIVE 6 -#define PM_INFRA_STA_APSD_ENABLE 7 -#define PM_INFRA_STA_UPDATE_APSD_STATE 8 -#define PM_CHAN_OP_REQ 9 -#define PM_SET_MY_BEACON_POLICY 10 -#define PM_SET_ALL_BEACON_POLICY 11 -#define PM_INFRA_STA_SET_PM_PARAMS1 12 -#define PM_INFRA_STA_SET_PM_PARAMS2 13 -#define PM_ADHOC_SET_PM_CAPS_FAIL 14 -#define PM_ADHOC_UNKNOWN_IBSS_ATTRIB_ID 15 -#define PM_ADHOC_SET_PM_PARAMS 16 -#define PM_ADHOC_STATE1 18 -#define PM_ADHOC_STATE2 19 -#define PM_ADHOC_CONN_MAP 20 -#define PM_FAKE_SLEEP 21 -#define PM_AP_STATE1 22 -#define PM_AP_SET_PM_PARAMS 23 -#define PM_DBGID_DEFINITION_END - -/* Wake on Wireless debug identifier definitions */ -#define WOW_DBGID_DEFINITION_START -#define WOW_INIT 1 -#define WOW_GET_CONFIG_DSET 2 -#define WOW_NO_CONFIG_DSET 3 -#define WOW_INVALID_CONFIG_DSET 4 -#define WOW_USE_DEFAULT_CONFIG 5 -#define WOW_SETUP_GPIO 6 -#define WOW_INIT_DONE 7 -#define WOW_SET_GPIO_PIN 8 -#define WOW_CLEAR_GPIO_PIN 9 -#define WOW_SET_WOW_MODE_CMD 10 -#define WOW_SET_HOST_MODE_CMD 11 -#define WOW_ADD_WOW_PATTERN_CMD 12 -#define WOW_NEW_WOW_PATTERN_AT_INDEX 13 -#define WOW_DEL_WOW_PATTERN_CMD 14 -#define WOW_LIST_CONTAINS_PATTERNS 15 -#define WOW_GET_WOW_LIST_CMD 16 -#define WOW_INVALID_FILTER_ID 17 -#define WOW_INVALID_FILTER_LISTID 18 -#define WOW_NO_VALID_FILTER_AT_ID 19 -#define WOW_NO_VALID_LIST_AT_ID 20 -#define WOW_NUM_PATTERNS_EXCEEDED 21 -#define WOW_NUM_LISTS_EXCEEDED 22 -#define WOW_GET_WOW_STATS 23 -#define WOW_CLEAR_WOW_STATS 24 -#define WOW_WAKEUP_HOST 25 -#define WOW_EVENT_WAKEUP_HOST 26 -#define WOW_EVENT_DISCARD 27 -#define WOW_PATTERN_MATCH 28 -#define WOW_PATTERN_NOT_MATCH 29 -#define WOW_PATTERN_NOT_MATCH_OFFSET 30 -#define WOW_DISABLED_HOST_ASLEEP 31 -#define WOW_ENABLED_HOST_ASLEEP_NO_PATTERNS 32 -#define WOW_ENABLED_HOST_ASLEEP_NO_MATCH_FOUND 33 -#define WOW_DBGID_DEFINITION_END - -/* WHAL debug identifier definitions */ -#define WHAL_DBGID_DEFINITION_START -#define WHAL_ERROR_ANI_CONTROL 1 -#define WHAL_ERROR_CHIP_TEST1 2 -#define WHAL_ERROR_CHIP_TEST2 3 -#define WHAL_ERROR_EEPROM_CHECKSUM 4 -#define WHAL_ERROR_EEPROM_MACADDR 5 -#define WHAL_ERROR_INTERRUPT_HIU 6 -#define WHAL_ERROR_KEYCACHE_RESET 7 -#define WHAL_ERROR_KEYCACHE_SET 8 -#define WHAL_ERROR_KEYCACHE_TYPE 9 -#define WHAL_ERROR_KEYCACHE_TKIPENTRY 10 -#define WHAL_ERROR_KEYCACHE_WEPLENGTH 11 -#define WHAL_ERROR_PHY_INVALID_CHANNEL 12 -#define WHAL_ERROR_POWER_AWAKE 13 -#define WHAL_ERROR_POWER_SET 14 -#define WHAL_ERROR_RECV_STOPDMA 15 -#define WHAL_ERROR_RECV_STOPPCU 16 -#define WHAL_ERROR_RESET_CHANNF1 17 -#define WHAL_ERROR_RESET_CHANNF2 18 -#define WHAL_ERROR_RESET_PM 19 -#define WHAL_ERROR_RESET_OFFSETCAL 20 -#define WHAL_ERROR_RESET_RFGRANT 21 -#define WHAL_ERROR_RESET_RXFRAME 22 -#define WHAL_ERROR_RESET_STOPDMA 23 -#define WHAL_ERROR_RESET_RECOVER 24 -#define WHAL_ERROR_XMIT_COMPUTE 25 -#define WHAL_ERROR_XMIT_NOQUEUE 26 -#define WHAL_ERROR_XMIT_ACTIVEQUEUE 27 -#define WHAL_ERROR_XMIT_BADTYPE 28 -#define WHAL_ERROR_XMIT_STOPDMA 29 -#define WHAL_ERROR_INTERRUPT_BB_PANIC 30 -#define WHAL_ERROR_RESET_TXIQCAL 31 -#define WHAL_ERROR_PAPRD_MAXGAIN_ABOVE_WINDOW 32 -#define WHAL_DBGID_DEFINITION_END - -/* DC debug identifier definitions */ -#define DC_DBGID_DEFINITION_START -#define DC_SCAN_CHAN_START 1 -#define DC_SCAN_CHAN_FINISH 2 -#define DC_BEACON_RECEIVE7 3 -#define DC_SSID_PROBE_CB 4 -#define DC_SEND_NEXT_SSID_PROBE 5 -#define DC_START_SEARCH 6 -#define DC_CANCEL_SEARCH_CB 7 -#define DC_STOP_SEARCH 8 -#define DC_END_SEARCH 9 -#define DC_MIN_CHDWELL_TIMEOUT 10 -#define DC_START_SEARCH_CANCELED 11 -#define DC_SET_POWER_MODE 12 -#define DC_INIT 13 -#define DC_SEARCH_OPPORTUNITY 14 -#define DC_RECEIVED_ANY_BEACON 15 -#define DC_RECEIVED_MY_BEACON 16 -#define DC_PROFILE_IS_ADHOC_BUT_BSS_IS_INFRA 17 -#define DC_PS_ENABLED_BUT_ATHEROS_IE_ABSENT 18 -#define DC_BSS_ADHOC_CHANNEL_NOT_ALLOWED 19 -#define DC_SET_BEACON_UPDATE 20 -#define DC_BEACON_UPDATE_COMPLETE 21 -#define DC_END_SEARCH_BEACON_UPDATE_COMP_CB 22 -#define DC_BSSINFO_EVENT_DROPPED 23 -#define DC_IEEEPS_ENABLED_BUT_ATIM_ABSENT 24 -#define DC_DBGID_DEFINITION_END - -/* CO debug identifier definitions */ -#define CO_DBGID_DEFINITION_START -#define CO_INIT 1 -#define CO_ACQUIRE_LOCK 2 -#define CO_START_OP1 3 -#define CO_START_OP2 4 -#define CO_DRAIN_TX_COMPLETE_CB 5 -#define CO_CHANGE_CHANNEL_CB 6 -#define CO_RETURN_TO_HOME_CHANNEL 7 -#define CO_FINISH_OP_TIMEOUT 8 -#define CO_OP_END 9 -#define CO_CANCEL_OP 10 -#define CO_CHANGE_CHANNEL 11 -#define CO_RELEASE_LOCK 12 -#define CO_CHANGE_STATE 13 -#define CO_DBGID_DEFINITION_END - -/* RO debug identifier definitions */ -#define RO_DBGID_DEFINITION_START -#define RO_REFRESH_ROAM_TABLE 1 -#define RO_UPDATE_ROAM_CANDIDATE 2 -#define RO_UPDATE_ROAM_CANDIDATE_CB 3 -#define RO_UPDATE_ROAM_CANDIDATE_FINISH 4 -#define RO_REFRESH_ROAM_TABLE_DONE 5 -#define RO_PERIODIC_SEARCH_CB 6 -#define RO_PERIODIC_SEARCH_TIMEOUT 7 -#define RO_INIT 8 -#define RO_BMISS_STATE1 9 -#define RO_BMISS_STATE2 10 -#define RO_SET_PERIODIC_SEARCH_ENABLE 11 -#define RO_SET_PERIODIC_SEARCH_DISABLE 12 -#define RO_ENABLE_SQ_THRESHOLD 13 -#define RO_DISABLE_SQ_THRESHOLD 14 -#define RO_ADD_BSS_TO_ROAM_TABLE 15 -#define RO_SET_PERIODIC_SEARCH_MODE 16 -#define RO_CONFIGURE_SQ_THRESHOLD1 17 -#define RO_CONFIGURE_SQ_THRESHOLD2 18 -#define RO_CONFIGURE_SQ_PARAMS 19 -#define RO_LOW_SIGNAL_QUALITY_EVENT 20 -#define RO_HIGH_SIGNAL_QUALITY_EVENT 21 -#define RO_REMOVE_BSS_FROM_ROAM_TABLE 22 -#define RO_UPDATE_CONNECTION_STATE_METRIC 23 -#define RO_DBGID_DEFINITION_END - -/* CM debug identifier definitions */ -#define CM_DBGID_DEFINITION_START -#define CM_INITIATE_HANDOFF 1 -#define CM_INITIATE_HANDOFF_CB 2 -#define CM_CONNECT_EVENT 3 -#define CM_DISCONNECT_EVENT 4 -#define CM_INIT 5 -#define CM_HANDOFF_SOURCE 6 -#define CM_SET_HANDOFF_TRIGGERS 7 -#define CM_CONNECT_REQUEST 8 -#define CM_CONNECT_REQUEST_CB 9 -#define CM_CONTINUE_SCAN_CB 10 -#define CM_DBGID_DEFINITION_END - - -/* mgmt debug identifier definitions */ -#define MGMT_DBGID_DEFINITION_START -#define KEYMGMT_CONNECTION_INIT 1 -#define KEYMGMT_CONNECTION_COMPLETE 2 -#define KEYMGMT_CONNECTION_CLOSE 3 -#define KEYMGMT_ADD_KEY 4 -#define MLME_NEW_STATE 5 -#define MLME_CONN_INIT 6 -#define MLME_CONN_COMPLETE 7 -#define MLME_CONN_CLOSE 8 -#define MGMT_DBGID_DEFINITION_END - -/* TMR debug identifier definitions */ -#define TMR_DBGID_DEFINITION_START -#define TMR_HANG_DETECTED 1 -#define TMR_WDT_TRIGGERED 2 -#define TMR_WDT_RESET 3 -#define TMR_HANDLER_ENTRY 4 -#define TMR_HANDLER_EXIT 5 -#define TMR_SAVED_START 6 -#define TMR_SAVED_END 7 -#define TMR_DBGID_DEFINITION_END - -/* BTCOEX debug identifier definitions */ -#define BTCOEX_DBGID_DEFINITION_START -#define BTCOEX_STATUS_CMD 1 -#define BTCOEX_PARAMS_CMD 2 -#define BTCOEX_ANT_CONFIG 3 -#define BTCOEX_COLOCATED_BT_DEVICE 4 -#define BTCOEX_CLOSE_RANGE_SCO_ON 5 -#define BTCOEX_CLOSE_RANGE_SCO_OFF 6 -#define BTCOEX_CLOSE_RANGE_A2DP_ON 7 -#define BTCOEX_CLOSE_RANGE_A2DP_OFF 8 -#define BTCOEX_A2DP_PROTECT_ON 9 -#define BTCOEX_A2DP_PROTECT_OFF 10 -#define BTCOEX_SCO_PROTECT_ON 11 -#define BTCOEX_SCO_PROTECT_OFF 12 -#define BTCOEX_CLOSE_RANGE_DETECTOR_START 13 -#define BTCOEX_CLOSE_RANGE_DETECTOR_STOP 14 -#define BTCOEX_CLOSE_RANGE_TOGGLE 15 -#define BTCOEX_CLOSE_RANGE_TOGGLE_RSSI_LRCNT 16 -#define BTCOEX_CLOSE_RANGE_RSSI_THRESH 17 -#define BTCOEX_CLOSE_RANGE_LOW_RATE_THRESH 18 -#define BTCOEX_PTA_PRI_INTR_HANDLER 19 -#define BTCOEX_PSPOLL_QUEUED 20 -#define BTCOEX_PSPOLL_COMPLETE 21 -#define BTCOEX_DBG_PM_AWAKE 22 -#define BTCOEX_DBG_PM_SLEEP 23 -#define BTCOEX_DBG_SCO_COEX_ON 24 -#define BTCOEX_SCO_DATARECEIVE 25 -#define BTCOEX_INTR_INIT 26 -#define BTCOEX_PTA_PRI_DIFF 27 -#define BTCOEX_TIM_NOTIFICATION 28 -#define BTCOEX_SCO_WAKEUP_ON_DATA 29 -#define BTCOEX_SCO_SLEEP 30 -#define BTCOEX_SET_WEIGHTS 31 -#define BTCOEX_SCO_DATARECEIVE_LATENCY_VAL 32 -#define BTCOEX_SCO_MEASURE_TIME_DIFF 33 -#define BTCOEX_SET_EOL_VAL 34 -#define BTCOEX_OPT_DETECT_HANDLER 35 -#define BTCOEX_SCO_TOGGLE_STATE 36 -#define BTCOEX_SCO_STOMP 37 -#define BTCOEX_NULL_COMP_CALLBACK 38 -#define BTCOEX_RX_INCOMING 39 -#define BTCOEX_RX_INCOMING_CTL 40 -#define BTCOEX_RX_INCOMING_MGMT 41 -#define BTCOEX_RX_INCOMING_DATA 42 -#define BTCOEX_RTS_RECEPTION 43 -#define BTCOEX_FRAME_PRI_LOW_RATE_THRES 44 -#define BTCOEX_PM_FAKE_SLEEP 45 -#define BTCOEX_ACL_COEX_STATUS 46 -#define BTCOEX_ACL_COEX_DETECTION 47 -#define BTCOEX_A2DP_COEX_STATUS 48 -#define BTCOEX_SCO_STATUS 49 -#define BTCOEX_WAKEUP_ON_DATA 50 -#define BTCOEX_DATARECEIVE 51 -#define BTCOEX_GET_MAX_AGGR_SIZE 53 -#define BTCOEX_MAX_AGGR_AVAIL_TIME 54 -#define BTCOEX_DBG_WBTIMER_INTR 55 -#define BTCOEX_DBG_SCO_SYNC 57 -#define BTCOEX_UPLINK_QUEUED_RATE 59 -#define BTCOEX_DBG_UPLINK_ENABLE_EOL 60 -#define BTCOEX_UPLINK_FRAME_DURATION 61 -#define BTCOEX_UPLINK_SET_EOL 62 -#define BTCOEX_DBG_EOL_EXPIRED 63 -#define BTCOEX_DBG_DATA_COMPLETE 64 -#define BTCOEX_UPLINK_QUEUED_TIMESTAMP 65 -#define BTCOEX_DBG_DATA_COMPLETE_TIME 66 -#define BTCOEX_DBG_A2DP_ROLE_IS_SLAVE 67 -#define BTCOEX_DBG_A2DP_ROLE_IS_MASTER 68 -#define BTCOEX_DBG_UPLINK_SEQ_NUM 69 -#define BTCOEX_UPLINK_AGGR_SEQ 70 -#define BTCOEX_DBG_TX_COMP_SEQ_NO 71 -#define BTCOEX_DBG_MAX_AGGR_PAUSE_STATE 72 -#define BTCOEX_DBG_ACL_TRAFFIC 73 -#define BTCOEX_CURR_AGGR_PROP 74 -#define BTCOEX_DBG_SCO_GET_PER_TIME_DIFF 75 -#define BTCOEX_PSPOLL_PROCESS 76 -#define BTCOEX_RETURN_FROM_MAC 77 -#define BTCOEX_FREED_REQUEUED_CNT 78 -#define BTCOEX_DBG_TOGGLE_LOW_RATES 79 -#define BTCOEX_MAC_GOES_TO_SLEEP 80 -#define BTCOEX_DBG_A2DP_NO_SYNC 81 -#define BTCOEX_RETURN_FROM_MAC_HOLD_Q_INFO 82 -#define BTCOEX_RETURN_FROM_MAC_AC 83 -#define BTCOEX_DBG_DTIM_RECV 84 -#define BTCOEX_IS_PRE_UPDATE 86 -#define BTCOEX_ENQUEUED_BIT_MAP 87 -#define BTCOEX_TX_COMPLETE_FIRST_DESC_STATS 88 -#define BTCOEX_UPLINK_DESC 89 -#define BTCOEX_SCO_GET_PER_FIRST_FRM_TIMESTAMP 90 -#define BTCOEX_DBG_RECV_ACK 94 -#define BTCOEX_DBG_ADDBA_INDICATION 95 -#define BTCOEX_TX_COMPLETE_EOL_FAILED 96 -#define BTCOEX_DBG_A2DP_USAGE_COMPLETE 97 -#define BTCOEX_DBG_A2DP_STOMP_FOR_BCN_HANDLER 98 -#define BTCOEX_DBG_A2DP_SYNC_INTR 99 -#define BTCOEX_DBG_A2DP_STOMP_FOR_BCN_RECEPTION 100 -#define BTCOEX_FORM_AGGR_CURR_AGGR 101 -#define BTCOEX_DBG_TOGGLE_A2DP_BURST_CNT 102 -#define BTCOEX_DBG_BT_TRAFFIC 103 -#define BTCOEX_DBG_STOMP_BT_TRAFFIC 104 -#define BTCOEX_RECV_NULL 105 -#define BTCOEX_DBG_A2DP_MASTER_BT_END 106 -#define BTCOEX_DBG_A2DP_BT_START 107 -#define BTCOEX_DBG_A2DP_SLAVE_BT_END 108 -#define BTCOEX_DBG_A2DP_STOMP_BT 109 -#define BTCOEX_DBG_GO_TO_SLEEP 110 -#define BTCOEX_DBG_A2DP_PKT 111 -#define BTCOEX_DBG_A2DP_PSPOLL_DATA_RECV 112 -#define BTCOEX_DBG_A2DP_NULL 113 -#define BTCOEX_DBG_UPLINK_DATA 114 -#define BTCOEX_DBG_A2DP_STOMP_LOW_PRIO_NULL 115 -#define BTCOEX_DBG_ADD_BA_RESP_TIMEOUT 116 -#define BTCOEX_DBG_TXQ_STATE 117 -#define BTCOEX_DBG_ALLOW_SCAN 118 -#define BTCOEX_DBG_SCAN_REQUEST 119 -#define BTCOEX_A2DP_SLEEP 127 -#define BTCOEX_DBG_DATA_ACTIV_TIMEOUT 128 -#define BTCOEX_DBG_SWITCH_TO_PSPOLL_ON_MODE 129 -#define BTCOEX_DBG_SWITCH_TO_PSPOLL_OFF_MODE 130 -#define BTCOEX_DATARECEIVE_AGGR 131 -#define BTCOEX_DBG_DATA_RECV_SLEEPING_PENDING 132 -#define BTCOEX_DBG_DATARESP_TIMEOUT 133 -#define BTCOEX_BDG_BMISS 134 -#define BTCOEX_DBG_DATA_RECV_WAKEUP_TIM 135 -#define BTCOEX_DBG_SECOND_BMISS 136 -#define BTCOEX_DBG_SET_WLAN_STATE 138 -#define BTCOEX_BDG_FIRST_BMISS 139 -#define BTCOEX_DBG_A2DP_CHAN_OP 140 -#define BTCOEX_DBG_A2DP_INTR 141 -#define BTCOEX_DBG_BT_INQUIRY 142 -#define BTCOEX_DBG_BT_INQUIRY_DATA_FETCH 143 -#define BTCOEX_DBG_POST_INQUIRY_FINISH 144 -#define BTCOEX_DBG_SCO_OPT_MODE_TIMER_HANDLER 145 -#define BTCOEX_DBG_NULL_FRAME_SLEEP 146 -#define BTCOEX_DBG_NULL_FRAME_AWAKE 147 -#define BTCOEX_DBG_SET_AGGR_SIZE 152 -#define BTCOEX_DBG_TEAR_BA_TIMEOUT 153 -#define BTCOEX_DBG_MGMT_FRAME_SEQ_NO 154 -#define BTCOEX_DBG_SCO_STOMP_HIGH_PRI 155 -#define BTCOEX_DBG_COLOCATED_BT_DEV 156 -#define BTCOEX_DBG_FE_ANT_TYPE 157 -#define BTCOEX_DBG_BT_INQUIRY_CMD 158 -#define BTCOEX_DBG_SCO_CONFIG 159 -#define BTCOEX_DBG_SCO_PSPOLL_CONFIG 160 -#define BTCOEX_DBG_SCO_OPTMODE_CONFIG 161 -#define BTCOEX_DBG_A2DP_CONFIG 162 -#define BTCOEX_DBG_A2DP_PSPOLL_CONFIG 163 -#define BTCOEX_DBG_A2DP_OPTMODE_CONFIG 164 -#define BTCOEX_DBG_ACLCOEX_CONFIG 165 -#define BTCOEX_DBG_ACLCOEX_PSPOLL_CONFIG 166 -#define BTCOEX_DBG_ACLCOEX_OPTMODE_CONFIG 167 -#define BTCOEX_DBG_DEBUG_CMD 168 -#define BTCOEX_DBG_SET_BT_OPERATING_STATUS 169 -#define BTCOEX_DBG_GET_CONFIG 170 -#define BTCOEX_DBG_GET_STATS 171 -#define BTCOEX_DBG_BT_OPERATING_STATUS 172 -#define BTCOEX_DBG_PERFORM_RECONNECT 173 -#define BTCOEX_DBG_ACL_WLAN_MED 175 -#define BTCOEX_DBG_ACL_BT_MED 176 -#define BTCOEX_DBG_WLAN_CONNECT 177 -#define BTCOEX_DBG_A2DP_DUAL_START 178 -#define BTCOEX_DBG_PMAWAKE_NOTIFY 179 -#define BTCOEX_DBG_BEACON_SCAN_ENABLE 180 -#define BTCOEX_DBG_BEACON_SCAN_DISABLE 181 -#define BTCOEX_DBG_RX_NOTIFY 182 -#define BTCOEX_SCO_GET_PER_SECOND_FRM_TIMESTAMP 183 -#define BTCOEX_DBG_TXQ_DETAILS 184 -#define BTCOEX_DBG_SCO_STOMP_LOW_PRI 185 -#define BTCOEX_DBG_A2DP_FORCE_SCAN 186 -#define BTCOEX_DBG_DTIM_STOMP_COMP 187 -#define BTCOEX_ACL_PRESENCE_TIMER 188 -#define BTCOEX_DBGID_DEFINITION_END - -#ifdef __cplusplus -} -#endif - -#endif /* _DBGLOG_ID_H_ */ diff --git a/drivers/staging/ath6kl/include/common/discovery.h b/drivers/staging/ath6kl/include/common/discovery.h deleted file mode 100644 index da1b33245069..000000000000 --- a/drivers/staging/ath6kl/include/common/discovery.h +++ /dev/null @@ -1,75 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="discovery.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef _DISCOVERY_H_ -#define _DISCOVERY_H_ - -/* - * DC_SCAN_PRIORITY is an 8-bit bitmap of the scan priority of a channel - */ -typedef enum { - DEFAULT_SCPRI = 0x01, - POPULAR_SCPRI = 0x02, - SSIDS_SCPRI = 0x04, - PROF_SCPRI = 0x08, -} DC_SCAN_PRIORITY; - -/* The following search type construct can be used to manipulate the behavior of the search module based on different bits set */ -typedef enum { - SCAN_RESET = 0, - SCAN_ALL = (DEFAULT_SCPRI | POPULAR_SCPRI | \ - SSIDS_SCPRI | PROF_SCPRI), - - SCAN_POPULAR = (POPULAR_SCPRI | SSIDS_SCPRI | PROF_SCPRI), - SCAN_SSIDS = (SSIDS_SCPRI | PROF_SCPRI), - SCAN_PROF_MASK = (PROF_SCPRI), - SCAN_MULTI_CHANNEL = 0x000100, - SCAN_DETERMINISTIC = 0x000200, - SCAN_PROFILE_MATCH_TERMINATED = 0x000400, - SCAN_HOME_CHANNEL_SKIP = 0x000800, - SCAN_CHANNEL_LIST_CONTINUE = 0x001000, - SCAN_CURRENT_SSID_SKIP = 0x002000, - SCAN_ACTIVE_PROBE_DISABLE = 0x004000, - SCAN_CHANNEL_HINT_ONLY = 0x008000, - SCAN_ACTIVE_CHANNELS_ONLY = 0x010000, - SCAN_UNUSED1 = 0x020000, /* unused */ - SCAN_PERIODIC = 0x040000, - SCAN_FIXED_DURATION = 0x080000, - SCAN_AP_ASSISTED = 0x100000, -} DC_SCAN_TYPE; - -typedef enum { - BSS_REPORTING_DEFAULT = 0x0, - EXCLUDE_NON_SCAN_RESULTS = 0x1, /* Exclude results outside of scan */ -} DC_BSS_REPORTING_POLICY; - -typedef enum { - DC_IGNORE_WPAx_GROUP_CIPHER = 0x01, - DC_PROFILE_MATCH_DONE = 0x02, - DC_IGNORE_AAC_BEACON = 0x04, - DC_CSA_FOLLOW_BSS = 0x08, -} DC_PROFILE_FILTER; - -#define DEFAULT_DC_PROFILE_FILTER (DC_CSA_FOLLOW_BSS) - -#endif /* _DISCOVERY_H_ */ diff --git a/drivers/staging/ath6kl/include/common/epping_test.h b/drivers/staging/ath6kl/include/common/epping_test.h deleted file mode 100644 index 9eb5fdfa746a..000000000000 --- a/drivers/staging/ath6kl/include/common/epping_test.h +++ /dev/null @@ -1,111 +0,0 @@ -//------------------------------------------------------------------------------ -// Copyright (c) 2009-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -// - -/* This file contains shared definitions for the host/target endpoint ping test */ - -#ifndef EPPING_TEST_H_ -#define EPPING_TEST_H_ - - /* alignment to 4-bytes */ -#define EPPING_ALIGNMENT_PAD (((sizeof(struct htc_frame_hdr) + 3) & (~0x3)) - sizeof(struct htc_frame_hdr)) - -#ifndef A_OFFSETOF -#define A_OFFSETOF(type,field) (int)(&(((type *)NULL)->field)) -#endif - -#define EPPING_RSVD_FILL 0xCC - -#define HCI_RSVD_EXPECTED_PKT_TYPE_RECV_OFFSET 7 - -typedef PREPACK struct { - u8 _HCIRsvd[8]; /* reserved for HCI packet header (GMBOX) testing */ - u8 StreamEcho_h; /* stream no. to echo this packet on (filled by host) */ - u8 StreamEchoSent_t; /* stream no. packet was echoed to (filled by target) - When echoed: StreamEchoSent_t == StreamEcho_h */ - u8 StreamRecv_t; /* stream no. that target received this packet on (filled by target) */ - u8 StreamNo_h; /* stream number to send on (filled by host) */ - u8 Magic_h[4]; /* magic number to filter for this packet on the host*/ - u8 _rsvd[6]; /* reserved fields that must be set to a "reserved" value - since this packet maps to a 14-byte ethernet frame we want - to make sure ethertype field is set to something unknown */ - - u8 _pad[2]; /* padding for alignment */ - u8 TimeStamp[8]; /* timestamp of packet (host or target) */ - u32 HostContext_h; /* 4 byte host context, target echos this back */ - u32 SeqNo; /* sequence number (set by host or target) */ - u16 Cmd_h; /* ping command (filled by host) */ - u16 CmdFlags_h; /* optional flags */ - u8 CmdBuffer_h[8]; /* buffer for command (host -> target) */ - u8 CmdBuffer_t[8]; /* buffer for command (target -> host) */ - u16 DataLength; /* length of data */ - u16 DataCRC; /* 16 bit CRC of data */ - u16 HeaderCRC; /* header CRC (fields : StreamNo_h to end, minus HeaderCRC) */ -} POSTPACK EPPING_HEADER; - -#define EPPING_PING_MAGIC_0 0xAA -#define EPPING_PING_MAGIC_1 0x55 -#define EPPING_PING_MAGIC_2 0xCE -#define EPPING_PING_MAGIC_3 0xEC - - - -#define IS_EPPING_PACKET(pPkt) (((pPkt)->Magic_h[0] == EPPING_PING_MAGIC_0) && \ - ((pPkt)->Magic_h[1] == EPPING_PING_MAGIC_1) && \ - ((pPkt)->Magic_h[2] == EPPING_PING_MAGIC_2) && \ - ((pPkt)->Magic_h[3] == EPPING_PING_MAGIC_3)) - -#define SET_EPPING_PACKET_MAGIC(pPkt) { (pPkt)->Magic_h[0] = EPPING_PING_MAGIC_0; \ - (pPkt)->Magic_h[1] = EPPING_PING_MAGIC_1; \ - (pPkt)->Magic_h[2] = EPPING_PING_MAGIC_2; \ - (pPkt)->Magic_h[3] = EPPING_PING_MAGIC_3;} - -#define CMD_FLAGS_DATA_CRC (1 << 0) /* DataCRC field is valid */ -#define CMD_FLAGS_DELAY_ECHO (1 << 1) /* delay the echo of the packet */ -#define CMD_FLAGS_NO_DROP (1 << 2) /* do not drop at HTC layer no matter what the stream is */ - -#define IS_EPING_PACKET_NO_DROP(pPkt) ((pPkt)->CmdFlags_h & CMD_FLAGS_NO_DROP) - -#define EPPING_CMD_ECHO_PACKET 1 /* echo packet test */ -#define EPPING_CMD_RESET_RECV_CNT 2 /* reset recv count */ -#define EPPING_CMD_CAPTURE_RECV_CNT 3 /* fetch recv count, 4-byte count returned in CmdBuffer_t */ -#define EPPING_CMD_NO_ECHO 4 /* non-echo packet test (tx-only) */ -#define EPPING_CMD_CONT_RX_START 5 /* continuous RX packets, parameters are in CmdBuffer_h */ -#define EPPING_CMD_CONT_RX_STOP 6 /* stop continuous RX packet transmission */ - - /* test command parameters may be no more than 8 bytes */ -typedef PREPACK struct { - u16 BurstCnt; /* number of packets to burst together (for HTC 2.1 testing) */ - u16 PacketLength; /* length of packet to generate including header */ - u16 Flags; /* flags */ - -#define EPPING_CONT_RX_DATA_CRC (1 << 0) /* Add CRC to all data */ -#define EPPING_CONT_RX_RANDOM_DATA (1 << 1) /* randomize the data pattern */ -#define EPPING_CONT_RX_RANDOM_LEN (1 << 2) /* randomize the packet lengths */ -} POSTPACK EPPING_CONT_RX_PARAMS; - -#define EPPING_HDR_CRC_OFFSET A_OFFSETOF(EPPING_HEADER,StreamNo_h) -#define EPPING_HDR_BYTES_CRC (sizeof(EPPING_HEADER) - EPPING_HDR_CRC_OFFSET - (sizeof(u16))) - -#define HCI_TRANSPORT_STREAM_NUM 16 /* this number is higher than the define WMM AC classes so we - can use this to distinguish packets */ - -#endif /*EPPING_TEST_H_*/ diff --git a/drivers/staging/ath6kl/include/common/gmboxif.h b/drivers/staging/ath6kl/include/common/gmboxif.h deleted file mode 100644 index ea11c14def43..000000000000 --- a/drivers/staging/ath6kl/include/common/gmboxif.h +++ /dev/null @@ -1,70 +0,0 @@ -//------------------------------------------------------------------------------ -// Copyright (c) 2009-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef __GMBOXIF_H__ -#define __GMBOXIF_H__ - -/* GMBOX interface definitions */ - -#define AR6K_GMBOX_CREDIT_COUNTER 1 /* we use credit counter 1 to track credits */ -#define AR6K_GMBOX_CREDIT_SIZE_COUNTER 2 /* credit counter 2 is used to pass the size of each credit */ - - - /* HCI UART transport definitions when used over GMBOX interface */ -#define HCI_UART_COMMAND_PKT 0x01 -#define HCI_UART_ACL_PKT 0x02 -#define HCI_UART_SCO_PKT 0x03 -#define HCI_UART_EVENT_PKT 0x04 - - /* definitions for BT HCI packets */ -typedef PREPACK struct { - u16 Flags_ConnHandle; - u16 Length; -} POSTPACK BT_HCI_ACL_HEADER; - -typedef PREPACK struct { - u16 Flags_ConnHandle; - u8 Length; -} POSTPACK BT_HCI_SCO_HEADER; - -typedef PREPACK struct { - u16 OpCode; - u8 ParamLength; -} POSTPACK BT_HCI_COMMAND_HEADER; - -typedef PREPACK struct { - u8 EventCode; - u8 ParamLength; -} POSTPACK BT_HCI_EVENT_HEADER; - -/* MBOX host interrupt signal assignments */ - -#define MBOX_SIG_HCI_BRIDGE_MAX 8 -#define MBOX_SIG_HCI_BRIDGE_BT_ON 0 -#define MBOX_SIG_HCI_BRIDGE_BT_OFF 1 -#define MBOX_SIG_HCI_BRIDGE_BAUD_SET 2 -#define MBOX_SIG_HCI_BRIDGE_PWR_SAV_ON 3 -#define MBOX_SIG_HCI_BRIDGE_PWR_SAV_OFF 4 - - -#endif /* __GMBOXIF_H__ */ - diff --git a/drivers/staging/ath6kl/include/common/gpio_reg.h b/drivers/staging/ath6kl/include/common/gpio_reg.h deleted file mode 100644 index f9d425d48dc2..000000000000 --- a/drivers/staging/ath6kl/include/common/gpio_reg.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef _GPIO_REG_REG_H_ -#define _GPIO_REG_REG_H_ - -#define GPIO_PIN10_ADDRESS 0x00000050 -#define GPIO_PIN11_ADDRESS 0x00000054 -#define GPIO_PIN12_ADDRESS 0x00000058 -#define GPIO_PIN13_ADDRESS 0x0000005c - -#endif /* _GPIO_REG_H_ */ diff --git a/drivers/staging/ath6kl/include/common/htc.h b/drivers/staging/ath6kl/include/common/htc.h deleted file mode 100644 index 85cbfa89d670..000000000000 --- a/drivers/staging/ath6kl/include/common/htc.h +++ /dev/null @@ -1,227 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="htc.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef __HTC_H__ -#define __HTC_H__ - -#define A_OFFSETOF(type,field) (unsigned long)(&(((type *)NULL)->field)) - -#define ASSEMBLE_UNALIGNED_UINT16(p,highbyte,lowbyte) \ - (((u16)(((u8 *)(p))[(highbyte)])) << 8 | (u16)(((u8 *)(p))[(lowbyte)])) - -/* alignment independent macros (little-endian) to fetch UINT16s or UINT8s from a - * structure using only the type and field name. - * Use these macros if there is the potential for unaligned buffer accesses. */ -#define A_GET_UINT16_FIELD(p,type,field) \ - ASSEMBLE_UNALIGNED_UINT16(p,\ - A_OFFSETOF(type,field) + 1, \ - A_OFFSETOF(type,field)) - -#define A_SET_UINT16_FIELD(p,type,field,value) \ -{ \ - ((u8 *)(p))[A_OFFSETOF(type,field)] = (u8)(value); \ - ((u8 *)(p))[A_OFFSETOF(type,field) + 1] = (u8)((value) >> 8); \ -} - -#define A_GET_UINT8_FIELD(p,type,field) \ - ((u8 *)(p))[A_OFFSETOF(type,field)] - -#define A_SET_UINT8_FIELD(p,type,field,value) \ - ((u8 *)(p))[A_OFFSETOF(type,field)] = (value) - -/****** DANGER DANGER *************** - * - * The frame header length and message formats defined herein were - * selected to accommodate optimal alignment for target processing. This reduces code - * size and improves performance. - * - * Any changes to the header length may alter the alignment and cause exceptions - * on the target. When adding to the message structures insure that fields are - * properly aligned. - * - */ - -/* HTC frame header */ -PREPACK struct htc_frame_hdr { - /* do not remove or re-arrange these fields, these are minimally required - * to take advantage of 4-byte lookaheads in some hardware implementations */ - u8 EndpointID; - u8 Flags; - u16 PayloadLen; /* length of data (including trailer) that follows the header */ - - /***** end of 4-byte lookahead ****/ - - u8 ControlBytes[2]; - - /* message payload starts after the header */ - -} POSTPACK; - -/* frame header flags */ - - /* send direction */ -#define HTC_FLAGS_NEED_CREDIT_UPDATE (1 << 0) -#define HTC_FLAGS_SEND_BUNDLE (1 << 1) /* start or part of bundle */ - /* receive direction */ -#define HTC_FLAGS_RECV_UNUSED_0 (1 << 0) /* bit 0 unused */ -#define HTC_FLAGS_RECV_TRAILER (1 << 1) /* bit 1 trailer data present */ -#define HTC_FLAGS_RECV_UNUSED_2 (1 << 0) /* bit 2 unused */ -#define HTC_FLAGS_RECV_UNUSED_3 (1 << 0) /* bit 3 unused */ -#define HTC_FLAGS_RECV_BUNDLE_CNT_MASK (0xF0) /* bits 7..4 */ -#define HTC_FLAGS_RECV_BUNDLE_CNT_SHIFT 4 - -#define HTC_HDR_LENGTH (sizeof(struct htc_frame_hdr)) -#define HTC_MAX_TRAILER_LENGTH 255 -#define HTC_MAX_PAYLOAD_LENGTH (4096 - sizeof(struct htc_frame_hdr)) - -/* HTC control message IDs */ - -#define HTC_MSG_READY_ID 1 -#define HTC_MSG_CONNECT_SERVICE_ID 2 -#define HTC_MSG_CONNECT_SERVICE_RESPONSE_ID 3 -#define HTC_MSG_SETUP_COMPLETE_ID 4 -#define HTC_MSG_SETUP_COMPLETE_EX_ID 5 - -#define HTC_MAX_CONTROL_MESSAGE_LENGTH 256 - -/* base message ID header */ -typedef PREPACK struct { - u16 MessageID; -} POSTPACK HTC_UNKNOWN_MSG; - -/* HTC ready message - * direction : target-to-host */ -typedef PREPACK struct { - u16 MessageID; /* ID */ - u16 CreditCount; /* number of credits the target can offer */ - u16 CreditSize; /* size of each credit */ - u8 MaxEndpoints; /* maximum number of endpoints the target has resources for */ - u8 _Pad1; -} POSTPACK HTC_READY_MSG; - - /* extended HTC ready message */ -typedef PREPACK struct { - HTC_READY_MSG Version2_0_Info; /* legacy version 2.0 information at the front... */ - /* extended information */ - u8 HTCVersion; - u8 MaxMsgsPerHTCBundle; -} POSTPACK HTC_READY_EX_MSG; - -#define HTC_VERSION_2P0 0x00 -#define HTC_VERSION_2P1 0x01 /* HTC 2.1 */ - -#define HTC_SERVICE_META_DATA_MAX_LENGTH 128 - -/* connect service - * direction : host-to-target */ -typedef PREPACK struct { - u16 MessageID; - u16 ServiceID; /* service ID of the service to connect to */ - u16 ConnectionFlags; /* connection flags */ - -#define HTC_CONNECT_FLAGS_REDUCE_CREDIT_DRIBBLE (1 << 2) /* reduce credit dribbling when - the host needs credits */ -#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK (0x3) -#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_FOURTH 0x0 -#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_HALF 0x1 -#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_THREE_FOURTHS 0x2 -#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_UNITY 0x3 - - u8 ServiceMetaLength; /* length of meta data that follows */ - u8 _Pad1; - - /* service-specific meta data starts after the header */ - -} POSTPACK HTC_CONNECT_SERVICE_MSG; - -/* connect response - * direction : target-to-host */ -typedef PREPACK struct { - u16 MessageID; - u16 ServiceID; /* service ID that the connection request was made */ - u8 Status; /* service connection status */ - u8 EndpointID; /* assigned endpoint ID */ - u16 MaxMsgSize; /* maximum expected message size on this endpoint */ - u8 ServiceMetaLength; /* length of meta data that follows */ - u8 _Pad1; - - /* service-specific meta data starts after the header */ - -} POSTPACK HTC_CONNECT_SERVICE_RESPONSE_MSG; - -typedef PREPACK struct { - u16 MessageID; - /* currently, no other fields */ -} POSTPACK HTC_SETUP_COMPLETE_MSG; - - /* extended setup completion message */ -typedef PREPACK struct { - u16 MessageID; - u32 SetupFlags; - u8 MaxMsgsPerBundledRecv; - u8 Rsvd[3]; -} POSTPACK HTC_SETUP_COMPLETE_EX_MSG; - -#define HTC_SETUP_COMPLETE_FLAGS_ENABLE_BUNDLE_RECV (1 << 0) - -/* connect response status codes */ -#define HTC_SERVICE_SUCCESS 0 /* success */ -#define HTC_SERVICE_NOT_FOUND 1 /* service could not be found */ -#define HTC_SERVICE_FAILED 2 /* specific service failed the connect */ -#define HTC_SERVICE_NO_RESOURCES 3 /* no resources (i.e. no more endpoints) */ -#define HTC_SERVICE_NO_MORE_EP 4 /* specific service is not allowing any more - endpoints */ - -/* report record IDs */ - -#define HTC_RECORD_NULL 0 -#define HTC_RECORD_CREDITS 1 -#define HTC_RECORD_LOOKAHEAD 2 -#define HTC_RECORD_LOOKAHEAD_BUNDLE 3 - -typedef PREPACK struct { - u8 RecordID; /* Record ID */ - u8 Length; /* Length of record */ -} POSTPACK HTC_RECORD_HDR; - -typedef PREPACK struct { - u8 EndpointID; /* Endpoint that owns these credits */ - u8 Credits; /* credits to report since last report */ -} POSTPACK HTC_CREDIT_REPORT; - -typedef PREPACK struct { - u8 PreValid; /* pre valid guard */ - u8 LookAhead[4]; /* 4 byte lookahead */ - u8 PostValid; /* post valid guard */ - - /* NOTE: the LookAhead array is guarded by a PreValid and Post Valid guard bytes. - * The PreValid bytes must equal the inverse of the PostValid byte */ - -} POSTPACK HTC_LOOKAHEAD_REPORT; - -typedef PREPACK struct { - u8 LookAhead[4]; /* 4 byte lookahead */ -} POSTPACK HTC_BUNDLED_LOOKAHEAD_REPORT; - -#endif /* __HTC_H__ */ - diff --git a/drivers/staging/ath6kl/include/common/htc_services.h b/drivers/staging/ath6kl/include/common/htc_services.h deleted file mode 100644 index fb22268a8d84..000000000000 --- a/drivers/staging/ath6kl/include/common/htc_services.h +++ /dev/null @@ -1,52 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="htc_services.h" company="Atheros"> -// Copyright (c) 2007 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef __HTC_SERVICES_H__ -#define __HTC_SERVICES_H__ - -/* Current service IDs */ - -typedef enum { - RSVD_SERVICE_GROUP = 0, - WMI_SERVICE_GROUP = 1, - - HTC_TEST_GROUP = 254, - HTC_SERVICE_GROUP_LAST = 255 -}HTC_SERVICE_GROUP_IDS; - -#define MAKE_SERVICE_ID(group,index) \ - (int)(((int)group << 8) | (int)(index)) - -/* NOTE: service ID of 0x0000 is reserved and should never be used */ -#define HTC_CTRL_RSVD_SVC MAKE_SERVICE_ID(RSVD_SERVICE_GROUP,1) -#define WMI_CONTROL_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,0) -#define WMI_DATA_BE_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,1) -#define WMI_DATA_BK_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,2) -#define WMI_DATA_VI_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,3) -#define WMI_DATA_VO_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,4) -#define WMI_MAX_SERVICES 5 - -/* raw stream service (i.e. flash, tcmd, calibration apps) */ -#define HTC_RAW_STREAMS_SVC MAKE_SERVICE_ID(HTC_TEST_GROUP,0) - -#endif /*HTC_SERVICES_H_*/ diff --git a/drivers/staging/ath6kl/include/common/pkt_log.h b/drivers/staging/ath6kl/include/common/pkt_log.h deleted file mode 100644 index a3719adf54ca..000000000000 --- a/drivers/staging/ath6kl/include/common/pkt_log.h +++ /dev/null @@ -1,45 +0,0 @@ -//------------------------------------------------------------------------------ -// Copyright (c) 2005-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef __PKT_LOG_H__ -#define __PKT_LOG_H__ - -#ifdef __cplusplus -extern "C" { -#endif - - -/* Pkt log info */ -typedef PREPACK struct pkt_log_t { - struct info_t { - u16 st; - u16 end; - u16 cur; - }info[4096]; - u16 last_idx; -}POSTPACK PACKET_LOG; - - -#ifdef __cplusplus -} -#endif -#endif /* __PKT_LOG_H__ */ diff --git a/drivers/staging/ath6kl/include/common/roaming.h b/drivers/staging/ath6kl/include/common/roaming.h deleted file mode 100644 index 8019850a0571..000000000000 --- a/drivers/staging/ath6kl/include/common/roaming.h +++ /dev/null @@ -1,41 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="roaming.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef _ROAMING_H_ -#define _ROAMING_H_ - -/* - * The signal quality could be in terms of either snr or rssi. We should - * have an enum for both of them. For the time being, we are going to move - * it to wmi.h that is shared by both host and the target, since we are - * repartitioning the code to the host - */ -#define SIGNAL_QUALITY_NOISE_FLOOR -96 -#define SIGNAL_QUALITY_METRICS_NUM_MAX 2 -typedef enum { - SIGNAL_QUALITY_METRICS_SNR = 0, - SIGNAL_QUALITY_METRICS_RSSI, - SIGNAL_QUALITY_METRICS_ALL, -} SIGNAL_QUALITY_METRICS_TYPE; - -#endif /* _ROAMING_H_ */ diff --git a/drivers/staging/ath6kl/include/common/targaddrs.h b/drivers/staging/ath6kl/include/common/targaddrs.h deleted file mode 100644 index c866cefbd8fd..000000000000 --- a/drivers/staging/ath6kl/include/common/targaddrs.h +++ /dev/null @@ -1,395 +0,0 @@ -//------------------------------------------------------------------------------ -// Copyright (c) 2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// -// Author(s): ="Atheros" -//------------------------------------------------------------------------------ - -#ifndef __TARGADDRS_H__ -#define __TARGADDRS_H__ - -#if defined(AR6002) -#include "AR6002/addrs.h" -#endif - -/* - * AR6K option bits, to enable/disable various features. - * By default, all option bits are 0. - * These bits can be set in LOCAL_SCRATCH register 0. - */ -#define AR6K_OPTION_BMI_DISABLE 0x01 /* Disable BMI comm with Host */ -#define AR6K_OPTION_SERIAL_ENABLE 0x02 /* Enable serial port msgs */ -#define AR6K_OPTION_WDT_DISABLE 0x04 /* WatchDog Timer override */ -#define AR6K_OPTION_SLEEP_DISABLE 0x08 /* Disable system sleep */ -#define AR6K_OPTION_STOP_BOOT 0x10 /* Stop boot processes (for ATE) */ -#define AR6K_OPTION_ENABLE_NOANI 0x20 /* Operate without ANI */ -#define AR6K_OPTION_DSET_DISABLE 0x40 /* Ignore DataSets */ -#define AR6K_OPTION_IGNORE_FLASH 0x80 /* Ignore flash during bootup */ - -/* - * xxx_HOST_INTEREST_ADDRESS is the address in Target RAM of the - * host_interest structure. It must match the address of the _host_interest - * symbol (see linker script). - * - * Host Interest is shared between Host and Target in order to coordinate - * between the two, and is intended to remain constant (with additions only - * at the end) across software releases. - * - * All addresses are available here so that it's possible to - * write a single binary that works with all Target Types. - * May be used in assembler code as well as C. - */ -#define AR6002_HOST_INTEREST_ADDRESS 0x00500400 -#define AR6003_HOST_INTEREST_ADDRESS 0x00540600 - - -#define HOST_INTEREST_MAX_SIZE 0x100 - -#if !defined(__ASSEMBLER__) -struct register_dump_s; -struct dbglog_hdr_s; - -/* - * These are items that the Host may need to access - * via BMI or via the Diagnostic Window. The position - * of items in this structure must remain constant - * across firmware revisions! - * - * Types for each item must be fixed size across - * target and host platforms. - * - * More items may be added at the end. - */ -PREPACK struct host_interest_s { - /* - * Pointer to application-defined area, if any. - * Set by Target application during startup. - */ - u32 hi_app_host_interest; /* 0x00 */ - - /* Pointer to register dump area, valid after Target crash. */ - u32 hi_failure_state; /* 0x04 */ - - /* Pointer to debug logging header */ - u32 hi_dbglog_hdr; /* 0x08 */ - - u32 hi_unused1; /* 0x0c */ - - /* - * General-purpose flag bits, similar to AR6000_OPTION_* flags. - * Can be used by application rather than by OS. - */ - u32 hi_option_flag; /* 0x10 */ - - /* - * Boolean that determines whether or not to - * display messages on the serial port. - */ - u32 hi_serial_enable; /* 0x14 */ - - /* Start address of DataSet index, if any */ - u32 hi_dset_list_head; /* 0x18 */ - - /* Override Target application start address */ - u32 hi_app_start; /* 0x1c */ - - /* Clock and voltage tuning */ - u32 hi_skip_clock_init; /* 0x20 */ - u32 hi_core_clock_setting; /* 0x24 */ - u32 hi_cpu_clock_setting; /* 0x28 */ - u32 hi_system_sleep_setting; /* 0x2c */ - u32 hi_xtal_control_setting; /* 0x30 */ - u32 hi_pll_ctrl_setting_24ghz; /* 0x34 */ - u32 hi_pll_ctrl_setting_5ghz; /* 0x38 */ - u32 hi_ref_voltage_trim_setting; /* 0x3c */ - u32 hi_clock_info; /* 0x40 */ - - /* - * Flash configuration overrides, used only - * when firmware is not executing from flash. - * (When using flash, modify the global variables - * with equivalent names.) - */ - u32 hi_bank0_addr_value; /* 0x44 */ - u32 hi_bank0_read_value; /* 0x48 */ - u32 hi_bank0_write_value; /* 0x4c */ - u32 hi_bank0_config_value; /* 0x50 */ - - /* Pointer to Board Data */ - u32 hi_board_data; /* 0x54 */ - u32 hi_board_data_initialized; /* 0x58 */ - - u32 hi_dset_RAM_index_table; /* 0x5c */ - - u32 hi_desired_baud_rate; /* 0x60 */ - u32 hi_dbglog_config; /* 0x64 */ - u32 hi_end_RAM_reserve_sz; /* 0x68 */ - u32 hi_mbox_io_block_sz; /* 0x6c */ - - u32 hi_num_bpatch_streams; /* 0x70 -- unused */ - u32 hi_mbox_isr_yield_limit; /* 0x74 */ - - u32 hi_refclk_hz; /* 0x78 */ - u32 hi_ext_clk_detected; /* 0x7c */ - u32 hi_dbg_uart_txpin; /* 0x80 */ - u32 hi_dbg_uart_rxpin; /* 0x84 */ - u32 hi_hci_uart_baud; /* 0x88 */ - u32 hi_hci_uart_pin_assignments; /* 0x8C */ - /* NOTE: byte [0] = tx pin, [1] = rx pin, [2] = rts pin, [3] = cts pin */ - u32 hi_hci_uart_baud_scale_val; /* 0x90 */ - u32 hi_hci_uart_baud_step_val; /* 0x94 */ - - u32 hi_allocram_start; /* 0x98 */ - u32 hi_allocram_sz; /* 0x9c */ - u32 hi_hci_bridge_flags; /* 0xa0 */ - u32 hi_hci_uart_support_pins; /* 0xa4 */ - /* NOTE: byte [0] = RESET pin (bit 7 is polarity), bytes[1]..bytes[3] are for future use */ - u32 hi_hci_uart_pwr_mgmt_params; /* 0xa8 */ - /* - * 0xa8 - [1]: 0 = UART FC active low, 1 = UART FC active high - * [31:16]: wakeup timeout in ms - */ - - /* Pointer to extended board data */ - u32 hi_board_ext_data; /* 0xac */ - u32 hi_board_ext_data_config; /* 0xb0 */ - - /* - * Bit [0] : valid - * Bit[31:16: size - */ - /* - * hi_reset_flag is used to do some stuff when target reset. - * such as restore app_start after warm reset or - * preserve host Interest area, or preserve ROM data, literals etc. - */ - u32 hi_reset_flag; /* 0xb4 */ - /* indicate hi_reset_flag is valid */ - u32 hi_reset_flag_valid; /* 0xb8 */ - u32 hi_hci_uart_pwr_mgmt_params_ext; /* 0xbc */ - /* - * 0xbc - [31:0]: idle timeout in ms - */ - /* ACS flags */ - u32 hi_acs_flags; /* 0xc0 */ - u32 hi_console_flags; /* 0xc4 */ - u32 hi_nvram_state; /* 0xc8 */ - u32 hi_option_flag2; /* 0xcc */ - - /* If non-zero, override values sent to Host in WMI_READY event. */ - u32 hi_sw_version_override; /* 0xd0 */ - u32 hi_abi_version_override; /* 0xd4 */ - - /* - * Percentage of high priority RX traffic to total expected RX traffic - - * applicable only to ar6004 - */ - u32 hi_hp_rx_traffic_ratio; /* 0xd8 */ - - /* test applications flags */ - u32 hi_test_apps_related ; /* 0xdc */ - /* location of test script */ - u32 hi_ota_testscript; /* 0xe0 */ - /* location of CAL data */ - u32 hi_cal_data; /* 0xe4 */ - /* Number of packet log buffers */ - u32 hi_pktlog_num_buffers; /* 0xe8 */ - -} POSTPACK; - -/* Bits defined in hi_option_flag */ -#define HI_OPTION_TIMER_WAR 0x01 /* Enable timer workaround */ -#define HI_OPTION_BMI_CRED_LIMIT 0x02 /* Limit BMI command credits */ -#define HI_OPTION_RELAY_DOT11_HDR 0x04 /* Relay Dot11 hdr to/from host */ -/* MAC addr method 0-locally administred 1-globally unique addrs */ -#define HI_OPTION_MAC_ADDR_METHOD 0x08 -#define HI_OPTION_FW_BRIDGE 0x10 /* Firmware Bridging */ -#define HI_OPTION_ENABLE_PROFILE 0x20 /* Enable CPU profiling */ -#define HI_OPTION_DISABLE_DBGLOG 0x40 /* Disable debug logging */ -#define HI_OPTION_SKIP_ERA_TRACKING 0x80 /* Skip Era Tracking */ -#define HI_OPTION_PAPRD_DISABLE 0x100 /* Disable PAPRD (debug) */ -#define HI_OPTION_NUM_DEV_LSB 0x200 -#define HI_OPTION_NUM_DEV_MSB 0x800 -#define HI_OPTION_DEV_MODE_LSB 0x1000 -#define HI_OPTION_DEV_MODE_MSB 0x8000000 -/* Disable LowFreq Timer Stabilization */ -#define HI_OPTION_NO_LFT_STBL 0x10000000 -#define HI_OPTION_SKIP_REG_SCAN 0x20000000 /* Skip regulatory scan */ -/* Do regulatory scan during init beforesending WMI ready event to host */ -#define HI_OPTION_INIT_REG_SCAN 0x40000000 -#define HI_OPTION_SKIP_MEMMAP 0x80000000 /* REV6: Do not adjust memory - map */ - -/* hi_option_flag2 options */ -#define HI_OPTION_OFFLOAD_AMSDU 0x01 -#define HI_OPTION_DFS_SUPPORT 0x02 /* Enable DFS support */ - -#define HI_OPTION_MAC_ADDR_METHOD_SHIFT 3 - -/* 2 bits of hi_option_flag are used to represent 3 modes */ -#define HI_OPTION_FW_MODE_IBSS 0x0 /* IBSS Mode */ -#define HI_OPTION_FW_MODE_BSS_STA 0x1 /* STA Mode */ -#define HI_OPTION_FW_MODE_AP 0x2 /* AP Mode */ - -/* 2 bits of hi_option flag are usedto represent 4 submodes */ -#define HI_OPTION_FW_SUBMODE_NONE 0x0 /* Normal mode */ -#define HI_OPTION_FW_SUBMODE_P2PDEV 0x1 /* p2p device mode */ -#define HI_OPTION_FW_SUBMODE_P2PCLIENT 0x2 /* p2p client mode */ -#define HI_OPTION_FW_SUBMODE_P2PGO 0x3 /* p2p go mode */ - -/* Num dev Mask */ -#define HI_OPTION_NUM_DEV_MASK 0x7 -#define HI_OPTION_NUM_DEV_SHIFT 0x9 - -/* firmware bridging */ -#define HI_OPTION_FW_BRIDGE_SHIFT 0x04 - -/* Fw Mode/SubMode Mask -|------------------------------------------------------------------------------| -| SUB | SUB | SUB | SUB | | | | -| MODE[3] | MODE[2] | MODE[1] | MODE[0] | MODE[3] | MODE[2] | MODE[1] | MODE[0| -| (2) | (2) | (2) | (2) | (2) | (2) | (2) | (2) -|------------------------------------------------------------------------------| -*/ -#define HI_OPTION_FW_MODE_BITS 0x2 -#define HI_OPTION_FW_MODE_MASK 0x3 -#define HI_OPTION_FW_MODE_SHIFT 0xC -#define HI_OPTION_ALL_FW_MODE_MASK 0xFF - -#define HI_OPTION_FW_SUBMODE_BITS 0x2 -#define HI_OPTION_FW_SUBMODE_MASK 0x3 -#define HI_OPTION_FW_SUBMODE_SHIFT 0x14 -#define HI_OPTION_ALL_FW_SUBMODE_MASK 0xFF00 -#define HI_OPTION_ALL_FW_SUBMODE_SHIFT 0x8 - -/* hi_reset_flag */ - -/* preserve App Start address */ -#define HI_RESET_FLAG_PRESERVE_APP_START 0x01 -/* preserve host interest */ -#define HI_RESET_FLAG_PRESERVE_HOST_INTEREST 0x02 -#define HI_RESET_FLAG_PRESERVE_ROMDATA 0x04 /* preserve ROM data */ -#define HI_RESET_FLAG_PRESERVE_NVRAM_STATE 0x08 -#define HI_RESET_FLAG_PRESERVE_BOOT_INFO 0x10 - -#define HI_RESET_FLAG_IS_VALID 0x12345678 /* indicate the reset flag is -valid */ - -#define ON_RESET_FLAGS_VALID() \ - (HOST_INTEREST->hi_reset_flag_valid == HI_RESET_FLAG_IS_VALID) - -#define RESET_FLAGS_VALIDATE() \ - (HOST_INTEREST->hi_reset_flag_valid = HI_RESET_FLAG_IS_VALID) - -#define RESET_FLAGS_INVALIDATE() \ - (HOST_INTEREST->hi_reset_flag_valid = 0) - -#define ON_RESET_PRESERVE_APP_START() \ - (HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_APP_START) - -#define ON_RESET_PRESERVE_NVRAM_STATE() \ - (HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_NVRAM_STATE) - -#define ON_RESET_PRESERVE_HOST_INTEREST() \ - (HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_HOST_INTEREST) - -#define ON_RESET_PRESERVE_ROMDATA() \ - (HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_ROMDATA) - -#define ON_RESET_PRESERVE_BOOT_INFO() \ - (HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_BOOT_INFO) - -#define HI_ACS_FLAGS_ENABLED (1 << 0) /* ACS is enabled */ -#define HI_ACS_FLAGS_USE_WWAN (1 << 1) /* Use physical WWAN device */ -#define HI_ACS_FLAGS_TEST_VAP (1 << 2) /* Use test VAP */ - -/* CONSOLE FLAGS - * - * Bit Range Meaning - * --------- -------------------------------- - * 2..0 UART ID (0 = Default) - * 3 Baud Select (0 = 9600, 1 = 115200) - * 30..4 Reserved - * 31 Enable Console - * - */ - -#define HI_CONSOLE_FLAGS_ENABLE (1 << 31) -#define HI_CONSOLE_FLAGS_UART_MASK (0x7) -#define HI_CONSOLE_FLAGS_UART_SHIFT 0 -#define HI_CONSOLE_FLAGS_BAUD_SELECT (1 << 3) - -/* - * Intended for use by Host software, this macro returns the Target RAM - * address of any item in the host_interest structure. - * Example: target_addr = AR6002_HOST_INTEREST_ITEM_ADDRESS(hi_board_data); - */ -#define AR6002_HOST_INTEREST_ITEM_ADDRESS(item) \ - (u32)((unsigned long)&((((struct host_interest_s *)(AR6002_HOST_INTEREST_ADDRESS))->item))) - -#define AR6003_HOST_INTEREST_ITEM_ADDRESS(item) \ - (u32)((unsigned long)&((((struct host_interest_s *)(AR6003_HOST_INTEREST_ADDRESS))->item))) - -#define AR6004_HOST_INTEREST_ITEM_ADDRESS(item) \ - ((u32)&((((struct host_interest_s *)(AR6004_HOST_INTEREST_ADDRESS))->item))) - - -#define HOST_INTEREST_DBGLOG_IS_ENABLED() \ - (!(HOST_INTEREST->hi_option_flag & HI_OPTION_DISABLE_DBGLOG)) - -#define HOST_INTEREST_PKTLOG_IS_ENABLED() \ - ((HOST_INTEREST->hi_pktlog_num_buffers)) - - -#define HOST_INTEREST_PROFILE_IS_ENABLED() \ - (HOST_INTEREST->hi_option_flag & HI_OPTION_ENABLE_PROFILE) - -#define LF_TIMER_STABILIZATION_IS_ENABLED() \ - (!(HOST_INTEREST->hi_option_flag & HI_OPTION_NO_LFT_STBL)) - -#define IS_AMSDU_OFFLAOD_ENABLED() \ - ((HOST_INTEREST->hi_option_flag2 & HI_OPTION_OFFLOAD_AMSDU)) - -#define HOST_INTEREST_DFS_IS_ENABLED() \ - ((HOST_INTEREST->hi_option_flag2 & HI_OPTION_DFS_SUPPORT)) - -/* Convert a Target virtual address into a Target physical address */ -#define AR6002_VTOP(vaddr) ((vaddr) & 0x001fffff) -#define AR6003_VTOP(vaddr) ((vaddr) & 0x001fffff) -#define TARG_VTOP(TargetType, vaddr) \ - (((TargetType) == TARGET_TYPE_AR6002) ? AR6002_VTOP(vaddr) : AR6003_VTOP(vaddr)) - -#define AR6003_REV2_APP_START_OVERRIDE 0x944C00 -#define AR6003_REV2_APP_LOAD_ADDRESS 0x543180 -#define AR6003_REV2_BOARD_EXT_DATA_ADDRESS 0x57E500 -#define AR6003_REV2_DATASET_PATCH_ADDRESS 0x57e884 -#define AR6003_REV2_RAM_RESERVE_SIZE 6912 - -#define AR6003_REV3_APP_START_OVERRIDE 0x945d00 -#define AR6003_REV3_APP_LOAD_ADDRESS 0x545000 -#define AR6003_REV3_BOARD_EXT_DATA_ADDRESS 0x542330 -#define AR6003_REV3_DATASET_PATCH_ADDRESS 0x57FF74 -#define AR6003_REV3_RAM_RESERVE_SIZE 512 - -#define AR6003_BOARD_EXT_DATA_ADDRESS 0x57E600 - -/* # of u32 entries in targregs, used by DIAG_FETCH_TARG_REGS */ -#define AR6003_FETCH_TARG_REGS_COUNT 64 - -#endif /* !__ASSEMBLER__ */ - -#endif /* __TARGADDRS_H__ */ diff --git a/drivers/staging/ath6kl/include/common/testcmd.h b/drivers/staging/ath6kl/include/common/testcmd.h deleted file mode 100644 index 7d94aee508b3..000000000000 --- a/drivers/staging/ath6kl/include/common/testcmd.h +++ /dev/null @@ -1,185 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="testcmd.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef TESTCMD_H_ -#define TESTCMD_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef AR6002_REV2 -#define TCMD_MAX_RATES 12 -#else -#define TCMD_MAX_RATES 28 -#endif - -typedef enum { - ZEROES_PATTERN = 0, - ONES_PATTERN, - REPEATING_10, - PN7_PATTERN, - PN9_PATTERN, - PN15_PATTERN -}TX_DATA_PATTERN; - -/* Continuous tx - mode : TCMD_CONT_TX_OFF - Disabling continuous tx - TCMD_CONT_TX_SINE - Enable continuous unmodulated tx - TCMD_CONT_TX_FRAME- Enable continuous modulated tx - freq : Channel freq in Mhz. (e.g 2412 for channel 1 in 11 g) -dataRate: 0 - 1 Mbps - 1 - 2 Mbps - 2 - 5.5 Mbps - 3 - 11 Mbps - 4 - 6 Mbps - 5 - 9 Mbps - 6 - 12 Mbps - 7 - 18 Mbps - 8 - 24 Mbps - 9 - 36 Mbps - 10 - 28 Mbps - 11 - 54 Mbps - txPwr: Tx power in dBm[5 -11] for unmod Tx, [5-14] for mod Tx -antenna: 1 - one antenna - 2 - two antenna -Note : Enable/disable continuous tx test cmd works only when target is awake. -*/ - -typedef enum { - TCMD_CONT_TX_OFF = 0, - TCMD_CONT_TX_SINE, - TCMD_CONT_TX_FRAME, - TCMD_CONT_TX_TX99, - TCMD_CONT_TX_TX100 -} TCMD_CONT_TX_MODE; - -typedef enum { - TCMD_WLAN_MODE_NOHT = 0, - TCMD_WLAN_MODE_HT20 = 1, - TCMD_WLAN_MODE_HT40PLUS = 2, - TCMD_WLAN_MODE_HT40MINUS = 3, -} TCMD_WLAN_MODE; - -typedef PREPACK struct { - u32 testCmdId; - u32 mode; - u32 freq; - u32 dataRate; - s32 txPwr; - u32 antenna; - u32 enANI; - u32 scramblerOff; - u32 aifsn; - u16 pktSz; - u16 txPattern; - u32 shortGuard; - u32 numPackets; - u32 wlanMode; -} POSTPACK TCMD_CONT_TX; - -#define TCMD_TXPATTERN_ZERONE 0x1 -#define TCMD_TXPATTERN_ZERONE_DIS_SCRAMBLE 0x2 - -/* Continuous Rx - act: TCMD_CONT_RX_PROMIS - promiscuous mode (accept all incoming frames) - TCMD_CONT_RX_FILTER - filter mode (accept only frames with dest - address equal specified - mac address (set via act =3) - TCMD_CONT_RX_REPORT off mode (disable cont rx mode and get the - report from the last cont - Rx test) - - TCMD_CONT_RX_SETMAC - set MacAddr mode (sets the MAC address for the - target. This Overrides - the default MAC address.) - -*/ -typedef enum { - TCMD_CONT_RX_PROMIS =0, - TCMD_CONT_RX_FILTER, - TCMD_CONT_RX_REPORT, - TCMD_CONT_RX_SETMAC, - TCMD_CONT_RX_SET_ANT_SWITCH_TABLE -} TCMD_CONT_RX_ACT; - -typedef PREPACK struct { - u32 testCmdId; - u32 act; - u32 enANI; - PREPACK union { - struct PREPACK TCMD_CONT_RX_PARA { - u32 freq; - u32 antenna; - u32 wlanMode; - } POSTPACK para; - struct PREPACK TCMD_CONT_RX_REPORT { - u32 totalPkt; - s32 rssiInDBm; - u32 crcErrPkt; - u32 secErrPkt; - u16 rateCnt[TCMD_MAX_RATES]; - u16 rateCntShortGuard[TCMD_MAX_RATES]; - } POSTPACK report; - struct PREPACK TCMD_CONT_RX_MAC { - u8 addr[ATH_MAC_LEN]; - } POSTPACK mac; - struct PREPACK TCMD_CONT_RX_ANT_SWITCH_TABLE { - u32 antswitch1; - u32 antswitch2; - }POSTPACK antswitchtable; - } POSTPACK u; -} POSTPACK TCMD_CONT_RX; - -/* Force sleep/wake test cmd - mode: TCMD_PM_WAKEUP - Wakeup the target - TCMD_PM_SLEEP - Force the target to sleep. - */ -typedef enum { - TCMD_PM_WAKEUP = 1, /* be consistent with target */ - TCMD_PM_SLEEP, - TCMD_PM_DEEPSLEEP -} TCMD_PM_MODE; - -typedef PREPACK struct { - u32 testCmdId; - u32 mode; -} POSTPACK TCMD_PM; - -typedef enum { - TCMD_CONT_TX_ID, - TCMD_CONT_RX_ID, - TCMD_PM_ID -} TCMD_ID; - -typedef PREPACK union { - TCMD_CONT_TX contTx; - TCMD_CONT_RX contRx; - TCMD_PM pm; -} POSTPACK TEST_CMD; - -#ifdef __cplusplus -} -#endif - -#endif /* TESTCMD_H_ */ diff --git a/drivers/staging/ath6kl/include/common/tlpm.h b/drivers/staging/ath6kl/include/common/tlpm.h deleted file mode 100644 index 659b1c07ba90..000000000000 --- a/drivers/staging/ath6kl/include/common/tlpm.h +++ /dev/null @@ -1,38 +0,0 @@ -//------------------------------------------------------------------------------ -// Copyright (c) 2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -#ifndef __TLPM_H__ -#define __TLPM_H__ - -/* idle timeout in 16-bit value as in HOST_INTEREST hi_hci_uart_pwr_mgmt_params */ -#define TLPM_DEFAULT_IDLE_TIMEOUT_MS 1000 -/* hex in LSB and MSB for HCI command */ -#define TLPM_DEFAULT_IDLE_TIMEOUT_LSB 0xE8 -#define TLPM_DEFAULT_IDLE_TIMEOUT_MSB 0x3 - -/* wakeup timeout in 8-bit value as in HOST_INTEREST hi_hci_uart_pwr_mgmt_params */ -#define TLPM_DEFAULT_WAKEUP_TIMEOUT_MS 10 - -/* default UART FC polarity is low */ -#define TLPM_DEFAULT_UART_FC_POLARITY 0 - -#endif diff --git a/drivers/staging/ath6kl/include/common/wlan_defs.h b/drivers/staging/ath6kl/include/common/wlan_defs.h deleted file mode 100644 index 03e4d23788ce..000000000000 --- a/drivers/staging/ath6kl/include/common/wlan_defs.h +++ /dev/null @@ -1,79 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="wlan_defs.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== -#ifndef __WLAN_DEFS_H__ -#define __WLAN_DEFS_H__ - -/* - * This file contains WLAN definitions that may be used across both - * Host and Target software. - */ - -typedef enum { - MODE_11A = 0, /* 11a Mode */ - MODE_11G = 1, /* 11b/g Mode */ - MODE_11B = 2, /* 11b Mode */ - MODE_11GONLY = 3, /* 11g only Mode */ -#ifdef SUPPORT_11N - MODE_11NA_HT20 = 4, /* 11a HT20 mode */ - MODE_11NG_HT20 = 5, /* 11g HT20 mode */ - MODE_11NA_HT40 = 6, /* 11a HT40 mode */ - MODE_11NG_HT40 = 7, /* 11g HT40 mode */ - MODE_UNKNOWN = 8, - MODE_MAX = 8 -#else - MODE_UNKNOWN = 4, - MODE_MAX = 4 -#endif -} WLAN_PHY_MODE; - -typedef enum { - WLAN_11A_CAPABILITY = 1, - WLAN_11G_CAPABILITY = 2, - WLAN_11AG_CAPABILITY = 3, -}WLAN_CAPABILITY; - -#ifdef SUPPORT_11N -typedef unsigned long A_RATEMASK; -#else -typedef unsigned short A_RATEMASK; -#endif - -#ifdef SUPPORT_11N -#define IS_MODE_11A(mode) (((mode) == MODE_11A) || \ - ((mode) == MODE_11NA_HT20) || \ - ((mode) == MODE_11NA_HT40)) -#define IS_MODE_11B(mode) ((mode) == MODE_11B) -#define IS_MODE_11G(mode) (((mode) == MODE_11G) || \ - ((mode) == MODE_11GONLY) || \ - ((mode) == MODE_11NG_HT20) || \ - ((mode) == MODE_11NG_HT40)) -#define IS_MODE_11GONLY(mode) ((mode) == MODE_11GONLY) -#else -#define IS_MODE_11A(mode) ((mode) == MODE_11A) -#define IS_MODE_11B(mode) ((mode) == MODE_11B) -#define IS_MODE_11G(mode) (((mode) == MODE_11G) || \ - ((mode) == MODE_11GONLY)) -#define IS_MODE_11GONLY(mode) ((mode) == MODE_11GONLY) -#endif /* SUPPORT_11N */ - -#endif /* __WLANDEFS_H__ */ diff --git a/drivers/staging/ath6kl/include/common/wmi.h b/drivers/staging/ath6kl/include/common/wmi.h deleted file mode 100644 index d9687443d32c..000000000000 --- a/drivers/staging/ath6kl/include/common/wmi.h +++ /dev/null @@ -1,3220 +0,0 @@ -//------------------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// -// Author(s): ="Atheros" -//------------------------------------------------------------------------------ - -/* - * This file contains the definitions of the WMI protocol specified in the - * Wireless Module Interface (WMI). It includes definitions of all the - * commands and events. Commands are messages from the host to the WM. - * Events and Replies are messages from the WM to the host. - * - * Ownership of correctness in regards to commands - * belongs to the host driver and the WMI is not required to validate - * parameters for value, proper range, or any other checking. - * - */ - -#ifndef _WMI_H_ -#define _WMI_H_ - -#include "wmix.h" -#include "wlan_defs.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define HTC_PROTOCOL_VERSION 0x0002 -#define HTC_PROTOCOL_REVISION 0x0000 - -#define WMI_PROTOCOL_VERSION 0x0002 -#define WMI_PROTOCOL_REVISION 0x0000 - -#define ATH_MAC_LEN 6 /* length of mac in bytes */ -#define WMI_CMD_MAX_LEN 100 -#define WMI_CONTROL_MSG_MAX_LEN 256 -#define WMI_OPT_CONTROL_MSG_MAX_LEN 1536 -#define IS_ETHERTYPE(_typeOrLen) ((_typeOrLen) >= 0x0600) -#define RFC1042OUI {0x00, 0x00, 0x00} - -#define IP_ETHERTYPE 0x0800 - -#define WMI_IMPLICIT_PSTREAM 0xFF -#define WMI_MAX_THINSTREAM 15 - -#ifdef AR6002_REV2 -#define IBSS_MAX_NUM_STA 4 -#else -#define IBSS_MAX_NUM_STA 8 -#endif - -PREPACK struct host_app_area_s { - u32 wmi_protocol_ver; -} POSTPACK; - -/* - * Data Path - */ -typedef PREPACK struct { - u8 dstMac[ATH_MAC_LEN]; - u8 srcMac[ATH_MAC_LEN]; - u16 typeOrLen; -} POSTPACK ATH_MAC_HDR; - -typedef PREPACK struct { - u8 dsap; - u8 ssap; - u8 cntl; - u8 orgCode[3]; - u16 etherType; -} POSTPACK ATH_LLC_SNAP_HDR; - -typedef enum { - DATA_MSGTYPE = 0x0, - CNTL_MSGTYPE, - SYNC_MSGTYPE, - OPT_MSGTYPE, -} WMI_MSG_TYPE; - - -/* - * Macros for operating on WMI_DATA_HDR (info) field - */ - -#define WMI_DATA_HDR_MSG_TYPE_MASK 0x03 -#define WMI_DATA_HDR_MSG_TYPE_SHIFT 0 -#define WMI_DATA_HDR_UP_MASK 0x07 -#define WMI_DATA_HDR_UP_SHIFT 2 -/* In AP mode, the same bit (b5) is used to indicate Power save state in - * the Rx dir and More data bit state in the tx direction. - */ -#define WMI_DATA_HDR_PS_MASK 0x1 -#define WMI_DATA_HDR_PS_SHIFT 5 - -#define WMI_DATA_HDR_MORE_MASK 0x1 -#define WMI_DATA_HDR_MORE_SHIFT 5 - -typedef enum { - WMI_DATA_HDR_DATA_TYPE_802_3 = 0, - WMI_DATA_HDR_DATA_TYPE_802_11, - WMI_DATA_HDR_DATA_TYPE_ACL, /* used to be used for the PAL */ -} WMI_DATA_HDR_DATA_TYPE; - -#define WMI_DATA_HDR_DATA_TYPE_MASK 0x3 -#define WMI_DATA_HDR_DATA_TYPE_SHIFT 6 - -#define WMI_DATA_HDR_SET_MORE_BIT(h) ((h)->info |= (WMI_DATA_HDR_MORE_MASK << WMI_DATA_HDR_MORE_SHIFT)) - -#define WMI_DATA_HDR_IS_MSG_TYPE(h, t) (((h)->info & (WMI_DATA_HDR_MSG_TYPE_MASK)) == (t)) -#define WMI_DATA_HDR_SET_MSG_TYPE(h, t) (h)->info = (((h)->info & ~(WMI_DATA_HDR_MSG_TYPE_MASK << WMI_DATA_HDR_MSG_TYPE_SHIFT)) | (t << WMI_DATA_HDR_MSG_TYPE_SHIFT)) -#define WMI_DATA_HDR_GET_UP(h) (((h)->info >> WMI_DATA_HDR_UP_SHIFT) & WMI_DATA_HDR_UP_MASK) -#define WMI_DATA_HDR_SET_UP(h, p) (h)->info = (((h)->info & ~(WMI_DATA_HDR_UP_MASK << WMI_DATA_HDR_UP_SHIFT)) | (p << WMI_DATA_HDR_UP_SHIFT)) - -#define WMI_DATA_HDR_GET_DATA_TYPE(h) (((h)->info >> WMI_DATA_HDR_DATA_TYPE_SHIFT) & WMI_DATA_HDR_DATA_TYPE_MASK) -#define WMI_DATA_HDR_SET_DATA_TYPE(h, p) (h)->info = (((h)->info & ~(WMI_DATA_HDR_DATA_TYPE_MASK << WMI_DATA_HDR_DATA_TYPE_SHIFT)) | ((p) << WMI_DATA_HDR_DATA_TYPE_SHIFT)) - -#define WMI_DATA_HDR_GET_DOT11(h) (WMI_DATA_HDR_GET_DATA_TYPE((h)) == WMI_DATA_HDR_DATA_TYPE_802_11) -#define WMI_DATA_HDR_SET_DOT11(h, p) WMI_DATA_HDR_SET_DATA_TYPE((h), (p)) - -/* Macros for operating on WMI_DATA_HDR (info2) field */ -#define WMI_DATA_HDR_SEQNO_MASK 0xFFF -#define WMI_DATA_HDR_SEQNO_SHIFT 0 - -#define WMI_DATA_HDR_AMSDU_MASK 0x1 -#define WMI_DATA_HDR_AMSDU_SHIFT 12 - -#define WMI_DATA_HDR_META_MASK 0x7 -#define WMI_DATA_HDR_META_SHIFT 13 - -#define GET_SEQ_NO(_v) ((_v) & WMI_DATA_HDR_SEQNO_MASK) -#define GET_ISMSDU(_v) ((_v) & WMI_DATA_HDR_AMSDU_MASK) - -#define WMI_DATA_HDR_GET_SEQNO(h) GET_SEQ_NO((h)->info2 >> WMI_DATA_HDR_SEQNO_SHIFT) -#define WMI_DATA_HDR_SET_SEQNO(h, _v) ((h)->info2 = ((h)->info2 & ~(WMI_DATA_HDR_SEQNO_MASK << WMI_DATA_HDR_SEQNO_SHIFT)) | (GET_SEQ_NO(_v) << WMI_DATA_HDR_SEQNO_SHIFT)) - -#define WMI_DATA_HDR_IS_AMSDU(h) GET_ISMSDU((h)->info2 >> WMI_DATA_HDR_AMSDU_SHIFT) -#define WMI_DATA_HDR_SET_AMSDU(h, _v) ((h)->info2 = ((h)->info2 & ~(WMI_DATA_HDR_AMSDU_MASK << WMI_DATA_HDR_AMSDU_SHIFT)) | (GET_ISMSDU(_v) << WMI_DATA_HDR_AMSDU_SHIFT)) - -#define WMI_DATA_HDR_GET_META(h) (((h)->info2 >> WMI_DATA_HDR_META_SHIFT) & WMI_DATA_HDR_META_MASK) -#define WMI_DATA_HDR_SET_META(h, _v) ((h)->info2 = ((h)->info2 & ~(WMI_DATA_HDR_META_MASK << WMI_DATA_HDR_META_SHIFT)) | ((_v) << WMI_DATA_HDR_META_SHIFT)) - -/* Macros for operating on WMI_DATA_HDR (info3) field */ -#define WMI_DATA_HDR_DEVID_MASK 0xF -#define WMI_DATA_HDR_DEVID_SHIFT 0 -#define GET_DEVID(_v) ((_v) & WMI_DATA_HDR_DEVID_MASK) - -#define WMI_DATA_HDR_GET_DEVID(h) \ - (((h)->info3 >> WMI_DATA_HDR_DEVID_SHIFT) & WMI_DATA_HDR_DEVID_MASK) -#define WMI_DATA_HDR_SET_DEVID(h, _v) \ - ((h)->info3 = ((h)->info3 & ~(WMI_DATA_HDR_DEVID_MASK << WMI_DATA_HDR_DEVID_SHIFT)) | (GET_DEVID(_v) << WMI_DATA_HDR_DEVID_SHIFT)) - -typedef PREPACK struct { - s8 rssi; - u8 info; /* usage of 'info' field(8-bit): - * b1:b0 - WMI_MSG_TYPE - * b4:b3:b2 - UP(tid) - * b5 - Used in AP mode. More-data in tx dir, PS in rx. - * b7:b6 - Dot3 header(0), - * Dot11 Header(1), - * ACL data(2) - */ - - u16 info2; /* usage of 'info2' field(16-bit): - * b11:b0 - seq_no - * b12 - A-MSDU? - * b15:b13 - META_DATA_VERSION 0 - 7 - */ - u16 info3; -} POSTPACK WMI_DATA_HDR; - -/* - * TX META VERSION DEFINITIONS - */ -#define WMI_MAX_TX_META_SZ (12) -#define WMI_MAX_TX_META_VERSION (7) -#define WMI_META_VERSION_1 (0x01) -#define WMI_META_VERSION_2 (0X02) - -#define WMI_ACL_TO_DOT11_HEADROOM 36 - -#if 0 /* removed to prevent compile errors for WM.. */ -typedef PREPACK struct { -/* intentionally empty. Default version is no meta data. */ -} POSTPACK WMI_TX_META_V0; -#endif - -typedef PREPACK struct { - u8 pktID; /* The packet ID to identify the tx request */ - u8 ratePolicyID; /* The rate policy to be used for the tx of this frame */ -} POSTPACK WMI_TX_META_V1; - - -#define WMI_CSUM_DIR_TX (0x1) -#define TX_CSUM_CALC_FILL (0x1) -typedef PREPACK struct { - u8 csumStart; /*Offset from start of the WMI header for csum calculation to begin */ - u8 csumDest; /*Offset from start of WMI header where final csum goes*/ - u8 csumFlags; /*number of bytes over which csum is calculated*/ -} POSTPACK WMI_TX_META_V2; - - -/* - * RX META VERSION DEFINITIONS - */ -/* if RX meta data is present at all then the meta data field - * will consume WMI_MAX_RX_META_SZ bytes of space between the - * WMI_DATA_HDR and the payload. How much of the available - * Meta data is actually used depends on which meta data - * version is active. */ -#define WMI_MAX_RX_META_SZ (12) -#define WMI_MAX_RX_META_VERSION (7) - -#define WMI_RX_STATUS_OK 0 /* success */ -#define WMI_RX_STATUS_DECRYPT_ERR 1 /* decrypt error */ -#define WMI_RX_STATUS_MIC_ERR 2 /* tkip MIC error */ -#define WMI_RX_STATUS_ERR 3 /* undefined error */ - -#define WMI_RX_FLAGS_AGGR 0x0001 /* part of AGGR */ -#define WMI_RX_FlAGS_STBC 0x0002 /* used STBC */ -#define WMI_RX_FLAGS_SGI 0x0004 /* used SGI */ -#define WMI_RX_FLAGS_HT 0x0008 /* is HT packet */ -/* the flags field is also used to store the CRYPTO_TYPE of the frame - * that value is shifted by WMI_RX_FLAGS_CRYPTO_SHIFT */ -#define WMI_RX_FLAGS_CRYPTO_SHIFT 4 -#define WMI_RX_FLAGS_CRYPTO_MASK 0x1f -#define WMI_RX_META_GET_CRYPTO(flags) (((flags) >> WMI_RX_FLAGS_CRYPTO_SHIFT) & WMI_RX_FLAGS_CRYPTO_MASK) - -#if 0 /* removed to prevent compile errors for WM.. */ -typedef PREPACK struct { -/* intentionally empty. Default version is no meta data. */ -} POSTPACK WMI_RX_META_VERSION_0; -#endif - -typedef PREPACK struct { - u8 status; /* one of WMI_RX_STATUS_... */ - u8 rix; /* rate index mapped to rate at which this packet was received. */ - u8 rssi; /* rssi of packet */ - u8 channel;/* rf channel during packet reception */ - u16 flags; /* a combination of WMI_RX_FLAGS_... */ -} POSTPACK WMI_RX_META_V1; - -#define RX_CSUM_VALID_FLAG (0x1) -typedef PREPACK struct { - u16 csum; - u8 csumFlags;/* bit 0 set -partial csum valid - bit 1 set -test mode */ -} POSTPACK WMI_RX_META_V2; - - - -#define WMI_GET_DEVICE_ID(info1) ((info1) & 0xF) -/* Macros for operating on WMI_CMD_HDR (info1) field */ -#define WMI_CMD_HDR_DEVID_MASK 0xF -#define WMI_CMD_HDR_DEVID_SHIFT 0 -#define GET_CMD_DEVID(_v) ((_v) & WMI_CMD_HDR_DEVID_MASK) - -#define WMI_CMD_HDR_GET_DEVID(h) \ - (((h)->info1 >> WMI_CMD_HDR_DEVID_SHIFT) & WMI_CMD_HDR_DEVID_MASK) -#define WMI_CMD_HDR_SET_DEVID(h, _v) \ - ((h)->info1 = ((h)->info1 & \ - ~(WMI_CMD_HDR_DEVID_MASK << WMI_CMD_HDR_DEVID_SHIFT)) | \ - (GET_CMD_DEVID(_v) << WMI_CMD_HDR_DEVID_SHIFT)) - -/* - * Control Path - */ -typedef PREPACK struct { - u16 commandId; -/* - * info1 - 16 bits - * b03:b00 - id - * b15:b04 - unused - */ - u16 info1; - - u16 reserved; /* For alignment */ -} POSTPACK WMI_CMD_HDR; /* used for commands and events */ - -/* - * List of Commnands - */ -typedef enum { - WMI_CONNECT_CMDID = 0x0001, - WMI_RECONNECT_CMDID, - WMI_DISCONNECT_CMDID, - WMI_SYNCHRONIZE_CMDID, - WMI_CREATE_PSTREAM_CMDID, - WMI_DELETE_PSTREAM_CMDID, - WMI_START_SCAN_CMDID, - WMI_SET_SCAN_PARAMS_CMDID, - WMI_SET_BSS_FILTER_CMDID, - WMI_SET_PROBED_SSID_CMDID, /* 10 */ - WMI_SET_LISTEN_INT_CMDID, - WMI_SET_BMISS_TIME_CMDID, - WMI_SET_DISC_TIMEOUT_CMDID, - WMI_GET_CHANNEL_LIST_CMDID, - WMI_SET_BEACON_INT_CMDID, - WMI_GET_STATISTICS_CMDID, - WMI_SET_CHANNEL_PARAMS_CMDID, - WMI_SET_POWER_MODE_CMDID, - WMI_SET_IBSS_PM_CAPS_CMDID, - WMI_SET_POWER_PARAMS_CMDID, /* 20 */ - WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID, - WMI_ADD_CIPHER_KEY_CMDID, - WMI_DELETE_CIPHER_KEY_CMDID, - WMI_ADD_KRK_CMDID, - WMI_DELETE_KRK_CMDID, - WMI_SET_PMKID_CMDID, - WMI_SET_TX_PWR_CMDID, - WMI_GET_TX_PWR_CMDID, - WMI_SET_ASSOC_INFO_CMDID, - WMI_ADD_BAD_AP_CMDID, /* 30 */ - WMI_DELETE_BAD_AP_CMDID, - WMI_SET_TKIP_COUNTERMEASURES_CMDID, - WMI_RSSI_THRESHOLD_PARAMS_CMDID, - WMI_TARGET_ERROR_REPORT_BITMASK_CMDID, - WMI_SET_ACCESS_PARAMS_CMDID, - WMI_SET_RETRY_LIMITS_CMDID, - WMI_SET_OPT_MODE_CMDID, - WMI_OPT_TX_FRAME_CMDID, - WMI_SET_VOICE_PKT_SIZE_CMDID, - WMI_SET_MAX_SP_LEN_CMDID, /* 40 */ - WMI_SET_ROAM_CTRL_CMDID, - WMI_GET_ROAM_TBL_CMDID, - WMI_GET_ROAM_DATA_CMDID, - WMI_ENABLE_RM_CMDID, - WMI_SET_MAX_OFFHOME_DURATION_CMDID, - WMI_EXTENSION_CMDID, /* Non-wireless extensions */ - WMI_SNR_THRESHOLD_PARAMS_CMDID, - WMI_LQ_THRESHOLD_PARAMS_CMDID, - WMI_SET_LPREAMBLE_CMDID, - WMI_SET_RTS_CMDID, /* 50 */ - WMI_CLR_RSSI_SNR_CMDID, - WMI_SET_FIXRATES_CMDID, - WMI_GET_FIXRATES_CMDID, - WMI_SET_AUTH_MODE_CMDID, - WMI_SET_REASSOC_MODE_CMDID, - WMI_SET_WMM_CMDID, - WMI_SET_WMM_TXOP_CMDID, - WMI_TEST_CMDID, - /* COEX AR6002 only*/ - WMI_SET_BT_STATUS_CMDID, - WMI_SET_BT_PARAMS_CMDID, /* 60 */ - - WMI_SET_KEEPALIVE_CMDID, - WMI_GET_KEEPALIVE_CMDID, - WMI_SET_APPIE_CMDID, - WMI_GET_APPIE_CMDID, - WMI_SET_WSC_STATUS_CMDID, - - /* Wake on Wireless */ - WMI_SET_HOST_SLEEP_MODE_CMDID, - WMI_SET_WOW_MODE_CMDID, - WMI_GET_WOW_LIST_CMDID, - WMI_ADD_WOW_PATTERN_CMDID, - WMI_DEL_WOW_PATTERN_CMDID, /* 70 */ - - WMI_SET_FRAMERATES_CMDID, - WMI_SET_AP_PS_CMDID, - WMI_SET_QOS_SUPP_CMDID, - /* WMI_THIN_RESERVED_... mark the start and end - * values for WMI_THIN_RESERVED command IDs. These - * command IDs can be found in wmi_thin.h */ - WMI_THIN_RESERVED_START = 0x8000, - WMI_THIN_RESERVED_END = 0x8fff, - /* - * Developer commands starts at 0xF000 - */ - WMI_SET_BITRATE_CMDID = 0xF000, - WMI_GET_BITRATE_CMDID, - WMI_SET_WHALPARAM_CMDID, - - - /*Should add the new command to the tail for compatible with - * etna. - */ - WMI_SET_MAC_ADDRESS_CMDID, - WMI_SET_AKMP_PARAMS_CMDID, - WMI_SET_PMKID_LIST_CMDID, - WMI_GET_PMKID_LIST_CMDID, - WMI_ABORT_SCAN_CMDID, - WMI_SET_TARGET_EVENT_REPORT_CMDID, - - // Unused - WMI_UNUSED1, - WMI_UNUSED2, - - /* - * AP mode commands - */ - WMI_AP_HIDDEN_SSID_CMDID, - WMI_AP_SET_NUM_STA_CMDID, - WMI_AP_ACL_POLICY_CMDID, - WMI_AP_ACL_MAC_LIST_CMDID, - WMI_AP_CONFIG_COMMIT_CMDID, - WMI_AP_SET_MLME_CMDID, - WMI_AP_SET_PVB_CMDID, - WMI_AP_CONN_INACT_CMDID, - WMI_AP_PROT_SCAN_TIME_CMDID, - WMI_AP_SET_COUNTRY_CMDID, - WMI_AP_SET_DTIM_CMDID, - WMI_AP_MODE_STAT_CMDID, - - WMI_SET_IP_CMDID, - WMI_SET_PARAMS_CMDID, - WMI_SET_MCAST_FILTER_CMDID, - WMI_DEL_MCAST_FILTER_CMDID, - - WMI_ALLOW_AGGR_CMDID, - WMI_ADDBA_REQ_CMDID, - WMI_DELBA_REQ_CMDID, - WMI_SET_HT_CAP_CMDID, - WMI_SET_HT_OP_CMDID, - WMI_SET_TX_SELECT_RATES_CMDID, - WMI_SET_TX_SGI_PARAM_CMDID, - WMI_SET_RATE_POLICY_CMDID, - - WMI_HCI_CMD_CMDID, - WMI_RX_FRAME_FORMAT_CMDID, - WMI_SET_THIN_MODE_CMDID, - WMI_SET_BT_WLAN_CONN_PRECEDENCE_CMDID, - - WMI_AP_SET_11BG_RATESET_CMDID, - WMI_SET_PMK_CMDID, - WMI_MCAST_FILTER_CMDID, - /* COEX CMDID AR6003*/ - WMI_SET_BTCOEX_FE_ANT_CMDID, - WMI_SET_BTCOEX_COLOCATED_BT_DEV_CMDID, - WMI_SET_BTCOEX_SCO_CONFIG_CMDID, - WMI_SET_BTCOEX_A2DP_CONFIG_CMDID, - WMI_SET_BTCOEX_ACLCOEX_CONFIG_CMDID, - WMI_SET_BTCOEX_BTINQUIRY_PAGE_CONFIG_CMDID, - WMI_SET_BTCOEX_DEBUG_CMDID, - WMI_SET_BTCOEX_BT_OPERATING_STATUS_CMDID, - WMI_GET_BTCOEX_STATS_CMDID, - WMI_GET_BTCOEX_CONFIG_CMDID, - - WMI_SET_DFS_ENABLE_CMDID, /* F034 */ - WMI_SET_DFS_MINRSSITHRESH_CMDID, - WMI_SET_DFS_MAXPULSEDUR_CMDID, - WMI_DFS_RADAR_DETECTED_CMDID, - - /* P2P CMDS */ - WMI_P2P_SET_CONFIG_CMDID, /* F038 */ - WMI_WPS_SET_CONFIG_CMDID, - WMI_SET_REQ_DEV_ATTR_CMDID, - WMI_P2P_FIND_CMDID, - WMI_P2P_STOP_FIND_CMDID, - WMI_P2P_GO_NEG_START_CMDID, - WMI_P2P_LISTEN_CMDID, - - WMI_CONFIG_TX_MAC_RULES_CMDID, /* F040 */ - WMI_SET_PROMISCUOUS_MODE_CMDID, - WMI_RX_FRAME_FILTER_CMDID, - WMI_SET_CHANNEL_CMDID, - - /* WAC commands */ - WMI_ENABLE_WAC_CMDID, - WMI_WAC_SCAN_REPLY_CMDID, - WMI_WAC_CTRL_REQ_CMDID, - WMI_SET_DIV_PARAMS_CMDID, - - WMI_GET_PMK_CMDID, - WMI_SET_PASSPHRASE_CMDID, - WMI_SEND_ASSOC_RES_CMDID, - WMI_SET_ASSOC_REQ_RELAY_CMDID, - WMI_GET_RFKILL_MODE_CMDID, - - /* ACS command, consists of sub-commands */ - WMI_ACS_CTRL_CMDID, - - /* Ultra low power store / recall commands */ - WMI_STORERECALL_CONFIGURE_CMDID, - WMI_STORERECALL_RECALL_CMDID, - WMI_STORERECALL_HOST_READY_CMDID, - WMI_FORCE_TARGET_ASSERT_CMDID, - WMI_SET_EXCESS_TX_RETRY_THRES_CMDID, -} WMI_COMMAND_ID; - -/* - * Frame Types - */ -typedef enum { - WMI_FRAME_BEACON = 0, - WMI_FRAME_PROBE_REQ, - WMI_FRAME_PROBE_RESP, - WMI_FRAME_ASSOC_REQ, - WMI_FRAME_ASSOC_RESP, - WMI_NUM_MGMT_FRAME -} WMI_MGMT_FRAME_TYPE; - -/* - * Connect Command - */ -typedef enum { - INFRA_NETWORK = 0x01, - ADHOC_NETWORK = 0x02, - ADHOC_CREATOR = 0x04, - AP_NETWORK = 0x10, -} NETWORK_TYPE; - -typedef enum { - OPEN_AUTH = 0x01, - SHARED_AUTH = 0x02, - LEAP_AUTH = 0x04, /* different from IEEE_AUTH_MODE definitions */ -} DOT11_AUTH_MODE; - -enum { - AUTH_IDLE, - AUTH_OPEN_IN_PROGRESS, -}; - -typedef enum { - NONE_AUTH = 0x01, - WPA_AUTH = 0x02, - WPA2_AUTH = 0x04, - WPA_PSK_AUTH = 0x08, - WPA2_PSK_AUTH = 0x10, - WPA_AUTH_CCKM = 0x20, - WPA2_AUTH_CCKM = 0x40, -} AUTH_MODE; - -typedef enum { - NONE_CRYPT = 0x01, - WEP_CRYPT = 0x02, - TKIP_CRYPT = 0x04, - AES_CRYPT = 0x08, -#ifdef WAPI_ENABLE - WAPI_CRYPT = 0x10, -#endif /*WAPI_ENABLE*/ -} CRYPTO_TYPE; - -#define WMI_MIN_CRYPTO_TYPE NONE_CRYPT -#define WMI_MAX_CRYPTO_TYPE (AES_CRYPT + 1) - -#ifdef WAPI_ENABLE -#undef WMI_MAX_CRYPTO_TYPE -#define WMI_MAX_CRYPTO_TYPE (WAPI_CRYPT + 1) -#endif /* WAPI_ENABLE */ - -#ifdef WAPI_ENABLE -#define IW_ENCODE_ALG_SM4 0x20 -#define IW_AUTH_WAPI_ENABLED 0x20 -#endif - -#define WMI_MIN_KEY_INDEX 0 -#define WMI_MAX_KEY_INDEX 3 - -#ifdef WAPI_ENABLE -#undef WMI_MAX_KEY_INDEX -#define WMI_MAX_KEY_INDEX 7 /* wapi grpKey 0-3, prwKey 4-7 */ -#endif /* WAPI_ENABLE */ - -#define WMI_MAX_KEY_LEN 32 - -#define WMI_MAX_SSID_LEN 32 - -typedef enum { - CONNECT_ASSOC_POLICY_USER = 0x0001, - CONNECT_SEND_REASSOC = 0x0002, - CONNECT_IGNORE_WPAx_GROUP_CIPHER = 0x0004, - CONNECT_PROFILE_MATCH_DONE = 0x0008, - CONNECT_IGNORE_AAC_BEACON = 0x0010, - CONNECT_CSA_FOLLOW_BSS = 0x0020, - CONNECT_DO_WPA_OFFLOAD = 0x0040, - CONNECT_DO_NOT_DEAUTH = 0x0080, -} WMI_CONNECT_CTRL_FLAGS_BITS; - -#define DEFAULT_CONNECT_CTRL_FLAGS (CONNECT_CSA_FOLLOW_BSS) - -typedef PREPACK struct { - u8 networkType; - u8 dot11AuthMode; - u8 authMode; - u8 pairwiseCryptoType; - u8 pairwiseCryptoLen; - u8 groupCryptoType; - u8 groupCryptoLen; - u8 ssidLength; - u8 ssid[WMI_MAX_SSID_LEN]; - u16 channel; - u8 bssid[ATH_MAC_LEN]; - u32 ctrl_flags; -} POSTPACK WMI_CONNECT_CMD; - -/* - * WMI_RECONNECT_CMDID - */ -typedef PREPACK struct { - u16 channel; /* hint */ - u8 bssid[ATH_MAC_LEN]; /* mandatory if set */ -} POSTPACK WMI_RECONNECT_CMD; - -#define WMI_PMK_LEN 32 -typedef PREPACK struct { - u8 pmk[WMI_PMK_LEN]; -} POSTPACK WMI_SET_PMK_CMD; - -/* - * WMI_SET_EXCESS_TX_RETRY_THRES_CMDID - */ -typedef PREPACK struct { - u32 threshold; -} POSTPACK WMI_SET_EXCESS_TX_RETRY_THRES_CMD; - -/* - * WMI_ADD_CIPHER_KEY_CMDID - */ -typedef enum { - PAIRWISE_USAGE = 0x00, - GROUP_USAGE = 0x01, - TX_USAGE = 0x02, /* default Tx Key - Static WEP only */ -} KEY_USAGE; - -/* - * Bit Flag - * Bit 0 - Initialise TSC - default is Initialize - */ -#define KEY_OP_INIT_TSC 0x01 -#define KEY_OP_INIT_RSC 0x02 -#ifdef WAPI_ENABLE -#define KEY_OP_INIT_WAPIPN 0x10 -#endif /* WAPI_ENABLE */ - -#define KEY_OP_INIT_VAL 0x03 /* Default Initialise the TSC & RSC */ -#define KEY_OP_VALID_MASK 0x03 - -typedef PREPACK struct { - u8 keyIndex; - u8 keyType; - u8 keyUsage; /* KEY_USAGE */ - u8 keyLength; - u8 keyRSC[8]; /* key replay sequence counter */ - u8 key[WMI_MAX_KEY_LEN]; - u8 key_op_ctrl; /* Additional Key Control information */ - u8 key_macaddr[ATH_MAC_LEN]; -} POSTPACK WMI_ADD_CIPHER_KEY_CMD; - -/* - * WMI_DELETE_CIPHER_KEY_CMDID - */ -typedef PREPACK struct { - u8 keyIndex; -} POSTPACK WMI_DELETE_CIPHER_KEY_CMD; - -#define WMI_KRK_LEN 16 -/* - * WMI_ADD_KRK_CMDID - */ -typedef PREPACK struct { - u8 krk[WMI_KRK_LEN]; -} POSTPACK WMI_ADD_KRK_CMD; - -/* - * WMI_SET_TKIP_COUNTERMEASURES_CMDID - */ -typedef enum { - WMI_TKIP_CM_DISABLE = 0x0, - WMI_TKIP_CM_ENABLE = 0x1, -} WMI_TKIP_CM_CONTROL; - -typedef PREPACK struct { - u8 cm_en; /* WMI_TKIP_CM_CONTROL */ -} POSTPACK WMI_SET_TKIP_COUNTERMEASURES_CMD; - -/* - * WMI_SET_PMKID_CMDID - */ - -#define WMI_PMKID_LEN 16 - -typedef enum { - PMKID_DISABLE = 0, - PMKID_ENABLE = 1, -} PMKID_ENABLE_FLG; - -typedef PREPACK struct { - u8 bssid[ATH_MAC_LEN]; - u8 enable; /* PMKID_ENABLE_FLG */ - u8 pmkid[WMI_PMKID_LEN]; -} POSTPACK WMI_SET_PMKID_CMD; - -/* - * WMI_START_SCAN_CMD - */ -typedef enum { - WMI_LONG_SCAN = 0, - WMI_SHORT_SCAN = 1, -} WMI_SCAN_TYPE; - -typedef PREPACK struct { - u32 forceFgScan; - u32 isLegacy; /* For Legacy Cisco AP compatibility */ - u32 homeDwellTime; /* Maximum duration in the home channel(milliseconds) */ - u32 forceScanInterval; /* Time interval between scans (milliseconds)*/ - u8 scanType; /* WMI_SCAN_TYPE */ - u8 numChannels; /* how many channels follow */ - u16 channelList[1]; /* channels in Mhz */ -} POSTPACK WMI_START_SCAN_CMD; - -/* - * WMI_SET_SCAN_PARAMS_CMDID - */ -#define WMI_SHORTSCANRATIO_DEFAULT 3 -/* - * Warning: ScanCtrlFlag value of 0xFF is used to disable all flags in WMI_SCAN_PARAMS_CMD - * Do not add any more flags to WMI_SCAN_CTRL_FLAG_BITS - */ -typedef enum { - CONNECT_SCAN_CTRL_FLAGS = 0x01, /* set if can scan in the Connect cmd */ - SCAN_CONNECTED_CTRL_FLAGS = 0x02, /* set if scan for the SSID it is */ - /* already connected to */ - ACTIVE_SCAN_CTRL_FLAGS = 0x04, /* set if enable active scan */ - ROAM_SCAN_CTRL_FLAGS = 0x08, /* set if enable roam scan when bmiss and lowrssi */ - REPORT_BSSINFO_CTRL_FLAGS = 0x10, /* set if follows customer BSSINFO reporting rule */ - ENABLE_AUTO_CTRL_FLAGS = 0x20, /* if disabled, target doesn't - scan after a disconnect event */ - ENABLE_SCAN_ABORT_EVENT = 0x40 /* Scan complete event with canceled status will be generated when a scan is prempted before it gets completed */ -} WMI_SCAN_CTRL_FLAGS_BITS; - -#define CAN_SCAN_IN_CONNECT(flags) (flags & CONNECT_SCAN_CTRL_FLAGS) -#define CAN_SCAN_CONNECTED(flags) (flags & SCAN_CONNECTED_CTRL_FLAGS) -#define ENABLE_ACTIVE_SCAN(flags) (flags & ACTIVE_SCAN_CTRL_FLAGS) -#define ENABLE_ROAM_SCAN(flags) (flags & ROAM_SCAN_CTRL_FLAGS) -#define CONFIG_REPORT_BSSINFO(flags) (flags & REPORT_BSSINFO_CTRL_FLAGS) -#define IS_AUTO_SCAN_ENABLED(flags) (flags & ENABLE_AUTO_CTRL_FLAGS) -#define SCAN_ABORT_EVENT_ENABLED(flags) (flags & ENABLE_SCAN_ABORT_EVENT) - -#define DEFAULT_SCAN_CTRL_FLAGS (CONNECT_SCAN_CTRL_FLAGS| SCAN_CONNECTED_CTRL_FLAGS| ACTIVE_SCAN_CTRL_FLAGS| ROAM_SCAN_CTRL_FLAGS | ENABLE_AUTO_CTRL_FLAGS) - - -typedef PREPACK struct { - u16 fg_start_period; /* seconds */ - u16 fg_end_period; /* seconds */ - u16 bg_period; /* seconds */ - u16 maxact_chdwell_time; /* msec */ - u16 pas_chdwell_time; /* msec */ - u8 shortScanRatio; /* how many shorts scan for one long */ - u8 scanCtrlFlags; - u16 minact_chdwell_time; /* msec */ - u16 maxact_scan_per_ssid; /* max active scans per ssid */ - u32 max_dfsch_act_time; /* msecs */ -} POSTPACK WMI_SCAN_PARAMS_CMD; - -/* - * WMI_SET_BSS_FILTER_CMDID - */ -typedef enum { - NONE_BSS_FILTER = 0x0, /* no beacons forwarded */ - ALL_BSS_FILTER, /* all beacons forwarded */ - PROFILE_FILTER, /* only beacons matching profile */ - ALL_BUT_PROFILE_FILTER, /* all but beacons matching profile */ - CURRENT_BSS_FILTER, /* only beacons matching current BSS */ - ALL_BUT_BSS_FILTER, /* all but beacons matching BSS */ - PROBED_SSID_FILTER, /* beacons matching probed ssid */ - LAST_BSS_FILTER, /* marker only */ -} WMI_BSS_FILTER; - -typedef PREPACK struct { - u8 bssFilter; /* see WMI_BSS_FILTER */ - u8 reserved1; /* For alignment */ - u16 reserved2; /* For alignment */ - u32 ieMask; -} POSTPACK WMI_BSS_FILTER_CMD; - -/* - * WMI_SET_PROBED_SSID_CMDID - */ -#define MAX_PROBED_SSID_INDEX 9 - -typedef enum { - DISABLE_SSID_FLAG = 0, /* disables entry */ - SPECIFIC_SSID_FLAG = 0x01, /* probes specified ssid */ - ANY_SSID_FLAG = 0x02, /* probes for any ssid */ -} WMI_SSID_FLAG; - -typedef PREPACK struct { - u8 entryIndex; /* 0 to MAX_PROBED_SSID_INDEX */ - u8 flag; /* WMI_SSID_FLG */ - u8 ssidLength; - u8 ssid[32]; -} POSTPACK WMI_PROBED_SSID_CMD; - -/* - * WMI_SET_LISTEN_INT_CMDID - * The Listen interval is between 15 and 3000 TUs - */ -#define MIN_LISTEN_INTERVAL 15 -#define MAX_LISTEN_INTERVAL 5000 -#define MIN_LISTEN_BEACONS 1 -#define MAX_LISTEN_BEACONS 50 - -typedef PREPACK struct { - u16 listenInterval; - u16 numBeacons; -} POSTPACK WMI_LISTEN_INT_CMD; - -/* - * WMI_SET_BEACON_INT_CMDID - */ -typedef PREPACK struct { - u16 beaconInterval; -} POSTPACK WMI_BEACON_INT_CMD; - -/* - * WMI_SET_BMISS_TIME_CMDID - * valid values are between 1000 and 5000 TUs - */ - -#define MIN_BMISS_TIME 1000 -#define MAX_BMISS_TIME 5000 -#define MIN_BMISS_BEACONS 1 -#define MAX_BMISS_BEACONS 50 - -typedef PREPACK struct { - u16 bmissTime; - u16 numBeacons; -} POSTPACK WMI_BMISS_TIME_CMD; - -/* - * WMI_SET_POWER_MODE_CMDID - */ -typedef enum { - REC_POWER = 0x01, - MAX_PERF_POWER, -} WMI_POWER_MODE; - -typedef PREPACK struct { - u8 powerMode; /* WMI_POWER_MODE */ -} POSTPACK WMI_POWER_MODE_CMD; - -typedef PREPACK struct { - s8 status; /* WMI_SET_PARAMS_REPLY */ -} POSTPACK WMI_SET_PARAMS_REPLY; - -typedef PREPACK struct { - u32 opcode; - u32 length; - char buffer[1]; /* WMI_SET_PARAMS */ -} POSTPACK WMI_SET_PARAMS_CMD; - -typedef PREPACK struct { - u8 multicast_mac[ATH_MAC_LEN]; /* WMI_SET_MCAST_FILTER */ -} POSTPACK WMI_SET_MCAST_FILTER_CMD; - -typedef PREPACK struct { - u8 enable; /* WMI_MCAST_FILTER */ -} POSTPACK WMI_MCAST_FILTER_CMD; - -/* - * WMI_SET_POWER_PARAMS_CMDID - */ -typedef enum { - IGNORE_DTIM = 0x01, - NORMAL_DTIM = 0x02, - STICK_DTIM = 0x03, - AUTO_DTIM = 0x04, -} WMI_DTIM_POLICY; - -/* Policy to determnine whether TX should wakeup WLAN if sleeping */ -typedef enum { - TX_WAKEUP_UPON_SLEEP = 1, - TX_DONT_WAKEUP_UPON_SLEEP = 2 -} WMI_TX_WAKEUP_POLICY_UPON_SLEEP; - -/* - * Policy to determnine whether power save failure event should be sent to - * host during scanning - */ -typedef enum { - SEND_POWER_SAVE_FAIL_EVENT_ALWAYS = 1, - IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN = 2, -} POWER_SAVE_FAIL_EVENT_POLICY; - -typedef PREPACK struct { - u16 idle_period; /* msec */ - u16 pspoll_number; - u16 dtim_policy; - u16 tx_wakeup_policy; - u16 num_tx_to_wakeup; - u16 ps_fail_event_policy; -} POSTPACK WMI_POWER_PARAMS_CMD; - -/* Adhoc power save types */ -typedef enum { - ADHOC_PS_DISABLE=1, - ADHOC_PS_ATH=2, - ADHOC_PS_IEEE=3, - ADHOC_PS_OTHER=4, -} WMI_ADHOC_PS_TYPE; - -typedef PREPACK struct { - u8 power_saving; - u8 ttl; /* number of beacon periods */ - u16 atim_windows; /* msec */ - u16 timeout_value; /* msec */ -} POSTPACK WMI_IBSS_PM_CAPS_CMD; - -/* AP power save types */ -typedef enum { - AP_PS_DISABLE=1, - AP_PS_ATH=2, -} WMI_AP_PS_TYPE; - -typedef PREPACK struct { - u32 idle_time; /* in msec */ - u32 ps_period; /* in usec */ - u8 sleep_period; /* in ps periods */ - u8 psType; -} POSTPACK WMI_AP_PS_CMD; - -/* - * WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID - */ -typedef enum { - IGNORE_TIM_ALL_QUEUES_APSD = 0, - PROCESS_TIM_ALL_QUEUES_APSD = 1, - IGNORE_TIM_SIMULATED_APSD = 2, - PROCESS_TIM_SIMULATED_APSD = 3, -} APSD_TIM_POLICY; - -typedef PREPACK struct { - u16 psPollTimeout; /* msec */ - u16 triggerTimeout; /* msec */ - u32 apsdTimPolicy; /* TIM behavior with ques APSD enabled. Default is IGNORE_TIM_ALL_QUEUES_APSD */ - u32 simulatedAPSDTimPolicy; /* TIM behavior with simulated APSD enabled. Default is PROCESS_TIM_SIMULATED_APSD */ -} POSTPACK WMI_POWERSAVE_TIMERS_POLICY_CMD; - -/* - * WMI_SET_VOICE_PKT_SIZE_CMDID - */ -typedef PREPACK struct { - u16 voicePktSize; -} POSTPACK WMI_SET_VOICE_PKT_SIZE_CMD; - -/* - * WMI_SET_MAX_SP_LEN_CMDID - */ -typedef enum { - DELIVER_ALL_PKT = 0x0, - DELIVER_2_PKT = 0x1, - DELIVER_4_PKT = 0x2, - DELIVER_6_PKT = 0x3, -} APSD_SP_LEN_TYPE; - -typedef PREPACK struct { - u8 maxSPLen; -} POSTPACK WMI_SET_MAX_SP_LEN_CMD; - -/* - * WMI_SET_DISC_TIMEOUT_CMDID - */ -typedef PREPACK struct { - u8 disconnectTimeout; /* seconds */ -} POSTPACK WMI_DISC_TIMEOUT_CMD; - -typedef enum { - UPLINK_TRAFFIC = 0, - DNLINK_TRAFFIC = 1, - BIDIR_TRAFFIC = 2, -} DIR_TYPE; - -typedef enum { - DISABLE_FOR_THIS_AC = 0, - ENABLE_FOR_THIS_AC = 1, - ENABLE_FOR_ALL_AC = 2, -} VOICEPS_CAP_TYPE; - -typedef enum { - TRAFFIC_TYPE_APERIODIC = 0, - TRAFFIC_TYPE_PERIODIC = 1, -}TRAFFIC_TYPE; - -/* - * WMI_SYNCHRONIZE_CMDID - */ -typedef PREPACK struct { - u8 dataSyncMap; -} POSTPACK WMI_SYNC_CMD; - -/* - * WMI_CREATE_PSTREAM_CMDID - */ -typedef PREPACK struct { - u32 minServiceInt; /* in milli-sec */ - u32 maxServiceInt; /* in milli-sec */ - u32 inactivityInt; /* in milli-sec */ - u32 suspensionInt; /* in milli-sec */ - u32 serviceStartTime; - u32 minDataRate; /* in bps */ - u32 meanDataRate; /* in bps */ - u32 peakDataRate; /* in bps */ - u32 maxBurstSize; - u32 delayBound; - u32 minPhyRate; /* in bps */ - u32 sba; - u32 mediumTime; - u16 nominalMSDU; /* in octects */ - u16 maxMSDU; /* in octects */ - u8 trafficClass; - u8 trafficDirection; /* DIR_TYPE */ - u8 rxQueueNum; - u8 trafficType; /* TRAFFIC_TYPE */ - u8 voicePSCapability; /* VOICEPS_CAP_TYPE */ - u8 tsid; - u8 userPriority; /* 802.1D user priority */ - u8 nominalPHY; /* nominal phy rate */ -} POSTPACK WMI_CREATE_PSTREAM_CMD; - -/* - * WMI_DELETE_PSTREAM_CMDID - */ -typedef PREPACK struct { - u8 txQueueNumber; - u8 rxQueueNumber; - u8 trafficDirection; - u8 trafficClass; - u8 tsid; -} POSTPACK WMI_DELETE_PSTREAM_CMD; - -/* - * WMI_SET_CHANNEL_PARAMS_CMDID - */ -typedef enum { - WMI_11A_MODE = 0x1, - WMI_11G_MODE = 0x2, - WMI_11AG_MODE = 0x3, - WMI_11B_MODE = 0x4, - WMI_11GONLY_MODE = 0x5, -} WMI_PHY_MODE; - -#define WMI_MAX_CHANNELS 32 - -typedef PREPACK struct { - u8 reserved1; - u8 scanParam; /* set if enable scan */ - u8 phyMode; /* see WMI_PHY_MODE */ - u8 numChannels; /* how many channels follow */ - u16 channelList[1]; /* channels in Mhz */ -} POSTPACK WMI_CHANNEL_PARAMS_CMD; - - -/* - * WMI_RSSI_THRESHOLD_PARAMS_CMDID - * Setting the polltime to 0 would disable polling. - * Threshold values are in the ascending order, and should agree to: - * (lowThreshold_lowerVal < lowThreshold_upperVal < highThreshold_lowerVal - * < highThreshold_upperVal) - */ - -typedef PREPACK struct WMI_RSSI_THRESHOLD_PARAMS{ - u32 pollTime; /* Polling time as a factor of LI */ - s16 thresholdAbove1_Val; /* lowest of upper */ - s16 thresholdAbove2_Val; - s16 thresholdAbove3_Val; - s16 thresholdAbove4_Val; - s16 thresholdAbove5_Val; - s16 thresholdAbove6_Val; /* highest of upper */ - s16 thresholdBelow1_Val; /* lowest of bellow */ - s16 thresholdBelow2_Val; - s16 thresholdBelow3_Val; - s16 thresholdBelow4_Val; - s16 thresholdBelow5_Val; - s16 thresholdBelow6_Val; /* highest of bellow */ - u8 weight; /* "alpha" */ - u8 reserved[3]; -} POSTPACK WMI_RSSI_THRESHOLD_PARAMS_CMD; - -/* - * WMI_SNR_THRESHOLD_PARAMS_CMDID - * Setting the polltime to 0 would disable polling. - */ - -typedef PREPACK struct WMI_SNR_THRESHOLD_PARAMS{ - u32 pollTime; /* Polling time as a factor of LI */ - u8 weight; /* "alpha" */ - u8 thresholdAbove1_Val; /* lowest of uppper*/ - u8 thresholdAbove2_Val; - u8 thresholdAbove3_Val; - u8 thresholdAbove4_Val; /* highest of upper */ - u8 thresholdBelow1_Val; /* lowest of bellow */ - u8 thresholdBelow2_Val; - u8 thresholdBelow3_Val; - u8 thresholdBelow4_Val; /* highest of bellow */ - u8 reserved[3]; -} POSTPACK WMI_SNR_THRESHOLD_PARAMS_CMD; - -/* - * WMI_LQ_THRESHOLD_PARAMS_CMDID - */ -typedef PREPACK struct WMI_LQ_THRESHOLD_PARAMS { - u8 enable; - u8 thresholdAbove1_Val; - u8 thresholdAbove2_Val; - u8 thresholdAbove3_Val; - u8 thresholdAbove4_Val; - u8 thresholdBelow1_Val; - u8 thresholdBelow2_Val; - u8 thresholdBelow3_Val; - u8 thresholdBelow4_Val; - u8 reserved[3]; -} POSTPACK WMI_LQ_THRESHOLD_PARAMS_CMD; - -typedef enum { - WMI_LPREAMBLE_DISABLED = 0, - WMI_LPREAMBLE_ENABLED -} WMI_LPREAMBLE_STATUS; - -typedef enum { - WMI_IGNORE_BARKER_IN_ERP = 0, - WMI_DONOT_IGNORE_BARKER_IN_ERP -} WMI_PREAMBLE_POLICY; - -typedef PREPACK struct { - u8 status; - u8 preamblePolicy; -}POSTPACK WMI_SET_LPREAMBLE_CMD; - -typedef PREPACK struct { - u16 threshold; -}POSTPACK WMI_SET_RTS_CMD; - -/* - * WMI_TARGET_ERROR_REPORT_BITMASK_CMDID - * Sets the error reporting event bitmask in target. Target clears it - * upon an error. Subsequent errors are counted, but not reported - * via event, unless the bitmask is set again. - */ -typedef PREPACK struct { - u32 bitmask; -} POSTPACK WMI_TARGET_ERROR_REPORT_BITMASK; - -/* - * WMI_SET_TX_PWR_CMDID - */ -typedef PREPACK struct { - u8 dbM; /* in dbM units */ -} POSTPACK WMI_SET_TX_PWR_CMD, WMI_TX_PWR_REPLY; - -/* - * WMI_SET_ASSOC_INFO_CMDID - * - * A maximum of 2 private IEs can be sent in the [Re]Assoc request. - * A 3rd one, the CCX version IE can also be set from the host. - */ -#define WMI_MAX_ASSOC_INFO_TYPE 2 -#define WMI_CCX_VER_IE 2 /* ieType to set CCX Version IE */ - -#define WMI_MAX_ASSOC_INFO_LEN 240 - -typedef PREPACK struct { - u8 ieType; - u8 bufferSize; - u8 assocInfo[1]; /* up to WMI_MAX_ASSOC_INFO_LEN */ -} POSTPACK WMI_SET_ASSOC_INFO_CMD; - - -/* - * WMI_GET_TX_PWR_CMDID does not take any parameters - */ - -/* - * WMI_ADD_BAD_AP_CMDID - */ -#define WMI_MAX_BAD_AP_INDEX 1 - -typedef PREPACK struct { - u8 badApIndex; /* 0 to WMI_MAX_BAD_AP_INDEX */ - u8 bssid[ATH_MAC_LEN]; -} POSTPACK WMI_ADD_BAD_AP_CMD; - -/* - * WMI_DELETE_BAD_AP_CMDID - */ -typedef PREPACK struct { - u8 badApIndex; /* 0 to WMI_MAX_BAD_AP_INDEX */ -} POSTPACK WMI_DELETE_BAD_AP_CMD; - -/* - * WMI_SET_ACCESS_PARAMS_CMDID - */ -#define WMI_DEFAULT_TXOP_ACPARAM 0 /* implies one MSDU */ -#define WMI_DEFAULT_ECWMIN_ACPARAM 4 /* corresponds to CWmin of 15 */ -#define WMI_DEFAULT_ECWMAX_ACPARAM 10 /* corresponds to CWmax of 1023 */ -#define WMI_MAX_CW_ACPARAM 15 /* maximum eCWmin or eCWmax */ -#define WMI_DEFAULT_AIFSN_ACPARAM 2 -#define WMI_MAX_AIFSN_ACPARAM 15 -typedef PREPACK struct { - u16 txop; /* in units of 32 usec */ - u8 eCWmin; - u8 eCWmax; - u8 aifsn; - u8 ac; -} POSTPACK WMI_SET_ACCESS_PARAMS_CMD; - - -/* - * WMI_SET_RETRY_LIMITS_CMDID - * - * This command is used to customize the number of retries the - * wlan device will perform on a given frame. - */ -#define WMI_MIN_RETRIES 2 -#define WMI_MAX_RETRIES 13 -typedef enum { - MGMT_FRAMETYPE = 0, - CONTROL_FRAMETYPE = 1, - DATA_FRAMETYPE = 2 -} WMI_FRAMETYPE; - -typedef PREPACK struct { - u8 frameType; /* WMI_FRAMETYPE */ - u8 trafficClass; /* applies only to DATA_FRAMETYPE */ - u8 maxRetries; - u8 enableNotify; -} POSTPACK WMI_SET_RETRY_LIMITS_CMD; - -/* - * WMI_SET_ROAM_CTRL_CMDID - * - * This command is used to influence the Roaming behaviour - * Set the host biases of the BSSs before setting the roam mode as bias - * based. - */ - -/* - * Different types of Roam Control - */ - -typedef enum { - WMI_FORCE_ROAM = 1, /* Roam to the specified BSSID */ - WMI_SET_ROAM_MODE = 2, /* default ,progd bias, no roam */ - WMI_SET_HOST_BIAS = 3, /* Set the Host Bias */ - WMI_SET_LOWRSSI_SCAN_PARAMS = 4, /* Set lowrssi Scan parameters */ -} WMI_ROAM_CTRL_TYPE; - -#define WMI_MIN_ROAM_CTRL_TYPE WMI_FORCE_ROAM -#define WMI_MAX_ROAM_CTRL_TYPE WMI_SET_LOWRSSI_SCAN_PARAMS - -/* - * ROAM MODES - */ - -typedef enum { - WMI_DEFAULT_ROAM_MODE = 1, /* RSSI based ROAM */ - WMI_HOST_BIAS_ROAM_MODE = 2, /* HOST BIAS based ROAM */ - WMI_LOCK_BSS_MODE = 3 /* Lock to the Current BSS - no Roam */ -} WMI_ROAM_MODE; - -/* - * BSS HOST BIAS INFO - */ - -typedef PREPACK struct { - u8 bssid[ATH_MAC_LEN]; - s8 bias; -} POSTPACK WMI_BSS_BIAS; - -typedef PREPACK struct { - u8 numBss; - WMI_BSS_BIAS bssBias[1]; -} POSTPACK WMI_BSS_BIAS_INFO; - -typedef PREPACK struct WMI_LOWRSSI_SCAN_PARAMS { - u16 lowrssi_scan_period; - s16 lowrssi_scan_threshold; - s16 lowrssi_roam_threshold; - u8 roam_rssi_floor; - u8 reserved[1]; /* For alignment */ -} POSTPACK WMI_LOWRSSI_SCAN_PARAMS; - -typedef PREPACK struct { - PREPACK union { - u8 bssid[ATH_MAC_LEN]; /* WMI_FORCE_ROAM */ - u8 roamMode; /* WMI_SET_ROAM_MODE */ - WMI_BSS_BIAS_INFO bssBiasInfo; /* WMI_SET_HOST_BIAS */ - WMI_LOWRSSI_SCAN_PARAMS lrScanParams; - } POSTPACK info; - u8 roamCtrlType ; -} POSTPACK WMI_SET_ROAM_CTRL_CMD; - -/* - * WMI_SET_BT_WLAN_CONN_PRECEDENCE_CMDID - */ -typedef enum { - BT_WLAN_CONN_PRECDENCE_WLAN=0, /* Default */ - BT_WLAN_CONN_PRECDENCE_PAL, -} BT_WLAN_CONN_PRECEDENCE; - -typedef PREPACK struct { - u8 precedence; -} POSTPACK WMI_SET_BT_WLAN_CONN_PRECEDENCE; - -/* - * WMI_ENABLE_RM_CMDID - */ -typedef PREPACK struct { - u32 enable_radio_measurements; -} POSTPACK WMI_ENABLE_RM_CMD; - -/* - * WMI_SET_MAX_OFFHOME_DURATION_CMDID - */ -typedef PREPACK struct { - u8 max_offhome_duration; -} POSTPACK WMI_SET_MAX_OFFHOME_DURATION_CMD; - -typedef PREPACK struct { - u32 frequency; - u8 threshold; -} POSTPACK WMI_SET_HB_CHALLENGE_RESP_PARAMS_CMD; -/*---------------------- BTCOEX RELATED -------------------------------------*/ -/*----------------------COMMON to AR6002 and AR6003 -------------------------*/ -typedef enum { - BT_STREAM_UNDEF = 0, - BT_STREAM_SCO, /* SCO stream */ - BT_STREAM_A2DP, /* A2DP stream */ - BT_STREAM_SCAN, /* BT Discovery or Page */ - BT_STREAM_ESCO, - BT_STREAM_MAX -} BT_STREAM_TYPE; - -typedef enum { - BT_PARAM_SCO_PSPOLL_LATENCY_ONE_FOURTH =1, - BT_PARAM_SCO_PSPOLL_LATENCY_HALF, - BT_PARAM_SCO_PSPOLL_LATENCY_THREE_FOURTH, -} BT_PARAMS_SCO_PSPOLL_LATENCY; - -typedef enum { - BT_PARAMS_SCO_STOMP_SCO_NEVER =1, - BT_PARAMS_SCO_STOMP_SCO_ALWAYS, - BT_PARAMS_SCO_STOMP_SCO_IN_LOWRSSI, -} BT_PARAMS_SCO_STOMP_RULES; - -typedef enum { - BT_STATUS_UNDEF = 0, - BT_STATUS_ON, - BT_STATUS_OFF, - BT_STATUS_MAX -} BT_STREAM_STATUS; - -typedef PREPACK struct { - u8 streamType; - u8 status; -} POSTPACK WMI_SET_BT_STATUS_CMD; - -typedef enum { - BT_ANT_TYPE_UNDEF=0, - BT_ANT_TYPE_DUAL, - BT_ANT_TYPE_SPLITTER, - BT_ANT_TYPE_SWITCH, - BT_ANT_TYPE_HIGH_ISO_DUAL -} BT_ANT_FRONTEND_CONFIG; - -typedef enum { - BT_COLOCATED_DEV_BTS4020=0, - BT_COLCATED_DEV_CSR , - BT_COLOCATED_DEV_VALKYRIE -} BT_COLOCATED_DEV_TYPE; - -/*********************** Applicable to AR6002 ONLY ******************************/ - -typedef enum { - BT_PARAM_SCO = 1, /* SCO stream parameters */ - BT_PARAM_A2DP , - BT_PARAM_ANTENNA_CONFIG, - BT_PARAM_COLOCATED_BT_DEVICE, - BT_PARAM_ACLCOEX, - BT_PARAM_11A_SEPARATE_ANT, - BT_PARAM_MAX -} BT_PARAM_TYPE; - - -#define BT_SCO_ALLOW_CLOSE_RANGE_OPT (1 << 0) -#define BT_SCO_FORCE_AWAKE_OPT (1 << 1) -#define BT_SCO_SET_RSSI_OVERRIDE(flags) ((flags) |= (1 << 2)) -#define BT_SCO_GET_RSSI_OVERRIDE(flags) (((flags) >> 2) & 0x1) -#define BT_SCO_SET_RTS_OVERRIDE(flags) ((flags) |= (1 << 3)) -#define BT_SCO_GET_RTS_OVERRIDE(flags) (((flags) >> 3) & 0x1) -#define BT_SCO_GET_MIN_LOW_RATE_CNT(flags) (((flags) >> 8) & 0xFF) -#define BT_SCO_GET_MAX_LOW_RATE_CNT(flags) (((flags) >> 16) & 0xFF) -#define BT_SCO_SET_MIN_LOW_RATE_CNT(flags,val) (flags) |= (((val) & 0xFF) << 8) -#define BT_SCO_SET_MAX_LOW_RATE_CNT(flags,val) (flags) |= (((val) & 0xFF) << 16) - -typedef PREPACK struct { - u32 numScoCyclesForceTrigger; /* Number SCO cycles after which - force a pspoll. default = 10 */ - u32 dataResponseTimeout; /* Timeout Waiting for Downlink pkt - in response for ps-poll, - default = 10 msecs */ - u32 stompScoRules; - u32 scoOptFlags; /* SCO Options Flags : - bits: meaning: - 0 Allow Close Range Optimization - 1 Force awake during close range - 2 If set use host supplied RSSI for OPT - 3 If set use host supplied RTS COUNT for OPT - 4..7 Unused - 8..15 Low Data Rate Min Cnt - 16..23 Low Data Rate Max Cnt - */ - - u8 stompDutyCyleVal; /* Sco cycles to limit ps-poll queuing - if stomped */ - u8 stompDutyCyleMaxVal; /*firm ware increases stomp duty cycle - gradually uptill this value on need basis*/ - u8 psPollLatencyFraction; /* Fraction of idle - period, within which - additional ps-polls - can be queued */ - u8 noSCOSlots; /* Number of SCO Tx/Rx slots. - HVx, EV3, 2EV3 = 2 */ - u8 noIdleSlots; /* Number of Bluetooth idle slots between - consecutive SCO Tx/Rx slots - HVx, EV3 = 4 - 2EV3 = 10 */ - u8 scoOptOffRssi;/*RSSI value below which we go to ps poll*/ - u8 scoOptOnRssi; /*RSSI value above which we reenter opt mode*/ - u8 scoOptRtsCount; -} POSTPACK BT_PARAMS_SCO; - -#define BT_A2DP_ALLOW_CLOSE_RANGE_OPT (1 << 0) -#define BT_A2DP_FORCE_AWAKE_OPT (1 << 1) -#define BT_A2DP_SET_RSSI_OVERRIDE(flags) ((flags) |= (1 << 2)) -#define BT_A2DP_GET_RSSI_OVERRIDE(flags) (((flags) >> 2) & 0x1) -#define BT_A2DP_SET_RTS_OVERRIDE(flags) ((flags) |= (1 << 3)) -#define BT_A2DP_GET_RTS_OVERRIDE(flags) (((flags) >> 3) & 0x1) -#define BT_A2DP_GET_MIN_LOW_RATE_CNT(flags) (((flags) >> 8) & 0xFF) -#define BT_A2DP_GET_MAX_LOW_RATE_CNT(flags) (((flags) >> 16) & 0xFF) -#define BT_A2DP_SET_MIN_LOW_RATE_CNT(flags,val) (flags) |= (((val) & 0xFF) << 8) -#define BT_A2DP_SET_MAX_LOW_RATE_CNT(flags,val) (flags) |= (((val) & 0xFF) << 16) - -typedef PREPACK struct { - u32 a2dpWlanUsageLimit; /* MAX time firmware uses the medium for - wlan, after it identifies the idle time - default (30 msecs) */ - u32 a2dpBurstCntMin; /* Minimum number of bluetooth data frames - to replenish Wlan Usage limit (default 3) */ - u32 a2dpDataRespTimeout; - u32 a2dpOptFlags; /* A2DP Option flags: - bits: meaning: - 0 Allow Close Range Optimization - 1 Force awake during close range - 2 If set use host supplied RSSI for OPT - 3 If set use host supplied RTS COUNT for OPT - 4..7 Unused - 8..15 Low Data Rate Min Cnt - 16..23 Low Data Rate Max Cnt - */ - u8 isCoLocatedBtRoleMaster; - u8 a2dpOptOffRssi;/*RSSI value below which we go to ps poll*/ - u8 a2dpOptOnRssi; /*RSSI value above which we reenter opt mode*/ - u8 a2dpOptRtsCount; -}POSTPACK BT_PARAMS_A2DP; - -/* During BT ftp/ BT OPP or any another data based acl profile on bluetooth - (non a2dp).*/ -typedef PREPACK struct { - u32 aclWlanMediumUsageTime; /* Wlan usage time during Acl (non-a2dp) - coexistence (default 30 msecs) */ - u32 aclBtMediumUsageTime; /* Bt usage time during acl coexistence - (default 30 msecs)*/ - u32 aclDataRespTimeout; - u32 aclDetectTimeout; /* ACL coexistence enabled if we get - 10 Pkts in X msec(default 100 msecs) */ - u32 aclmaxPktCnt; /* No of ACL pkts to receive before - enabling ACL coex */ - -}POSTPACK BT_PARAMS_ACLCOEX; - -typedef PREPACK struct { - PREPACK union { - BT_PARAMS_SCO scoParams; - BT_PARAMS_A2DP a2dpParams; - BT_PARAMS_ACLCOEX aclCoexParams; - u8 antType; /* 0 -Disabled (default) - 1 - BT_ANT_TYPE_DUAL - 2 - BT_ANT_TYPE_SPLITTER - 3 - BT_ANT_TYPE_SWITCH */ - u8 coLocatedBtDev; /* 0 - BT_COLOCATED_DEV_BTS4020 (default) - 1 - BT_COLCATED_DEV_CSR - 2 - BT_COLOCATED_DEV_VALKYRIe - */ - } POSTPACK info; - u8 paramType ; -} POSTPACK WMI_SET_BT_PARAMS_CMD; - -/************************ END AR6002 BTCOEX *******************************/ -/*-----------------------AR6003 BTCOEX -----------------------------------*/ - -/* ---------------WMI_SET_BTCOEX_FE_ANT_CMDID --------------------------*/ -/* Indicates front end antenna configuration. This command needs to be issued - * right after initialization and after WMI_SET_BTCOEX_COLOCATED_BT_DEV_CMDID. - * AR6003 enables coexistence and antenna switching based on the configuration. - */ -typedef enum { - WMI_BTCOEX_NOT_ENABLED = 0, - WMI_BTCOEX_FE_ANT_SINGLE =1, - WMI_BTCOEX_FE_ANT_DUAL=2, - WMI_BTCOEX_FE_ANT_DUAL_HIGH_ISO=3, - WMI_BTCOEX_FE_ANT_TYPE_MAX -}WMI_BTCOEX_FE_ANT_TYPE; - -typedef PREPACK struct { - u8 btcoexFeAntType; /* 1 - WMI_BTCOEX_FE_ANT_SINGLE for single antenna front end - 2 - WMI_BTCOEX_FE_ANT_DUAL for dual antenna front end - (for isolations less 35dB, for higher isolation there - is not need to pass this command). - (not implemented) - */ -}POSTPACK WMI_SET_BTCOEX_FE_ANT_CMD; - -/* -------------WMI_SET_BTCOEX_COLOCATED_BT_DEV_CMDID ----------------*/ -/* Indicate the bluetooth chip to the firmware. Firmware can have different algorithm based - * bluetooth chip type.Based on bluetooth device, different coexistence protocol would be used. - */ -typedef PREPACK struct { - u8 btcoexCoLocatedBTdev; /*1 - Qcom BT (3 -wire PTA) - 2 - CSR BT (3 wire PTA) - 3 - Atheros 3001 BT (3 wire PTA) - 4 - STE bluetooth (4-wire ePTA) - 5 - Atheros 3002 BT (4-wire MCI) - defaults= 3 (Atheros 3001 BT ) - */ -}POSTPACK WMI_SET_BTCOEX_COLOCATED_BT_DEV_CMD; - -/* -------------WMI_SET_BTCOEX_BTINQUIRY_PAGE_CONFIG_CMDID ------------*/ -/* Configuration parameters during bluetooth inquiry and page. Page configuration - * is applicable only on interfaces which can distinguish page (applicable only for ePTA - - * STE bluetooth). - * Bluetooth inquiry start and end is indicated via WMI_SET_BTCOEX_BT_OPERATING_STATUS_CMDID. - * During this the station will be power-save mode. - */ -typedef PREPACK struct { - u32 btInquiryDataFetchFrequency;/* The frequency of querying the AP for data - (via pspoll) is configured by this parameter. - "default = 10 ms" */ - - u32 protectBmissDurPostBtInquiry;/* The firmware will continue to be in inquiry state - for configured duration, after inquiry completion - . This is to ensure other bluetooth transactions - (RDP, SDP profiles, link key exchange ...etc) - goes through smoothly without wifi stomping. - default = 10 secs*/ - - u32 maxpageStomp; /*Applicable only for STE-BT interface. Currently not - used */ - u32 btInquiryPageFlag; /* Not used */ -}POSTPACK WMI_SET_BTCOEX_BTINQUIRY_PAGE_CONFIG_CMD; - -/*---------------------WMI_SET_BTCOEX_SCO_CONFIG_CMDID ---------------*/ -/* Configure SCO parameters. These parameters would be used whenever firmware is indicated - * of (e)SCO profile on bluetooth ( via WMI_SET_BTCOEX_BT_OPERATING_STATUS_CMDID). - * Configration of BTCOEX_SCO_CONFIG data structure are common configuration and applies - * ps-poll mode and opt mode. - * Ps-poll Mode - Station is in power-save and retrieves downlink data between sco gaps. - * Opt Mode - station is in awake state and access point can send data to station any time. - * BTCOEX_PSPOLLMODE_SCO_CONFIG - Configuration applied only during ps-poll mode. - * BTCOEX_OPTMODE_SCO_CONFIG - Configuration applied only during opt mode. - */ -#define WMI_SCO_CONFIG_FLAG_ALLOW_OPTIMIZATION (1 << 0) -#define WMI_SCO_CONFIG_FLAG_IS_EDR_CAPABLE (1 << 1) -#define WMI_SCO_CONFIG_FLAG_IS_BT_MASTER (1 << 2) -#define WMI_SCO_CONFIG_FLAG_FW_DETECT_OF_PER (1 << 3) -typedef PREPACK struct { - u32 scoSlots; /* Number of SCO Tx/Rx slots. - HVx, EV3, 2EV3 = 2 */ - u32 scoIdleSlots; /* Number of Bluetooth idle slots between - consecutive SCO Tx/Rx slots - HVx, EV3 = 4 - 2EV3 = 10 - */ - u32 scoFlags; /* SCO Options Flags : - bits: meaning: - 0 Allow Close Range Optimization - 1 Is EDR capable or Not - 2 IS Co-located Bt role Master - 3 Firmware determines the periodicity of SCO. - */ - - u32 linkId; /* applicable to STE-BT - not used */ -}POSTPACK BTCOEX_SCO_CONFIG; - -typedef PREPACK struct { - u32 scoCyclesForceTrigger; /* Number SCO cycles after which - force a pspoll. default = 10 */ - u32 scoDataResponseTimeout; /* Timeout Waiting for Downlink pkt - in response for ps-poll, - default = 20 msecs */ - - u32 scoStompDutyCyleVal; /* not implemented */ - - u32 scoStompDutyCyleMaxVal; /*Not implemented */ - - u32 scoPsPollLatencyFraction; /* Fraction of idle - period, within which - additional ps-polls can be queued - 1 - 1/4 of idle duration - 2 - 1/2 of idle duration - 3 - 3/4 of idle duration - default =2 (1/2) - */ -}POSTPACK BTCOEX_PSPOLLMODE_SCO_CONFIG; - -typedef PREPACK struct { - u32 scoStompCntIn100ms;/*max number of SCO stomp in 100ms allowed in - opt mode. If exceeds the configured value, - switch to ps-poll mode - default = 3 */ - - u32 scoContStompMax; /* max number of continuous stomp allowed in opt mode. - if exceeded switch to pspoll mode - default = 3 */ - - u32 scoMinlowRateMbps; /* Low rate threshold */ - - u32 scoLowRateCnt; /* number of low rate pkts (< scoMinlowRateMbps) allowed in 100 ms. - If exceeded switch/stay to ps-poll mode, lower stay in opt mode. - default = 36 - */ - - u32 scoHighPktRatio; /*(Total Rx pkts in 100 ms + 1)/ - ((Total tx pkts in 100 ms - No of high rate pkts in 100 ms) + 1) in 100 ms, - if exceeded switch/stay in opt mode and if lower switch/stay in pspoll mode. - default = 5 (80% of high rates) - */ - - u32 scoMaxAggrSize; /* Max number of Rx subframes allowed in this mode. (Firmware re-negogiates - max number of aggregates if it was negogiated to higher value - default = 1 - Recommended value Basic rate headsets = 1, EDR (2-EV3) =4. - */ -}POSTPACK BTCOEX_OPTMODE_SCO_CONFIG; - -typedef PREPACK struct { - u32 scanInterval; - u32 maxScanStompCnt; -}POSTPACK BTCOEX_WLANSCAN_SCO_CONFIG; - -typedef PREPACK struct { - BTCOEX_SCO_CONFIG scoConfig; - BTCOEX_PSPOLLMODE_SCO_CONFIG scoPspollConfig; - BTCOEX_OPTMODE_SCO_CONFIG scoOptModeConfig; - BTCOEX_WLANSCAN_SCO_CONFIG scoWlanScanConfig; -}POSTPACK WMI_SET_BTCOEX_SCO_CONFIG_CMD; - -/* ------------------WMI_SET_BTCOEX_A2DP_CONFIG_CMDID -------------------*/ -/* Configure A2DP profile parameters. These parameters would be used whenver firmware is indicated - * of A2DP profile on bluetooth ( via WMI_SET_BTCOEX_BT_OPERATING_STATUS_CMDID). - * Configuration of BTCOEX_A2DP_CONFIG data structure are common configuration and applies to - * ps-poll mode and opt mode. - * Ps-poll Mode - Station is in power-save and retrieves downlink data between a2dp data bursts. - * Opt Mode - station is in power save during a2dp bursts and awake in the gaps. - * BTCOEX_PSPOLLMODE_A2DP_CONFIG - Configuration applied only during ps-poll mode. - * BTCOEX_OPTMODE_A2DP_CONFIG - Configuration applied only during opt mode. - */ - -#define WMI_A2DP_CONFIG_FLAG_ALLOW_OPTIMIZATION (1 << 0) -#define WMI_A2DP_CONFIG_FLAG_IS_EDR_CAPABLE (1 << 1) -#define WMI_A2DP_CONFIG_FLAG_IS_BT_ROLE_MASTER (1 << 2) -#define WMI_A2DP_CONFIG_FLAG_IS_A2DP_HIGH_PRI (1 << 3) -#define WMI_A2DP_CONFIG_FLAG_FIND_BT_ROLE (1 << 4) - -typedef PREPACK struct { - u32 a2dpFlags; /* A2DP Option flags: - bits: meaning: - 0 Allow Close Range Optimization - 1 IS EDR capable - 2 IS Co-located Bt role Master - 3 a2dp traffic is high priority - 4 Fw detect the role of bluetooth. - */ - u32 linkId; /* Applicable only to STE-BT - not used */ - -}POSTPACK BTCOEX_A2DP_CONFIG; - -typedef PREPACK struct { - u32 a2dpWlanMaxDur; /* MAX time firmware uses the medium for - wlan, after it identifies the idle time - default (30 msecs) */ - - u32 a2dpMinBurstCnt; /* Minimum number of bluetooth data frames - to replenish Wlan Usage limit (default 3) */ - - u32 a2dpDataRespTimeout; /* Max duration firmware waits for downlink - by stomping on bluetooth - after ps-poll is acknowledged. - default = 20 ms - */ -}POSTPACK BTCOEX_PSPOLLMODE_A2DP_CONFIG; - -typedef PREPACK struct { - u32 a2dpMinlowRateMbps; /* Low rate threshold */ - - u32 a2dpLowRateCnt; /* number of low rate pkts (< a2dpMinlowRateMbps) allowed in 100 ms. - If exceeded switch/stay to ps-poll mode, lower stay in opt mode. - default = 36 - */ - - u32 a2dpHighPktRatio; /*(Total Rx pkts in 100 ms + 1)/ - ((Total tx pkts in 100 ms - No of high rate pkts in 100 ms) + 1) in 100 ms, - if exceeded switch/stay in opt mode and if lower switch/stay in pspoll mode. - default = 5 (80% of high rates) - */ - - u32 a2dpMaxAggrSize; /* Max number of Rx subframes allowed in this mode. (Firmware re-negogiates - max number of aggregates if it was negogiated to higher value - default = 1 - Recommended value Basic rate headsets = 1, EDR (2-EV3) =8. - */ - u32 a2dpPktStompCnt; /*number of a2dp pkts that can be stomped per burst. - default = 6*/ - -}POSTPACK BTCOEX_OPTMODE_A2DP_CONFIG; - -typedef PREPACK struct { - BTCOEX_A2DP_CONFIG a2dpConfig; - BTCOEX_PSPOLLMODE_A2DP_CONFIG a2dppspollConfig; - BTCOEX_OPTMODE_A2DP_CONFIG a2dpOptConfig; -}POSTPACK WMI_SET_BTCOEX_A2DP_CONFIG_CMD; - -/*------------ WMI_SET_BTCOEX_ACLCOEX_CONFIG_CMDID---------------------*/ -/* Configure non-A2dp ACL profile parameters.The starts of ACL profile can either be - * indicated via WMI_SET_BTCOEX_BT_OPERATING_STATUS_CMDID orenabled via firmware detection - * which is configured via "aclCoexFlags". - * Configration of BTCOEX_ACLCOEX_CONFIG data structure are common configuration and applies - * ps-poll mode and opt mode. - * Ps-poll Mode - Station is in power-save and retrieves downlink data during wlan medium. - * Opt Mode - station is in power save during bluetooth medium time and awake during wlan duration. - * (Not implemented yet) - * - * BTCOEX_PSPOLLMODE_ACLCOEX_CONFIG - Configuration applied only during ps-poll mode. - * BTCOEX_OPTMODE_ACLCOEX_CONFIG - Configuration applied only during opt mode. - */ - -#define WMI_ACLCOEX_FLAGS_ALLOW_OPTIMIZATION (1 << 0) -#define WMI_ACLCOEX_FLAGS_DISABLE_FW_DETECTION (1 << 1) - -typedef PREPACK struct { - u32 aclWlanMediumDur; /* Wlan usage time during Acl (non-a2dp) - coexistence (default 30 msecs) - */ - - u32 aclBtMediumDur; /* Bt usage time during acl coexistence - (default 30 msecs) - */ - - u32 aclDetectTimeout; /* BT activity observation time limit. - In this time duration, number of bt pkts are counted. - If the Cnt reaches "aclPktCntLowerLimit" value - for "aclIterToEnableCoex" iteration continuously, - firmware gets into ACL coexistence mode. - Similarly, if bt traffic count during ACL coexistence - has not reached "aclPktCntLowerLimit" continuously - for "aclIterToEnableCoex", then ACL coexistence is - disabled. - -default 100 msecs - */ - - u32 aclPktCntLowerLimit; /* Acl Pkt Cnt to be received in duration of - "aclDetectTimeout" for - "aclIterForEnDis" times to enabling ACL coex. - Similar logic is used to disable acl coexistence. - (If "aclPktCntLowerLimit" cnt of acl pkts - are not seen by the for "aclIterForEnDis" - then acl coexistence is disabled). - default = 10 - */ - - u32 aclIterForEnDis; /* number of Iteration of "aclPktCntLowerLimit" for Enabling and - Disabling Acl Coexistence. - default = 3 - */ - - u32 aclPktCntUpperLimit; /* This is upperBound limit, if there is more than - "aclPktCntUpperLimit" seen in "aclDetectTimeout", - ACL coexistence is enabled right away. - - default 15*/ - - u32 aclCoexFlags; /* A2DP Option flags: - bits: meaning: - 0 Allow Close Range Optimization - 1 disable Firmware detection - (Currently supported configuration is aclCoexFlags =0) - */ - u32 linkId; /* Applicable only for STE-BT - not used */ - -}POSTPACK BTCOEX_ACLCOEX_CONFIG; - -typedef PREPACK struct { - u32 aclDataRespTimeout; /* Max duration firmware waits for downlink - by stomping on bluetooth - after ps-poll is acknowledged. - default = 20 ms */ - -}POSTPACK BTCOEX_PSPOLLMODE_ACLCOEX_CONFIG; - - -/* Not implemented yet*/ -typedef PREPACK struct { - u32 aclCoexMinlowRateMbps; - u32 aclCoexLowRateCnt; - u32 aclCoexHighPktRatio; - u32 aclCoexMaxAggrSize; - u32 aclPktStompCnt; -}POSTPACK BTCOEX_OPTMODE_ACLCOEX_CONFIG; - -typedef PREPACK struct { - BTCOEX_ACLCOEX_CONFIG aclCoexConfig; - BTCOEX_PSPOLLMODE_ACLCOEX_CONFIG aclCoexPspollConfig; - BTCOEX_OPTMODE_ACLCOEX_CONFIG aclCoexOptConfig; -}POSTPACK WMI_SET_BTCOEX_ACLCOEX_CONFIG_CMD; - -/* -----------WMI_SET_BTCOEX_BT_OPERATING_STATUS_CMDID ------------------*/ -typedef enum { - WMI_BTCOEX_BT_PROFILE_SCO =1, - WMI_BTCOEX_BT_PROFILE_A2DP, - WMI_BTCOEX_BT_PROFILE_INQUIRY_PAGE, - WMI_BTCOEX_BT_PROFILE_ACLCOEX, -}WMI_BTCOEX_BT_PROFILE; - -typedef PREPACK struct { - u32 btProfileType; - u32 btOperatingStatus; - u32 btLinkId; -}WMI_SET_BTCOEX_BT_OPERATING_STATUS_CMD; - -/*--------------------- WMI_SET_BTCOEX_DEBUG_CMDID ---------------------*/ -/* Used for firmware development and debugging */ -typedef PREPACK struct { - u32 btcoexDbgParam1; - u32 btcoexDbgParam2; - u32 btcoexDbgParam3; - u32 btcoexDbgParam4; - u32 btcoexDbgParam5; -}WMI_SET_BTCOEX_DEBUG_CMD; - -/*---------------------WMI_GET_BTCOEX_CONFIG_CMDID --------------------- */ -/* Command to firmware to get configuration parameters of the bt profile - * reported via WMI_BTCOEX_CONFIG_EVENTID */ -typedef PREPACK struct { - u32 btProfileType; /* 1 - SCO - 2 - A2DP - 3 - INQUIRY_PAGE - 4 - ACLCOEX - */ - u32 linkId; /* not used */ -}WMI_GET_BTCOEX_CONFIG_CMD; - -/*------------------WMI_REPORT_BTCOEX_CONFIG_EVENTID------------------- */ -/* Event from firmware to host, sent in response to WMI_GET_BTCOEX_CONFIG_CMDID - * */ -typedef PREPACK struct { - u32 btProfileType; - u32 linkId; /* not used */ - PREPACK union { - WMI_SET_BTCOEX_SCO_CONFIG_CMD scoConfigCmd; - WMI_SET_BTCOEX_A2DP_CONFIG_CMD a2dpConfigCmd; - WMI_SET_BTCOEX_ACLCOEX_CONFIG_CMD aclcoexConfig; - WMI_SET_BTCOEX_BTINQUIRY_PAGE_CONFIG_CMD btinquiryPageConfigCmd; - } POSTPACK info; -} POSTPACK WMI_BTCOEX_CONFIG_EVENT; - -/*------------- WMI_REPORT_BTCOEX_BTCOEX_STATS_EVENTID--------------------*/ -/* Used for firmware development and debugging*/ -typedef PREPACK struct { - u32 highRatePktCnt; - u32 firstBmissCnt; - u32 psPollFailureCnt; - u32 nullFrameFailureCnt; - u32 optModeTransitionCnt; -}BTCOEX_GENERAL_STATS; - -typedef PREPACK struct { - u32 scoStompCntAvg; - u32 scoStompIn100ms; - u32 scoMaxContStomp; - u32 scoAvgNoRetries; - u32 scoMaxNoRetriesIn100ms; -}BTCOEX_SCO_STATS; - -typedef PREPACK struct { - u32 a2dpBurstCnt; - u32 a2dpMaxBurstCnt; - u32 a2dpAvgIdletimeIn100ms; - u32 a2dpAvgStompCnt; -}BTCOEX_A2DP_STATS; - -typedef PREPACK struct { - u32 aclPktCntInBtTime; - u32 aclStompCntInWlanTime; - u32 aclPktCntIn100ms; -}BTCOEX_ACLCOEX_STATS; - -typedef PREPACK struct { - BTCOEX_GENERAL_STATS coexStats; - BTCOEX_SCO_STATS scoStats; - BTCOEX_A2DP_STATS a2dpStats; - BTCOEX_ACLCOEX_STATS aclCoexStats; -}WMI_BTCOEX_STATS_EVENT; - - -/*--------------------------END OF BTCOEX -------------------------------------*/ -typedef PREPACK struct { - u32 sleepState; -}WMI_REPORT_SLEEP_STATE_EVENT; - -typedef enum { - WMI_REPORT_SLEEP_STATUS_IS_DEEP_SLEEP =0, - WMI_REPORT_SLEEP_STATUS_IS_AWAKE -} WMI_REPORT_SLEEP_STATUS; -typedef enum { - DISCONN_EVT_IN_RECONN = 0, /* default */ - NO_DISCONN_EVT_IN_RECONN -} TARGET_EVENT_REPORT_CONFIG; - -typedef PREPACK struct { - u32 evtConfig; -} POSTPACK WMI_SET_TARGET_EVENT_REPORT_CMD; - - -typedef PREPACK struct { - u16 cmd_buf_sz; /* HCI cmd buffer size */ - u8 buf[1]; /* Absolute HCI cmd */ -} POSTPACK WMI_HCI_CMD; - -/* - * Command Replies - */ - -/* - * WMI_GET_CHANNEL_LIST_CMDID reply - */ -typedef PREPACK struct { - u8 reserved1; - u8 numChannels; /* number of channels in reply */ - u16 channelList[1]; /* channel in Mhz */ -} POSTPACK WMI_CHANNEL_LIST_REPLY; - -typedef enum { - A_SUCCEEDED = 0, - A_FAILED_DELETE_STREAM_DOESNOT_EXIST=250, - A_SUCCEEDED_MODIFY_STREAM=251, - A_FAILED_INVALID_STREAM = 252, - A_FAILED_MAX_THINSTREAMS = 253, - A_FAILED_CREATE_REMOVE_PSTREAM_FIRST = 254, -} PSTREAM_REPLY_STATUS; - -typedef PREPACK struct { - u8 status; /* PSTREAM_REPLY_STATUS */ - u8 txQueueNumber; - u8 rxQueueNumber; - u8 trafficClass; - u8 trafficDirection; /* DIR_TYPE */ -} POSTPACK WMI_CRE_PRIORITY_STREAM_REPLY; - -typedef PREPACK struct { - u8 status; /* PSTREAM_REPLY_STATUS */ - u8 txQueueNumber; - u8 rxQueueNumber; - u8 trafficDirection; /* DIR_TYPE */ - u8 trafficClass; -} POSTPACK WMI_DEL_PRIORITY_STREAM_REPLY; - -/* - * List of Events (target to host) - */ -typedef enum { - WMI_READY_EVENTID = 0x1001, - WMI_CONNECT_EVENTID, - WMI_DISCONNECT_EVENTID, - WMI_BSSINFO_EVENTID, - WMI_CMDERROR_EVENTID, - WMI_REGDOMAIN_EVENTID, - WMI_PSTREAM_TIMEOUT_EVENTID, - WMI_NEIGHBOR_REPORT_EVENTID, - WMI_TKIP_MICERR_EVENTID, - WMI_SCAN_COMPLETE_EVENTID, /* 0x100a */ - WMI_REPORT_STATISTICS_EVENTID, - WMI_RSSI_THRESHOLD_EVENTID, - WMI_ERROR_REPORT_EVENTID, - WMI_OPT_RX_FRAME_EVENTID, - WMI_REPORT_ROAM_TBL_EVENTID, - WMI_EXTENSION_EVENTID, - WMI_CAC_EVENTID, - WMI_SNR_THRESHOLD_EVENTID, - WMI_LQ_THRESHOLD_EVENTID, - WMI_TX_RETRY_ERR_EVENTID, /* 0x1014 */ - WMI_REPORT_ROAM_DATA_EVENTID, - WMI_TEST_EVENTID, - WMI_APLIST_EVENTID, - WMI_GET_WOW_LIST_EVENTID, - WMI_GET_PMKID_LIST_EVENTID, - WMI_CHANNEL_CHANGE_EVENTID, - WMI_PEER_NODE_EVENTID, - WMI_PSPOLL_EVENTID, - WMI_DTIMEXPIRY_EVENTID, - WMI_WLAN_VERSION_EVENTID, - WMI_SET_PARAMS_REPLY_EVENTID, - WMI_ADDBA_REQ_EVENTID, /*0x1020 */ - WMI_ADDBA_RESP_EVENTID, - WMI_DELBA_REQ_EVENTID, - WMI_TX_COMPLETE_EVENTID, - WMI_HCI_EVENT_EVENTID, - WMI_ACL_DATA_EVENTID, - WMI_REPORT_SLEEP_STATE_EVENTID, -#ifdef WAPI_ENABLE - WMI_WAPI_REKEY_EVENTID, -#endif - WMI_REPORT_BTCOEX_STATS_EVENTID, - WMI_REPORT_BTCOEX_CONFIG_EVENTID, - WMI_GET_PMK_EVENTID, - - /* DFS Events */ - WMI_DFS_HOST_ATTACH_EVENTID, - WMI_DFS_HOST_INIT_EVENTID, - WMI_DFS_RESET_DELAYLINES_EVENTID, - WMI_DFS_RESET_RADARQ_EVENTID, - WMI_DFS_RESET_AR_EVENTID, - WMI_DFS_RESET_ARQ_EVENTID, - WMI_DFS_SET_DUR_MULTIPLIER_EVENTID, - WMI_DFS_SET_BANGRADAR_EVENTID, - WMI_DFS_SET_DEBUGLEVEL_EVENTID, - WMI_DFS_PHYERR_EVENTID, - /* CCX Evants */ - WMI_CCX_RM_STATUS_EVENTID, - - /* P2P Events */ - WMI_P2P_GO_NEG_RESULT_EVENTID, - - WMI_WAC_SCAN_DONE_EVENTID, - WMI_WAC_REPORT_BSS_EVENTID, - WMI_WAC_START_WPS_EVENTID, - WMI_WAC_CTRL_REQ_REPLY_EVENTID, - - /* RFKILL Events */ - WMI_RFKILL_STATE_CHANGE_EVENTID, - WMI_RFKILL_GET_MODE_CMD_EVENTID, - WMI_THIN_RESERVED_START_EVENTID = 0x8000, - - /* - * Events in this range are reserved for thinmode - * See wmi_thin.h for actual definitions - */ - WMI_THIN_RESERVED_END_EVENTID = 0x8fff, - - WMI_SET_CHANNEL_EVENTID, - WMI_ASSOC_REQ_EVENTID, - - /* generic ACS event */ - WMI_ACS_EVENTID, - WMI_REPORT_WMM_PARAMS_EVENTID -} WMI_EVENT_ID; - - -typedef enum { - WMI_11A_CAPABILITY = 1, - WMI_11G_CAPABILITY = 2, - WMI_11AG_CAPABILITY = 3, - WMI_11NA_CAPABILITY = 4, - WMI_11NG_CAPABILITY = 5, - WMI_11NAG_CAPABILITY = 6, - // END CAPABILITY - WMI_11N_CAPABILITY_OFFSET = (WMI_11NA_CAPABILITY - WMI_11A_CAPABILITY), -} WMI_PHY_CAPABILITY; - -typedef PREPACK struct { - u8 macaddr[ATH_MAC_LEN]; - u8 phyCapability; /* WMI_PHY_CAPABILITY */ -} POSTPACK WMI_READY_EVENT_1; - -typedef PREPACK struct { - u32 sw_version; - u32 abi_version; - u8 macaddr[ATH_MAC_LEN]; - u8 phyCapability; /* WMI_PHY_CAPABILITY */ -} POSTPACK WMI_READY_EVENT_2; - -#if defined(ATH_TARGET) -#ifdef AR6002_REV2 -#define WMI_READY_EVENT WMI_READY_EVENT_1 /* AR6002_REV2 target code */ -#else -#define WMI_READY_EVENT WMI_READY_EVENT_2 /* AR6001, AR6002_REV4, AR6002_REV5 */ -#endif -#else -#define WMI_READY_EVENT WMI_READY_EVENT_2 /* host code */ -#endif - - -/* - * Connect Event - */ -typedef PREPACK struct { - u16 channel; - u8 bssid[ATH_MAC_LEN]; - u16 listenInterval; - u16 beaconInterval; - u32 networkType; - u8 beaconIeLen; - u8 assocReqLen; - u8 assocRespLen; - u8 assocInfo[1]; -} POSTPACK WMI_CONNECT_EVENT; - -/* - * Disconnect Event - */ -typedef enum { - NO_NETWORK_AVAIL = 0x01, - LOST_LINK = 0x02, /* bmiss */ - DISCONNECT_CMD = 0x03, - BSS_DISCONNECTED = 0x04, - AUTH_FAILED = 0x05, - ASSOC_FAILED = 0x06, - NO_RESOURCES_AVAIL = 0x07, - CSERV_DISCONNECT = 0x08, - INVALID_PROFILE = 0x0a, - DOT11H_CHANNEL_SWITCH = 0x0b, - PROFILE_MISMATCH = 0x0c, - CONNECTION_EVICTED = 0x0d, - IBSS_MERGE = 0xe, -} WMI_DISCONNECT_REASON; - -typedef PREPACK struct { - u16 protocolReasonStatus; /* reason code, see 802.11 spec. */ - u8 bssid[ATH_MAC_LEN]; /* set if known */ - u8 disconnectReason ; /* see WMI_DISCONNECT_REASON */ - u8 assocRespLen; - u8 assocInfo[1]; -} POSTPACK WMI_DISCONNECT_EVENT; - -/* - * BSS Info Event. - * Mechanism used to inform host of the presence and characteristic of - * wireless networks present. Consists of bss info header followed by - * the beacon or probe-response frame body. The 802.11 header is not included. - */ -typedef enum { - BEACON_FTYPE = 0x1, - PROBERESP_FTYPE, - ACTION_MGMT_FTYPE, - PROBEREQ_FTYPE, -} WMI_BI_FTYPE; - -enum { - BSS_ELEMID_CHANSWITCH = 0x01, - BSS_ELEMID_ATHEROS = 0x02, -}; - -typedef PREPACK struct { - u16 channel; - u8 frameType; /* see WMI_BI_FTYPE */ - u8 snr; - s16 rssi; - u8 bssid[ATH_MAC_LEN]; - u32 ieMask; -} POSTPACK WMI_BSS_INFO_HDR; - -/* - * BSS INFO HDR version 2.0 - * With 6 bytes HTC header and 6 bytes of WMI header - * WMI_BSS_INFO_HDR cannot be accommodated in the removed 802.11 management - * header space. - * - Reduce the ieMask to 2 bytes as only two bit flags are used - * - Remove rssi and compute it on the host. rssi = snr - 95 - */ -typedef PREPACK struct { - u16 channel; - u8 frameType; /* see WMI_BI_FTYPE */ - u8 snr; - u8 bssid[ATH_MAC_LEN]; - u16 ieMask; -} POSTPACK WMI_BSS_INFO_HDR2; - -/* - * Command Error Event - */ -typedef enum { - INVALID_PARAM = 0x01, - ILLEGAL_STATE = 0x02, - INTERNAL_ERROR = 0x03, -} WMI_ERROR_CODE; - -typedef PREPACK struct { - u16 commandId; - u8 errorCode; -} POSTPACK WMI_CMD_ERROR_EVENT; - -/* - * New Regulatory Domain Event - */ -typedef PREPACK struct { - u32 regDomain; -} POSTPACK WMI_REG_DOMAIN_EVENT; - -typedef PREPACK struct { - u8 txQueueNumber; - u8 rxQueueNumber; - u8 trafficDirection; - u8 trafficClass; -} POSTPACK WMI_PSTREAM_TIMEOUT_EVENT; - -typedef PREPACK struct { - u8 reserve1; - u8 reserve2; - u8 reserve3; - u8 trafficClass; -} POSTPACK WMI_ACM_REJECT_EVENT; - -/* - * The WMI_NEIGHBOR_REPORT Event is generated by the target to inform - * the host of BSS's it has found that matches the current profile. - * It can be used by the host to cache PMKs and/to initiate pre-authentication - * if the BSS supports it. The first bssid is always the current associated - * BSS. - * The bssid and bssFlags information repeats according to the number - * or APs reported. - */ -typedef enum { - WMI_DEFAULT_BSS_FLAGS = 0x00, - WMI_PREAUTH_CAPABLE_BSS = 0x01, - WMI_PMKID_VALID_BSS = 0x02, -} WMI_BSS_FLAGS; - -typedef PREPACK struct { - u8 bssid[ATH_MAC_LEN]; - u8 bssFlags; /* see WMI_BSS_FLAGS */ -} POSTPACK WMI_NEIGHBOR_INFO; - -typedef PREPACK struct { - s8 numberOfAps; - WMI_NEIGHBOR_INFO neighbor[1]; -} POSTPACK WMI_NEIGHBOR_REPORT_EVENT; - -/* - * TKIP MIC Error Event - */ -typedef PREPACK struct { - u8 keyid; - u8 ismcast; -} POSTPACK WMI_TKIP_MICERR_EVENT; - -/* - * WMI_SCAN_COMPLETE_EVENTID - no parameters (old), staus parameter (new) - */ -typedef PREPACK struct { - s32 status; -} POSTPACK WMI_SCAN_COMPLETE_EVENT; - -#define MAX_OPT_DATA_LEN 1400 - -/* - * WMI_SET_ADHOC_BSSID_CMDID - */ -typedef PREPACK struct { - u8 bssid[ATH_MAC_LEN]; -} POSTPACK WMI_SET_ADHOC_BSSID_CMD; - -/* - * WMI_SET_OPT_MODE_CMDID - */ -typedef enum { - SPECIAL_OFF, - SPECIAL_ON, -} OPT_MODE_TYPE; - -typedef PREPACK struct { - u8 optMode; -} POSTPACK WMI_SET_OPT_MODE_CMD; - -/* - * WMI_TX_OPT_FRAME_CMDID - */ -typedef enum { - OPT_PROBE_REQ = 0x01, - OPT_PROBE_RESP = 0x02, - OPT_CPPP_START = 0x03, - OPT_CPPP_STOP = 0x04, -} WMI_OPT_FTYPE; - -typedef PREPACK struct { - u16 optIEDataLen; - u8 frmType; - u8 dstAddr[ATH_MAC_LEN]; - u8 bssid[ATH_MAC_LEN]; - u8 reserved; /* For alignment */ - u8 optIEData[1]; -} POSTPACK WMI_OPT_TX_FRAME_CMD; - -/* - * Special frame receive Event. - * Mechanism used to inform host of the receiption of the special frames. - * Consists of special frame info header followed by special frame body. - * The 802.11 header is not included. - */ -typedef PREPACK struct { - u16 channel; - u8 frameType; /* see WMI_OPT_FTYPE */ - s8 snr; - u8 srcAddr[ATH_MAC_LEN]; - u8 bssid[ATH_MAC_LEN]; -} POSTPACK WMI_OPT_RX_INFO_HDR; - -/* - * Reporting statistics. - */ -typedef PREPACK struct { - u32 tx_packets; - u32 tx_bytes; - u32 tx_unicast_pkts; - u32 tx_unicast_bytes; - u32 tx_multicast_pkts; - u32 tx_multicast_bytes; - u32 tx_broadcast_pkts; - u32 tx_broadcast_bytes; - u32 tx_rts_success_cnt; - u32 tx_packet_per_ac[4]; - u32 tx_errors_per_ac[4]; - - u32 tx_errors; - u32 tx_failed_cnt; - u32 tx_retry_cnt; - u32 tx_mult_retry_cnt; - u32 tx_rts_fail_cnt; - s32 tx_unicast_rate; -}POSTPACK tx_stats_t; - -typedef PREPACK struct { - u32 rx_packets; - u32 rx_bytes; - u32 rx_unicast_pkts; - u32 rx_unicast_bytes; - u32 rx_multicast_pkts; - u32 rx_multicast_bytes; - u32 rx_broadcast_pkts; - u32 rx_broadcast_bytes; - u32 rx_fragment_pkt; - - u32 rx_errors; - u32 rx_crcerr; - u32 rx_key_cache_miss; - u32 rx_decrypt_err; - u32 rx_duplicate_frames; - s32 rx_unicast_rate; -}POSTPACK rx_stats_t; - -typedef PREPACK struct { - u32 tkip_local_mic_failure; - u32 tkip_counter_measures_invoked; - u32 tkip_replays; - u32 tkip_format_errors; - u32 ccmp_format_errors; - u32 ccmp_replays; -}POSTPACK tkip_ccmp_stats_t; - -typedef PREPACK struct { - u32 power_save_failure_cnt; - u16 stop_tx_failure_cnt; - u16 atim_tx_failure_cnt; - u16 atim_rx_failure_cnt; - u16 bcn_rx_failure_cnt; -}POSTPACK pm_stats_t; - -typedef PREPACK struct { - u32 cs_bmiss_cnt; - u32 cs_lowRssi_cnt; - u16 cs_connect_cnt; - u16 cs_disconnect_cnt; - s16 cs_aveBeacon_rssi; - u16 cs_roam_count; - s16 cs_rssi; - u8 cs_snr; - u8 cs_aveBeacon_snr; - u8 cs_lastRoam_msec; -} POSTPACK cserv_stats_t; - -typedef PREPACK struct { - tx_stats_t tx_stats; - rx_stats_t rx_stats; - tkip_ccmp_stats_t tkipCcmpStats; -}POSTPACK wlan_net_stats_t; - -typedef PREPACK struct { - u32 arp_received; - u32 arp_matched; - u32 arp_replied; -} POSTPACK arp_stats_t; - -typedef PREPACK struct { - u32 wow_num_pkts_dropped; - u16 wow_num_events_discarded; - u8 wow_num_host_pkt_wakeups; - u8 wow_num_host_event_wakeups; -} POSTPACK wlan_wow_stats_t; - -typedef PREPACK struct { - u32 lqVal; - s32 noise_floor_calibation; - pm_stats_t pmStats; - wlan_net_stats_t txrxStats; - wlan_wow_stats_t wowStats; - arp_stats_t arpStats; - cserv_stats_t cservStats; -} POSTPACK WMI_TARGET_STATS; - -/* - * WMI_RSSI_THRESHOLD_EVENTID. - * Indicate the RSSI events to host. Events are indicated when we breach a - * thresold value. - */ -typedef enum{ - WMI_RSSI_THRESHOLD1_ABOVE = 0, - WMI_RSSI_THRESHOLD2_ABOVE, - WMI_RSSI_THRESHOLD3_ABOVE, - WMI_RSSI_THRESHOLD4_ABOVE, - WMI_RSSI_THRESHOLD5_ABOVE, - WMI_RSSI_THRESHOLD6_ABOVE, - WMI_RSSI_THRESHOLD1_BELOW, - WMI_RSSI_THRESHOLD2_BELOW, - WMI_RSSI_THRESHOLD3_BELOW, - WMI_RSSI_THRESHOLD4_BELOW, - WMI_RSSI_THRESHOLD5_BELOW, - WMI_RSSI_THRESHOLD6_BELOW -}WMI_RSSI_THRESHOLD_VAL; - -typedef PREPACK struct { - s16 rssi; - u8 range; -}POSTPACK WMI_RSSI_THRESHOLD_EVENT; - -/* - * WMI_ERROR_REPORT_EVENTID - */ -typedef enum{ - WMI_TARGET_PM_ERR_FAIL = 0x00000001, - WMI_TARGET_KEY_NOT_FOUND = 0x00000002, - WMI_TARGET_DECRYPTION_ERR = 0x00000004, - WMI_TARGET_BMISS = 0x00000008, - WMI_PSDISABLE_NODE_JOIN = 0x00000010, - WMI_TARGET_COM_ERR = 0x00000020, - WMI_TARGET_FATAL_ERR = 0x00000040 -} WMI_TARGET_ERROR_VAL; - -typedef PREPACK struct { - u32 errorVal; -}POSTPACK WMI_TARGET_ERROR_REPORT_EVENT; - -typedef PREPACK struct { - u8 retrys; -}POSTPACK WMI_TX_RETRY_ERR_EVENT; - -typedef enum{ - WMI_SNR_THRESHOLD1_ABOVE = 1, - WMI_SNR_THRESHOLD1_BELOW, - WMI_SNR_THRESHOLD2_ABOVE, - WMI_SNR_THRESHOLD2_BELOW, - WMI_SNR_THRESHOLD3_ABOVE, - WMI_SNR_THRESHOLD3_BELOW, - WMI_SNR_THRESHOLD4_ABOVE, - WMI_SNR_THRESHOLD4_BELOW -} WMI_SNR_THRESHOLD_VAL; - -typedef PREPACK struct { - u8 range; /* WMI_SNR_THRESHOLD_VAL */ - u8 snr; -}POSTPACK WMI_SNR_THRESHOLD_EVENT; - -typedef enum{ - WMI_LQ_THRESHOLD1_ABOVE = 1, - WMI_LQ_THRESHOLD1_BELOW, - WMI_LQ_THRESHOLD2_ABOVE, - WMI_LQ_THRESHOLD2_BELOW, - WMI_LQ_THRESHOLD3_ABOVE, - WMI_LQ_THRESHOLD3_BELOW, - WMI_LQ_THRESHOLD4_ABOVE, - WMI_LQ_THRESHOLD4_BELOW -} WMI_LQ_THRESHOLD_VAL; - -typedef PREPACK struct { - s32 lq; - u8 range; /* WMI_LQ_THRESHOLD_VAL */ -}POSTPACK WMI_LQ_THRESHOLD_EVENT; -/* - * WMI_REPORT_ROAM_TBL_EVENTID - */ -#define MAX_ROAM_TBL_CAND 5 - -typedef PREPACK struct { - s32 roam_util; - u8 bssid[ATH_MAC_LEN]; - s8 rssi; - s8 rssidt; - s8 last_rssi; - s8 util; - s8 bias; - u8 reserved; /* For alignment */ -} POSTPACK WMI_BSS_ROAM_INFO; - - -typedef PREPACK struct { - u16 roamMode; - u16 numEntries; - WMI_BSS_ROAM_INFO bssRoamInfo[1]; -} POSTPACK WMI_TARGET_ROAM_TBL; - -/* - * WMI_HCI_EVENT_EVENTID - */ -typedef PREPACK struct { - u16 evt_buf_sz; /* HCI event buffer size */ - u8 buf[1]; /* HCI event */ -} POSTPACK WMI_HCI_EVENT; - -/* - * WMI_CAC_EVENTID - */ -typedef enum { - CAC_INDICATION_ADMISSION = 0x00, - CAC_INDICATION_ADMISSION_RESP = 0x01, - CAC_INDICATION_DELETE = 0x02, - CAC_INDICATION_NO_RESP = 0x03, -}CAC_INDICATION; - -#define WMM_TSPEC_IE_LEN 63 - -typedef PREPACK struct { - u8 ac; - u8 cac_indication; - u8 statusCode; - u8 tspecSuggestion[WMM_TSPEC_IE_LEN]; -}POSTPACK WMI_CAC_EVENT; - -/* - * WMI_APLIST_EVENTID - */ - -typedef enum { - APLIST_VER1 = 1, -} APLIST_VER; - -typedef PREPACK struct { - u8 bssid[ATH_MAC_LEN]; - u16 channel; -} POSTPACK WMI_AP_INFO_V1; - -typedef PREPACK union { - WMI_AP_INFO_V1 apInfoV1; -} POSTPACK WMI_AP_INFO; - -typedef PREPACK struct { - u8 apListVer; - u8 numAP; - WMI_AP_INFO apList[1]; -} POSTPACK WMI_APLIST_EVENT; - -/* - * developer commands - */ - -/* - * WMI_SET_BITRATE_CMDID - * - * Get bit rate cmd uses same definition as set bit rate cmd - */ -typedef enum { - RATE_AUTO = -1, - RATE_1Mb = 0, - RATE_2Mb = 1, - RATE_5_5Mb = 2, - RATE_11Mb = 3, - RATE_6Mb = 4, - RATE_9Mb = 5, - RATE_12Mb = 6, - RATE_18Mb = 7, - RATE_24Mb = 8, - RATE_36Mb = 9, - RATE_48Mb = 10, - RATE_54Mb = 11, - RATE_MCS_0_20 = 12, - RATE_MCS_1_20 = 13, - RATE_MCS_2_20 = 14, - RATE_MCS_3_20 = 15, - RATE_MCS_4_20 = 16, - RATE_MCS_5_20 = 17, - RATE_MCS_6_20 = 18, - RATE_MCS_7_20 = 19, - RATE_MCS_0_40 = 20, - RATE_MCS_1_40 = 21, - RATE_MCS_2_40 = 22, - RATE_MCS_3_40 = 23, - RATE_MCS_4_40 = 24, - RATE_MCS_5_40 = 25, - RATE_MCS_6_40 = 26, - RATE_MCS_7_40 = 27, -} WMI_BIT_RATE; - -typedef PREPACK struct { - s8 rateIndex; /* see WMI_BIT_RATE */ - s8 mgmtRateIndex; - s8 ctlRateIndex; -} POSTPACK WMI_BIT_RATE_CMD; - - -typedef PREPACK struct { - s8 rateIndex; /* see WMI_BIT_RATE */ -} POSTPACK WMI_BIT_RATE_REPLY; - - -/* - * WMI_SET_FIXRATES_CMDID - * - * Get fix rates cmd uses same definition as set fix rates cmd - */ -#define FIX_RATE_1Mb ((u32)0x1) -#define FIX_RATE_2Mb ((u32)0x2) -#define FIX_RATE_5_5Mb ((u32)0x4) -#define FIX_RATE_11Mb ((u32)0x8) -#define FIX_RATE_6Mb ((u32)0x10) -#define FIX_RATE_9Mb ((u32)0x20) -#define FIX_RATE_12Mb ((u32)0x40) -#define FIX_RATE_18Mb ((u32)0x80) -#define FIX_RATE_24Mb ((u32)0x100) -#define FIX_RATE_36Mb ((u32)0x200) -#define FIX_RATE_48Mb ((u32)0x400) -#define FIX_RATE_54Mb ((u32)0x800) -#define FIX_RATE_MCS_0_20 ((u32)0x1000) -#define FIX_RATE_MCS_1_20 ((u32)0x2000) -#define FIX_RATE_MCS_2_20 ((u32)0x4000) -#define FIX_RATE_MCS_3_20 ((u32)0x8000) -#define FIX_RATE_MCS_4_20 ((u32)0x10000) -#define FIX_RATE_MCS_5_20 ((u32)0x20000) -#define FIX_RATE_MCS_6_20 ((u32)0x40000) -#define FIX_RATE_MCS_7_20 ((u32)0x80000) -#define FIX_RATE_MCS_0_40 ((u32)0x100000) -#define FIX_RATE_MCS_1_40 ((u32)0x200000) -#define FIX_RATE_MCS_2_40 ((u32)0x400000) -#define FIX_RATE_MCS_3_40 ((u32)0x800000) -#define FIX_RATE_MCS_4_40 ((u32)0x1000000) -#define FIX_RATE_MCS_5_40 ((u32)0x2000000) -#define FIX_RATE_MCS_6_40 ((u32)0x4000000) -#define FIX_RATE_MCS_7_40 ((u32)0x8000000) - -typedef PREPACK struct { - u32 fixRateMask; /* see WMI_BIT_RATE */ -} POSTPACK WMI_FIX_RATES_CMD, WMI_FIX_RATES_REPLY; - -typedef PREPACK struct { - u8 bEnableMask; - u8 frameType; /*type and subtype*/ - u32 frameRateMask; /* see WMI_BIT_RATE */ -} POSTPACK WMI_FRAME_RATES_CMD, WMI_FRAME_RATES_REPLY; - -/* - * WMI_SET_RECONNECT_AUTH_MODE_CMDID - * - * Set authentication mode - */ -typedef enum { - RECONN_DO_AUTH = 0x00, - RECONN_NOT_AUTH = 0x01 -} WMI_AUTH_MODE; - -typedef PREPACK struct { - u8 mode; -} POSTPACK WMI_SET_AUTH_MODE_CMD; - -/* - * WMI_SET_REASSOC_MODE_CMDID - * - * Set authentication mode - */ -typedef enum { - REASSOC_DO_DISASSOC = 0x00, - REASSOC_DONOT_DISASSOC = 0x01 -} WMI_REASSOC_MODE; - -typedef PREPACK struct { - u8 mode; -}POSTPACK WMI_SET_REASSOC_MODE_CMD; - -typedef enum { - ROAM_DATA_TIME = 1, /* Get The Roam Time Data */ -} ROAM_DATA_TYPE; - -typedef PREPACK struct { - u32 disassoc_time; - u32 no_txrx_time; - u32 assoc_time; - u32 allow_txrx_time; - u8 disassoc_bssid[ATH_MAC_LEN]; - s8 disassoc_bss_rssi; - u8 assoc_bssid[ATH_MAC_LEN]; - s8 assoc_bss_rssi; -} POSTPACK WMI_TARGET_ROAM_TIME; - -typedef PREPACK struct { - PREPACK union { - WMI_TARGET_ROAM_TIME roamTime; - } POSTPACK u; - u8 roamDataType ; -} POSTPACK WMI_TARGET_ROAM_DATA; - -typedef enum { - WMI_WMM_DISABLED = 0, - WMI_WMM_ENABLED -} WMI_WMM_STATUS; - -typedef PREPACK struct { - u8 status; -}POSTPACK WMI_SET_WMM_CMD; - -typedef PREPACK struct { - u8 status; -}POSTPACK WMI_SET_QOS_SUPP_CMD; - -typedef enum { - WMI_TXOP_DISABLED = 0, - WMI_TXOP_ENABLED -} WMI_TXOP_CFG; - -typedef PREPACK struct { - u8 txopEnable; -}POSTPACK WMI_SET_WMM_TXOP_CMD; - -typedef PREPACK struct { - u8 keepaliveInterval; -} POSTPACK WMI_SET_KEEPALIVE_CMD; - -typedef PREPACK struct { - u32 configured; - u8 keepaliveInterval; -} POSTPACK WMI_GET_KEEPALIVE_CMD; - -/* - * Add Application specified IE to a management frame - */ -#define WMI_MAX_IE_LEN 255 - -typedef PREPACK struct { - u8 mgmtFrmType; /* one of WMI_MGMT_FRAME_TYPE */ - u8 ieLen; /* Length of the IE that should be added to the MGMT frame */ - u8 ieInfo[1]; -} POSTPACK WMI_SET_APPIE_CMD; - -/* - * Notify the WSC registration status to the target - */ -#define WSC_REG_ACTIVE 1 -#define WSC_REG_INACTIVE 0 -/* Generic Hal Interface for setting hal paramters. */ -/* Add new Set HAL Param cmdIds here for newer params */ -typedef enum { - WHAL_SETCABTO_CMDID = 1, -}WHAL_CMDID; - -typedef PREPACK struct { - u8 cabTimeOut; -} POSTPACK WHAL_SETCABTO_PARAM; - -typedef PREPACK struct { - u8 whalCmdId; - u8 data[1]; -} POSTPACK WHAL_PARAMCMD; - - -#define WOW_MAX_FILTER_LISTS 1 /*4*/ -#define WOW_MAX_FILTERS_PER_LIST 4 -#define WOW_PATTERN_SIZE 64 -#define WOW_MASK_SIZE 64 - -#define MAC_MAX_FILTERS_PER_LIST 4 - -typedef PREPACK struct { - u8 wow_valid_filter; - u8 wow_filter_id; - u8 wow_filter_size; - u8 wow_filter_offset; - u8 wow_filter_mask[WOW_MASK_SIZE]; - u8 wow_filter_pattern[WOW_PATTERN_SIZE]; -} POSTPACK WOW_FILTER; - - -typedef PREPACK struct { - u8 wow_valid_list; - u8 wow_list_id; - u8 wow_num_filters; - u8 wow_total_list_size; - WOW_FILTER list[WOW_MAX_FILTERS_PER_LIST]; -} POSTPACK WOW_FILTER_LIST; - -typedef PREPACK struct { - u8 valid_filter; - u8 mac_addr[ATH_MAC_LEN]; -} POSTPACK MAC_FILTER; - - -typedef PREPACK struct { - u8 total_list_size; - u8 enable; - MAC_FILTER list[MAC_MAX_FILTERS_PER_LIST]; -} POSTPACK MAC_FILTER_LIST; - -#define MAX_IP_ADDRS 2 -typedef PREPACK struct { - u32 ips[MAX_IP_ADDRS]; /* IP in Network Byte Order */ -} POSTPACK WMI_SET_IP_CMD; - -typedef PREPACK struct { - u32 awake; - u32 asleep; -} POSTPACK WMI_SET_HOST_SLEEP_MODE_CMD; - -typedef enum { - WOW_FILTER_SSID = 0x1 -} WMI_WOW_FILTER; - -typedef PREPACK struct { - u32 enable_wow; - WMI_WOW_FILTER filter; - u16 hostReqDelay; -} POSTPACK WMI_SET_WOW_MODE_CMD; - -typedef PREPACK struct { - u8 filter_list_id; -} POSTPACK WMI_GET_WOW_LIST_CMD; - -/* - * WMI_GET_WOW_LIST_CMD reply - */ -typedef PREPACK struct { - u8 num_filters; /* number of patterns in reply */ - u8 this_filter_num; /* this is filter # x of total num_filters */ - u8 wow_mode; - u8 host_mode; - WOW_FILTER wow_filters[1]; -} POSTPACK WMI_GET_WOW_LIST_REPLY; - -typedef PREPACK struct { - u8 filter_list_id; - u8 filter_size; - u8 filter_offset; - u8 filter[1]; -} POSTPACK WMI_ADD_WOW_PATTERN_CMD; - -typedef PREPACK struct { - u16 filter_list_id; - u16 filter_id; -} POSTPACK WMI_DEL_WOW_PATTERN_CMD; - -typedef PREPACK struct { - u8 macaddr[ATH_MAC_LEN]; -} POSTPACK WMI_SET_MAC_ADDRESS_CMD; - -/* - * WMI_SET_AKMP_PARAMS_CMD - */ - -#define WMI_AKMP_MULTI_PMKID_EN 0x000001 - -typedef PREPACK struct { - u32 akmpInfo; -} POSTPACK WMI_SET_AKMP_PARAMS_CMD; - -typedef PREPACK struct { - u8 pmkid[WMI_PMKID_LEN]; -} POSTPACK WMI_PMKID; - -/* - * WMI_SET_PMKID_LIST_CMD - */ -#define WMI_MAX_PMKID_CACHE 8 - -typedef PREPACK struct { - u32 numPMKID; - WMI_PMKID pmkidList[WMI_MAX_PMKID_CACHE]; -} POSTPACK WMI_SET_PMKID_LIST_CMD; - -/* - * WMI_GET_PMKID_LIST_CMD Reply - * Following the Number of PMKIDs is the list of PMKIDs - */ -typedef PREPACK struct { - u32 numPMKID; - u8 bssidList[ATH_MAC_LEN][1]; - WMI_PMKID pmkidList[1]; -} POSTPACK WMI_PMKID_LIST_REPLY; - -typedef PREPACK struct { - u16 oldChannel; - u32 newChannel; -} POSTPACK WMI_CHANNEL_CHANGE_EVENT; - -typedef PREPACK struct { - u32 version; -} POSTPACK WMI_WLAN_VERSION_EVENT; - - -/* WMI_ADDBA_REQ_EVENTID */ -typedef PREPACK struct { - u8 tid; - u8 win_sz; - u16 st_seq_no; - u8 status; /* f/w response for ADDBA Req; OK(0) or failure(!=0) */ -} POSTPACK WMI_ADDBA_REQ_EVENT; - -/* WMI_ADDBA_RESP_EVENTID */ -typedef PREPACK struct { - u8 tid; - u8 status; /* OK(0), failure (!=0) */ - u16 amsdu_sz; /* Three values: Not supported(0), 3839, 8k */ -} POSTPACK WMI_ADDBA_RESP_EVENT; - -/* WMI_DELBA_EVENTID - * f/w received a DELBA for peer and processed it. - * Host is notified of this - */ -typedef PREPACK struct { - u8 tid; - u8 is_peer_initiator; - u16 reason_code; -} POSTPACK WMI_DELBA_EVENT; - - -#ifdef WAPI_ENABLE -#define WAPI_REKEY_UCAST 1 -#define WAPI_REKEY_MCAST 2 -typedef PREPACK struct { - u8 type; - u8 macAddr[ATH_MAC_LEN]; -} POSTPACK WMI_WAPIREKEY_EVENT; -#endif - - -/* WMI_ALLOW_AGGR_CMDID - * Configures tid's to allow ADDBA negotiations - * on each tid, in each direction - */ -typedef PREPACK struct { - u16 tx_allow_aggr; /* 16-bit mask to allow uplink ADDBA negotiation - bit position indicates tid*/ - u16 rx_allow_aggr; /* 16-bit mask to allow donwlink ADDBA negotiation - bit position indicates tid*/ -} POSTPACK WMI_ALLOW_AGGR_CMD; - -/* WMI_ADDBA_REQ_CMDID - * f/w starts performing ADDBA negotiations with peer - * on the given tid - */ -typedef PREPACK struct { - u8 tid; -} POSTPACK WMI_ADDBA_REQ_CMD; - -/* WMI_DELBA_REQ_CMDID - * f/w would teardown BA with peer. - * is_send_initiator indicates if it's or tx or rx side - */ -typedef PREPACK struct { - u8 tid; - u8 is_sender_initiator; - -} POSTPACK WMI_DELBA_REQ_CMD; - -#define PEER_NODE_JOIN_EVENT 0x00 -#define PEER_NODE_LEAVE_EVENT 0x01 -#define PEER_FIRST_NODE_JOIN_EVENT 0x10 -#define PEER_LAST_NODE_LEAVE_EVENT 0x11 -typedef PREPACK struct { - u8 eventCode; - u8 peerMacAddr[ATH_MAC_LEN]; -} POSTPACK WMI_PEER_NODE_EVENT; - -#define IEEE80211_FRAME_TYPE_MGT 0x00 -#define IEEE80211_FRAME_TYPE_CTL 0x04 - -/* - * Transmit complete event data structure(s) - */ - - -typedef PREPACK struct { -#define TX_COMPLETE_STATUS_SUCCESS 0 -#define TX_COMPLETE_STATUS_RETRIES 1 -#define TX_COMPLETE_STATUS_NOLINK 2 -#define TX_COMPLETE_STATUS_TIMEOUT 3 -#define TX_COMPLETE_STATUS_OTHER 4 - - u8 status; /* one of TX_COMPLETE_STATUS_... */ - u8 pktID; /* packet ID to identify parent packet */ - u8 rateIdx; /* rate index on successful transmission */ - u8 ackFailures; /* number of ACK failures in tx attempt */ -#if 0 /* optional params currently omitted. */ - u32 queueDelay; // usec delay measured Tx Start time - host delivery time - u32 mediaDelay; // usec delay measured ACK rx time - host delivery time -#endif -} POSTPACK TX_COMPLETE_MSG_V1; /* version 1 of tx complete msg */ - -typedef PREPACK struct { - u8 numMessages; /* number of tx comp msgs following this struct */ - u8 msgLen; /* length in bytes for each individual msg following this struct */ - u8 msgType; /* version of tx complete msg data following this struct */ - u8 reserved; /* individual messages follow this header */ -} POSTPACK WMI_TX_COMPLETE_EVENT; - -#define WMI_TXCOMPLETE_VERSION_1 (0x01) - - -/* - * ------- AP Mode definitions -------------- - */ - -/* - * !!! Warning !!! - * -Changing the following values needs compilation of both driver and firmware - */ -#ifdef AR6002_REV2 -#define AP_MAX_NUM_STA 4 -#else -#define AP_MAX_NUM_STA 8 -#endif -#define AP_ACL_SIZE 10 -#define IEEE80211_MAX_IE 256 -#define MCAST_AID 0xFF /* Spl. AID used to set DTIM flag in the beacons */ -#define DEF_AP_COUNTRY_CODE "US " -#define DEF_AP_WMODE_G WMI_11G_MODE -#define DEF_AP_WMODE_AG WMI_11AG_MODE -#define DEF_AP_DTIM 5 -#define DEF_BEACON_INTERVAL 100 - -/* AP mode disconnect reasons */ -#define AP_DISCONNECT_STA_LEFT 101 -#define AP_DISCONNECT_FROM_HOST 102 -#define AP_DISCONNECT_COMM_TIMEOUT 103 - -/* - * Used with WMI_AP_HIDDEN_SSID_CMDID - */ -#define HIDDEN_SSID_FALSE 0 -#define HIDDEN_SSID_TRUE 1 -typedef PREPACK struct { - u8 hidden_ssid; -} POSTPACK WMI_AP_HIDDEN_SSID_CMD; - -/* - * Used with WMI_AP_ACL_POLICY_CMDID - */ -#define AP_ACL_DISABLE 0x00 -#define AP_ACL_ALLOW_MAC 0x01 -#define AP_ACL_DENY_MAC 0x02 -#define AP_ACL_RETAIN_LIST_MASK 0x80 -typedef PREPACK struct { - u8 policy; -} POSTPACK WMI_AP_ACL_POLICY_CMD; - -/* - * Used with WMI_AP_ACL_MAC_LIST_CMDID - */ -#define ADD_MAC_ADDR 1 -#define DEL_MAC_ADDR 2 -typedef PREPACK struct { - u8 action; - u8 index; - u8 mac[ATH_MAC_LEN]; - u8 wildcard; -} POSTPACK WMI_AP_ACL_MAC_CMD; - -typedef PREPACK struct { - u16 index; - u8 acl_mac[AP_ACL_SIZE][ATH_MAC_LEN]; - u8 wildcard[AP_ACL_SIZE]; - u8 policy; -} POSTPACK WMI_AP_ACL; - -/* - * Used with WMI_AP_SET_NUM_STA_CMDID - */ -typedef PREPACK struct { - u8 num_sta; -} POSTPACK WMI_AP_SET_NUM_STA_CMD; - -/* - * Used with WMI_AP_SET_MLME_CMDID - */ -typedef PREPACK struct { - u8 mac[ATH_MAC_LEN]; - u16 reason; /* 802.11 reason code */ - u8 cmd; /* operation to perform */ -#define WMI_AP_MLME_ASSOC 1 /* associate station */ -#define WMI_AP_DISASSOC 2 /* disassociate station */ -#define WMI_AP_DEAUTH 3 /* deauthenticate station */ -#define WMI_AP_MLME_AUTHORIZE 4 /* authorize station */ -#define WMI_AP_MLME_UNAUTHORIZE 5 /* unauthorize station */ -} POSTPACK WMI_AP_SET_MLME_CMD; - -typedef PREPACK struct { - u32 period; -} POSTPACK WMI_AP_CONN_INACT_CMD; - -typedef PREPACK struct { - u32 period_min; - u32 dwell_ms; -} POSTPACK WMI_AP_PROT_SCAN_TIME_CMD; - -typedef PREPACK struct { - u32 flag; - u16 aid; -} POSTPACK WMI_AP_SET_PVB_CMD; - -#define WMI_DISABLE_REGULATORY_CODE "FF" - -typedef PREPACK struct { - u8 countryCode[3]; -} POSTPACK WMI_AP_SET_COUNTRY_CMD; - -typedef PREPACK struct { - u8 dtim; -} POSTPACK WMI_AP_SET_DTIM_CMD; - -typedef PREPACK struct { - u8 band; /* specifies which band to apply these values */ - u8 enable; /* allows 11n to be disabled on a per band basis */ - u8 chan_width_40M_supported; - u8 short_GI_20MHz; - u8 short_GI_40MHz; - u8 intolerance_40MHz; - u8 max_ampdu_len_exp; -} POSTPACK WMI_SET_HT_CAP_CMD; - -typedef PREPACK struct { - u8 sta_chan_width; -} POSTPACK WMI_SET_HT_OP_CMD; - -typedef PREPACK struct { - u32 rateMasks[8]; -} POSTPACK WMI_SET_TX_SELECT_RATES_CMD; - -typedef PREPACK struct { - u32 sgiMask; - u8 sgiPERThreshold; -} POSTPACK WMI_SET_TX_SGI_PARAM_CMD; - -#define DEFAULT_SGI_MASK 0x08080000 -#define DEFAULT_SGI_PER 10 - -typedef PREPACK struct { - u32 rateField; /* 1 bit per rate corresponding to index */ - u8 id; - u8 shortTrys; - u8 longTrys; - u8 reserved; /* padding */ -} POSTPACK WMI_SET_RATE_POLICY_CMD; - -typedef PREPACK struct { - u8 metaVersion; /* version of meta data for rx packets <0 = default> (0-7 = valid) */ - u8 dot11Hdr; /* 1 == leave .11 header intact , 0 == replace .11 header with .3 <default> */ - u8 defragOnHost; /* 1 == defragmentation is performed by host, 0 == performed by target <default> */ - u8 reserved[1]; /* alignment */ -} POSTPACK WMI_RX_FRAME_FORMAT_CMD; - - -typedef PREPACK struct { - u8 enable; /* 1 == device operates in thin mode , 0 == normal mode <default> */ - u8 reserved[3]; -} POSTPACK WMI_SET_THIN_MODE_CMD; - -/* AP mode events */ -/* WMI_PS_POLL_EVENT */ -typedef PREPACK struct { - u16 aid; -} POSTPACK WMI_PSPOLL_EVENT; - -typedef PREPACK struct { - u32 tx_bytes; - u32 tx_pkts; - u32 tx_error; - u32 tx_discard; - u32 rx_bytes; - u32 rx_pkts; - u32 rx_error; - u32 rx_discard; - u32 aid; -} POSTPACK WMI_PER_STA_STAT; - -#define AP_GET_STATS 0 -#define AP_CLEAR_STATS 1 - -typedef PREPACK struct { - u32 action; - WMI_PER_STA_STAT sta[AP_MAX_NUM_STA+1]; -} POSTPACK WMI_AP_MODE_STAT; -#define WMI_AP_MODE_STAT_SIZE(numSta) (sizeof(u32) + ((numSta + 1) * sizeof(WMI_PER_STA_STAT))) - -#define AP_11BG_RATESET1 1 -#define AP_11BG_RATESET2 2 -#define DEF_AP_11BG_RATESET AP_11BG_RATESET1 -typedef PREPACK struct { - u8 rateset; -} POSTPACK WMI_AP_SET_11BG_RATESET_CMD; -/* - * End of AP mode definitions - */ - -#ifdef __cplusplus -} -#endif - -#endif /* _WMI_H_ */ diff --git a/drivers/staging/ath6kl/include/common/wmix.h b/drivers/staging/ath6kl/include/common/wmix.h deleted file mode 100644 index 9435eab1b7f5..000000000000 --- a/drivers/staging/ath6kl/include/common/wmix.h +++ /dev/null @@ -1,271 +0,0 @@ -//------------------------------------------------------------------------------ -// <copyright file="wmix.h" company="Atheros"> -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -//------------------------------------------------------------------------------ -//============================================================================== -// Author(s): ="Atheros" -//============================================================================== - -/* - * This file contains extensions of the WMI protocol specified in the - * Wireless Module Interface (WMI). It includes definitions of all - * extended commands and events. Extensions include useful commands - * that are not directly related to wireless activities. They may - * be hardware-specific, and they might not be supported on all - * implementations. - * - * Extended WMIX commands are encapsulated in a WMI message with - * cmd=WMI_EXTENSION_CMD. - */ - -#ifndef _WMIX_H_ -#define _WMIX_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include "dbglog.h" - -/* - * Extended WMI commands are those that are needed during wireless - * operation, but which are not really wireless commands. This allows, - * for instance, platform-specific commands. Extended WMI commands are - * embedded in a WMI command message with WMI_COMMAND_ID=WMI_EXTENSION_CMDID. - * Extended WMI events are similarly embedded in a WMI event message with - * WMI_EVENT_ID=WMI_EXTENSION_EVENTID. - */ -typedef PREPACK struct { - u32 commandId; -} POSTPACK WMIX_CMD_HDR; - -typedef enum { - WMIX_DSETOPEN_REPLY_CMDID = 0x2001, - WMIX_DSETDATA_REPLY_CMDID, - WMIX_GPIO_OUTPUT_SET_CMDID, - WMIX_GPIO_INPUT_GET_CMDID, - WMIX_GPIO_REGISTER_SET_CMDID, - WMIX_GPIO_REGISTER_GET_CMDID, - WMIX_GPIO_INTR_ACK_CMDID, - WMIX_HB_CHALLENGE_RESP_CMDID, - WMIX_DBGLOG_CFG_MODULE_CMDID, - WMIX_PROF_CFG_CMDID, /* 0x200a */ - WMIX_PROF_ADDR_SET_CMDID, - WMIX_PROF_START_CMDID, - WMIX_PROF_STOP_CMDID, - WMIX_PROF_COUNT_GET_CMDID, -} WMIX_COMMAND_ID; - -typedef enum { - WMIX_DSETOPENREQ_EVENTID = 0x3001, - WMIX_DSETCLOSE_EVENTID, - WMIX_DSETDATAREQ_EVENTID, - WMIX_GPIO_INTR_EVENTID, - WMIX_GPIO_DATA_EVENTID, - WMIX_GPIO_ACK_EVENTID, - WMIX_HB_CHALLENGE_RESP_EVENTID, - WMIX_DBGLOG_EVENTID, - WMIX_PROF_COUNT_EVENTID, -} WMIX_EVENT_ID; - -/* - * =============DataSet support================= - */ - -/* - * WMIX_DSETOPENREQ_EVENTID - * DataSet Open Request Event - */ -typedef PREPACK struct { - u32 dset_id; - u32 targ_dset_handle; /* echo'ed, not used by Host, */ - u32 targ_reply_fn; /* echo'ed, not used by Host, */ - u32 targ_reply_arg; /* echo'ed, not used by Host, */ -} POSTPACK WMIX_DSETOPENREQ_EVENT; - -/* - * WMIX_DSETCLOSE_EVENTID - * DataSet Close Event - */ -typedef PREPACK struct { - u32 access_cookie; -} POSTPACK WMIX_DSETCLOSE_EVENT; - -/* - * WMIX_DSETDATAREQ_EVENTID - * DataSet Data Request Event - */ -typedef PREPACK struct { - u32 access_cookie; - u32 offset; - u32 length; - u32 targ_buf; /* echo'ed, not used by Host, */ - u32 targ_reply_fn; /* echo'ed, not used by Host, */ - u32 targ_reply_arg; /* echo'ed, not used by Host, */ -} POSTPACK WMIX_DSETDATAREQ_EVENT; - -typedef PREPACK struct { - u32 status; - u32 targ_dset_handle; - u32 targ_reply_fn; - u32 targ_reply_arg; - u32 access_cookie; - u32 size; - u32 version; -} POSTPACK WMIX_DSETOPEN_REPLY_CMD; - -typedef PREPACK struct { - u32 status; - u32 targ_buf; - u32 targ_reply_fn; - u32 targ_reply_arg; - u32 length; - u8 buf[1]; -} POSTPACK WMIX_DSETDATA_REPLY_CMD; - - -/* - * =============GPIO support================= - * All masks are 18-bit masks with bit N operating on GPIO pin N. - */ - - -/* - * Set GPIO pin output state. - * In order for output to be driven, a pin must be enabled for output. - * This can be done during initialization through the GPIO Configuration - * DataSet, or during operation with the enable_mask. - * - * If a request is made to simultaneously set/clear or set/disable or - * clear/disable or disable/enable, results are undefined. - */ -typedef PREPACK struct { - u32 set_mask; /* pins to set */ - u32 clear_mask; /* pins to clear */ - u32 enable_mask; /* pins to enable for output */ - u32 disable_mask; /* pins to disable/tristate */ -} POSTPACK WMIX_GPIO_OUTPUT_SET_CMD; - -/* - * Set a GPIO register. For debug/exceptional cases. - * Values for gpioreg_id are GPIO_REGISTER_IDs, defined in a - * platform-dependent header. - */ -typedef PREPACK struct { - u32 gpioreg_id; /* GPIO register ID */ - u32 value; /* value to write */ -} POSTPACK WMIX_GPIO_REGISTER_SET_CMD; - -/* Get a GPIO register. For debug/exceptional cases. */ -typedef PREPACK struct { - u32 gpioreg_id; /* GPIO register to read */ -} POSTPACK WMIX_GPIO_REGISTER_GET_CMD; - -/* - * Host acknowledges and re-arms GPIO interrupts. A single - * message should be used to acknowledge all interrupts that - * were delivered in an earlier WMIX_GPIO_INTR_EVENT message. - */ -typedef PREPACK struct { - u32 ack_mask; /* interrupts to acknowledge */ -} POSTPACK WMIX_GPIO_INTR_ACK_CMD; - -/* - * Target informs Host of GPIO interrupts that have occurred since the - * last WMIX_GIPO_INTR_ACK_CMD was received. Additional information -- - * the current GPIO input values is provided -- in order to support - * use of a GPIO interrupt as a Data Valid signal for other GPIO pins. - */ -typedef PREPACK struct { - u32 intr_mask; /* pending GPIO interrupts */ - u32 input_values; /* recent GPIO input values */ -} POSTPACK WMIX_GPIO_INTR_EVENT; - -/* - * Target responds to Host's earlier WMIX_GPIO_INPUT_GET_CMDID request - * using a GPIO_DATA_EVENT with - * value set to the mask of GPIO pin inputs and - * reg_id set to GPIO_ID_NONE - * - * - * Target responds to Hosts's earlier WMIX_GPIO_REGISTER_GET_CMDID request - * using a GPIO_DATA_EVENT with - * value set to the value of the requested register and - * reg_id identifying the register (reflects the original request) - * NB: reg_id supports the future possibility of unsolicited - * WMIX_GPIO_DATA_EVENTs (for polling GPIO input), and it may - * simplify Host GPIO support. - */ -typedef PREPACK struct { - u32 value; - u32 reg_id; -} POSTPACK WMIX_GPIO_DATA_EVENT; - -/* - * =============Error Detection support================= - */ - -/* - * WMIX_HB_CHALLENGE_RESP_CMDID - * Heartbeat Challenge Response command - */ -typedef PREPACK struct { - u32 cookie; - u32 source; -} POSTPACK WMIX_HB_CHALLENGE_RESP_CMD; - -/* - * WMIX_HB_CHALLENGE_RESP_EVENTID - * Heartbeat Challenge Response Event - */ -#define WMIX_HB_CHALLENGE_RESP_EVENT WMIX_HB_CHALLENGE_RESP_CMD - -typedef PREPACK struct { - struct dbglog_config_s config; -} POSTPACK WMIX_DBGLOG_CFG_MODULE_CMD; - -/* - * =============Target Profiling support================= - */ - -typedef PREPACK struct { - u32 period; /* Time (in 30.5us ticks) between samples */ - u32 nbins; -} POSTPACK WMIX_PROF_CFG_CMD; - -typedef PREPACK struct { - u32 addr; -} POSTPACK WMIX_PROF_ADDR_SET_CMD; - -/* - * Target responds to Hosts's earlier WMIX_PROF_COUNT_GET_CMDID request - * using a WMIX_PROF_COUNT_EVENT with - * addr set to the next address - * count set to the corresponding count - */ -typedef PREPACK struct { - u32 addr; - u32 count; -} POSTPACK WMIX_PROF_COUNT_EVENT; - - -#ifdef __cplusplus -} -#endif - -#endif /* _WMIX_H_ */ |