diff options
Diffstat (limited to 'drivers/staging/brcm80211/brcmsmac/main.c')
| -rw-r--r-- | drivers/staging/brcm80211/brcmsmac/main.c | 4774 |
1 files changed, 4228 insertions, 546 deletions
diff --git a/drivers/staging/brcm80211/brcmsmac/main.c b/drivers/staging/brcm80211/brcmsmac/main.c index 1763c4535cd2..3aa03090b018 100644 --- a/drivers/staging/brcm80211/brcmsmac/main.c +++ b/drivers/staging/brcm80211/brcmsmac/main.c @@ -15,22 +15,24 @@ */ #include <linux/pci_ids.h> +#include <linux/if_ether.h> #include <net/mac80211.h> - #include <brcm_hw_ids.h> #include <aiutils.h> +#include <chipcommon.h> #include "rate.h" #include "scb.h" #include "phy/phy_hal.h" #include "channel.h" -#include "bmac.h" #include "antsel.h" #include "stf.h" #include "ampdu.h" #include "alloc.h" #include "mac80211_if.h" +#include "ucode_loader.h" #include "main.h" + /* * WPA(2) definitions */ @@ -51,8 +53,10 @@ */ #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1) -#define TIMER_INTERVAL_WATCHDOG 1000 /* watchdog timer, in unit of ms */ -#define TIMER_INTERVAL_RADIOCHK 800 /* radio monitor timer, in unit of ms */ +/* watchdog timer, in unit of ms */ +#define TIMER_INTERVAL_WATCHDOG 1000 +/* radio monitor timer, in unit of ms */ +#define TIMER_INTERVAL_RADIOCHK 800 /* Max MPC timeout, in unit of watchdog */ #ifndef BRCMS_MPC_MAX_DELAYCNT @@ -63,12 +67,16 @@ #define BRCMS_MPC_MIN_DELAYCNT 1 #define BRCMS_MPC_THRESHOLD 3 /* MPC count threshold level */ -#define BEACON_INTERVAL_DEFAULT 100 /* beacon interval, in unit of 1024TU */ -#define DTIM_INTERVAL_DEFAULT 3 /* DTIM interval, in unit of beacon interval */ +/* beacon interval, in unit of 1024TU */ +#define BEACON_INTERVAL_DEFAULT 100 +/* DTIM interval, in unit of beacon interval */ +#define DTIM_INTERVAL_DEFAULT 3 /* Scale down delays to accommodate QT slow speed */ -#define BEACON_INTERVAL_DEF_QT 20 /* beacon interval, in unit of 1024TU */ -#define DTIM_INTERVAL_DEF_QT 1 /* DTIM interval, in unit of beacon interval */ +/* beacon interval, in unit of 1024TU */ +#define BEACON_INTERVAL_DEF_QT 20 +/* DTIM interval, in unit of beacon interval */ +#define DTIM_INTERVAL_DEF_QT 1 #define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */ @@ -161,34 +169,31 @@ #define AC_VO 3 /* - * driver maintains internal 'tick'(wlc->pub->now) which increments in 1s OS timer(soft - * watchdog) it is not a wall clock and won't increment when driver is in "down" state - * this low resolution driver tick can be used for maintenance tasks such as phy - * calibration and scb update + * driver maintains internal 'tick'(wlc->pub->now) which increments in 1s + * OS timer(soft watchdog) it is not a wall clock and won't increment when + * driver is in "down" state this low resolution driver tick can be used + * for maintenance tasks such as phy calibration and scb update */ -/* To inform the ucode of the last mcast frame posted so that it can clear moredata bit */ +/* + * To inform the ucode of the last mcast frame posted + * so that it can clear moredata bit + */ #define BCMCFID(wlc, fid) brcms_b_write_shm((wlc)->hw, M_BCMC_FID, (fid)) -#define BRCMS_WAR16165(wlc) (wlc->pub->sih->bustype == PCI_BUS && \ - (!AP_ENAB(wlc->pub)) && (wlc->war16165)) - -/* debug/trace */ -uint brcm_msg_level = -#if defined(BCMDBG) - LOG_ERROR_VAL; -#else - 0; -#endif /* BCMDBG */ +#define BRCMS_WAR16165(wlc) ((!AP_ENAB(wlc->pub)) && (wlc->war16165)) /* Find basic rate for a given rate */ -#define BRCMS_BASIC_RATE(wlc, rspec) (IS_MCS(rspec) ? \ - (wlc)->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK].leg_ofdm] : \ - (wlc)->band->basic_rate[rspec & RSPEC_RATE_MASK]) +#define BRCMS_BASIC_RATE(wlc, rspec) \ + (IS_MCS(rspec) \ + ? (wlc)->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK].leg_ofdm] \ + : (wlc)->band->basic_rate[rspec & RSPEC_RATE_MASK]) -#define FRAMETYPE(r, mimoframe) (IS_MCS(r) ? mimoframe : (IS_CCK(r) ? FT_CCK : FT_OFDM)) +#define FRAMETYPE(r, mimoframe) \ + (IS_MCS(r) ? mimoframe : (IS_CCK(r) ? FT_CCK : FT_OFDM)) -#define RFDISABLE_DEFAULT 10000000 /* rfdisable delay timer 500 ms, runs of ALP clock */ +/* rfdisable delay timer 500 ms, runs of ALP clock */ +#define RFDISABLE_DEFAULT 10000000 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */ @@ -196,26 +201,11 @@ uint brcm_msg_level = #define EPI_VERSION_NUM 0x054b0b00 -#ifdef BCMDBG -/* pointer to most recently allocated wl/wlc */ -static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL); -#endif - -const u8 prio2fifo[NUMPRIO] = { - TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */ - TX_AC_BK_FIFO, /* 1 BK AC_BK Background */ - TX_AC_BK_FIFO, /* 2 -- AC_BK Background */ - TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */ - TX_AC_VI_FIFO, /* 4 CL AC_VI Video */ - TX_AC_VI_FIFO, /* 5 VI AC_VI Video */ - TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */ - TX_AC_VO_FIFO /* 7 NC AC_VO Voice */ -}; - /* precedences numbers for wlc queues. These are twice as may levels as * 802.1D priorities. * Odd numbers are used for HI priority traffic at same precedence levels - * These constants are used ONLY by wlc_prio2prec_map. Do not use them elsewhere. + * These constants are used ONLY by wlc_prio2prec_map. Do not use them + * elsewhere. */ #define _BRCMS_PREC_NONE 0 /* None = - */ #define _BRCMS_PREC_BK 2 /* BK - Background */ @@ -238,58 +228,158 @@ const u8 prio2fifo[NUMPRIO] = { #define MBSS_PRB_ENAB(cfg) 0 #define SOFTBCN_ENAB(pub) (0) -/* 802.1D Priority to precedence queue mapping */ -const u8 wlc_prio2prec_map[] = { - _BRCMS_PREC_BE, /* 0 BE - Best-effort */ - _BRCMS_PREC_BK, /* 1 BK - Background */ - _BRCMS_PREC_NONE, /* 2 None = - */ - _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */ - _BRCMS_PREC_CL, /* 4 CL - Controlled Load */ - _BRCMS_PREC_VI, /* 5 Vi - Video */ - _BRCMS_PREC_VO, /* 6 Vo - Voice */ - _BRCMS_PREC_NC, /* 7 NC - Network Control */ -}; +#define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */ +#define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us */ +#define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us */ +#define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */ + +#define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */ + +#define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */ + +#define DMAREG(wlc_hw, direction, fifonum) \ + ((direction == DMA_TX) ? \ + &(wlc_hw->regs->fifo64regs[fifonum].dmaxmt) : \ + &(wlc_hw->regs->fifo64regs[fifonum].dmarcv)) + +#define APHY_SLOT_TIME 9 +#define BPHY_SLOT_TIME 20 + +/* + * The following table lists the buffer memory allocated to xmt fifos in HW. + * the size is in units of 256bytes(one block), total size is HW dependent + * ucode has default fifo partition, sw can overwrite if necessary + * + * This is documented in twiki under the topic UcodeTxFifo. Please ensure + * the twiki is updated before making changes. + */ + +/* Starting corerev for the fifo size table */ +#define XMTFIFOTBL_STARTREV 20 /* Check if a particular BSS config is AP or STA */ #define BSSCFG_AP(cfg) (0) #define BSSCFG_STA(cfg) (1) #define BSSCFG_IBSS(cfg) (!(cfg)->BSS) -/* As above for all non-NULL BSS configs */ +/* iterate through all valid bsscfg entries */ #define FOREACH_BSS(wlc, idx, cfg) \ - for (idx = 0; (int) idx < BRCMS_MAXBSSCFG; idx++) \ - if ((cfg = (wlc)->bsscfg[idx])) - -/* TX FIFO number to WME/802.1E Access Category */ -const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE }; - -/* WME/802.1E Access Category to TX FIFO number */ -static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 }; - -static bool in_send_q; + for (idx = 0; (int) idx < BRCMS_MAXBSSCFG; idx++) { \ + cfg = (wlc)->bsscfg[idx]; \ + if (!cfg) \ + continue; +/* close marker for iterator code block */ +#define END_FOREACH_BSS() } /* Shared memory location index for various AC params */ #define wme_shmemacindex(ac) wme_ac2fifo[ac] -#ifdef BCMDBG -static const char * const fifo_names[] = { - "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" }; -#else -static const char fifo_names[6][0]; -#endif - -static const u8 acbitmap2maxprio[] = { - PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK, - PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, - PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, - PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO -}; - /* currently the best mechanism for determining SIFS is the band in use */ #define SIFS(band) ((band)->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME : \ BPHY_SIFS_TIME); +/* dup state between BMAC(struct brcms_hardware) and HIGH(struct brcms_c_info) + driver */ +struct brcms_b_state { + u32 machwcap; /* mac hw capibility */ + u32 preamble_ovr; /* preamble override */ +}; + /* local prototypes */ +static void brcms_b_clkctl_clk(struct brcms_hardware *wlc, uint mode); + +/* used by wlc_wakeucode_init() */ +static void brcms_c_write_inits(struct brcms_hardware *wlc_hw, + const struct d11init *inits); +static void brcms_ucode_write(struct brcms_hardware *wlc_hw, const u32 ucode[], + const uint nbytes); +static void brcms_ucode_download(struct brcms_hardware *wlc); +static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw); + +/* used by brcms_c_down() */ +static void brcms_c_flushqueues(struct brcms_c_info *wlc); + +static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs); +static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw); +static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw); +static bool brcms_b_tx_fifo_suspended(struct brcms_hardware *wlc_hw, + uint tx_fifo); +static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw, + uint tx_fifo); + +/* Low Level Prototypes */ + +struct brcms_b_state; + +static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device, + uint unit, bool piomode, void *regsva, + struct pci_dev *btparam); + +/* up/down, reset, clk */ +static void brcms_b_reset(struct brcms_hardware *wlc_hw); +static int brcms_b_state_get(struct brcms_hardware *wlc_hw, + struct brcms_b_state *state); +static void brcms_b_copyfrom_vars(struct brcms_hardware *wlc_hw, char **buf, + uint *len); + +static void brcms_b_hw_etheraddr(struct brcms_hardware *wlc_hw, + u8 *ea); + +static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw); +static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw); + +static void brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, + int match_reg_offset, + const u8 *addr); +static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin); +static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax); + +static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw, u16 SRL, + u16 LRL); + +static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw); + +static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, + u32 req_bit); +static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, + u32 antsel_avail); +static int brcms_b_bandtype(struct brcms_hardware *wlc_hw); +static void brcms_b_info_init(struct brcms_hardware *wlc_hw); +static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want); +static u16 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, + u32 sel); +static void brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, + u16 v, u32 sel); +static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk); +static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme); +static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw); +static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw); +static bool brcms_c_validboardtype(struct brcms_hardware *wlc); +static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw); +static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw); +static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw); +static void brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init); +static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw); +static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool want, u32 flags); +static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw); +static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw); +static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc); +static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask); +static void brcms_c_gpio_init(struct brcms_c_info *wlc); +static void brcms_c_write_hw_bcntemplate0(struct brcms_hardware *wlc_hw, + u16 bcn[], int len); +static void brcms_c_write_hw_bcntemplate1(struct brcms_hardware *wlc_hw, + u16 bcn[], int len); +static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec); +static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit); +static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit, + u16 chanspec); +static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw, + bool shortslot); +static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw); +static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw, + u8 rate); + static u16 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, struct sk_buff *p, @@ -297,17 +387,18 @@ static u16 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, uint nfrags, uint queue, uint next_frag_len, struct wsec_key *key, - ratespec_t rspec_override); + u32 rspec_override); static void brcms_c_bss_default_init(struct brcms_c_info *wlc); static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc); -static ratespec_t mac80211_wlc_set_nrate(struct brcms_c_info *wlc, +static u32 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band, u32 int_val); static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc); static void brcms_c_watchdog(void *arg); static void brcms_c_watchdog_by_timer(void *arg); static u16 brcms_c_rate_shm_offset(struct brcms_c_info *wlc, u8 rate); -static int brcms_c_set_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs_arg); +static int brcms_c_set_rateset(struct brcms_c_info *wlc, + struct brcms_c_rateset *rs_arg); static u8 brcms_c_local_constraint_qdbm(struct brcms_c_info *wlc); /* send and receive */ @@ -318,27 +409,27 @@ static void brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc, struct brcms_txq_info *qi, bool on, int prio); static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc); -static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, ratespec_t rate, +static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rate, uint length, u8 *plcp); -static void brcms_c_compute_ofdm_plcp(ratespec_t rate, uint length, u8 *plcp); -static void brcms_c_compute_mimo_plcp(ratespec_t rate, uint length, u8 *plcp); -static u16 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, ratespec_t rate, +static void brcms_c_compute_ofdm_plcp(u32 rate, uint length, u8 *plcp); +static void brcms_c_compute_mimo_plcp(u32 rate, uint length, u8 *plcp); +static u16 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate, u8 preamble_type, uint next_frag_len); static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc, struct brcms_d11rxhdr *rxh); static void brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh, struct sk_buff *p); -static uint brcms_c_calc_frame_len(struct brcms_c_info *wlc, ratespec_t rate, +static uint brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 rate, u8 preamble_type, uint dur); -static uint brcms_c_calc_ack_time(struct brcms_c_info *wlc, ratespec_t rate, +static uint brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rate, u8 preamble_type); -static uint brcms_c_calc_cts_time(struct brcms_c_info *wlc, ratespec_t rate, +static uint brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rate, u8 preamble_type); /* interrupt, up/down, band */ static void brcms_c_setband(struct brcms_c_info *wlc, uint bandunit); -static chanspec_t brcms_c_init_chanspec(struct brcms_c_info *wlc); +static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc); static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc, - chanspec_t chanspec); + u16 chanspec); static void brcms_c_bsinit(struct brcms_c_info *wlc); static int brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM, bool writeToShm); @@ -349,7 +440,7 @@ static void brcms_c_radio_enable(struct brcms_c_info *wlc); static void brcms_c_radio_upd(struct brcms_c_info *wlc); /* scan, association, BSS */ -static uint brcms_c_calc_ba_time(struct brcms_c_info *wlc, ratespec_t rate, +static uint brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rate, u8 preamble_type); static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap); static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val); @@ -366,8 +457,2542 @@ static uint brcms_c_down_del_timer(struct brcms_c_info *wlc); static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc); static int _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, struct brcms_c_if *wlcif); +static void brcms_c_write_hw_bcntemplates(struct brcms_c_info *wlc, u16 bcn[], + int len, bool both); + +const u8 prio2fifo[NUMPRIO] = { + TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */ + TX_AC_BK_FIFO, /* 1 BK AC_BK Background */ + TX_AC_BK_FIFO, /* 2 -- AC_BK Background */ + TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */ + TX_AC_VI_FIFO, /* 4 CL AC_VI Video */ + TX_AC_VI_FIFO, /* 5 VI AC_VI Video */ + TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */ + TX_AC_VO_FIFO /* 7 NC AC_VO Voice */ +}; + +/* debug/trace */ +uint brcm_msg_level = +#if defined(BCMDBG) + LOG_ERROR_VAL; +#else + 0; +#endif /* BCMDBG */ + +/* TX FIFO number to WME/802.1E Access Category */ +const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE }; + +/* WME/802.1E Access Category to TX FIFO number */ +static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 }; + +static bool in_send_q; + +/* 802.1D Priority to precedence queue mapping */ +const u8 wlc_prio2prec_map[] = { + _BRCMS_PREC_BE, /* 0 BE - Best-effort */ + _BRCMS_PREC_BK, /* 1 BK - Background */ + _BRCMS_PREC_NONE, /* 2 None = - */ + _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */ + _BRCMS_PREC_CL, /* 4 CL - Controlled Load */ + _BRCMS_PREC_VI, /* 5 Vi - Video */ + _BRCMS_PREC_VO, /* 6 Vo - Voice */ + _BRCMS_PREC_NC, /* 7 NC - Network Control */ +}; + +static u16 xmtfifo_sz[][NFIFO] = { + /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */ + {20, 192, 192, 21, 17, 5}, + /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */ + {9, 58, 22, 14, 14, 5}, + /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */ + {20, 192, 192, 21, 17, 5}, + /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */ + {20, 192, 192, 21, 17, 5}, + /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */ + {9, 58, 22, 14, 14, 5}, +}; + +static const u8 acbitmap2maxprio[] = { + PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK, + PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, + PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, + PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO +}; + +#ifdef BCMDBG +static const char * const fifo_names[] = { + "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" }; +#else +static const char fifo_names[6][0]; +#endif + +#ifdef BCMDBG +/* pointer to most recently allocated wl/wlc */ +static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL); +#endif + +/* + * Update the slot timing for standard 11b/g (20us slots) + * or shortslot 11g (9us slots) + * The PSM needs to be suspended for this call. + */ +static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw, + bool shortslot) +{ + struct d11regs *regs; + + regs = wlc_hw->regs; + + if (shortslot) { + /* 11g short slot: 11a timing */ + W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */ + brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME); + } else { + /* 11g long slot: 11b timing */ + W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */ + brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME); + } +} + +static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw) +{ + struct wiphy *wiphy = wlc_hw->wlc->wiphy; + + /* init microcode host flags */ + brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs); + + /* do band-specific ucode IHR, SHM, and SCR inits */ + if (D11REV_IS(wlc_hw->corerev, 23)) { + if (BRCMS_ISNPHY(wlc_hw->band)) + brcms_c_write_inits(wlc_hw, d11n0bsinitvals16); + else + wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" + " %d\n", __func__, wlc_hw->unit, + wlc_hw->corerev); + } else { + if (D11REV_IS(wlc_hw->corerev, 24)) { + if (BRCMS_ISLCNPHY(wlc_hw->band)) + brcms_c_write_inits(wlc_hw, + d11lcn0bsinitvals24); + else + wiphy_err(wiphy, "%s: wl%d: unsupported phy in" + " core rev %d\n", __func__, + wlc_hw->unit, wlc_hw->corerev); + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } + } +} + +/* switch to new band but leave it inactive */ +static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + u32 macintmask; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); + + /* disable interrupts */ + macintmask = brcms_intrsoff(wlc->wl); + + /* radio off */ + wlc_phy_switch_radio(wlc_hw->band->pi, OFF); + + brcms_b_core_phy_clk(wlc_hw, OFF); + + brcms_c_setxband(wlc_hw, bandunit); + + return macintmask; +} + +/* Process received frames */ +/* + * Return true if more frames need to be processed. false otherwise. + * Param 'bound' indicates max. # frames to process before break out. + */ +static bool +brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound) +{ + struct sk_buff *p; + struct sk_buff *head = NULL; + struct sk_buff *tail = NULL; + uint n = 0; + uint bound_limit = bound ? wlc_hw->wlc->pub->tunables->rxbnd : -1; + struct brcms_d11rxhdr *wlc_rxhdr = NULL; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + /* gather received frames */ + while ((p = dma_rx(wlc_hw->di[fifo]))) { + + if (!tail) + head = tail = p; + else { + tail->prev = p; + tail = p; + } + + /* !give others some time to run! */ + if (++n >= bound_limit) + break; + } + + /* post more rbufs */ + dma_rxfill(wlc_hw->di[fifo]); + + /* process each frame */ + while ((p = head) != NULL) { + head = head->prev; + p->prev = NULL; + + wlc_rxhdr = (struct brcms_d11rxhdr *) p->data; + + /* + * compute the RSSI from d11rxhdr and record it in wlc_rxd11hr + */ + wlc_phy_rssi_compute(wlc_hw->band->pi, wlc_rxhdr); + + brcms_c_recv(wlc_hw->wlc, p); + } + + return n >= bound_limit; +} + +static bool +brcms_b_dotxstatus(struct brcms_hardware *wlc_hw, struct tx_status *txs, + u32 s2) +{ + /* discard intermediate indications for ucode with one legitimate case: + * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, + * but the subsequent tx of DATA failed. so it will start rts/cts from + * the beginning (resetting the rts transmission count) + */ + if (!(txs->status & TX_STATUS_AMPDU) + && (txs->status & TX_STATUS_INTERMEDIATE)) + return false; + + return brcms_c_dotxstatus(wlc_hw->wlc, txs, s2); +} + +/* process tx completion events in BMAC + * Return true if more tx status need to be processed. false otherwise. + */ +static bool +brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal) +{ + bool morepending = false; + struct brcms_c_info *wlc = wlc_hw->wlc; + struct d11regs *regs; + struct tx_status txstatus, *txs; + u32 s1, s2; + uint n = 0; + /* + * Param 'max_tx_num' indicates max. # tx status to process before + * break out. + */ + uint max_tx_num = bound ? wlc->pub->tunables->txsbnd : -1; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + txs = &txstatus; + regs = wlc_hw->regs; + while (!(*fatal) + && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) { + + if (s1 == 0xffffffff) { + wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", + wlc_hw->unit, __func__); + return morepending; + } + + s2 = R_REG(®s->frmtxstatus2); + + txs->status = s1 & TXS_STATUS_MASK; + txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT; + txs->sequence = s2 & TXS_SEQ_MASK; + txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT; + txs->lasttxtime = 0; + + *fatal = brcms_b_dotxstatus(wlc_hw, txs, s2); + + /* !give others some time to run! */ + if (++n >= max_tx_num) + break; + } + + if (*fatal) + return 0; + + if (n >= max_tx_num) + morepending = true; + + if (!pktq_empty(&wlc->pkt_queue->q)) + brcms_c_send_q(wlc); + + return morepending; +} + +/* second-level interrupt processing + * Return true if another dpc needs to be re-scheduled. false otherwise. + * Param 'bounded' indicates if applicable loops should be bounded. + */ +bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded) +{ + u32 macintstatus; + struct brcms_hardware *wlc_hw = wlc->hw; + struct d11regs *regs = wlc_hw->regs; + bool fatal = false; + struct wiphy *wiphy = wlc->wiphy; + + if (DEVICEREMOVED(wlc)) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return false; + } + + /* grab and clear the saved software intstatus bits */ + macintstatus = wlc->macintstatus; + wlc->macintstatus = 0; + + BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n", + wlc_hw->unit, macintstatus); + + WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */ + + /* BCN template is available */ + /* ZZZ: Use AP_ACTIVE ? */ + if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub)) + && (macintstatus & MI_BCNTPL)) + brcms_c_update_beacon(wlc); + + /* tx status */ + if (macintstatus & MI_TFS) { + if (brcms_b_txstatus(wlc->hw, bounded, &fatal)) + wlc->macintstatus |= MI_TFS; + if (fatal) { + wiphy_err(wiphy, "MI_TFS: fatal\n"); + goto fatal; + } + } + + if (macintstatus & (MI_TBTT | MI_DTIM_TBTT)) + brcms_c_tbtt(wlc); + + /* ATIM window end */ + if (macintstatus & MI_ATIMWINEND) { + BCMMSG(wlc->wiphy, "end of ATIM window\n"); + OR_REG(®s->maccommand, wlc->qvalid); + wlc->qvalid = 0; + } + + /* + * received data or control frame, MI_DMAINT is + * indication of RX_FIFO interrupt + */ + if (macintstatus & MI_DMAINT) + if (brcms_b_recv(wlc_hw, RX_FIFO, bounded)) + wlc->macintstatus |= MI_DMAINT; + + /* TX FIFO suspend/flush completion */ + if (macintstatus & MI_TXSTOP) + brcms_b_tx_fifo_suspended(wlc_hw, TX_DATA_FIFO); + + /* noise sample collected */ + if (macintstatus & MI_BG_NOISE) + wlc_phy_noise_sample_intr(wlc_hw->band->pi); + + if (macintstatus & MI_GP0) { + wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d " + "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now); + + printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n", + __func__, wlc_hw->sih->chip, + wlc_hw->sih->chiprev); + /* big hammer */ + brcms_init(wlc->wl); + } + + /* gptimer timeout */ + if (macintstatus & MI_TO) + W_REG(®s->gptimer, 0); + + if (macintstatus & MI_RFDISABLE) { + BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the" + " RF Disable Input\n", wlc_hw->unit); + brcms_rfkill_set_hw_state(wlc->wl); + } + + /* send any enq'd tx packets. Just makes sure to jump start tx */ + if (!pktq_empty(&wlc->pkt_queue->q)) + brcms_c_send_q(wlc); + + /* it isn't done and needs to be resched if macintstatus is non-zero */ + return wlc->macintstatus != 0; + + fatal: + brcms_init(wlc->wl); + return wlc->macintstatus != 0; +} + +int brcms_b_state_get(struct brcms_hardware *wlc_hw, + struct brcms_b_state *state) +{ + state->machwcap = wlc_hw->machwcap; + + return 0; +} + +static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme) +{ + uint i; + char name[8]; + /* + * ucode host flag 2 needed for pio mode, independent of band and fifo + */ + u16 pio_mhf2 = 0; + struct brcms_hardware *wlc_hw = wlc->hw; + uint unit = wlc_hw->unit; + struct brcms_tunables *tune = wlc->pub->tunables; + struct wiphy *wiphy = wlc->wiphy; + + /* name and offsets for dma_attach */ + snprintf(name, sizeof(name), "wl%d", unit); + + if (wlc_hw->di[0] == 0) { /* Init FIFOs */ + int dma_attach_err = 0; + + /* + * FIFO 0 + * TX: TX_AC_BK_FIFO (TX AC Background data packets) + * RX: RX_FIFO (RX data packets) + */ + wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, + (wme ? DMAREG(wlc_hw, DMA_TX, 0) : + NULL), DMAREG(wlc_hw, DMA_RX, 0), + (wme ? tune->ntxd : 0), tune->nrxd, + tune->rxbufsz, -1, tune->nrxbufpost, + BRCMS_HWRXOFF, &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[0]); + + /* + * FIFO 1 + * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets) + * (legacy) TX_DATA_FIFO (TX data packets) + * RX: UNUSED + */ + wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, + DMAREG(wlc_hw, DMA_TX, 1), NULL, + tune->ntxd, 0, 0, -1, 0, 0, + &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[1]); + + /* + * FIFO 2 + * TX: TX_AC_VI_FIFO (TX AC Video data packets) + * RX: UNUSED + */ + wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, + DMAREG(wlc_hw, DMA_TX, 2), NULL, + tune->ntxd, 0, 0, -1, 0, 0, + &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[2]); + /* + * FIFO 3 + * TX: TX_AC_VO_FIFO (TX AC Voice data packets) + * (legacy) TX_CTL_FIFO (TX control & mgmt packets) + */ + wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, + DMAREG(wlc_hw, DMA_TX, 3), + NULL, tune->ntxd, 0, 0, -1, + 0, 0, &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[3]); +/* Cleaner to leave this as if with AP defined */ + + if (dma_attach_err) { + wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed" + "\n", unit); + return false; + } + + /* get pointer to dma engine tx flow control variable */ + for (i = 0; i < NFIFO; i++) + if (wlc_hw->di[i]) + wlc_hw->txavail[i] = + (uint *) dma_getvar(wlc_hw->di[i], + "&txavail"); + } + + /* initial ucode host flags */ + brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2); + + return true; +} + +static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw) +{ + uint j; + + for (j = 0; j < NFIFO; j++) { + if (wlc_hw->di[j]) { + dma_detach(wlc_hw->di[j]); + wlc_hw->di[j] = NULL; + } + } +} + +/* + * Initialize brcms_c_info default values ... + * may get overrides later in this function + * BMAC_NOTES, move low out and resolve the dangling ones + */ +static void brcms_b_info_init(struct brcms_hardware *wlc_hw) +{ + struct brcms_c_info *wlc = wlc_hw->wlc; + + /* set default sw macintmask value */ + wlc->defmacintmask = DEF_MACINTMASK; + + /* various 802.11g modes */ + wlc_hw->shortslot = false; + + wlc_hw->SFBL = RETRY_SHORT_FB; + wlc_hw->LFBL = RETRY_LONG_FB; + + /* default mac retry limits */ + wlc_hw->SRL = RETRY_SHORT_DEF; + wlc_hw->LRL = RETRY_LONG_DEF; + wlc_hw->chanspec = CH20MHZ_CHSPEC(1); +} + +void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw) +{ + /* delay before first read of ucode state */ + udelay(40); + + /* wait until ucode is no longer asleep */ + SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) == + DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly); +} + +void brcms_b_hw_etheraddr(struct brcms_hardware *wlc_hw, u8 *ea) +{ + memcpy(ea, wlc_hw->etheraddr, ETH_ALEN); +} + +static int brcms_b_bandtype(struct brcms_hardware *wlc_hw) +{ + return wlc_hw->band->bandtype; +} + +/* control chip clock to save power, enable dynamic clock or force fast clock */ +static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode) +{ + if (PMUCTL_ENAB(wlc_hw->sih)) { + /* new chips with PMU, CCS_FORCEHT will distribute the HT clock + * on backplane, but mac core will still run on ALP(not HT) when + * it enters powersave mode, which means the FCA bit may not be + * set. Should wakeup mac if driver wants it to run on HT. + */ + + if (wlc_hw->clk) { + if (mode == CLK_FAST) { + OR_REG(&wlc_hw->regs->clk_ctl_st, + CCS_FORCEHT); + + udelay(64); + + SPINWAIT(((R_REG + (&wlc_hw->regs-> + clk_ctl_st) & CCS_HTAVAIL) == 0), + PMU_MAX_TRANSITION_DLY); + WARN_ON(!(R_REG + (&wlc_hw->regs-> + clk_ctl_st) & CCS_HTAVAIL)); + } else { + if ((wlc_hw->sih->pmurev == 0) && + (R_REG + (&wlc_hw->regs-> + clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ))) + SPINWAIT(((R_REG + (&wlc_hw->regs-> + clk_ctl_st) & CCS_HTAVAIL) + == 0), + PMU_MAX_TRANSITION_DLY); + AND_REG(&wlc_hw->regs->clk_ctl_st, + ~CCS_FORCEHT); + } + } + wlc_hw->forcefastclk = (mode == CLK_FAST); + } else { + + /* old chips w/o PMU, force HT through cc, + * then use FCA to verify mac is running fast clock + */ + + wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode); + + /* check fast clock is available (if core is not in reset) */ + if (wlc_hw->forcefastclk && wlc_hw->clk) + WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) & + SISF_FCLKA)); + + /* + * keep the ucode wake bit on if forcefastclk is on since we + * do not want ucode to put us back to slow clock when it dozes + * for PM mode. Code below matches the wake override bit with + * current forcefastclk state. Only setting bit in wake_override + * instead of waking ucode immediately since old code had this + * behavior. Older code set wlc->forcefastclk but only had the + * wake happen if the wakup_ucode work (protected by an up + * check) was executed just below. + */ + if (wlc_hw->forcefastclk) + mboolset(wlc_hw->wake_override, + BRCMS_WAKE_OVERRIDE_FORCEFAST); + else + mboolclr(wlc_hw->wake_override, + BRCMS_WAKE_OVERRIDE_FORCEFAST); + } +} + +/* set initial host flags value */ +static void +brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + + memset(mhfs, 0, MHFMAX * sizeof(u16)); + + mhfs[MHF2] |= mhf2_init; + + /* prohibit use of slowclock on multifunction boards */ + if (wlc_hw->boardflags & BFL_NOPLLDOWN) + mhfs[MHF1] |= MHF1_FORCEFASTCLK; + + if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) { + mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR; + mhfs[MHF1] |= MHF1_IQSWAP_WAR; + } +} + +/* set or clear ucode host flag bits + * it has an optimization for no-change write + * it only writes through shared memory when the core has clock; + * pre-CLK changes should use wlc_write_mhf to get around the optimization + * + * + * bands values are: BRCM_BAND_AUTO <--- Current band only + * BRCM_BAND_5G <--- 5G band only + * BRCM_BAND_2G <--- 2G band only + * BRCM_BAND_ALL <--- All bands + */ +void +brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val, + int bands) +{ + u16 save; + u16 addr[MHFMAX] = { + M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, + M_HOST_FLAGS5 + }; + struct brcms_hw_band *band; + + if ((val & ~mask) || idx >= MHFMAX) + return; /* error condition */ + + switch (bands) { + /* Current band only or all bands, + * then set the band to current band + */ + case BRCM_BAND_AUTO: + case BRCM_BAND_ALL: + band = wlc_hw->band; + break; + case BRCM_BAND_5G: + band = wlc_hw->bandstate[BAND_5G_INDEX]; + break; + case BRCM_BAND_2G: + band = wlc_hw->bandstate[BAND_2G_INDEX]; + break; + default: + band = NULL; /* error condition */ + } + + if (band) { + save = band->mhfs[idx]; + band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val; + + /* optimization: only write through if changed, and + * changed band is the current band + */ + if (wlc_hw->clk && (band->mhfs[idx] != save) + && (band == wlc_hw->band)) + brcms_b_write_shm(wlc_hw, addr[idx], + (u16) band->mhfs[idx]); + } + + if (bands == BRCM_BAND_ALL) { + wlc_hw->bandstate[0]->mhfs[idx] = + (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val; + wlc_hw->bandstate[1]->mhfs[idx] = + (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val; + } +} + +static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs) +{ + u8 idx; + u16 addr[] = { + M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, + M_HOST_FLAGS5 + }; + + for (idx = 0; idx < MHFMAX; idx++) + brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]); +} + +/* set the maccontrol register to desired reset state and + * initialize the sw cache of the register + */ +static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw) +{ + /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */ + wlc_hw->maccontrol = 0; + wlc_hw->suspended_fifos = 0; + wlc_hw->wake_override = 0; + wlc_hw->mute_override = 0; + brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE); +} + +/* set or clear maccontrol bits */ +void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val) +{ + u32 maccontrol; + u32 new_maccontrol; + + if (val & ~mask) + return; /* error condition */ + maccontrol = wlc_hw->maccontrol; + new_maccontrol = (maccontrol & ~mask) | val; + + /* if the new maccontrol value is the same as the old, nothing to do */ + if (new_maccontrol == maccontrol) + return; + + /* something changed, cache the new value */ + wlc_hw->maccontrol = new_maccontrol; + + /* write the new values with overrides applied */ + brcms_c_mctrl_write(wlc_hw); +} + +/* + * write the software state of maccontrol and + * overrides to the maccontrol register + */ +static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw) +{ + u32 maccontrol = wlc_hw->maccontrol; + + /* OR in the wake bit if overridden */ + if (wlc_hw->wake_override) + maccontrol |= MCTL_WAKE; + + /* set AP and INFRA bits for mute if needed */ + if (wlc_hw->mute_override) { + maccontrol &= ~(MCTL_AP); + maccontrol |= MCTL_INFRA; + } + + W_REG(&wlc_hw->regs->maccontrol, maccontrol); +} + +void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw, + u32 override_bit) +{ + if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) { + mboolset(wlc_hw->wake_override, override_bit); + return; + } + + mboolset(wlc_hw->wake_override, override_bit); + + brcms_c_mctrl_write(wlc_hw); + brcms_b_wait_for_wake(wlc_hw); + + return; +} + +void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw, + u32 override_bit) +{ + mboolclr(wlc_hw->wake_override, override_bit); + + if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) + return; + + brcms_c_mctrl_write(wlc_hw); + + return; +} + +/* When driver needs ucode to stop beaconing, it has to make sure that + * MCTL_AP is clear and MCTL_INFRA is set + * Mode MCTL_AP MCTL_INFRA + * AP 1 1 + * STA 0 1 <--- This will ensure no beacons + * IBSS 0 0 + */ +static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw) +{ + wlc_hw->mute_override = 1; + + /* if maccontrol already has AP == 0 and INFRA == 1 without this + * override, then there is no change to write + */ + if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) + return; + + brcms_c_mctrl_write(wlc_hw); + + return; +} + +/* Clear the override on AP and INFRA bits */ +static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw) +{ + if (wlc_hw->mute_override == 0) + return; + + wlc_hw->mute_override = 0; + + /* if maccontrol already has AP == 0 and INFRA == 1 without this + * override, then there is no change to write + */ + if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) + return; + + brcms_c_mctrl_write(wlc_hw); +} + +/* + * Write a MAC address to the given match reg offset in the RXE match engine. + */ +void +brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset, + const u8 *addr) +{ + struct d11regs *regs; + u16 mac_l; + u16 mac_m; + u16 mac_h; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n", + wlc_hw->unit); + + regs = wlc_hw->regs; + mac_l = addr[0] | (addr[1] << 8); + mac_m = addr[2] | (addr[3] << 8); + mac_h = addr[4] | (addr[5] << 8); + + /* enter the MAC addr into the RXE match registers */ + W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset); + W_REG(®s->rcm_mat_data, mac_l); + W_REG(®s->rcm_mat_data, mac_m); + W_REG(®s->rcm_mat_data, mac_h); + +} + +void +brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len, + void *buf) +{ + struct d11regs *regs; + u32 word; + bool be_bit; + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + regs = wlc_hw->regs; + W_REG(®s->tplatewrptr, offset); + + /* if MCTL_BIGEND bit set in mac control register, + * the chip swaps data in fifo, as well as data in + * template ram + */ + be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0; + + while (len > 0) { + memcpy(&word, buf, sizeof(u32)); + + if (be_bit) + word = cpu_to_be32(word); + else + word = cpu_to_le32(word); + + W_REG(®s->tplatewrdata, word); + + buf = (u8 *) buf + sizeof(u32); + len -= sizeof(u32); + } +} + +void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin) +{ + wlc_hw->band->CWmin = newmin; + + W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, newmin); +} + +void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax) +{ + wlc_hw->band->CWmax = newmax; + + W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, newmax); +} + +void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw) +{ + bool fastclk; + + /* request FAST clock if not on */ + fastclk = wlc_hw->forcefastclk; + if (!fastclk) + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); + + wlc_phy_bw_state_set(wlc_hw->band->pi, bw); + + brcms_b_phy_reset(wlc_hw); + wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi)); + + /* restore the clk */ + if (!fastclk) + brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); +} + +static void +brcms_c_write_hw_bcntemplate0(struct brcms_hardware *wlc_hw, u16 bcn[], + int len) +{ + struct d11regs *regs = wlc_hw->regs; + + brcms_b_write_template_ram(wlc_hw, T_BCN0_TPL_BASE, (len + 3) & ~3, + bcn); + /* write beacon length to SCR */ + brcms_b_write_shm(wlc_hw, M_BCN0_FRM_BYTESZ, (u16) len); + /* mark beacon0 valid */ + OR_REG(®s->maccommand, MCMD_BCN0VLD); +} + +static void +brcms_c_write_hw_bcntemplate1(struct brcms_hardware *wlc_hw, u16 bcn[], + int len) +{ + struct d11regs *regs = wlc_hw->regs; + + brcms_b_write_template_ram(wlc_hw, T_BCN1_TPL_BASE, (len + 3) & ~3, + bcn); + /* write beacon length to SCR */ + brcms_b_write_shm(wlc_hw, M_BCN1_FRM_BYTESZ, (u16) len); + /* mark beacon1 valid */ + OR_REG(®s->maccommand, MCMD_BCN1VLD); +} + +static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw) +{ + u16 v; + struct brcms_c_info *wlc = wlc_hw->wlc; + /* update SYNTHPU_DLY */ + + if (BRCMS_ISLCNPHY(wlc->band)) + v = SYNTHPU_DLY_LPPHY_US; + else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3))) + v = SYNTHPU_DLY_NPHY_US; + else + v = SYNTHPU_DLY_BPHY_US; + + brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v); +} + +/* band-specific init */ +static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + wlc_hw->band->bandunit); + + brcms_c_ucode_bsinit(wlc_hw); + + wlc_phy_init(wlc_hw->band->pi, chanspec); + + brcms_c_ucode_txant_set(wlc_hw); + + /* + * cwmin is band-specific, update hardware + * with value for current band + */ + brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin); + brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax); + + brcms_b_update_slot_timing(wlc_hw, + BAND_5G(wlc_hw->band-> + bandtype) ? true : wlc_hw-> + shortslot); + + /* write phytype and phyvers */ + brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype); + brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev); + + /* + * initialize the txphyctl1 rate table since + * shmem is shared between bands + */ + brcms_upd_ofdm_pctl1_table(wlc_hw); + + brcms_b_upd_synthpu(wlc_hw); +} + +static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk); + + wlc_hw->phyclk = clk; + + if (OFF == clk) { /* clear gmode bit, put phy into reset */ + + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE), + (SICF_PRST | SICF_FGC)); + udelay(1); + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST); + udelay(1); + + } else { /* take phy out of reset */ + + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC); + udelay(1); + ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0); + udelay(1); + + } +} + +/* Perform a soft reset of the PHY PLL */ +void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(struct chipcregs, chipcontrol_addr), ~0, 0); + udelay(1); + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(struct chipcregs, chipcontrol_data), 0x4, 0); + udelay(1); + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(struct chipcregs, chipcontrol_data), 0x4, 4); + udelay(1); + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(struct chipcregs, chipcontrol_data), 0x4, 0); + udelay(1); +} + +/* light way to turn on phy clock without reset for NPHY only + * refer to brcms_b_core_phy_clk for full version + */ +void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk) +{ + /* support(necessary for NPHY and HYPHY) only */ + if (!BRCMS_ISNPHY(wlc_hw->band)) + return; + + if (ON == clk) + ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC); + else + ai_core_cflags(wlc_hw->sih, SICF_FGC, 0); + +} + +void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk) +{ + if (ON == clk) + ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE); + else + ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0); +} + +void brcms_b_phy_reset(struct brcms_hardware *wlc_hw) +{ + struct brcms_phy_pub *pih = wlc_hw->band->pi; + u32 phy_bw_clkbits; + bool phy_in_reset = false; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (pih == NULL) + return; + + phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi); + + /* Specific reset sequence required for NPHY rev 3 and 4 */ + if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) && + NREV_LE(wlc_hw->band->phyrev, 4)) { + /* Set the PHY bandwidth */ + ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits); + + udelay(1); + + /* Perform a soft reset of the PHY PLL */ + brcms_b_core_phypll_reset(wlc_hw); + + /* reset the PHY */ + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE), + (SICF_PRST | SICF_PCLKE)); + phy_in_reset = true; + } else { + ai_core_cflags(wlc_hw->sih, + (SICF_PRST | SICF_PCLKE | SICF_BWMASK), + (SICF_PRST | SICF_PCLKE | phy_bw_clkbits)); + } + + udelay(2); + brcms_b_core_phy_clk(wlc_hw, ON); + + if (pih) + wlc_phy_anacore(pih, ON); +} + +/* switch to and initialize new band */ +static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit, + u16 chanspec) { + struct brcms_c_info *wlc = wlc_hw->wlc; + u32 macintmask; + + /* Enable the d11 core before accessing it */ + if (!ai_iscoreup(wlc_hw->sih)) { + ai_core_reset(wlc_hw->sih, 0, 0); + brcms_c_mctrl_reset(wlc_hw); + } + + macintmask = brcms_c_setband_inact(wlc, bandunit); + + if (!wlc_hw->up) + return; + + brcms_b_core_phy_clk(wlc_hw, ON); + + /* band-specific initializations */ + brcms_b_bsinit(wlc, chanspec); + + /* + * If there are any pending software interrupt bits, + * then replace these with a harmless nonzero value + * so brcms_c_dpc() will re-enable interrupts when done. + */ + if (wlc->macintstatus) + wlc->macintstatus = MI_DMAINT; + + /* restore macintmask */ + brcms_intrsrestore(wlc->wl, macintmask); + + /* ucode should still be suspended.. */ + WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); +} + +/* low-level band switch utility routine */ +void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + bandunit); + + wlc_hw->band = wlc_hw->bandstate[bandunit]; + + /* + * BMAC_NOTE: + * until we eliminate need for wlc->band refs in low level code + */ + wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit]; + + /* set gmode core flag */ + if (wlc_hw->sbclk && !wlc_hw->noreset) + ai_core_cflags(wlc_hw->sih, SICF_GMODE, + ((bandunit == 0) ? SICF_GMODE : 0)); +} + +static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw) +{ + + /* reject unsupported corerev */ + if (!VALID_COREREV(wlc_hw->corerev)) { + wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n", + wlc_hw->corerev); + return false; + } + + return true; +} + +/* Validate some board info parameters */ +static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw) +{ + uint boardrev = wlc_hw->boardrev; + + /* 4 bits each for board type, major, minor, and tiny version */ + uint brt = (boardrev & 0xf000) >> 12; + uint b0 = (boardrev & 0xf00) >> 8; + uint b1 = (boardrev & 0xf0) >> 4; + uint b2 = boardrev & 0xf; + + /* voards from other vendors are always considered valid */ + if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM) + return true; + + /* do some boardrev sanity checks when boardvendor is Broadcom */ + if (boardrev == 0) + return false; + + if (boardrev <= 0xff) + return true; + + if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9) + || (b2 > 9)) + return false; + + return true; +} + +static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw) +{ + const char *varname = "macaddr"; + char *macaddr; + + /* If macaddr exists, use it (Sromrev4, CIS, ...). */ + macaddr = getvar(wlc_hw->vars, varname); + if (macaddr != NULL) + return macaddr; + + if (NBANDS_HW(wlc_hw) > 1) + varname = "et1macaddr"; + else + varname = "il0macaddr"; + + macaddr = getvar(wlc_hw->vars, varname); + if (macaddr == NULL) + wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr " + "getvar(%s) not found\n", wlc_hw->unit, varname); + + return macaddr; +} + +/* + * Return true if radio is disabled, otherwise false. + * hw radio disable signal is an external pin, users activate it asynchronously + * this function could be called when driver is down and w/o clock + * it operates on different registers depending on corerev and boardflag. + */ +bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw) +{ + bool v, clk, xtal; + u32 resetbits = 0, flags = 0; + + xtal = wlc_hw->sbclk; + if (!xtal) + brcms_b_xtal(wlc_hw, ON); + + /* may need to take core out of reset first */ + clk = wlc_hw->clk; + if (!clk) { + /* + * mac no longer enables phyclk automatically when driver + * accesses phyreg throughput mac. This can be skipped since + * only mac reg is accessed below + */ + flags |= SICF_PCLKE; + + /* + * AI chip doesn't restore bar0win2 on + * hibernation/resume, need sw fixup + */ + if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || + (wlc_hw->sih->chip == BCM43225_CHIP_ID)) + wlc_hw->regs = (struct d11regs *) + ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); + ai_core_reset(wlc_hw->sih, flags, resetbits); + brcms_c_mctrl_reset(wlc_hw); + } + + v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0); + + /* put core back into reset */ + if (!clk) + ai_core_disable(wlc_hw->sih, 0); + + if (!xtal) + brcms_b_xtal(wlc_hw, OFF); + + return v; +} + +static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo) +{ + struct dma_pub *di = wlc_hw->di[fifo]; + return dma_rxreset(di); +} + +/* d11 core reset + * ensure fask clock during reset + * reset dma + * reset d11(out of reset) + * reset phy(out of reset) + * clear software macintstatus for fresh new start + * one testing hack wlc_hw->noreset will bypass the d11/phy reset + */ +void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags) +{ + struct d11regs *regs; + uint i; + bool fastclk; + u32 resetbits = 0; -/* conditions under which the PM bit should be set in outgoing frames and STAY_AWAKE is meaningful + if (flags == BRCMS_USE_COREFLAGS) + flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0); + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + regs = wlc_hw->regs; + + /* request FAST clock if not on */ + fastclk = wlc_hw->forcefastclk; + if (!fastclk) + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); + + /* reset the dma engines except first time thru */ + if (ai_iscoreup(wlc_hw->sih)) { + for (i = 0; i < NFIFO; i++) + if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i]))) + wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: " + "dma_txreset[%d]: cannot stop dma\n", + wlc_hw->unit, __func__, i); + + if ((wlc_hw->di[RX_FIFO]) + && (!wlc_dma_rxreset(wlc_hw, RX_FIFO))) + wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset" + "[%d]: cannot stop dma\n", + wlc_hw->unit, __func__, RX_FIFO); + } + /* if noreset, just stop the psm and return */ + if (wlc_hw->noreset) { + wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */ + brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0); + return; + } + + /* + * mac no longer enables phyclk automatically when driver accesses + * phyreg throughput mac, AND phy_reset is skipped at early stage when + * band->pi is invalid. need to enable PHY CLK + */ + flags |= SICF_PCLKE; + + /* + * reset the core + * In chips with PMU, the fastclk request goes through d11 core + * reg 0x1e0, which is cleared by the core_reset. have to re-request it. + * + * This adds some delay and we can optimize it by also requesting + * fastclk through chipcommon during this period if necessary. But + * that has to work coordinate with other driver like mips/arm since + * they may touch chipcommon as well. + */ + wlc_hw->clk = false; + ai_core_reset(wlc_hw->sih, flags, resetbits); + wlc_hw->clk = true; + if (wlc_hw->band && wlc_hw->band->pi) + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true); + + brcms_c_mctrl_reset(wlc_hw); + + if (PMUCTL_ENAB(wlc_hw->sih)) + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); + + brcms_b_phy_reset(wlc_hw); + + /* turn on PHY_PLL */ + brcms_b_core_phypll_ctl(wlc_hw, true); + + /* clear sw intstatus */ + wlc_hw->wlc->macintstatus = 0; + + /* restore the clk setting */ + if (!fastclk) + brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); +} + +/* txfifo sizes needs to be modified(increased) since the newer cores + * have more memory. + */ +static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw) +{ + struct d11regs *regs = wlc_hw->regs; + u16 fifo_nu; + u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk; + u16 txfifo_def, txfifo_def1; + u16 txfifo_cmd; + + /* tx fifos start at TXFIFO_START_BLK from the Base address */ + txfifo_startblk = TXFIFO_START_BLK; + + /* sequence of operations: reset fifo, set fifo size, reset fifo */ + for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) { + + txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu]; + txfifo_def = (txfifo_startblk & 0xff) | + (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT); + txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) | + ((((txfifo_endblk - + 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT); + txfifo_cmd = + TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT); + + W_REG(®s->xmtfifocmd, txfifo_cmd); + W_REG(®s->xmtfifodef, txfifo_def); + W_REG(®s->xmtfifodef1, txfifo_def1); + + W_REG(®s->xmtfifocmd, txfifo_cmd); + + txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu]; + } + /* + * need to propagate to shm location to be in sync since ucode/hw won't + * do this + */ + brcms_b_write_shm(wlc_hw, M_FIFOSIZE0, + wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]); + brcms_b_write_shm(wlc_hw, M_FIFOSIZE1, + wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]); + brcms_b_write_shm(wlc_hw, M_FIFOSIZE2, + ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw-> + xmtfifo_sz[TX_AC_BK_FIFO])); + brcms_b_write_shm(wlc_hw, M_FIFOSIZE3, + ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw-> + xmtfifo_sz[TX_BCMC_FIFO])); +} + +/* This function is used for changing the tsf frac register + * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz + * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz + * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz + * HTPHY Formula is 2^26/freq(MHz) e.g. + * For spuron2 - 126MHz -> 2^26/126 = 532610.0 + * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082 + * For spuron: 123MHz -> 2^26/123 = 545600.5 + * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341 + * For spur off: 120MHz -> 2^26/120 = 559240.5 + * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889 + */ + +void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode) +{ + struct d11regs *regs; + regs = wlc_hw->regs; + + if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || + (wlc_hw->sih->chip == BCM43225_CHIP_ID)) { + if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x2082); + W_REG(®s->tsf_clk_frac_h, 0x8); + } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x5341); + W_REG(®s->tsf_clk_frac_h, 0x8); + } else { /* 120Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x8889); + W_REG(®s->tsf_clk_frac_h, 0x8); + } + } else if (BRCMS_ISLCNPHY(wlc_hw->band)) { + if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x7CE0); + W_REG(®s->tsf_clk_frac_h, 0xC); + } else { /* 80Mhz */ + W_REG(®s->tsf_clk_frac_l, 0xCCCD); + W_REG(®s->tsf_clk_frac_h, 0xC); + } + } +} + +/* Initialize GPIOs that are controlled by D11 core */ +static void brcms_c_gpio_init(struct brcms_c_info *wlc) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + struct d11regs *regs; + u32 gc, gm; + + regs = wlc_hw->regs; + + /* use GPIO select 0 to get all gpio signals from the gpio out reg */ + brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0); + + /* + * Common GPIO setup: + * G0 = LED 0 = WLAN Activity + * G1 = LED 1 = WLAN 2.4 GHz Radio State + * G2 = LED 2 = WLAN 5 GHz Radio State + * G4 = radio disable input (HI enabled, LO disabled) + */ + + gc = gm = 0; + + /* Allocate GPIOs for mimo antenna diversity feature */ + if (wlc_hw->antsel_type == ANTSEL_2x3) { + /* Enable antenna diversity, use 2x3 mode */ + brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, + MHF3_ANTSEL_EN, BRCM_BAND_ALL); + brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, + MHF3_ANTSEL_MODE, BRCM_BAND_ALL); + + /* init superswitch control */ + wlc_phy_antsel_init(wlc_hw->band->pi, false); + + } else if (wlc_hw->antsel_type == ANTSEL_2x4) { + gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13); + /* + * The board itself is powered by these GPIOs + * (when not sending pattern) so set them high + */ + OR_REG(®s->psm_gpio_oe, + (BOARD_GPIO_12 | BOARD_GPIO_13)); + OR_REG(®s->psm_gpio_out, + (BOARD_GPIO_12 | BOARD_GPIO_13)); + + /* Enable antenna diversity, use 2x4 mode */ + brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, + MHF3_ANTSEL_EN, BRCM_BAND_ALL); + brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0, + BRCM_BAND_ALL); + + /* Configure the desired clock to be 4Mhz */ + brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV, + ANTSEL_CLKDIV_4MHZ); + } + + /* + * gpio 9 controls the PA. ucode is responsible + * for wiggling out and oe + */ + if (wlc_hw->boardflags & BFL_PACTRL) + gm |= gc |= BOARD_GPIO_PACTRL; + + /* apply to gpiocontrol register */ + ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY); +} + +static void brcms_ucode_download(struct brcms_hardware *wlc_hw) +{ + struct brcms_c_info *wlc; + wlc = wlc_hw->wlc; + + if (wlc_hw->ucode_loaded) + return; + + if (D11REV_IS(wlc_hw->corerev, 23)) { + if (BRCMS_ISNPHY(wlc_hw->band)) { + brcms_ucode_write(wlc_hw, bcm43xx_16_mimo, + bcm43xx_16_mimosz); + wlc_hw->ucode_loaded = true; + } else + wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " + "corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } else if (D11REV_IS(wlc_hw->corerev, 24)) { + if (BRCMS_ISLCNPHY(wlc_hw->band)) { + brcms_ucode_write(wlc_hw, bcm43xx_24_lcn, + bcm43xx_24_lcnsz); + wlc_hw->ucode_loaded = true; + } else { + wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " + "corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } + } +} + +static void brcms_ucode_write(struct brcms_hardware *wlc_hw, const u32 ucode[], + const uint nbytes) { + struct d11regs *regs = wlc_hw->regs; + uint i; + uint count; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + count = (nbytes / sizeof(u32)); + + W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL)); + (void)R_REG(®s->objaddr); + for (i = 0; i < count; i++) + W_REG(®s->objdata, le32_to_cpu(ucode[i])); + +} + +static void brcms_c_write_inits(struct brcms_hardware *wlc_hw, + const struct d11init *inits) +{ + int i; + u8 *base; + u8 *addr; + u16 size; + u32 value; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + base = (u8 *)wlc_hw->regs; + + for (i = 0; inits[i].addr != 0xffff; i++) { + size = le16_to_cpu(inits[i].size); + addr = base + le16_to_cpu(inits[i].addr); + value = le32_to_cpu(inits[i].value); + if (size == 2) + W_REG((u16 *)addr, value); + else if (size == 4) + W_REG((u32 *)addr, value); + else + break; + } +} + +static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw) +{ + u16 phyctl; + u16 phytxant = wlc_hw->bmac_phytxant; + u16 mask = PHY_TXC_ANT_MASK; + + /* set the Probe Response frame phy control word */ + phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS); + phyctl = (phyctl & ~mask) | phytxant; + brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl); + + /* set the Response (ACK/CTS) frame phy control word */ + phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD); + phyctl = (phyctl & ~mask) | phytxant; + brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl); +} + +void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant) +{ + /* update sw state */ + wlc_hw->bmac_phytxant = phytxant; + + /* push to ucode if up */ + if (!wlc_hw->up) + return; + brcms_c_ucode_txant_set(wlc_hw); + +} + +u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw) +{ + return (u16) wlc_hw->wlc->stf->txant; +} + +void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type) +{ + wlc_hw->antsel_type = antsel_type; + + /* Update the antsel type for phy module to use */ + wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type); +} + +void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw) +{ + bool fatal = false; + uint unit; + uint intstatus, idx; + struct d11regs *regs = wlc_hw->regs; + struct wiphy *wiphy = wlc_hw->wlc->wiphy; + + unit = wlc_hw->unit; + + for (idx = 0; idx < NFIFO; idx++) { + /* read intstatus register and ignore any non-error bits */ + intstatus = + R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS; + if (!intstatus) + continue; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n", + unit, idx, intstatus); + + if (intstatus & I_RO) { + wiphy_err(wiphy, "wl%d: fifo %d: receive fifo " + "overflow\n", unit, idx); + fatal = true; + } + + if (intstatus & I_PC) { + wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n", + unit, idx); + fatal = true; + } + + if (intstatus & I_PD) { + wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit, + idx); + fatal = true; + } + + if (intstatus & I_DE) { + wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol " + "error\n", unit, idx); + fatal = true; + } + + if (intstatus & I_RU) + wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor " + "underflow\n", idx, unit); + + if (intstatus & I_XU) { + wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo " + "underflow\n", idx, unit); + fatal = true; + } + + if (fatal) { + brcms_c_fatal_error(wlc_hw->wlc); /* big hammer */ + break; + } else + W_REG(®s->intctrlregs[idx].intstatus, + intstatus); + } +} + +void brcms_c_intrson(struct brcms_c_info *wlc) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + wlc->macintmask = wlc->defmacintmask; + W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); +} + +/* + * callback for siutils.c, which has only wlc handler, no wl they both check + * up, not only because there is no need to off/restore d11 interrupt but also + * because per-port code may require sync with valid interrupt. + */ +static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc) +{ + if (!wlc->hw->up) + return 0; + + return brcms_intrsoff(wlc->wl); +} + +static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask) +{ + if (!wlc->hw->up) + return; + + brcms_intrsrestore(wlc->wl, macintmask); +} + +u32 brcms_c_intrsoff(struct brcms_c_info *wlc) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + u32 macintmask; + + if (!wlc_hw->clk) + return 0; + + macintmask = wlc->macintmask; /* isr can still happen */ + + W_REG(&wlc_hw->regs->macintmask, 0); + (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */ + udelay(1); /* ensure int line is no longer driven */ + wlc->macintmask = 0; + + /* return previous macintmask; resolve race between us and our isr */ + return wlc->macintstatus ? 0 : macintmask; +} + +void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + if (!wlc_hw->clk) + return; + + wlc->macintmask = macintmask; + W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); +} + +static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw, + uint tx_fifo) +{ + u8 fifo = 1 << tx_fifo; + + /* Two clients of this code, 11h Quiet period and scanning. */ + + /* only suspend if not already suspended */ + if ((wlc_hw->suspended_fifos & fifo) == fifo) + return; + + /* force the core awake only if not already */ + if (wlc_hw->suspended_fifos == 0) + brcms_c_ucode_wake_override_set(wlc_hw, + BRCMS_WAKE_OVERRIDE_TXFIFO); + + wlc_hw->suspended_fifos |= fifo; + + if (wlc_hw->di[tx_fifo]) { + /* + * Suspending AMPDU transmissions in the middle can cause + * underflow which may result in mismatch between ucode and + * driver so suspend the mac before suspending the FIFO + */ + if (BRCMS_PHY_11N_CAP(wlc_hw->band)) + brcms_c_suspend_mac_and_wait(wlc_hw->wlc); + + dma_txsuspend(wlc_hw->di[tx_fifo]); + + if (BRCMS_PHY_11N_CAP(wlc_hw->band)) + brcms_c_enable_mac(wlc_hw->wlc); + } +} + +static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags) +{ + u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; + + if (on) { + /* suspend tx fifos */ + brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO); + brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO); + brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO); + brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO); + + /* zero the address match register so we do not send ACKs */ + brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, + null_ether_addr); + } else { + /* resume tx fifos */ + if (!wlc_hw->wlc->tx_suspended) + brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO); + + brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO); + brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO); + brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO); + + /* Restore address */ + brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, + wlc_hw->etheraddr); + } + + wlc_phy_mute_upd(wlc_hw->band->pi, on, flags); + + if (on) + brcms_c_ucode_mute_override_set(wlc_hw); + else + brcms_c_ucode_mute_override_clear(wlc_hw); +} + +/* brcms_b_tx_fifo_suspended: + * Check the MAC's tx suspend status for a tx fifo. + * + * When the MAC acknowledges a tx suspend, it indicates that no more + * packets will be transmitted out the radio. This is independent of + * DMA channel suspension---the DMA may have finished suspending, or may still + * be pulling data into a tx fifo, by the time the MAC acks the suspend + * request. + */ +static bool brcms_b_tx_fifo_suspended(struct brcms_hardware *wlc_hw, + uint tx_fifo) +{ + /* check that a suspend has been requested and is no longer pending */ + + /* + * for DMA mode, the suspend request is set in xmtcontrol of the DMA + * engine, and the tx fifo suspend at the lower end of the MAC is + * acknowledged in the chnstatus register. + * + * The tx fifo suspend completion is independent of the DMA suspend + * completion and may be acked before or after the DMA is suspended. + */ + if (dma_txsuspended(wlc_hw->di[tx_fifo]) && + (R_REG(&wlc_hw->regs->chnstatus) & + (1 << tx_fifo)) == 0) + return true; + + return false; +} + +static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw, + uint tx_fifo) +{ + /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case + * but need to be done here for PIO otherwise the watchdog will catch + * the inconsistency and fire + */ + /* Two clients of this code, 11h Quiet period and scanning. */ + if (wlc_hw->di[tx_fifo]) + dma_txresume(wlc_hw->di[tx_fifo]); + + /* allow core to sleep again */ + if (wlc_hw->suspended_fifos == 0) + return; + else { + wlc_hw->suspended_fifos &= ~(1 << tx_fifo); + if (wlc_hw->suspended_fifos == 0) + brcms_c_ucode_wake_override_clear(wlc_hw, + BRCMS_WAKE_OVERRIDE_TXFIFO); + } +} + +/* + * Read and clear macintmask and macintstatus and intstatus registers. + * This routine should be called with interrupts off + * Return: + * -1 if DEVICEREMOVED(wlc) evaluates to true; + * 0 if the interrupt is not for us, or we are in some special cases; + * device interrupt status bits otherwise. + */ +static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + struct d11regs *regs = wlc_hw->regs; + u32 macintstatus; + + /* macintstatus includes a DMA interrupt summary bit */ + macintstatus = R_REG(®s->macintstatus); + + BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit, + macintstatus); + + /* detect cardbus removed, in power down(suspend) and in reset */ + if (DEVICEREMOVED(wlc)) + return -1; + + /* DEVICEREMOVED succeeds even when the core is still resetting, + * handle that case here. + */ + if (macintstatus == 0xffffffff) + return 0; + + /* defer unsolicited interrupts */ + macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask); + + /* if not for us */ + if (macintstatus == 0) + return 0; + + /* interrupts are already turned off for CFE build + * Caution: For CFE Turning off the interrupts again has some undesired + * consequences + */ + /* turn off the interrupts */ + W_REG(®s->macintmask, 0); + (void)R_REG(®s->macintmask); /* sync readback */ + wlc->macintmask = 0; + + /* clear device interrupts */ + W_REG(®s->macintstatus, macintstatus); + + /* MI_DMAINT is indication of non-zero intstatus */ + if (macintstatus & MI_DMAINT) + /* + * only fifo interrupt enabled is I_RI in + * RX_FIFO. If MI_DMAINT is set, assume it + * is set and clear the interrupt. + */ + W_REG(®s->intctrlregs[RX_FIFO].intstatus, + DEF_RXINTMASK); + + return macintstatus; +} + +/* Update wlc->macintstatus and wlc->intstatus[]. */ +/* Return true if they are updated successfully. false otherwise */ +bool brcms_c_intrsupd(struct brcms_c_info *wlc) +{ + u32 macintstatus; + + /* read and clear macintstatus and intstatus registers */ + macintstatus = wlc_intstatus(wlc, false); + + /* device is removed */ + if (macintstatus == 0xffffffff) + return false; + + /* update interrupt status in software */ + wlc->macintstatus |= macintstatus; + + return true; +} + +/* + * First-level interrupt processing. + * Return true if this was our interrupt, false otherwise. + * *wantdpc will be set to true if further brcms_c_dpc() processing is required, + * false otherwise. + */ +bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + u32 macintstatus; + + *wantdpc = false; + + if (!wlc_hw->up || !wlc->macintmask) + return false; + + /* read and clear macintstatus and intstatus registers */ + macintstatus = wlc_intstatus(wlc, true); + + if (macintstatus == 0xffffffff) + wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code" + " path\n"); + + /* it is not for us */ + if (macintstatus == 0) + return false; + + *wantdpc = true; + + /* save interrupt status bits */ + wlc->macintstatus = macintstatus; + + return true; + +} + +void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + struct d11regs *regs = wlc_hw->regs; + u32 mc, mi; + struct wiphy *wiphy = wlc->wiphy; + + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + wlc_hw->band->bandunit); + + /* + * Track overlapping suspend requests + */ + wlc_hw->mac_suspend_depth++; + if (wlc_hw->mac_suspend_depth > 1) + return; + + /* force the core awake */ + brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND); + + mc = R_REG(®s->maccontrol); + + if (mc == 0xffffffff) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return; + } + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(!(mc & MCTL_PSM_RUN)); + WARN_ON(!(mc & MCTL_EN_MAC)); + + mi = R_REG(®s->macintstatus); + if (mi == 0xffffffff) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return; + } + WARN_ON(mi & MI_MACSSPNDD); + + brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0); + + SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD), + BRCMS_MAX_MAC_SUSPEND); + + if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) { + wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS" + " and MI_MACSSPNDD is still not on.\n", + wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND); + wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, " + "psm_brc 0x%04x\n", wlc_hw->unit, + R_REG(®s->psmdebug), + R_REG(®s->phydebug), + R_REG(®s->psm_brc)); + } + + mc = R_REG(®s->maccontrol); + if (mc == 0xffffffff) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return; + } + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(!(mc & MCTL_PSM_RUN)); + WARN_ON(mc & MCTL_EN_MAC); +} + +void brcms_c_enable_mac(struct brcms_c_info *wlc) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + struct d11regs *regs = wlc_hw->regs; + u32 mc, mi; + + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + wlc->band->bandunit); + + /* + * Track overlapping suspend requests + */ + wlc_hw->mac_suspend_depth--; + if (wlc_hw->mac_suspend_depth > 0) + return; + + mc = R_REG(®s->maccontrol); + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(mc & MCTL_EN_MAC); + WARN_ON(!(mc & MCTL_PSM_RUN)); + + brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC); + W_REG(®s->macintstatus, MI_MACSSPNDD); + + mc = R_REG(®s->maccontrol); + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(!(mc & MCTL_EN_MAC)); + WARN_ON(!(mc & MCTL_PSM_RUN)); + + mi = R_REG(®s->macintstatus); + WARN_ON(mi & MI_MACSSPNDD); + + brcms_c_ucode_wake_override_clear(wlc_hw, + BRCMS_WAKE_OVERRIDE_MACSUSPEND); +} + +static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw) +{ + u8 rate; + u8 rates[8] = { + BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M, + BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M + }; + u16 entry_ptr; + u16 pctl1; + uint i; + + if (!BRCMS_PHY_11N_CAP(wlc_hw->band)) + return; + + /* walk the phy rate table and update the entries */ + for (i = 0; i < ARRAY_SIZE(rates); i++) { + rate = rates[i]; + + entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate); + + /* read the SHM Rate Table entry OFDM PCTL1 values */ + pctl1 = + brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS); + + /* modify the value */ + pctl1 &= ~PHY_TXC1_MODE_MASK; + pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT); + + /* Update the SHM Rate Table entry OFDM PCTL1 values */ + brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS, + pctl1); + } +} + +static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw, + u8 rate) +{ + uint i; + u8 plcp_rate = 0; + struct plcp_signal_rate_lookup { + u8 rate; + u8 signal_rate; + }; + /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */ + const struct plcp_signal_rate_lookup rate_lookup[] = { + {BRCM_RATE_6M, 0xB}, + {BRCM_RATE_9M, 0xF}, + {BRCM_RATE_12M, 0xA}, + {BRCM_RATE_18M, 0xE}, + {BRCM_RATE_24M, 0x9}, + {BRCM_RATE_36M, 0xD}, + {BRCM_RATE_48M, 0x8}, + {BRCM_RATE_54M, 0xC} + }; + + for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) { + if (rate == rate_lookup[i].rate) { + plcp_rate = rate_lookup[i].signal_rate; + break; + } + } + + /* Find the SHM pointer to the rate table entry by looking in the + * Direct-map Table + */ + return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2)); +} + +void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode) +{ + wlc_hw->hw_stf_ss_opmode = stf_mode; + + if (wlc_hw->clk) + brcms_upd_ofdm_pctl1_table(wlc_hw); +} + +static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw) +{ + struct d11regs *regs; + u32 w, val; + struct wiphy *wiphy = wlc_hw->wlc->wiphy; + + BCMMSG(wiphy, "wl%d\n", wlc_hw->unit); + + regs = wlc_hw->regs; + + /* Validate dchip register access */ + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + w = R_REG(®s->objdata); + + /* Can we write and read back a 32bit register? */ + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, (u32) 0xaa5555aa); + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + val = R_REG(®s->objdata); + if (val != (u32) 0xaa5555aa) { + wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " + "expected 0xaa5555aa\n", wlc_hw->unit, val); + return false; + } + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, (u32) 0x55aaaa55); + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + val = R_REG(®s->objdata); + if (val != (u32) 0x55aaaa55) { + wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " + "expected 0x55aaaa55\n", wlc_hw->unit, val); + return false; + } + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, w); + + /* clear CFPStart */ + W_REG(®s->tsf_cfpstart, 0); + + w = R_REG(®s->maccontrol); + if ((w != (MCTL_IHR_EN | MCTL_WAKE)) && + (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) { + wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = " + "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w, + (MCTL_IHR_EN | MCTL_WAKE), + (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE)); + return false; + } + + return true; +} + +#define PHYPLL_WAIT_US 100000 + +void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on) +{ + struct d11regs *regs; + u32 tmp; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + tmp = 0; + regs = wlc_hw->regs; + + if (on) { + if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) { + OR_REG(®s->clk_ctl_st, + (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL | + CCS_ERSRC_REQ_PHYPLL)); + SPINWAIT((R_REG(®s->clk_ctl_st) & + (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT), + PHYPLL_WAIT_US); + + tmp = R_REG(®s->clk_ctl_st); + if ((tmp & (CCS_ERSRC_AVAIL_HT)) != + (CCS_ERSRC_AVAIL_HT)) + wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY" + " PLL failed\n", __func__); + } else { + OR_REG(®s->clk_ctl_st, + (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL)); + SPINWAIT((R_REG(®s->clk_ctl_st) & + (CCS_ERSRC_AVAIL_D11PLL | + CCS_ERSRC_AVAIL_PHYPLL)) != + (CCS_ERSRC_AVAIL_D11PLL | + CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US); + + tmp = R_REG(®s->clk_ctl_st); + if ((tmp & + (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) + != + (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) + wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on " + "PHY PLL failed\n", __func__); + } + } else { + /* + * Since the PLL may be shared, other cores can still + * be requesting it; so we'll deassert the request but + * not wait for status to comply. + */ + AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL); + tmp = R_REG(®s->clk_ctl_st); + } +} + +void brcms_c_coredisable(struct brcms_hardware *wlc_hw) +{ + bool dev_gone; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + dev_gone = DEVICEREMOVED(wlc_hw->wlc); + + if (dev_gone) + return; + + if (wlc_hw->noreset) + return; + + /* radio off */ + wlc_phy_switch_radio(wlc_hw->band->pi, OFF); + + /* turn off analog core */ + wlc_phy_anacore(wlc_hw->band->pi, OFF); + + /* turn off PHYPLL to save power */ + brcms_b_core_phypll_ctl(wlc_hw, false); + + /* No need to set wlc->pub->radio_active = OFF + * because this function needs down capability and + * radio_active is designed for BCMNODOWN. + */ + + /* remove gpio controls */ + if (wlc_hw->ucode_dbgsel) + ai_gpiocontrol(wlc_hw->sih, ~0, 0, GPIO_DRV_PRIORITY); + + wlc_hw->clk = false; + ai_core_disable(wlc_hw->sih, 0); + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); +} + +/* power both the pll and external oscillator on/off */ +static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want); + + /* + * dont power down if plldown is false or + * we must poll hw radio disable + */ + if (!want && wlc_hw->pllreq) + return; + + if (wlc_hw->sih) + ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want); + + wlc_hw->sbclk = want; + if (!wlc_hw->sbclk) { + wlc_hw->clk = false; + if (wlc_hw->band && wlc_hw->band->pi) + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); + } +} + +static void brcms_c_flushqueues(struct brcms_c_info *wlc) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + uint i; + + wlc->txpend16165war = 0; + + /* free any posted tx packets */ + for (i = 0; i < NFIFO; i++) + if (wlc_hw->di[i]) { + dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL); + TXPKTPENDCLR(wlc, i); + BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i); + } + + /* free any posted rx packets */ + dma_rxreclaim(wlc_hw->di[RX_FIFO]); +} + +u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset) +{ + return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL); +} + +void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v) +{ + brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL); +} + +static u16 +brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel) +{ + struct d11regs *regs = wlc_hw->regs; + u16 *objdata_lo = (u16 *)®s->objdata; + u16 *objdata_hi = objdata_lo + 1; + u16 v; + + W_REG(®s->objaddr, sel | (offset >> 2)); + (void)R_REG(®s->objaddr); + if (offset & 2) + v = R_REG(objdata_hi); + else + v = R_REG(objdata_lo); + + return v; +} + +static void +brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v, + u32 sel) +{ + struct d11regs *regs = wlc_hw->regs; + u16 *objdata_lo = (u16 *)®s->objdata; + u16 *objdata_hi = objdata_lo + 1; + + W_REG(®s->objaddr, sel | (offset >> 2)); + (void)R_REG(®s->objaddr); + if (offset & 2) + W_REG(objdata_hi, v); + else + W_REG(objdata_lo, v); +} + +/* Copy a buffer to shared memory of specified type . + * SHM 'offset' needs to be an even address and + * Buffer length 'len' must be an even number of bytes + * 'sel' selects the type of memory + */ +void +brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset, + const void *buf, int len, u32 sel) +{ + u16 v; + const u8 *p = (const u8 *)buf; + int i; + + if (len <= 0 || (offset & 1) || (len & 1)) + return; + + for (i = 0; i < len; i += 2) { + v = p[i] | (p[i + 1] << 8); + brcms_b_write_objmem(wlc_hw, offset + i, v, sel); + } +} + +/* Copy a piece of shared memory of specified type to a buffer . + * SHM 'offset' needs to be an even address and + * Buffer length 'len' must be an even number of bytes + * 'sel' selects the type of memory + */ +void +brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf, + int len, u32 sel) +{ + u16 v; + u8 *p = (u8 *) buf; + int i; + + if (len <= 0 || (offset & 1) || (len & 1)) + return; + + for (i = 0; i < len; i += 2) { + v = brcms_b_read_objmem(wlc_hw, offset + i, sel); + p[i] = v & 0xFF; + p[i + 1] = (v >> 8) & 0xFF; + } +} + +void brcms_b_copyfrom_vars(struct brcms_hardware *wlc_hw, char **buf, + uint *len) +{ + BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n", + wlc_hw->vars_size); + + *buf = wlc_hw->vars; + *len = wlc_hw->vars_size; +} + +void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw, u16 SRL, u16 LRL) +{ + wlc_hw->SRL = SRL; + wlc_hw->LRL = LRL; + + /* write retry limit to SCR, shouldn't need to suspend */ + if (wlc_hw->up) { + W_REG(&wlc_hw->regs->objaddr, + OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL); + W_REG(&wlc_hw->regs->objaddr, + OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL); + } +} + +void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit) +{ + if (set) { + if (mboolisset(wlc_hw->pllreq, req_bit)) + return; + + mboolset(wlc_hw->pllreq, req_bit); + + if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) { + if (!wlc_hw->sbclk) + brcms_b_xtal(wlc_hw, ON); + } + } else { + if (!mboolisset(wlc_hw->pllreq, req_bit)) + return; + + mboolclr(wlc_hw->pllreq, req_bit); + + if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) { + if (wlc_hw->sbclk) + brcms_b_xtal(wlc_hw, OFF); + } + } + + return; +} + +void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail) +{ + wlc_hw->antsel_avail = antsel_avail; +} + +/* + * conditions under which the PM bit should be set in outgoing frames + * and STAY_AWAKE is meaningful */ bool brcms_c_ps_allowed(struct brcms_c_info *wlc) { @@ -400,6 +3025,20 @@ bool brcms_c_ps_allowed(struct brcms_c_info *wlc) return true; } +void brcms_b_reset(struct brcms_hardware *wlc_hw) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* reset the core */ + if (!DEVICEREMOVED(wlc_hw->wlc)) + brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); + + /* purge the dma rings */ + brcms_c_flushqueues(wlc_hw->wlc); + + brcms_c_reset_bmac_done(wlc_hw->wlc); +} + void brcms_c_reset(struct brcms_c_info *wlc) { BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); @@ -426,9 +3065,9 @@ void brcms_c_fatal_error(struct brcms_c_info *wlc) * if other configurations are in conflict (bandlocked, 11n mode disabled, * invalid channel for current country, etc.) */ -static chanspec_t brcms_c_init_chanspec(struct brcms_c_info *wlc) +static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc) { - chanspec_t chanspec = + u16 chanspec = 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE | WL_CHANSPEC_BAND_2G; @@ -445,10 +3084,245 @@ static void brcms_c_init_scb(struct brcms_c_info *wlc, struct scb *scb) scb->seqnum[i] = 0; } +/* d11 core init + * reset PSM + * download ucode/PCM + * let ucode run to suspended + * download ucode inits + * config other core registers + * init dma + */ +static void brcms_b_coreinit(struct brcms_c_info *wlc) +{ + struct brcms_hardware *wlc_hw = wlc->hw; + struct d11regs *regs; + u32 sflags; + uint bcnint_us; + uint i = 0; + bool fifosz_fixup = false; + int err = 0; + u16 buf[NFIFO]; + struct wiphy *wiphy = wlc->wiphy; + + regs = wlc_hw->regs; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* reset PSM */ + brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE)); + + brcms_ucode_download(wlc_hw); + /* + * FIFOSZ fixup. driver wants to controls the fifo allocation. + */ + fifosz_fixup = true; + + /* let the PSM run to the suspended state, set mode to BSS STA */ + W_REG(®s->macintstatus, -1); + brcms_b_mctrl(wlc_hw, ~0, + (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE)); + + /* wait for ucode to self-suspend after auto-init */ + SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0), + 1000 * 1000); + if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0) + wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-" + "suspend!\n", wlc_hw->unit); + + brcms_c_gpio_init(wlc); + + sflags = ai_core_sflags(wlc_hw->sih, 0, 0); + + if (D11REV_IS(wlc_hw->corerev, 23)) { + if (BRCMS_ISNPHY(wlc_hw->band)) + brcms_c_write_inits(wlc_hw, d11n0initvals16); + else + wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" + " %d\n", __func__, wlc_hw->unit, + wlc_hw->corerev); + } else if (D11REV_IS(wlc_hw->corerev, 24)) { + if (BRCMS_ISLCNPHY(wlc_hw->band)) + brcms_c_write_inits(wlc_hw, d11lcn0initvals24); + else + wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" + " %d\n", __func__, wlc_hw->unit, + wlc_hw->corerev); + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } + + /* For old ucode, txfifo sizes needs to be modified(increased) */ + if (fifosz_fixup == true) + brcms_b_corerev_fifofixup(wlc_hw); + + /* check txfifo allocations match between ucode and driver */ + buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0); + if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) { + i = TX_AC_BE_FIFO; + err = -1; + } + buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1); + if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) { + i = TX_AC_VI_FIFO; + err = -1; + } + buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2); + buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff; + buf[TX_AC_BK_FIFO] &= 0xff; + if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) { + i = TX_AC_BK_FIFO; + err = -1; + } + if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) { + i = TX_AC_VO_FIFO; + err = -1; + } + buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3); + buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff; + buf[TX_BCMC_FIFO] &= 0xff; + if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) { + i = TX_BCMC_FIFO; + err = -1; + } + if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) { + i = TX_ATIM_FIFO; + err = -1; + } + if (err != 0) + wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d" + " driver size %d index %d\n", buf[i], + wlc_hw->xmtfifo_sz[i], i); + + /* make sure we can still talk to the mac */ + WARN_ON(R_REG(®s->maccontrol) == 0xffffffff); + + /* band-specific inits done by wlc_bsinit() */ + + /* Set up frame burst size and antenna swap threshold init values */ + brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST); + brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT); + + /* enable one rx interrupt per received frame */ + W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT)); + + /* set the station mode (BSS STA) */ + brcms_b_mctrl(wlc_hw, + (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP), + (MCTL_INFRA | MCTL_DISCARD_PMQ)); + + /* set up Beacon interval */ + bcnint_us = 0x8000 << 10; + W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT)); + W_REG(®s->tsf_cfpstart, bcnint_us); + W_REG(®s->macintstatus, MI_GP1); + + /* write interrupt mask */ + W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK); + + /* allow the MAC to control the PHY clock (dynamic on/off) */ + brcms_b_macphyclk_set(wlc_hw, ON); + + /* program dynamic clock control fast powerup delay register */ + wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih); + W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly); + + /* tell the ucode the corerev */ + brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev); + + /* tell the ucode MAC capabilities */ + brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L, + (u16) (wlc_hw->machwcap & 0xffff)); + brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H, + (u16) ((wlc_hw-> + machwcap >> 16) & 0xffff)); + + /* write retry limits to SCR, this done after PSM init */ + W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, wlc_hw->SRL); + W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, wlc_hw->LRL); + + /* write rate fallback retry limits */ + brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL); + brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL); + + AND_REG(®s->ifs_ctl, 0x0FFF); + W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN); + + /* dma initializations */ + wlc->txpend16165war = 0; + + /* init the tx dma engines */ + for (i = 0; i < NFIFO; i++) { + if (wlc_hw->di[i]) + dma_txinit(wlc_hw->di[i]); + } + + /* init the rx dma engine(s) and post receive buffers */ + dma_rxinit(wlc_hw->di[RX_FIFO]); + dma_rxfill(wlc_hw->di[RX_FIFO]); +} + +void +brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec, + bool mute) { + u32 macintmask; + bool fastclk; + struct brcms_c_info *wlc = wlc_hw->wlc; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* request FAST clock if not on */ + fastclk = wlc_hw->forcefastclk; + if (!fastclk) + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); + + /* disable interrupts */ + macintmask = brcms_intrsoff(wlc->wl); + + /* set up the specified band and chanspec */ + brcms_c_setxband(wlc_hw, CHSPEC_BANDUNIT(chanspec)); + wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); + + /* do one-time phy inits and calibration */ + wlc_phy_cal_init(wlc_hw->band->pi); + + /* core-specific initialization */ + brcms_b_coreinit(wlc); + + /* suspend the tx fifos and mute the phy for preism cac time */ + if (mute) + brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM); + + /* band-specific inits */ + brcms_b_bsinit(wlc, chanspec); + + /* restore macintmask */ + brcms_intrsrestore(wlc->wl, macintmask); + + /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac + * is suspended and brcms_c_enable_mac() will clear this override bit. + */ + mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND); + + /* + * initialize mac_suspend_depth to 1 to match ucode + * initial suspended state + */ + wlc_hw->mac_suspend_depth = 1; + + /* restore the clk */ + if (!fastclk) + brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); +} + void brcms_c_init(struct brcms_c_info *wlc) { - d11regs_t *regs; - chanspec_t chanspec; + struct d11regs *regs; + u16 chanspec; int i; struct brcms_bss_cfg *bsscfg; bool mute = false; @@ -457,8 +3331,10 @@ void brcms_c_init(struct brcms_c_info *wlc) regs = wlc->regs; - /* This will happen if a big-hammer was executed. In that case, we want to go back - * to the channel that we were on and not new channel + /* + * This will happen if a big-hammer was executed. In + * that case, we want to go back to the channel that + * we were on and not new channel */ if (wlc->pub->associated) chanspec = wlc->home_chanspec; @@ -474,14 +3350,14 @@ void brcms_c_init(struct brcms_c_info *wlc) brcms_c_reprate_init(wlc); /* write ethernet address to core */ - FOREACH_BSS(wlc, i, bsscfg) { + FOREACH_BSS(wlc, i, bsscfg) brcms_c_set_mac(bsscfg); brcms_c_set_bssid(bsscfg); - } + END_FOREACH_BSS() /* Update tsf_cfprep if associated and up */ if (wlc->pub->associated) { - FOREACH_BSS(wlc, i, bsscfg) { + FOREACH_BSS(wlc, i, bsscfg) if (bsscfg->up) { u32 bi; @@ -499,7 +3375,7 @@ void brcms_c_init(struct brcms_c_info *wlc) break; } - } + END_FOREACH_BSS() } brcms_c_bandinit_ordered(wlc, chanspec); @@ -518,7 +3394,10 @@ void brcms_c_init(struct brcms_c_info *wlc) brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true); brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true); - /* Update some shared memory locations related to max AMPDU size allowed to received */ + /* + * Update some shared memory locations related to + * max AMPDU size allowed to received + */ brcms_c_ampdu_shm_upd(wlc->ampdu); /* band-specific inits */ @@ -563,10 +3442,9 @@ void brcms_c_init(struct brcms_c_info *wlc) /* Uninitialized; read from HW */ int ac; - for (ac = 0; ac < AC_COUNT; ac++) { + for (ac = 0; ac < AC_COUNT; ac++) wlc->wme_retries[ac] = brcms_c_read_shm(wlc, M_AC_TXLMT_ADDR(ac)); - } } } @@ -590,9 +3468,11 @@ void brcms_c_mac_promisc(struct brcms_c_info *wlc) { u32 promisc_bits = 0; - /* promiscuous mode just sets MCTL_PROMISC - * Note: APs get all BSS traffic without the need to set the MCTL_PROMISC bit - * since all BSS data traffic is directed at the AP + /* + * promiscuous mode just sets MCTL_PROMISC + * Note: APs get all BSS traffic without the need to set + * the MCTL_PROMISC bit since all BSS data traffic is + * directed at the AP */ if (PROMISC_ENAB(wlc->pub) && !AP_ENAB(wlc->pub)) promisc_bits |= MCTL_PROMISC; @@ -641,10 +3521,9 @@ int brcms_c_set_mac(struct brcms_bss_cfg *cfg) int err = 0; struct brcms_c_info *wlc = cfg->wlc; - if (cfg == wlc->cfg) { + if (cfg == wlc->cfg) /* enter the MAC addr into the RXE match registers */ brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, cfg->cur_etheraddr); - } brcms_c_ampdu_macaddr_upd(wlc); @@ -659,14 +3538,19 @@ void brcms_c_set_bssid(struct brcms_bss_cfg *cfg) struct brcms_c_info *wlc = cfg->wlc; /* if primary config, we need to update BSSID in RXE match registers */ - if (cfg == wlc->cfg) { + if (cfg == wlc->cfg) brcms_c_set_addrmatch(wlc, RCM_BSSID_OFFSET, cfg->BSSID); +} + +void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot) +{ + wlc_hw->shortslot = shortslot; + + if (BAND_2G(brcms_b_bandtype(wlc_hw)) && wlc_hw->up) { + brcms_c_suspend_mac_and_wait(wlc_hw->wlc); + brcms_b_update_slot_timing(wlc_hw, shortslot); + brcms_c_enable_mac(wlc_hw->wlc); } -#ifdef SUPPORT_HWKEYS - else if (BSSCFG_STA(cfg) && cfg->BSS) { - brcms_c_rcmta_add_bssid(wlc, cfg); - } -#endif } /* @@ -688,7 +3572,7 @@ void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot) wlc->shortslot = shortslot; /* update the capability based on current shortslot mode */ - FOREACH_BSS(wlc, idx, cfg) { + FOREACH_BSS(wlc, idx, cfg) if (!cfg->associated) continue; cfg->current_bss->capability &= @@ -696,7 +3580,7 @@ void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot) if (wlc->shortslot) cfg->current_bss->capability |= WLAN_CAPABILITY_SHORT_SLOT_TIME; - } + END_FOREACH_BSS() brcms_b_set_shortslot(wlc->hw, shortslot); } @@ -728,8 +3612,11 @@ static u8 brcms_c_local_constraint_qdbm(struct brcms_c_info *wlc) return local; } -/* propagate home chanspec to all bsscfgs in case bsscfg->current_bss->chanspec is referenced */ -void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, chanspec_t chanspec) +/* + * propagate home chanspec to all bsscfgs in + * case bsscfg->current_bss->chanspec is referenced + */ +void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec) { if (wlc->home_chanspec != chanspec) { int idx; @@ -737,18 +3624,19 @@ void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, chanspec_t chanspec) wlc->home_chanspec = chanspec; - FOREACH_BSS(wlc, idx, cfg) { + FOREACH_BSS(wlc, idx, cfg) if (!cfg->associated) continue; cfg->current_bss->chanspec = chanspec; - } + END_FOREACH_BSS() + } } static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc, - chanspec_t chanspec) + u16 chanspec) { /* Save our copy of the chanspec */ wlc->chanspec = chanspec; @@ -767,11 +3655,55 @@ static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc, } -void brcms_c_set_chanspec(struct brcms_c_info *wlc, chanspec_t chanspec) +void +brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec, + bool mute, struct txpwr_limits *txpwr) +{ + uint bandunit; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec); + + wlc_hw->chanspec = chanspec; + + /* Switch bands if necessary */ + if (NBANDS_HW(wlc_hw) > 1) { + bandunit = CHSPEC_BANDUNIT(chanspec); + if (wlc_hw->band->bandunit != bandunit) { + /* brcms_b_setband disables other bandunit, + * use light band switch if not up yet + */ + if (wlc_hw->up) { + wlc_phy_chanspec_radio_set(wlc_hw-> + bandstate[bandunit]-> + pi, chanspec); + brcms_b_setband(wlc_hw, bandunit, chanspec); + } else { + brcms_c_setxband(wlc_hw, bandunit); + } + } + } + + wlc_phy_initcal_enable(wlc_hw->band->pi, !mute); + + if (!wlc_hw->up) { + if (wlc_hw->clk) + wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, + chanspec); + wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); + } else { + wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec); + wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec); + + /* Update muting of the channel */ + brcms_b_mute(wlc_hw, mute, 0); + } +} + +void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec) { uint bandunit; bool switchband = false; - chanspec_t old_chanspec = wlc->chanspec; + u16 old_chanspec = wlc->chanspec; if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) { wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n", @@ -823,10 +3755,10 @@ void brcms_c_set_chanspec(struct brcms_c_info *wlc, chanspec_t chanspec) brcms_c_ucode_mac_upd(wlc); } -ratespec_t brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc, - wlc_rateset_t *rs) +u32 brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc, + struct brcms_c_rateset *rs) { - ratespec_t lowest_basic_rspec; + u32 lowest_basic_rspec; uint i; /* Use the lowest basic rate */ @@ -837,23 +3769,25 @@ ratespec_t brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc, break; } } -#if NCONF - /* pick siso/cdd as default for OFDM (note no basic rate MCSs are supported yet) */ - if (IS_OFDM(lowest_basic_rspec)) { + + /* + * pick siso/cdd as default for OFDM (note no basic + * rate MCSs are supported yet) + */ + if (IS_OFDM(lowest_basic_rspec)) lowest_basic_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT); - } -#endif return lowest_basic_rspec; } -/* This function changes the phytxctl for beacon based on current beacon ratespec AND txant - * setting as per this table: +/* + * This function changes the phytxctl for beacon based on current + * beacon ratespec AND txant setting as per this table: * ratespec CCK ant = wlc->stf->txant * OFDM ant = 3 */ void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc, - ratespec_t bcn_rspec) + u32 bcn_rspec) { u16 phyctl; u16 phytxant = wlc->stf->phytxant; @@ -868,9 +3802,11 @@ void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc, brcms_c_write_shm(wlc, M_BCN_PCTLWD, phyctl); } -/* centralized protection config change function to simplify debugging, no consistency checking - * this should be called only on changes to avoid overhead in periodic function -*/ +/* + * centralized protection config change function to simplify debugging, no + * consistency checking this should be called only on changes to avoid overhead + * in periodic function + */ void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val) { BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val); @@ -957,16 +3893,18 @@ static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc) */ if (wlc->home_chanspec == BRCMS_BAND_PI_RADIO_CHANSPEC) { if (wlc->pub->associated) { - /* BMAC_NOTE: This is something that should be fixed in ucode inits. - * I think that the ucode inits set up the bcn templates and shm values - * with a bogus beacon. This should not be done in the inits. If ucode needs - * to set up a beacon for testing, the test routines should write it down, - * not expect the inits to populate a bogus beacon. + /* + * BMAC_NOTE: This is something that should be fixed + * in ucode inits. I think that the ucode inits set + * up the bcn templates and shm values with a bogus + * beacon. This should not be done in the inits. If + * ucode needs to set up a beacon for testing, the + * test routines should write it down, not expect the + * inits to populate a bogus beacon. */ - if (BRCMS_PHY_11N_CAP(wlc->band)) { + if (BRCMS_PHY_11N_CAP(wlc->band)) brcms_c_write_shm(wlc, M_BCN_TXTSF_OFFSET, wlc->band->bcntsfoff); - } } } else { /* disable an active IBSS if we are not on the home channel */ @@ -978,16 +3916,16 @@ static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc) } static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc, - chanspec_t chanspec) + u16 chanspec) { - wlc_rateset_t default_rateset; + struct brcms_c_rateset default_rateset; uint parkband; uint i, band_order[2]; BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); /* - * We might have been bandlocked during down and the chip power-cycled (hibernate). - * figure out the right band to park on + * We might have been bandlocked during down and the chip + * power-cycled (hibernate). Figure out the right band to park on */ if (wlc->bandlocked || NBANDS(wlc) == 1) { /* updated in brcms_c_bandlock() */ @@ -1064,7 +4002,10 @@ static void brcms_c_setband(struct brcms_c_info *wlc, brcms_c_bsinit(wlc); } -/* Initialize a WME Parameter Info Element with default STA parameters from WMM Spec, Table 12 */ +/* + * Initialize a WME Parameter Info Element with default + * STA parameters from WMM Spec, Table 12 + */ void brcms_c_wme_initparams_sta(struct brcms_c_info *wlc, struct wme_param_ie *pe) { @@ -1288,11 +4229,6 @@ void brcms_c_info_init(struct brcms_c_info *wlc, int unit) /* WME QoS mode is Auto by default */ wlc->pub->_wme = AUTO; - -#ifdef BCMSDIODEV_ENABLED - wlc->pub->_priofc = true; /* enable priority flow control for sdio dongle */ -#endif - wlc->pub->_ampdu = AMPDU_AGG_HOST; wlc->pub->bcmerror = 0; wlc->pub->_coex = ON; @@ -1303,7 +4239,7 @@ void brcms_c_info_init(struct brcms_c_info *wlc, int unit) static bool brcms_c_state_bmac_sync(struct brcms_c_info *wlc) { - struct brcms_b_state state_bmac; + struct brcms_b_state state_bmac = {0}; if (brcms_b_state_get(wlc->hw, &state_bmac) != 0) return false; @@ -1347,19 +4283,366 @@ static uint brcms_c_attach_module(struct brcms_c_info *wlc) return err; } -struct brcms_pub *brcms_c_pub(void *wlc) +struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc) { - return ((struct brcms_c_info *) wlc)->pub; + return wlc->pub; } #define CHIP_SUPPORTS_11N(wlc) 1 +/* low level attach + * run backplane attach, init nvram + * run phy attach + * initialize software state for each core and band + * put the whole chip in reset(driver down state), no clock + */ +int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device, uint unit, + bool piomode, void *regsva, struct pci_dev *btparam) +{ + struct brcms_hardware *wlc_hw; + struct d11regs *regs; + char *macaddr = NULL; + char *vars; + uint err = 0; + uint j; + bool wme = false; + struct shared_phy_params sha_params; + struct wiphy *wiphy = wlc->wiphy; + char *var; + unsigned long res; + + BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor, + device); + + wme = true; + + wlc_hw = wlc->hw; + wlc_hw->wlc = wlc; + wlc_hw->unit = unit; + wlc_hw->band = wlc_hw->bandstate[0]; + wlc_hw->_piomode = piomode; + + /* populate struct brcms_hardware with default values */ + brcms_b_info_init(wlc_hw); + + /* + * Do the hardware portion of the attach. Also initialize software + * state that depends on the particular hardware we are running. + */ + wlc_hw->sih = ai_attach(regsva, btparam, + &wlc_hw->vars, &wlc_hw->vars_size); + if (wlc_hw->sih == NULL) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n", + unit); + err = 11; + goto fail; + } + vars = wlc_hw->vars; + + /* + * Get vendid/devid nvram overwrites, which could be different + * than those the BIOS recognizes for devices on PCMCIA_BUS, + * SDIO_BUS, and SROMless devices on PCI_BUS. + */ + var = getvar(vars, "vendid"); + if (var && !kstrtoul(var, 0, &res)) { + vendor = (u16)res; + wiphy_err(wiphy, "Overriding vendor id = 0x%x\n", + vendor); + } + var = getvar(vars, "devid"); + if (var && !kstrtoul(var, 0, &res)) { + u16 devid = (u16)res; + if (devid != 0xffff) { + device = devid; + wiphy_err(wiphy, "Overriding device id = 0x%x" + "\n", device); + } + } + + /* verify again the device is supported */ + if (!brcms_c_chipmatch(vendor, device)) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported " + "vendor/device (0x%x/0x%x)\n", + unit, vendor, device); + err = 12; + goto fail; + } + + wlc_hw->vendorid = vendor; + wlc_hw->deviceid = device; + + /* set bar0 window to point at D11 core */ + wlc_hw->regs = (struct d11regs *) ai_setcore(wlc_hw->sih, D11_CORE_ID, + 0); + wlc_hw->corerev = ai_corerev(wlc_hw->sih); + + regs = wlc_hw->regs; + + wlc->regs = wlc_hw->regs; + + /* validate chip, chiprev and corerev */ + if (!brcms_c_isgoodchip(wlc_hw)) { + err = 13; + goto fail; + } + + /* initialize power control registers */ + ai_clkctl_init(wlc_hw->sih); + + /* request fastclock and force fastclock for the rest of attach + * bring the d11 core out of reset. + * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk + * is still false; But it will be called again inside wlc_corereset, + * after d11 is out of reset. + */ + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); + brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); + + if (!brcms_b_validate_chip_access(wlc_hw)) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access " + "failed\n", unit); + err = 14; + goto fail; + } + + /* get the board rev, used just below */ + j = getintvar(vars, "boardrev"); + /* promote srom boardrev of 0xFF to 1 */ + if (j == BOARDREV_PROMOTABLE) + j = BOARDREV_PROMOTED; + wlc_hw->boardrev = (u16) j; + if (!brcms_c_validboardtype(wlc_hw)) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom " + "board type (0x%x)" " or revision level (0x%x)\n", + unit, wlc_hw->sih->boardtype, wlc_hw->boardrev); + err = 15; + goto fail; + } + wlc_hw->sromrev = (u8) getintvar(vars, "sromrev"); + wlc_hw->boardflags = (u32) getintvar(vars, "boardflags"); + wlc_hw->boardflags2 = (u32) getintvar(vars, "boardflags2"); + + if (wlc_hw->boardflags & BFL_NOPLLDOWN) + brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED); + + if (ai_pci_war16165(wlc_hw->sih)) + wlc->war16165 = true; + + /* check device id(srom, nvram etc.) to set bands */ + if (wlc_hw->deviceid == BCM43224_D11N_ID || + wlc_hw->deviceid == BCM43224_D11N_ID_VEN1) + /* Dualband boards */ + wlc_hw->_nbands = 2; + else + wlc_hw->_nbands = 1; + + if ((wlc_hw->sih->chip == BCM43225_CHIP_ID)) + wlc_hw->_nbands = 1; + + /* BMAC_NOTE: remove init of pub values when brcms_c_attach() + * unconditionally does the init of these values + */ + wlc->vendorid = wlc_hw->vendorid; + wlc->deviceid = wlc_hw->deviceid; + wlc->pub->sih = wlc_hw->sih; + wlc->pub->corerev = wlc_hw->corerev; + wlc->pub->sromrev = wlc_hw->sromrev; + wlc->pub->boardrev = wlc_hw->boardrev; + wlc->pub->boardflags = wlc_hw->boardflags; + wlc->pub->boardflags2 = wlc_hw->boardflags2; + wlc->pub->_nbands = wlc_hw->_nbands; + + wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc); + + if (wlc_hw->physhim == NULL) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach " + "failed\n", unit); + err = 25; + goto fail; + } + + /* pass all the parameters to wlc_phy_shared_attach in one struct */ + sha_params.sih = wlc_hw->sih; + sha_params.physhim = wlc_hw->physhim; + sha_params.unit = unit; + sha_params.corerev = wlc_hw->corerev; + sha_params.vars = vars; + sha_params.vid = wlc_hw->vendorid; + sha_params.did = wlc_hw->deviceid; + sha_params.chip = wlc_hw->sih->chip; + sha_params.chiprev = wlc_hw->sih->chiprev; + sha_params.chippkg = wlc_hw->sih->chippkg; + sha_params.sromrev = wlc_hw->sromrev; + sha_params.boardtype = wlc_hw->sih->boardtype; + sha_params.boardrev = wlc_hw->boardrev; + sha_params.boardvendor = wlc_hw->sih->boardvendor; + sha_params.boardflags = wlc_hw->boardflags; + sha_params.boardflags2 = wlc_hw->boardflags2; + sha_params.buscorerev = wlc_hw->sih->buscorerev; + + /* alloc and save pointer to shared phy state area */ + wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params); + if (!wlc_hw->phy_sh) { + err = 16; + goto fail; + } + + /* initialize software state for each core and band */ + for (j = 0; j < NBANDS_HW(wlc_hw); j++) { + /* + * band0 is always 2.4Ghz + * band1, if present, is 5Ghz + */ + + /* So if this is a single band 11a card, use band 1 */ + if (IS_SINGLEBAND_5G(wlc_hw->deviceid)) + j = BAND_5G_INDEX; + + brcms_c_setxband(wlc_hw, j); + + wlc_hw->band->bandunit = j; + wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G; + wlc->band->bandunit = j; + wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G; + wlc->core->coreidx = ai_coreidx(wlc_hw->sih); + + wlc_hw->machwcap = R_REG(®s->machwcap); + wlc_hw->machwcap_backup = wlc_hw->machwcap; + + /* init tx fifo size */ + wlc_hw->xmtfifo_sz = + xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)]; + + /* Get a phy for this band */ + wlc_hw->band->pi = + wlc_phy_attach(wlc_hw->phy_sh, regs, + brcms_b_bandtype(wlc_hw), vars, + wlc->wiphy); + if (wlc_hw->band->pi == NULL) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_" + "attach failed\n", unit); + err = 17; + goto fail; + } + + wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap); + + wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype, + &wlc_hw->band->phyrev, + &wlc_hw->band->radioid, + &wlc_hw->band->radiorev); + wlc_hw->band->abgphy_encore = + wlc_phy_get_encore(wlc_hw->band->pi); + wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi); + wlc_hw->band->core_flags = + wlc_phy_get_coreflags(wlc_hw->band->pi); + + /* verify good phy_type & supported phy revision */ + if (BRCMS_ISNPHY(wlc_hw->band)) { + if (NCONF_HAS(wlc_hw->band->phyrev)) + goto good_phy; + else + goto bad_phy; + } else if (BRCMS_ISLCNPHY(wlc_hw->band)) { + if (LCNCONF_HAS(wlc_hw->band->phyrev)) + goto good_phy; + else + goto bad_phy; + } else { + bad_phy: + wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported " + "phy type/rev (%d/%d)\n", unit, + wlc_hw->band->phytype, wlc_hw->band->phyrev); + err = 18; + goto fail; + } + + good_phy: + /* + * BMAC_NOTE: wlc->band->pi should not be set below and should + * be done in the high level attach. However we can not make + * that change until all low level access is changed to + * wlc_hw->band->pi. Instead do the wlc->band->pi init below, + * keeping wlc_hw->band->pi as well for incremental update of + * low level fns, and cut over low only init when all fns + * updated. + */ + wlc->band->pi = wlc_hw->band->pi; + wlc->band->phytype = wlc_hw->band->phytype; + wlc->band->phyrev = wlc_hw->band->phyrev; + wlc->band->radioid = wlc_hw->band->radioid; + wlc->band->radiorev = wlc_hw->band->radiorev; + + /* default contention windows size limits */ + wlc_hw->band->CWmin = APHY_CWMIN; + wlc_hw->band->CWmax = PHY_CWMAX; + + if (!brcms_b_attach_dmapio(wlc, j, wme)) { + err = 19; + goto fail; + } + } + + /* disable core to match driver "down" state */ + brcms_c_coredisable(wlc_hw); + + /* Match driver "down" state */ + ai_pci_down(wlc_hw->sih); + + /* register sb interrupt callback functions */ + ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff, + (void *)brcms_c_wlintrsrestore, NULL, wlc); + + /* turn off pll and xtal to match driver "down" state */ + brcms_b_xtal(wlc_hw, OFF); + + /* ******************************************************************* + * The hardware is in the DOWN state at this point. D11 core + * or cores are in reset with clocks off, and the board PLLs + * are off if possible. + * + * Beyond this point, wlc->sbclk == false and chip registers + * should not be touched. + ********************************************************************* + */ + + /* init etheraddr state variables */ + macaddr = brcms_c_get_macaddr(wlc_hw); + if (macaddr == NULL) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n", + unit); + err = 21; + goto fail; + } + if (!mac_pton(macaddr, wlc_hw->etheraddr) || + is_broadcast_ether_addr(wlc_hw->etheraddr) || + is_zero_ether_addr(wlc_hw->etheraddr)) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n", + unit, macaddr); + err = 22; + goto fail; + } + + BCMMSG(wlc->wiphy, + "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n", + wlc_hw->deviceid, wlc_hw->_nbands, + wlc_hw->sih->boardtype, macaddr); + + return err; + + fail: + wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit, + err); + return err; +} + /* * The common driver entry routine. Error codes should be unique */ -void *brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, - bool piomode, void *regsva, uint bustype, void *btparam, - uint *perr) +struct brcms_c_info * +brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, + bool piomode, void *regsva, struct pci_dev *btparam, uint *perr) { struct brcms_c_info *wlc; uint err = 0; @@ -1399,12 +4682,14 @@ void *brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, * inside, no more in rest of the attach) */ err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva, - bustype, btparam); + btparam); if (err) goto fail; - /* for some states, due to different info pointer(e,g, wlc, wlc_hw) or master/slave split, - * HIGH driver(both monolithic and HIGH_ONLY) needs to sync states FROM BMAC portion driver + /* + * for some states, due to different info pointer(e,g, wlc, wlc_hw) or + * master/slave split, HIGH driver(both monolithic and HIGH_ONLY) needs + * to sync states FROM BMAC portion driver */ if (!brcms_c_state_bmac_sync(wlc)) { err = 20; @@ -1492,7 +4777,10 @@ void *brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, (bool) N_ENAB(wlc->pub)); } - /* update antenna config due to wlc->stf->txant/txchain/ant_rx_ovr change */ + /* + * update antenna config due to + * wlc->stf->txant/txchain/ant_rx_ovr change + */ brcms_c_stf_phy_txant_upd(wlc); /* attach each modules */ @@ -1592,7 +4880,7 @@ void *brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, if (perr) *perr = 0; - return (void *)wlc; + return wlc; fail: wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n", @@ -1620,14 +4908,17 @@ static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc) } else { s8 gain, fract; /* Older sroms specified gain in whole dbm only. In order - * be able to specify qdbm granularity and remain backward compatible - * the whole dbms are now encoded in only low 6 bits and remaining qdbms - * are encoded in the hi 2 bits. 6 bit signed number ranges from - * -32 - 31. Examples: 0x1 = 1 db, + * be able to specify qdbm granularity and remain backward + * compatible the whole dbms are now encoded in only + * low 6 bits and remaining qdbms are encoded in the hi 2 bits. + * 6 bit signed number ranges from -32 - 31. + * + * Examples: + * 0x1 = 1 db, * 0xc1 = 1.75 db (1 + 3 quarters), * 0x3f = -1 (-1 + 0 quarters), - * 0x7f = -.75 (-1 in low 6 bits + 1 quarters in hi 2 bits) = -3 qdbm. - * 0xbf = -.50 (-1 in low 6 bits + 2 quarters in hi 2 bits) = -2 qdbm. + * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm. + * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm. */ gain = wlc->band->antgain & 0x3f; gain <<= 2; /* Sign extend */ @@ -1707,6 +4998,58 @@ static void brcms_c_detach_module(struct brcms_c_info *wlc) } /* + * low level detach + */ +int brcms_b_detach(struct brcms_c_info *wlc) +{ + uint i; + struct brcms_hw_band *band; + struct brcms_hardware *wlc_hw = wlc->hw; + int callbacks; + + callbacks = 0; + + if (wlc_hw->sih) { + /* + * detach interrupt sync mechanism since interrupt is disabled + * and per-port interrupt object may has been freed. this must + * be done before sb core switch + */ + ai_deregister_intr_callback(wlc_hw->sih); + ai_pci_sleep(wlc_hw->sih); + } + + brcms_b_detach_dmapio(wlc_hw); + + band = wlc_hw->band; + for (i = 0; i < NBANDS_HW(wlc_hw); i++) { + if (band->pi) { + /* Detach this band's phy */ + wlc_phy_detach(band->pi); + band->pi = NULL; + } + band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)]; + } + + /* Free shared phy state */ + kfree(wlc_hw->phy_sh); + + wlc_phy_shim_detach(wlc_hw->physhim); + + /* free vars */ + kfree(wlc_hw->vars); + wlc_hw->vars = NULL; + + if (wlc_hw->sih) { + ai_detach(wlc_hw->sih); + wlc_hw->sih = NULL; + } + + return callbacks; + +} + +/* * Return a count of the number of driver callbacks still pending. * * General policy is that brcms_c_detach can only dealloc/free software states. @@ -1765,14 +5108,16 @@ static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc) if (wlc->pub->wlfeatureflag & WL_SWFL_NOHWRADIO || wlc->pub->hw_off) return; - if (brcms_b_radio_read_hwdisabled(wlc->hw)) { + if (brcms_b_radio_read_hwdisabled(wlc->hw)) mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); - } else { + else mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); - } } -/* return true if Minimum Power Consumption should be entered, false otherwise */ +/* + * return true if Minimum Power Consumption should + * be entered, false otherwise + */ bool brcms_c_is_non_delay_mpc(struct brcms_c_info *wlc) { return false; @@ -1804,9 +5149,10 @@ void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc) } /* - * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in wlc->pub->radio_disabled - * to go ON, always call radio_upd synchronously - * to go OFF, postpone radio_upd to later when context is safe(e.g. watchdog) + * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in + * wlc->pub->radio_disabled to go ON, always call radio_upd + * synchronously to go OFF, postpone radio_upd to later when + * context is safe(e.g. watchdog) */ radio_state = (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF : @@ -1824,14 +5170,16 @@ void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc) wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT; wlc->mpc_dur += OSL_SYSUPTIME() - wlc->mpc_laston_ts; } - /* Below logic is meant to capture the transition from mpc off to mpc on for reasons - * other than wlc->mpc_delay_off keeping the mpc off. In that case reset - * wlc->mpc_delay_off to wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off + /* + * Below logic is meant to capture the transition from mpc off + * to mpc on for reasons other than wlc->mpc_delay_off keeping + * the mpc off. In that case reset wlc->mpc_delay_off to + * wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off */ if ((wlc->prev_non_delay_mpc == false) && - (brcms_c_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off) { + (brcms_c_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off) wlc->mpc_delay_off = wlc->mpc_dlycnt; - } + wlc->prev_non_delay_mpc = brcms_c_is_non_delay_mpc(wlc); } @@ -1841,18 +5189,19 @@ void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc) */ static void brcms_c_radio_upd(struct brcms_c_info *wlc) { - if (wlc->pub->radio_disabled) { + if (wlc->pub->radio_disabled) brcms_c_radio_disable(wlc); - } else { + else brcms_c_radio_enable(wlc); - } } /* maintain LED behavior in down state */ static void brcms_c_down_led_upd(struct brcms_c_info *wlc) { - /* maintain LEDs while in down state, turn on sbclk if not available yet */ - /* turn on sbclk if necessary */ + /* + * maintain LEDs while in down state, turn on sbclk if + * not available yet. Turn on sbclk if necessary + */ if (!AP_ENAB(wlc->pub)) { brcms_c_pllreq(wlc, true, BRCMS_PLLREQ_FLIP); @@ -1865,7 +5214,8 @@ bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc) { brcms_c_radio_hwdisable_upd(wlc); - return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ? true : false; + return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ? + true : false; } void brcms_c_radio_disable(struct brcms_c_info *wlc) @@ -1933,6 +5283,29 @@ bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc) return brcms_del_timer(wlc->wl, wlc->radio_timer); } +/* common low-level watchdog code */ +void brcms_b_watchdog(void *arg) +{ + struct brcms_c_info *wlc = (struct brcms_c_info *) arg; + struct brcms_hardware *wlc_hw = wlc->hw; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (!wlc_hw->up) + return; + + /* increment second count */ + wlc_hw->now++; + + /* Check for FIFO error interrupts */ + brcms_b_fifoerrors(wlc_hw); + + /* make sure RX dma has buffers */ + dma_rxfill(wlc->hw->di[RX_FIFO]); + + wlc_phy_watchdog(wlc_hw->band->pi); +} + static void brcms_c_watchdog_by_timer(void *arg) { brcms_c_watchdog(arg); @@ -1982,25 +5355,20 @@ static void brcms_c_watchdog(void *arg) brcms_b_watchdog(wlc); - /* occasionally sample mac stat counters to detect 16-bit counter wrap */ + /* + * occasionally sample mac stat counters to + * detect 16-bit counter wrap + */ if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0) brcms_c_statsupd(wlc); /* Manage TKIP countermeasures timers */ - FOREACH_BSS(wlc, i, cfg) { - if (cfg->tk_cm_dt) { + FOREACH_BSS(wlc, i, cfg) + if (cfg->tk_cm_dt) cfg->tk_cm_dt--; - } - if (cfg->tk_cm_bt) { + if (cfg->tk_cm_bt) cfg->tk_cm_bt--; - } - } - - /* Call any registered watchdog handlers */ - for (i = 0; i < BRCMS_MAXMODULES; i++) { - if (wlc->modulecb[i].watchdog_fn) - wlc->modulecb[i].watchdog_fn(wlc->modulecb[i].hdl); - } + END_FOREACH_BSS() if (BRCMS_ISNPHY(wlc->band) && !wlc->pub->tempsense_disable && ((wlc->pub->now - wlc->tempsense_lasttime) >= @@ -2010,6 +5378,106 @@ static void brcms_c_watchdog(void *arg) } } +/* Initialize just the hardware when coming out of POR or S3/S5 system states */ +void brcms_b_hw_up(struct brcms_hardware *wlc_hw) +{ + if (wlc_hw->wlc->pub->hw_up) + return; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* + * Enable pll and xtal, initialize the power control registers, + * and force fastclock for the remainder of brcms_c_up(). + */ + brcms_b_xtal(wlc_hw, ON); + ai_clkctl_init(wlc_hw->sih); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); + + ai_pci_fixcfg(wlc_hw->sih); + + /* + * AI chip doesn't restore bar0win2 on + * hibernation/resume, need sw fixup + */ + if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || + (wlc_hw->sih->chip == BCM43225_CHIP_ID)) + wlc_hw->regs = (struct d11regs *) + ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); + + /* + * Inform phy that a POR reset has occurred so + * it does a complete phy init + */ + wlc_phy_por_inform(wlc_hw->band->pi); + + wlc_hw->ucode_loaded = false; + wlc_hw->wlc->pub->hw_up = true; + + if ((wlc_hw->boardflags & BFL_FEM) + && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) { + if (! + (wlc_hw->boardrev >= 0x1250 + && (wlc_hw->boardflags & BFL_FEM_BT))) + ai_epa_4313war(wlc_hw->sih); + } +} + +int brcms_b_up_prep(struct brcms_hardware *wlc_hw) +{ + uint coremask; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* + * Enable pll and xtal, initialize the power control registers, + * and force fastclock for the remainder of brcms_c_up(). + */ + brcms_b_xtal(wlc_hw, ON); + ai_clkctl_init(wlc_hw->sih); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); + + /* + * Configure pci/pcmcia here instead of in brcms_c_attach() + * to allow mfg hotswap: down, hotswap (chip power cycle), up. + */ + coremask = (1 << wlc_hw->wlc->core->coreidx); + + ai_pci_setup(wlc_hw->sih, coremask); + + /* + * Need to read the hwradio status here to cover the case where the + * system is loaded with the hw radio disabled. We do not want to + * bring the driver up in this case. + */ + if (brcms_b_radio_read_hwdisabled(wlc_hw)) { + /* put SB PCI in down state again */ + ai_pci_down(wlc_hw->sih); + brcms_b_xtal(wlc_hw, OFF); + return -ENOMEDIUM; + } + + ai_pci_up(wlc_hw->sih); + + /* reset the d11 core */ + brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); + + return 0; +} + +int brcms_b_up_finish(struct brcms_hardware *wlc_hw) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + wlc_hw->up = true; + wlc_phy_hw_state_upd(wlc_hw->band->pi, true); + + /* FULLY enable dynamic power control and d11 core interrupt */ + brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); + brcms_intrson(wlc_hw->wlc->wl); + return 0; +} + /* make interface operational */ int brcms_c_up(struct brcms_c_info *wlc) { @@ -2027,20 +5495,20 @@ int brcms_c_up(struct brcms_c_info *wlc) if ((wlc->pub->boardflags & BFL_FEM) && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) { if (wlc->pub->boardrev >= 0x1250 - && (wlc->pub->boardflags & BFL_FEM_BT)) { + && (wlc->pub->boardflags & BFL_FEM_BT)) brcms_c_mhf(wlc, MHF5, MHF5_4313_GPIOCTRL, MHF5_4313_GPIOCTRL, BRCM_BAND_ALL); - } else { + else brcms_c_mhf(wlc, MHF4, MHF4_EXTPA_ENABLE, MHF4_EXTPA_ENABLE, BRCM_BAND_ALL); - } } /* - * Need to read the hwradio status here to cover the case where the system - * is loaded with the hw radio disabled. We do not want to bring the driver up in this case. - * if radio is disabled, abort up, lower power, start radio timer and return 0(for NDIS) - * don't call radio_update to avoid looping brcms_c_up. + * Need to read the hwradio status here to cover the case where the + * system is loaded with the hw radio disabled. We do not want to bring + * the driver up in this case. If radio is disabled, abort up, lower + * power, start radio timer and return 0(for NDIS) don't call + * radio_update to avoid looping brcms_c_up. * * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only */ @@ -2054,7 +5522,7 @@ int brcms_c_up(struct brcms_c_info *wlc) mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); - FOREACH_BSS(wlc, idx, bsscfg) { + FOREACH_BSS(wlc, idx, bsscfg) if (!BSSCFG_STA(bsscfg) || !bsscfg->enable || !bsscfg->BSS) continue; @@ -2062,7 +5530,7 @@ int brcms_c_up(struct brcms_c_info *wlc) ": rfdisable -> " "bsscfg_disable()\n", wlc->pub->unit, idx); - } + END_FOREACH_BSS() } } } @@ -2078,11 +5546,10 @@ int brcms_c_up(struct brcms_c_info *wlc) brcms_c_radio_monitor_stop(wlc); /* Set EDCF hostflags */ - if (EDCF_ENAB(wlc->pub)) { + if (EDCF_ENAB(wlc->pub)) brcms_c_mhf(wlc, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL); - } else { + else brcms_c_mhf(wlc, MHF1, MHF1_EDCF, 0, BRCM_BAND_ALL); - } if (BRCMS_WAR16165(wlc)) brcms_c_mhf(wlc, MHF2, MHF2_PCISLOWCLKWAR, MHF2_PCISLOWCLKWAR, @@ -2119,14 +5586,18 @@ int brcms_c_up(struct brcms_c_info *wlc) return 0; } -/* Initialize the base precedence map for dequeueing from txq based on WME settings */ +/* + * Initialize the base precedence map for dequeueing + * from txq based on WME settings + */ static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc) { wlc->tx_prec_map = BRCMS_PREC_BMP_ALL; memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16)); - /* For non-WME, both fifos have overlapping MAXPRIO. So just disable all precedences - * if either is full. + /* + * For non-WME, both fifos have overlapping MAXPRIO. So just + * disable all precedences if either is full. */ if (!EDCF_ENAB(wlc->pub)) { wlc->fifo2prec_map[TX_DATA_FIFO] = BRCMS_PREC_BMP_ALL; @@ -2146,6 +5617,77 @@ static uint brcms_c_down_del_timer(struct brcms_c_info *wlc) return callbacks; } +int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw) +{ + bool dev_gone; + uint callbacks = 0; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (!wlc_hw->up) + return callbacks; + + dev_gone = DEVICEREMOVED(wlc_hw->wlc); + + /* disable interrupts */ + if (dev_gone) + wlc_hw->wlc->macintmask = 0; + else { + /* now disable interrupts */ + brcms_intrsoff(wlc_hw->wlc->wl); + + /* ensure we're running on the pll clock again */ + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); + } + /* down phy at the last of this stage */ + callbacks += wlc_phy_down(wlc_hw->band->pi); + + return callbacks; +} + +int brcms_b_down_finish(struct brcms_hardware *wlc_hw) +{ + uint callbacks = 0; + bool dev_gone; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (!wlc_hw->up) + return callbacks; + + wlc_hw->up = false; + wlc_phy_hw_state_upd(wlc_hw->band->pi, false); + + dev_gone = DEVICEREMOVED(wlc_hw->wlc); + + if (dev_gone) { + wlc_hw->sbclk = false; + wlc_hw->clk = false; + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); + + /* reclaim any posted packets */ + brcms_c_flushqueues(wlc_hw->wlc); + } else { + + /* Reset and disable the core */ + if (ai_iscoreup(wlc_hw->sih)) { + if (R_REG(&wlc_hw->regs->maccontrol) & + MCTL_EN_MAC) + brcms_c_suspend_mac_and_wait(wlc_hw->wlc); + callbacks += brcms_reset(wlc_hw->wlc->wl); + brcms_c_coredisable(wlc_hw); + } + + /* turn off primary xtal and pll */ + if (!wlc_hw->noreset) { + ai_pci_down(wlc_hw->sih); + brcms_b_xtal(wlc_hw, OFF); + } + } + + return callbacks; +} + /* * Mark the interface nonoperational, stop the software mechanisms, * disable the hardware, free any transient buffer state. @@ -2201,9 +5743,8 @@ uint brcms_c_down(struct brcms_c_info *wlc) brcms_c_txflowcontrol_reset(wlc); /* flush tx queues */ - for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) { + for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) brcmu_pktq_flush(&qi->q, true, NULL, NULL); - } callbacks += brcms_b_down_finish(wlc->hw); @@ -2219,17 +5760,18 @@ int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config) { int ret = 0; uint i; - wlc_rateset_t rs; + struct brcms_c_rateset rs; /* Default to 54g Auto */ /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */ s8 shortslot = BRCMS_SHORTSLOT_AUTO; - bool shortslot_restrict = false; /* Restrict association to stations that support shortslot - */ + bool shortslot_restrict = false; /* Restrict association to stations + * that support shortslot + */ bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */ /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */ int preamble = BRCMS_PLCP_LONG; - bool preamble_restrict = false; /* Restrict association to stations that support short - * preambles + bool preamble_restrict = false; /* Restrict association to stations + * that support short preambles */ struct brcms_band *band; @@ -2258,10 +5800,10 @@ int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config) brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode); /* Clear supported rates filter */ - memset(&wlc->sup_rates_override, 0, sizeof(wlc_rateset_t)); + memset(&wlc->sup_rates_override, 0, sizeof(struct brcms_c_rateset)); /* Clear rateset override */ - memset(&rs, 0, sizeof(wlc_rateset_t)); + memset(&rs, 0, sizeof(struct brcms_c_rateset)); switch (gmode) { case GMODE_LEGACY_B: @@ -2287,7 +5829,8 @@ int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config) break; case GMODE_PERFORMANCE: - if (AP_ENAB(wlc->pub)) /* Put all rates into the Supported Rates element */ + if (AP_ENAB(wlc->pub)) + /* Put all rates into the Supported Rates element */ brcms_c_rateset_copy(&cck_ofdm_rates, &wlc->sup_rates_override); @@ -2315,21 +5858,19 @@ int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config) band->rspec_override = 0; brcms_c_reprate_init(wlc); } - if (band->mrspec_override && !IS_CCK(band->mrspec_override)) { + if (band->mrspec_override && !IS_CCK(band->mrspec_override)) band->mrspec_override = 0; - } } band->gmode = gmode; wlc->shortslot_override = shortslot; - if (AP_ENAB(wlc->pub)) { + if (AP_ENAB(wlc->pub)) /* wlc->ap->shortslot_restrict = shortslot_restrict; */ wlc->PLCPHdr_override = (preamble != BRCMS_PLCP_LONG) ? BRCMS_PLCP_SHORT : BRCMS_PLCP_AUTO; - } if ((AP_ENAB(wlc->pub) && preamble != BRCMS_PLCP_LONG) || preamble == BRCMS_PLCP_SHORT) @@ -2446,12 +5987,13 @@ int brcms_c_set_nmode(struct brcms_c_info *wlc, s32 nmode) return err; } -static int brcms_c_set_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs_arg) +static int +brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs_arg) { - wlc_rateset_t rs, new; + struct brcms_c_rateset rs, new; uint bandunit; - memcpy(&rs, rs_arg, sizeof(wlc_rateset_t)); + memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset)); /* check for bad count value */ if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES)) @@ -2459,7 +6001,7 @@ static int brcms_c_set_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs_arg) /* try the current band */ bandunit = wlc->band->bandunit; - memcpy(&new, &rs, sizeof(wlc_rateset_t)); + memcpy(&new, &rs, sizeof(struct brcms_c_rateset)); if (brcms_c_rate_hwrs_filter_sort_validate (&new, &wlc->bandstate[bandunit]->hw_rateset, true, wlc->stf->txstreams)) @@ -2468,7 +6010,7 @@ static int brcms_c_set_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs_arg) /* try the other band */ if (IS_MBAND_UNLOCKED(wlc)) { bandunit = OTHERBANDUNIT(wlc); - memcpy(&new, &rs, sizeof(wlc_rateset_t)); + memcpy(&new, &rs, sizeof(struct brcms_c_rateset)); if (brcms_c_rate_hwrs_filter_sort_validate(&new, &wlc-> bandstate[bandunit]-> @@ -2481,9 +6023,10 @@ static int brcms_c_set_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs_arg) good: /* apply new rateset */ - memcpy(&wlc->default_bss->rateset, &new, sizeof(wlc_rateset_t)); + memcpy(&wlc->default_bss->rateset, &new, + sizeof(struct brcms_c_rateset)); memcpy(&wlc->bandstate[bandunit]->defrateset, &new, - sizeof(wlc_rateset_t)); + sizeof(struct brcms_c_rateset)); return 0; } @@ -2555,9 +6098,12 @@ _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, /* default argument is generic integer */ pval = arg ? (int *)arg : NULL; - /* This will prevent the misaligned access */ + /* + * This will prevent misaligned access. The (void *) cast prevents a + * memcpy alignment issue on e.g. Sparc64 platforms. + */ if (pval && (u32) len >= sizeof(val)) - memcpy(&val, pval, sizeof(val)); + memcpy((void *)&val, (void *)pval, sizeof(val)); else val = 0; @@ -2575,7 +6121,7 @@ _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, switch (cmd) { case BRCM_SET_CHANNEL:{ - chanspec_t chspec = CH20MHZ_CHSPEC(val); + u16 chspec = CH20MHZ_CHSPEC(val); if (val < 0 || val > MAXCHANNEL) { bcmerror = -EINVAL; @@ -2615,9 +6161,9 @@ _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); - for (ac = 0; ac < AC_COUNT; ac++) { + for (ac = 0; ac < AC_COUNT; ac++) BRCMS_WME_RETRY_SHORT_SET(wlc, ac, wlc->SRL); - } + brcms_c_wme_retries_write(wlc); } else bcmerror = -EINVAL; @@ -2630,17 +6176,18 @@ _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); - for (ac = 0; ac < AC_COUNT; ac++) { + for (ac = 0; ac < AC_COUNT; ac++) BRCMS_WME_RETRY_LONG_SET(wlc, ac, wlc->LRL); - } + brcms_c_wme_retries_write(wlc); } else bcmerror = -EINVAL; break; case BRCM_GET_CURR_RATESET:{ - wl_rateset_t *ret_rs = (wl_rateset_t *) arg; - wlc_rateset_t *rs; + struct brcm_rateset *ret_rs = + (struct brcm_rateset *) arg; + struct brcms_c_rateset *rs; if (wlc->pub->associated) rs = ¤t_bss->rateset; @@ -2659,8 +6206,9 @@ _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, } case BRCM_SET_RATESET:{ - wlc_rateset_t rs; - wl_rateset_t *in_rs = (wl_rateset_t *) arg; + struct brcms_c_rateset rs; + struct brcm_rateset *in_rs = + (struct brcm_rateset *) arg; if (len < (int)(in_rs->count + sizeof(in_rs->count))) { bcmerror = -EOVERFLOW; @@ -2672,7 +6220,7 @@ _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, break; } - memset(&rs, 0, sizeof(wlc_rateset_t)); + memset(&rs, 0, sizeof(struct brcms_c_rateset)); /* Copy only legacy rateset section */ rs.count = in_rs->count; @@ -2680,14 +6228,13 @@ _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, /* merge rateset coming in with the current mcsset */ if (N_ENAB(wlc->pub)) { + struct brcms_bss_info *mcsset_bss; if (bsscfg->associated) - memcpy(rs.mcs, - ¤t_bss->rateset.mcs[0], - MCSSET_LEN); + mcsset_bss = current_bss; else - memcpy(rs.mcs, - &wlc->default_bss->rateset.mcs[0], - MCSSET_LEN); + mcsset_bss = wlc->default_bss; + memcpy(rs.mcs, &mcsset_bss->rateset.mcs[0], + MCSSET_LEN); } bcmerror = brcms_c_set_rateset(wlc, &rs); @@ -2748,13 +6295,12 @@ _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, } else { /* driver is down, so just update the brcms_c_info * value */ - if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO) { + if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO) wlc->shortslot = false; - } else { + else wlc->shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON); - } } break; @@ -2772,8 +6318,8 @@ _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, * register watchdog and down handlers. */ int brcms_c_module_register(struct brcms_pub *pub, - const char *name, void *hdl, - watchdog_fn_t w_fn, down_fn_t d_fn) + const char *name, struct brcms_info *hdl, + int (*d_fn)(void *handle)) { struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc; int i; @@ -2784,7 +6330,6 @@ int brcms_c_module_register(struct brcms_pub *pub, strncpy(wlc->modulecb[i].name, name, sizeof(wlc->modulecb[i].name) - 1); wlc->modulecb[i].hdl = hdl; - wlc->modulecb[i].watchdog_fn = w_fn; wlc->modulecb[i].down_fn = d_fn; return 0; } @@ -2794,8 +6339,8 @@ int brcms_c_module_register(struct brcms_pub *pub, } /* unregister module callbacks */ -int -brcms_c_module_unregister(struct brcms_pub *pub, const char *name, void *hdl) +int brcms_c_module_unregister(struct brcms_pub *pub, const char *name, + struct brcms_info *hdl) { struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc; int i; @@ -2815,7 +6360,10 @@ brcms_c_module_unregister(struct brcms_pub *pub, const char *name, void *hdl) return -ENODATA; } -/* Write WME tunable parameters for retransmit/max rate from wlc struct to ucode */ +/* + * Write WME tunable parameters for retransmit/max rate + * from wlc struct to ucode + */ static void brcms_c_wme_retries_write(struct brcms_c_info *wlc) { int ac; @@ -2824,10 +6372,9 @@ static void brcms_c_wme_retries_write(struct brcms_c_info *wlc) if (!wlc->clk) return; - for (ac = 0; ac < AC_COUNT; ac++) { + for (ac = 0; ac < AC_COUNT; ac++) brcms_c_write_shm(wlc, M_AC_TXLMT_ADDR(ac), wlc->wme_retries[ac]); - } } #ifdef BCMDBG @@ -2929,9 +6476,8 @@ void brcms_c_statsupd(struct brcms_c_info *wlc) /* merge counters from dma module */ for (i = 0; i < NFIFO; i++) { - if (wlc->hw->di[i]) { + if (wlc->hw->di[i]) dma_counterreset(wlc->hw->di[i]); - } } } @@ -3082,6 +6628,29 @@ void brcms_c_print_rxh(struct d11rxhdr *rxh) } #endif /* defined(BCMDBG) */ +u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate) +{ + u16 table_ptr; + u8 phy_rate, index; + + /* get the phy specific rate encoding for the PLCP SIGNAL field */ + if (IS_OFDM(rate)) + table_ptr = M_RT_DIRMAP_A; + else + table_ptr = M_RT_DIRMAP_B; + + /* for a given rate, the LS-nibble of the PLCP SIGNAL field is + * the index into the rate table. + */ + phy_rate = rate_info[rate] & BRCMS_RATE_MASK; + index = phy_rate & 0xf; + + /* Find the SHM pointer to the rate table entry by looking in the + * Direct-map Table + */ + return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2)); +} + static u16 brcms_c_rate_shm_offset(struct brcms_c_info *wlc, u8 rate) { return brcms_b_rate_shm_offset(wlc->hw, rate); @@ -3098,8 +6667,8 @@ static u16 brcms_c_rate_shm_offset(struct brcms_c_info *wlc, u8 rate) * * Returns true if packet consumed (queued), false if not. */ -bool -brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q, void *pkt, int prec) +bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q, + struct sk_buff *pkt, int prec) { return brcms_c_prec_enq_head(wlc, q, pkt, prec, false); } @@ -3151,10 +6720,9 @@ brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q, return true; } -void brcms_c_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, - uint prec) +void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb, + struct sk_buff *sdu, uint prec) { - struct brcms_c_info *wlc = (struct brcms_c_info *) ctx; struct brcms_txq_info *qi = wlc->pkt_queue; /* Check me */ struct pktq *q = &qi->q; int prio; @@ -3174,20 +6742,20 @@ void brcms_c_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, brcmu_pkt_buf_free_skb(sdu); } - /* Check if flow control needs to be turned on after enqueuing the packet - * Don't turn on flow control if EDCF is enabled. Driver would make the decision on what - * to drop instead of relying on stack to make the right decision + /* + * Check if flow control needs to be turned on after enqueuing the + * packet. Don't turn on flow control if EDCF is enabled. Driver + * would make the decision on what to drop instead of relying on + * stack to make the right decision */ if (!EDCF_ENAB(wlc->pub) || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) { - if (pktq_len(q) >= wlc->pub->tunables->datahiwat) { + if (pktq_len(q) >= wlc->pub->tunables->datahiwat) brcms_c_txflowcontrol(wlc, qi, ON, ALLPRIO); - } } else if (wlc->pub->_priofc) { if (pktq_plen(q, wlc_prio2prec_map[prio]) >= - wlc->pub->tunables->datahiwat) { + wlc->pub->tunables->datahiwat) brcms_c_txflowcontrol(wlc, qi, ON, prio); - } } } @@ -3197,20 +6765,21 @@ brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu, { u8 prio; uint fifo; - void *pkt; struct scb *scb = &global_scb; struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data); - /* 802.11 standard requires management traffic to go at highest priority */ + /* + * 802.11 standard requires management traffic + * to go at highest priority + */ prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority : MAXPRIO; fifo = prio2fifo[prio]; - pkt = sdu; if (unlikely (brcms_c_d11hdrs_mac80211( - wlc, hw, pkt, scb, 0, 1, fifo, 0, NULL, 0))) + wlc, hw, sdu, scb, 0, 1, fifo, 0, NULL, 0))) return -EINVAL; - brcms_c_txq_enq(wlc, scb, pkt, BRCMS_PRIO_TO_PREC(prio)); + brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio)); brcms_c_send_q(wlc); return 0; } @@ -3244,17 +6813,18 @@ void brcms_c_send_q(struct brcms_c_info *wlc) count = 1; err = brcms_c_prep_pdu(wlc, pkt[0], &fifo); if (!err) { - for (i = 0; i < count; i++) { + for (i = 0; i < count; i++) brcms_c_txfifo(wlc, fifo, pkt[i], true, 1); - } } } if (err == -EBUSY) { brcmu_pktq_penq_head(q, prec, pkt[0]); - /* If send failed due to any other reason than a change in - * HW FIFO condition, quit. Otherwise, read the new prec_map! + /* + * If send failed due to any other reason than a + * change in HW FIFO condition, quit. Otherwise, + * read the new prec_map! */ if (prec_map == wlc->tx_prec_map) break; @@ -3262,21 +6832,22 @@ void brcms_c_send_q(struct brcms_c_info *wlc) } } - /* Check if flow control needs to be turned off after sending the packet */ + /* + * Check if flow control needs to be turned off after + * sending the packet + */ if (!EDCF_ENAB(wlc->pub) || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) { if (brcms_c_txflowcontrol_prio_isset(wlc, qi, ALLPRIO) - && (pktq_len(q) < wlc->pub->tunables->datahiwat / 2)) { + && (pktq_len(q) < wlc->pub->tunables->datahiwat / 2)) brcms_c_txflowcontrol(wlc, qi, OFF, ALLPRIO); - } } else if (wlc->pub->_priofc) { int prio; for (prio = MAXPRIO; prio >= 0; prio--) { if (brcms_c_txflowcontrol_prio_isset(wlc, qi, prio) && (pktq_plen(q, wlc_prio2prec_map[prio]) < - wlc->pub->tunables->datahiwat / 2)) { + wlc->pub->tunables->datahiwat / 2)) brcms_c_txflowcontrol(wlc, qi, OFF, prio); - } } } in_send_q = false; @@ -3312,20 +6883,19 @@ brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p, txh = (struct d11txh *) (p->data); - /* When a BC/MC frame is being committed to the BCMC fifo via DMA (NOT PIO), update - * ucode or BSS info as appropriate. + /* When a BC/MC frame is being committed to the BCMC fifo + * via DMA (NOT PIO), update ucode or BSS info as appropriate. */ - if (fifo == TX_BCMC_FIFO) { + if (fifo == TX_BCMC_FIFO) frameid = le16_to_cpu(txh->TxFrameID); - } - if (BRCMS_WAR16165(wlc)) brcms_c_war16165(wlc, true); - /* Bump up pending count for if not using rpc. If rpc is used, this will be handled - * in brcms_b_txfifo() + /* + * Bump up pending count for if not using rpc. If rpc is + * used, this will be handled in brcms_b_txfifo() */ if (commit) { TXPKTPENDINC(wlc, fifo, txpktpend); @@ -3337,48 +6907,49 @@ brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p, if (frameid != INVALIDFID) BCMCFID(wlc, frameid); - if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0) { + if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0) wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n"); - } } void -brcms_c_compute_plcp(struct brcms_c_info *wlc, ratespec_t rspec, +brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec, uint length, u8 *plcp) { - if (IS_MCS(rspec)) { + if (IS_MCS(rspec)) brcms_c_compute_mimo_plcp(rspec, length, plcp); - } else if (IS_OFDM(rspec)) { + else if (IS_OFDM(rspec)) brcms_c_compute_ofdm_plcp(rspec, length, plcp); - } else { + else brcms_c_compute_cck_plcp(wlc, rspec, length, plcp); - } return; } /* Rate: 802.11 rate code, length: PSDU length in octets */ -static void brcms_c_compute_mimo_plcp(ratespec_t rspec, uint length, u8 *plcp) +static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp) { u8 mcs = (u8) (rspec & RSPEC_RATE_MASK); plcp[0] = mcs; if (RSPEC_IS40MHZ(rspec) || (mcs == 32)) plcp[0] |= MIMO_PLCP_40MHZ; BRCMS_SET_MIMO_PLCP_LEN(plcp, length); - plcp[3] = RSPEC_MIMOPLCP3(rspec); /* rspec already holds this byte */ - plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */ - plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */ + plcp[3] = RSPEC_MIMOPLCP3(rspec); /* rspec already holds this byte */ + plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */ + plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */ plcp[5] = 0; } /* Rate: 802.11 rate code, length: PSDU length in octets */ static void -brcms_c_compute_ofdm_plcp(ratespec_t rspec, u32 length, u8 *plcp) +brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp) { u8 rate_signal; u32 tmp = 0; int rate = RSPEC2RATE(rspec); - /* encode rate per 802.11a-1999 sec 17.3.4.1, with lsb transmitted first */ + /* + * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb + * transmitted first + */ rate_signal = rate_info[rate] & BRCMS_RATE_MASK; memset(plcp, 0, D11_PHY_HDR_LEN); D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal); @@ -3426,8 +6997,9 @@ static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500, break; default: - wiphy_err(wlc->wiphy, "brcms_c_cck_plcp_set: unsupported rate %d" - "\n", rate_500); + wiphy_err(wlc->wiphy, + "brcms_c_cck_plcp_set: unsupported rate %d\n", + rate_500); rate_500 = BRCM_RATE_1M; usec = length << 3; break; @@ -3445,7 +7017,7 @@ static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500, } /* Rate: 802.11 rate code, length: PSDU length in octets */ -static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, ratespec_t rspec, +static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec, uint length, u8 *plcp) { int rate = RSPEC2RATE(rspec); @@ -3464,7 +7036,7 @@ static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, ratespec_t rspec, * preamble_type use short/GF or long/MM PLCP header */ static u16 -brcms_c_compute_frame_dur(struct brcms_c_info *wlc, ratespec_t rate, +brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate, u8 preamble_type, uint next_frag_len) { u16 dur, sifs; @@ -3499,20 +7071,22 @@ brcms_c_compute_frame_dur(struct brcms_c_info *wlc, ratespec_t rate, */ u16 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only, - ratespec_t rts_rate, - ratespec_t frame_rate, u8 rts_preamble_type, + u32 rts_rate, + u32 frame_rate, u8 rts_preamble_type, u8 frame_preamble_type, uint frame_len, bool ba) { u16 dur, sifs; sifs = SIFS(wlc->band); - if (!cts_only) { /* RTS/CTS */ + if (!cts_only) { + /* RTS/CTS */ dur = 3 * sifs; dur += (u16) brcms_c_calc_cts_time(wlc, rts_rate, rts_preamble_type); - } else { /* CTS-TO-SELF */ + } else { + /* CTS-TO-SELF */ dur = 2 * sifs; } @@ -3530,7 +7104,7 @@ brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only, return dur; } -u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, ratespec_t rspec) +u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec) { u16 phyctl1 = 0; u16 bw; @@ -3556,8 +7130,11 @@ u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, ratespec_t rspec) phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8); } else if (IS_CCK(rspec) && !BRCMS_ISLCNPHY(wlc->band) && !BRCMS_ISSSLPNPHY(wlc->band)) { - /* In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate */ - /* Eventually MIMOPHY would also be converted to this format */ + /* + * In CCK mode LPPHY overloads OFDM Modulation bits with CCK + * Data Rate. Eventually MIMOPHY would also be converted to + * this format + */ /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */ phyctl1 = (bw | (RSPEC_STF(rspec) << PHY_TXC1_MODE_SHIFT)); } else { /* legacy OFDM/CCK */ @@ -3577,38 +7154,38 @@ u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, ratespec_t rspec) return phyctl1; } -ratespec_t -brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, ratespec_t rspec, +u32 +brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec, bool use_rspec, u16 mimo_ctlchbw) { - ratespec_t rts_rspec = 0; + u32 rts_rspec = 0; - if (use_rspec) { + if (use_rspec) /* use frame rate as rts rate */ rts_rspec = rspec; - - } else if (wlc->band->gmode && wlc->protection->_g && !IS_CCK(rspec)) { + else if (wlc->band->gmode && wlc->protection->_g && !IS_CCK(rspec)) /* Use 11Mbps as the g protection RTS target rate and fallback. * Use the BRCMS_BASIC_RATE() lookup to find the best basic rate * under the target in case 11 Mbps is not Basic. - * 6 and 9 Mbps are not usually selected by rate selection, but even - * if the OFDM rate we are protecting is 6 or 9 Mbps, 11 is more robust. + * 6 and 9 Mbps are not usually selected by rate selection, but + * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11 + * is more robust. */ rts_rspec = BRCMS_BASIC_RATE(wlc, BRCM_RATE_11M); - } else { + else /* calculate RTS rate and fallback rate based on the frame rate * RTS must be sent at a basic rate since it is a * control frame, sec 9.6 of 802.11 spec */ rts_rspec = BRCMS_BASIC_RATE(wlc, rspec); - } if (BRCMS_PHY_11N_CAP(wlc->band)) { /* set rts txbw to correct side band */ rts_rspec &= ~RSPEC_BW_MASK; - /* if rspec/rspec_fallback is 40MHz, then send RTS on both 20MHz channel - * (DUP), otherwise send RTS on control channel + /* + * if rspec/rspec_fallback is 40MHz, then send RTS on both + * 20MHz channel (DUP), otherwise send RTS on control channel */ if (RSPEC_IS40MHZ(rspec) && !IS_CCK(rts_rspec)) rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT); @@ -3637,7 +7214,7 @@ static u16 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, struct sk_buff *p, struct scb *scb, uint frag, uint nfrags, uint queue, uint next_frag_len, - struct wsec_key *key, ratespec_t rspec_override) + struct wsec_key *key, u32 rspec_override) { struct ieee80211_hdr *h; struct d11txh *txh; @@ -3645,7 +7222,7 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, int len, phylen, rts_phylen; u16 mch, phyctl, xfts, mainrates; u16 seq = 0, mcl = 0, status = 0, frameid = 0; - ratespec_t rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M }, rts_rspec[2] = { + u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M }, rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M}; bool use_rts = false; bool use_cts = false; @@ -3685,9 +7262,8 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, * the packet itself, thus phylen = packet length + ICV_LEN + FCS_LEN * in this case */ - if (key) { + if (key) phylen += key->icv_len; - } /* Get tx_info */ tx_info = IEEE80211_SKB_CB(p); @@ -3708,9 +7284,8 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, frameid = bcmc_fid_generate(wlc, NULL, txh); } else { /* Increment the counter for first fragment */ - if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) { + if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) SCB_SEQNUM(scb, p->priority)++; - } /* extract fragment number from frame first */ seq = le16_to_cpu(seq) & FRAGNUM_MASK; @@ -3730,10 +7305,12 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, txrate[0] = tx_info->control.rates; txrate[1] = txrate[0] + 1; - /* if rate control algorithm didn't give us a fallback rate, use the primary rate */ - if (txrate[1]->idx < 0) { + /* + * if rate control algorithm didn't give us a fallback + * rate, use the primary rate + */ + if (txrate[1]->idx < 0) txrate[1] = txrate[0]; - } for (k = 0; k < hw->max_rates; k++) { is_mcs[k] = @@ -3755,8 +7332,11 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, } else { rate_val[k] = txrate[k]->idx; } - /* Currently only support same setting for primay and fallback rates. - * Unify flags for each rate into a single value for the frame + + /* + * Currently only support same setting for primay and + * fallback rates. Unify flags for each rate into a + * single value for the frame */ use_rts |= txrate[k]-> @@ -3770,7 +7350,11 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band, rate_val[k]); - /* (1) RATE: determine and validate primary rate and fallback rates */ + /* + * (1) RATE: + * determine and validate primary rate + * and fallback rates + */ if (!RSPEC_ACTIVE(rspec[k])) { rspec[k] = BRCM_RATE_1M; } else { @@ -3786,7 +7370,10 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, if (N_ENAB(wlc->pub)) { for (k = 0; k < hw->max_rates; k++) { - /* apply siso/cdd to single stream mcs's or ofdm if rspec is auto selected */ + /* + * apply siso/cdd to single stream mcs's or ofdm + * if rspec is auto selected + */ if (((IS_MCS(rspec[k]) && IS_SINGLE_STREAM(rspec[k] & RSPEC_RATE_MASK)) || IS_OFDM(rspec[k])) @@ -3799,17 +7386,20 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, && BRCMS_STF_SS_STBC_TX(wlc, scb)) { u8 stc; - stc = 1; /* Nss for single stream is always 1 */ - rspec[k] |= - (PHY_TXC1_MODE_STBC << - RSPEC_STF_SHIFT) | (stc << - RSPEC_STC_SHIFT); + /* Nss for single stream is always 1 */ + stc = 1; + rspec[k] |= (PHY_TXC1_MODE_STBC << + RSPEC_STF_SHIFT) | + (stc << RSPEC_STC_SHIFT); } else rspec[k] |= (phyctl1_stf << RSPEC_STF_SHIFT); } - /* Is the phy configured to use 40MHZ frames? If so then pick the desired txbw */ + /* + * Is the phy configured to use 40MHZ frames? If + * so then pick the desired txbw + */ if (CHSPEC_WLC_BW(wlc->chanspec) == BRCMS_40_MHZ) { /* default txbw is 20in40 SB */ mimo_ctlchbw = mimo_txbw = @@ -3818,7 +7408,8 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, if (IS_MCS(rspec[k])) { /* mcs 32 must be 40b/w DUP */ - if ((rspec[k] & RSPEC_RATE_MASK) == 32) { + if ((rspec[k] & RSPEC_RATE_MASK) + == 32) { mimo_txbw = PHY_TXC1_BW_40MHZ_DUP; /* use override */ @@ -3830,18 +7421,19 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, } else if (IS_OFDM(rspec[k])) { if (wlc->ofdm_40txbw != AUTO) mimo_txbw = wlc->ofdm_40txbw; - } else { - if (wlc->cck_40txbw != AUTO) - mimo_txbw = wlc->cck_40txbw; + } else if (wlc->cck_40txbw != AUTO) { + mimo_txbw = wlc->cck_40txbw; } } else { - /* mcs32 is 40 b/w only. - * This is possible for probe packets on a STA during SCAN + /* + * mcs32 is 40 b/w only. + * This is possible for probe packets on + * a STA during SCAN */ - if ((rspec[k] & RSPEC_RATE_MASK) == 32) { + if ((rspec[k] & RSPEC_RATE_MASK) == 32) /* mcs 0 */ rspec[k] = RSPEC_MIMORATE; - } + mimo_txbw = PHY_TXC1_BW_20MHZ; } @@ -3852,16 +7444,8 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, else rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT); - /* Set Short GI */ -#ifdef NOSGIYET - if (IS_MCS(rspec[k]) - && (txrate[k]->flags & IEEE80211_TX_RC_SHORT_GI)) - rspec[k] |= RSPEC_SHORT_GI; - else if (!(txrate[k]->flags & IEEE80211_TX_RC_SHORT_GI)) - rspec[k] &= ~RSPEC_SHORT_GI; -#else + /* Disable short GI, not supported yet */ rspec[k] &= ~RSPEC_SHORT_GI; -#endif mimo_preamble_type = BRCMS_MM_PREAMBLE; if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD) @@ -3877,12 +7461,14 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, if (IS_MCS(rspec[k])) { preamble_type[k] = mimo_preamble_type; - /* if SGI is selected, then forced mm for single stream */ + /* + * if SGI is selected, then forced mm + * for single stream + */ if ((rspec[k] & RSPEC_SHORT_GI) && IS_SINGLE_STREAM(rspec[k] & - RSPEC_RATE_MASK)) { + RSPEC_RATE_MASK)) preamble_type[k] = BRCMS_MM_PREAMBLE; - } } /* should be better conditionalized */ @@ -4002,12 +7588,14 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, /* TxFrameID */ txh->TxFrameID = cpu_to_le16(frameid); - /* TxStatus, Note the case of recreating the first frag of a suppressed frame - * then we may need to reset the retry cnt's via the status reg + /* + * TxStatus, Note the case of recreating the first frag of a suppressed + * frame then we may need to reset the retry cnt's via the status reg */ txh->TxStatus = cpu_to_le16(status); - /* extra fields for ucode AMPDU aggregation, the new fields are added to + /* + * extra fields for ucode AMPDU aggregation, the new fields are added to * the END of previous structure so that it's compatible in driver. */ txh->MaxNMpdus = cpu_to_le16(0); @@ -4110,16 +7698,22 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, #ifdef SUPPORT_40MHZ /* add null delimiter count */ - if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && IS_MCS(rspec)) { + if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && IS_MCS(rspec)) txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] = brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen); - } + #endif - /* Now that RTS/RTS FB preamble types are updated, write the final value */ + /* + * Now that RTS/RTS FB preamble types are updated, write + * the final value + */ txh->MacTxControlHigh = cpu_to_le16(mch); - /* MainRates (both the rts and frag plcp rates have been calculated now) */ + /* + * MainRates (both the rts and frag plcp rates have + * been calculated now) + */ txh->MainRates = cpu_to_le16(mainrates); /* XtraFrameTypes */ @@ -4159,9 +7753,9 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, } /* - * For mcs frames, if mixedmode(overloaded with long preamble) is going to be set, - * fill in non-zero MModeLen and/or MModeFbrLen - * it will be unnecessary if they are separated + * For mcs frames, if mixedmode(overloaded with long preamble) + * is going to be set, fill in non-zero MModeLen and/or + * MModeFbrLen it will be unnecessary if they are separated */ if (IS_MCS(rspec[0]) && (preamble_type[0] == BRCMS_MM_PREAMBLE)) { @@ -4183,7 +7777,7 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, uint frag_dur, dur, dur_fallback; /* WME: Update TXOP threshold */ - if ((!(tx_info->flags & IEEE80211_TX_CTL_AMPDU)) && (frag == 0)) { + if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) { frag_dur = brcms_c_calc_frame_time(wlc, rspec[0], preamble_type[0], phylen); @@ -4220,40 +7814,44 @@ brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, } /* NEED to set TxFesTimeNormal (hard) */ txh->TxFesTimeNormal = cpu_to_le16((u16) dur); - /* NEED to set fallback rate version of TxFesTimeNormal (hard) */ + /* + * NEED to set fallback rate version of + * TxFesTimeNormal (hard) + */ txh->TxFesTimeFallback = cpu_to_le16((u16) dur_fallback); - /* update txop byte threshold (txop minus intraframe overhead) */ + /* + * update txop byte threshold (txop minus intraframe + * overhead) + */ if (wlc->edcf_txop[ac] >= (dur - frag_dur)) { - { - uint newfragthresh; - + uint newfragthresh; + + newfragthresh = + brcms_c_calc_frame_len(wlc, + rspec[0], preamble_type[0], + (wlc->edcf_txop[ac] - + (dur - frag_dur))); + /* range bound the fragthreshold */ + if (newfragthresh < DOT11_MIN_FRAG_LEN) newfragthresh = - brcms_c_calc_frame_len(wlc, - rspec[0], preamble_type[0], - (wlc->edcf_txop[ac] - - (dur - frag_dur))); - /* range bound the fragthreshold */ - if (newfragthresh < DOT11_MIN_FRAG_LEN) - newfragthresh = - DOT11_MIN_FRAG_LEN; - else if (newfragthresh > - wlc->usr_fragthresh) - newfragthresh = - wlc->usr_fragthresh; - /* update the fragthresh and do txc update */ - if (wlc->fragthresh[queue] != - (u16) newfragthresh) { - wlc->fragthresh[queue] = - (u16) newfragthresh; - } - } - } else + DOT11_MIN_FRAG_LEN; + else if (newfragthresh > + wlc->usr_fragthresh) + newfragthresh = + wlc->usr_fragthresh; + /* update the fragthresh and do txc update */ + if (wlc->fragthresh[queue] != + (u16) newfragthresh) + wlc->fragthresh[queue] = + (u16) newfragthresh; + } else { wiphy_err(wlc->wiphy, "wl%d: %s txop invalid " "for rate %d\n", wlc->pub->unit, fifo_names[queue], RSPEC2RATE(rspec[0])); + } if (dur > wlc->edcf_txop[ac]) wiphy_err(wlc->wiphy, "wl%d: %s: %s txop " @@ -4272,10 +7870,12 @@ void brcms_c_tbtt(struct brcms_c_info *wlc) { struct brcms_bss_cfg *cfg = wlc->cfg; - if (!cfg->BSS) { - /* DirFrmQ is now valid...defer setting until end of ATIM window */ + if (!cfg->BSS) + /* + * DirFrmQ is now valid...defer setting until end + * of ATIM window + */ wlc->qvalid |= MCMD_DIRFRMQVAL; - } } static void brcms_c_war16165(struct brcms_c_info *wlc, bool tx) @@ -4309,12 +7909,13 @@ brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs, u32 frm_tx2) struct ieee80211_tx_rate *txrate; int i; - (void)(frm_tx2); /* Compiler reference to avoid unused variable warning */ + /* Compiler reference to avoid unused variable warning */ + (void)(frm_tx2); /* discard intermediate indications for ucode with one legitimate case: - * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, but the subsequent - * tx of DATA failed. so it will start rts/cts from the beginning (resetting the rts - * transmission count) + * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, + * but the subsequent tx of DATA failed. so it will start rts/cts + * from the beginning (resetting the rts transmission count) */ if (!(txs->status & TX_STATUS_AMPDU) && (txs->status & TX_STATUS_INTERMEDIATE)) { @@ -4406,13 +8007,22 @@ brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs, u32 frm_tx2) ieee80211_tx_info_clear_status(tx_info); if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) { - /* rate selection requested a fallback rate and we used it */ + /* + * rate selection requested a fallback rate + * and we used it + */ txrate[0].count = fbl; txrate[1].count = tx_frame_count - fbl; } else { - /* rate selection did not request fallback rate, or we didn't need it */ + /* + * rate selection did not request fallback rate, or + * we didn't need it + */ txrate[0].count = tx_frame_count; - /* rc80211_minstrel.c:minstrel_tx_status() expects unused rates to be marked with idx = -1 */ + /* + * rc80211_minstrel.c:minstrel_tx_status() expects + * unused rates to be marked with idx = -1 + */ txrate[1].idx = -1; txrate[1].count = 0; } @@ -4466,9 +8076,8 @@ brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend) /* Clear MHF2_TXBCMC_NOW flag if BCMC fifo has drained */ if (AP_ENAB(wlc->pub) && - !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) { + !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) brcms_c_mhf(wlc, MHF2, MHF2_TXBCMC_NOW, 0, BRCM_BAND_AUTO); - } /* figure out which bsscfg is being worked on... */ } @@ -4487,6 +8096,19 @@ void brcms_c_bcn_li_upd(struct brcms_c_info *wlc) (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn); } +void +brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr, + u32 *tsf_h_ptr) +{ + struct d11regs *regs = wlc_hw->regs; + + /* read the tsf timer low, then high to get an atomic read */ + *tsf_l_ptr = R_REG(®s->tsf_timerlow); + *tsf_h_ptr = R_REG(®s->tsf_timerhigh); + + return; +} + /* * recover 64bit TSF value from the 16bit TSF value in the rx header * given the assumption that the TSF passed in header is within 65ms @@ -4533,7 +8155,7 @@ prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh, struct brcms_d11rxhdr *wlc_rxh = (struct brcms_d11rxhdr *) rxh; int preamble; int channel; - ratespec_t rspec; + u32 rspec; unsigned char *plcp; /* fill in TSF and flag its presence */ @@ -4552,11 +8174,12 @@ prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh, rx_status->freq = ieee80211_dsss_chan_to_freq(channel); } - rx_status->signal = wlc_rxh->rssi; /* signal */ + rx_status->signal = wlc_rxh->rssi; /* noise */ /* qual */ - rx_status->antenna = (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0; /* ant */ + rx_status->antenna = + (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0; plcp = p->data; @@ -4608,6 +8231,14 @@ prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh, wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__); } + /* + * For 5GHz, we should decrease the index as it is + * a subset of the 2.4G rates. See bitrates field + * of brcms_band_5GHz_nphy (in mac80211_if.c). + */ + if (rx_status->band == IEEE80211_BAND_5GHZ) + rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET; + /* Determine short preamble and rate_idx */ preamble = 0; if (IS_CCK(rspec)) { @@ -4714,9 +8345,8 @@ void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p) } /* check received pkt has at least frame control field */ - if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control)) { + if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control)) goto toss; - } is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK; @@ -4758,7 +8388,7 @@ void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p) * len = 3(nsyms + nstream + 3) - 3 */ u16 -brcms_c_calc_lsig_len(struct brcms_c_info *wlc, ratespec_t ratespec, +brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec, uint mac_len) { uint nsyms, len = 0, kNdps; @@ -4771,14 +8401,16 @@ brcms_c_calc_lsig_len(struct brcms_c_info *wlc, ratespec_t ratespec, /* MCS_TXS(mcs) returns num tx streams - 1 */ int tot_streams = (MCS_TXS(mcs) + 1) + RSPEC_STC(ratespec); - /* the payload duration calculation matches that of regular ofdm */ + /* + * the payload duration calculation matches that + * of regular ofdm + */ /* 1000Ndbps = kbps * 4 */ kNdps = MCS_RATE(mcs, RSPEC_IS40MHZ(ratespec), RSPEC_ISSGI(ratespec)) * 4; if (RSPEC_STC(ratespec) == 0) - /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */ nsyms = CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS) * 1000, kNdps); @@ -4789,17 +8421,24 @@ brcms_c_calc_lsig_len(struct brcms_c_info *wlc, ratespec_t ratespec, CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS) * 1000, 2 * kNdps); - nsyms += (tot_streams + 3); /* (+3) account for HT-SIG(2) and HT-STF(1) */ - /* 3 bytes/symbol @ legacy 6Mbps rate */ - len = (3 * nsyms) - 3; /* (-3) excluding service bits and tail bits */ + /* (+3) account for HT-SIG(2) and HT-STF(1) */ + nsyms += (tot_streams + 3); + /* + * 3 bytes/symbol @ legacy 6Mbps rate + * (-3) excluding service bits and tail bits + */ + len = (3 * nsyms) - 3; } return (u16) len; } -/* calculate frame duration of a given rate and length, return time in usec unit */ +/* + * calculate frame duration of a given rate and length, return + * time in usec unit + */ uint -brcms_c_calc_frame_time(struct brcms_c_info *wlc, ratespec_t ratespec, +brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec, u8 preamble_type, uint mac_len) { uint nsyms, dur = 0, Ndps, kNdps; @@ -4827,7 +8466,6 @@ brcms_c_calc_frame_time(struct brcms_c_info *wlc, ratespec_t ratespec, RSPEC_ISSGI(ratespec)) * 4; if (RSPEC_STC(ratespec) == 0) - /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */ nsyms = CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS) * 1000, kNdps); @@ -4854,7 +8492,10 @@ brcms_c_calc_frame_time(struct brcms_c_info *wlc, ratespec_t ratespec, if (BAND_2G(wlc->band->bandtype)) dur += DOT11_OFDM_SIGNAL_EXTENSION; } else { - /* calc # bits * 2 so factor of 2 in rate (1/2 mbps) will divide out */ + /* + * calc # bits * 2 so factor of 2 in rate (1/2 mbps) + * will divide out + */ mac_len = mac_len * 8 * 2; /* calc ceiling of bits/rate = microseconds of air time */ dur = (mac_len + rate - 1) / rate; @@ -4868,7 +8509,7 @@ brcms_c_calc_frame_time(struct brcms_c_info *wlc, ratespec_t ratespec, /* The opposite of brcms_c_calc_frame_time */ static uint -brcms_c_calc_frame_len(struct brcms_c_info *wlc, ratespec_t ratespec, +brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec, u8 preamble_type, uint dur) { uint nsyms, mac_len, Ndps, kNdps; @@ -4914,13 +8555,15 @@ brcms_c_calc_frame_len(struct brcms_c_info *wlc, ratespec_t ratespec, } static uint -brcms_c_calc_ba_time(struct brcms_c_info *wlc, ratespec_t rspec, +brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec, u8 preamble_type) { BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, " "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type); - /* Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that is less than - * or equal to the rate of the immediately previous frame in the FES + /* + * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that + * is less than or equal to the rate of the immediately previous + * frame in the FES */ rspec = BRCMS_BASIC_RATE(wlc, rspec); /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */ @@ -4930,15 +8573,17 @@ brcms_c_calc_ba_time(struct brcms_c_info *wlc, ratespec_t rspec, } static uint -brcms_c_calc_ack_time(struct brcms_c_info *wlc, ratespec_t rspec, +brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec, u8 preamble_type) { uint dur = 0; BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n", wlc->pub->unit, rspec, preamble_type); - /* Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that is less than - * or equal to the rate of the immediately previous frame in the FES + /* + * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that + * is less than or equal to the rate of the immediately previous + * frame in the FES */ rspec = BRCMS_BASIC_RATE(wlc, rspec); /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */ @@ -4949,7 +8594,7 @@ brcms_c_calc_ack_time(struct brcms_c_info *wlc, ratespec_t rspec, } static uint -brcms_c_calc_cts_time(struct brcms_c_info *wlc, ratespec_t rspec, +brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec, u8 preamble_type) { BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n", @@ -4958,7 +8603,8 @@ brcms_c_calc_cts_time(struct brcms_c_info *wlc, ratespec_t rspec, } /* derive wlc->band->basic_rate[] table from 'rateset' */ -void brcms_c_rate_lookup_init(struct brcms_c_info *wlc, wlc_rateset_t *rateset) +void brcms_c_rate_lookup_init(struct brcms_c_info *wlc, + struct brcms_c_rateset *rateset) { u8 rate; u8 mandatory; @@ -5032,7 +8678,10 @@ void brcms_c_rate_lookup_init(struct brcms_c_info *wlc, wlc_rateset_t *rateset) continue; if (IS_OFDM(rate)) { - /* In 11g and 11a, the OFDM mandatory rates are 6, 12, and 24 Mbps */ + /* + * In 11g and 11a, the OFDM mandatory rates + * are 6, 12, and 24 Mbps + */ if (rate >= BRCM_RATE_24M) mandatory = BRCM_RATE_24M; else if (rate >= BRCM_RATE_12M) @@ -5040,7 +8689,7 @@ void brcms_c_rate_lookup_init(struct brcms_c_info *wlc, wlc_rateset_t *rateset) else mandatory = BRCM_RATE_6M; } else { - /* In 11b, all the CCK rates are mandatory 1 - 11 Mbps */ + /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */ mandatory = rate; } @@ -5082,9 +8731,10 @@ static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate, brcms_c_write_shm(wlc, (basic_table + index * 2), basic_ptr); } -static const wlc_rateset_t *brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc) +static const struct brcms_c_rateset * +brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc) { - const wlc_rateset_t *rs_dflt; + const struct brcms_c_rateset *rs_dflt; if (BRCMS_PHY_11N_CAP(wlc->band)) { if (BAND_5G(wlc->band->bandtype)) @@ -5101,8 +8751,8 @@ static const wlc_rateset_t *brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc) void brcms_c_set_ratetable(struct brcms_c_info *wlc) { - const wlc_rateset_t *rs_dflt; - wlc_rateset_t rs; + const struct brcms_c_rateset *rs_dflt; + struct brcms_c_rateset rs; u8 rate, basic_rate; uint i; @@ -5119,12 +8769,11 @@ void brcms_c_set_ratetable(struct brcms_c_info *wlc) * which a response ACK/CTS should be sent. */ basic_rate = BRCMS_BASIC_RATE(wlc, rate); - if (basic_rate == 0) { + if (basic_rate == 0) /* This should only happen if we are using a * restricted rateset. */ basic_rate = rs.rates[0] & BRCMS_RATE_MASK; - } brcms_c_write_rate_shm(wlc, rate, basic_rate); } @@ -5134,20 +8783,19 @@ void brcms_c_set_ratetable(struct brcms_c_info *wlc) * Return true if the specified rate is supported by the specified band. * BRCM_BAND_AUTO indicates the current band. */ -bool brcms_c_valid_rate(struct brcms_c_info *wlc, ratespec_t rspec, int band, +bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band, bool verbose) { - wlc_rateset_t *hw_rateset; + struct brcms_c_rateset *hw_rateset; uint i; - if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype)) { + if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype)) hw_rateset = &wlc->band->hw_rateset; - } else if (NBANDS(wlc) > 1) { + else if (NBANDS(wlc) > 1) hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset; - } else { + else /* other band specified and we are a single band device */ return false; - } /* check if this is a mimo rate */ if (IS_MCS(rspec)) { @@ -5161,10 +8809,9 @@ bool brcms_c_valid_rate(struct brcms_c_info *wlc, ratespec_t rspec, int band, if (hw_rateset->rates[i] == RSPEC2RATE(rspec)) return true; error: - if (verbose) { + if (verbose) wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x " "not in hw_rateset\n", wlc->pub->unit, rspec); - } return false; } @@ -5195,8 +8842,8 @@ static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap) void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len) { - const wlc_rateset_t *rs_dflt; - wlc_rateset_t rs; + const struct brcms_c_rateset *rs_dflt; + struct brcms_c_rateset rs; u8 rate; u16 entry_ptr; u8 plcp[D11_PHY_HDR_LEN]; @@ -5210,7 +8857,10 @@ void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len) brcms_c_rateset_copy(rs_dflt, &rs); brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams); - /* walk the phy rate table and update MAC core SHM basic rate table entries */ + /* + * walk the phy rate table and update MAC core SHM + * basic rate table entries + */ for (i = 0; i < rs.count; i++) { rate = rs.rates[i] & BRCMS_RATE_MASK; @@ -5219,7 +8869,10 @@ void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len) /* Calculate the Probe Response PLCP for the given rate */ brcms_c_compute_plcp(wlc, rate, frame_len, plcp); - /* Calculate the duration of the Probe Response frame plus SIFS for the MAC */ + /* + * Calculate the duration of the Probe Response + * frame plus SIFS for the MAC + */ dur = (u16) brcms_c_calc_frame_time(wlc, rate, BRCMS_LONG_PREAMBLE, frame_len); dur += sifs; @@ -5242,12 +8895,12 @@ void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len) * * *len on input contains the max length of the packet available. * - * The *len value is set to the number of bytes in buf used, and starts with the PLCP - * and included up to, but not including, the 4 byte FCS. + * The *len value is set to the number of bytes in buf used, and starts + * with the PLCP and included up to, but not including, the 4 byte FCS. */ static void brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type, - ratespec_t bcn_rspec, + u32 bcn_rspec, struct brcms_bss_cfg *cfg, u16 *buf, int *len) { static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255}; @@ -5259,23 +8912,27 @@ brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type, hdr_len = DOT11_MAC_HDR_LEN; else hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN; - body_len = *len - hdr_len; /* calc buffer size provided for frame body */ - *len = hdr_len + body_len; /* return actual size */ + /* calc buffer size provided for frame body */ + body_len = *len - hdr_len; + /* return actual size */ + *len = hdr_len + body_len; /* format PHY and MAC headers */ memset((char *)buf, 0, hdr_len); plcp = (struct cck_phy_hdr *) buf; - /* PLCP for Probe Response frames are filled in from core's rate table */ - if (type == IEEE80211_STYPE_BEACON && !MBSS_BCN_ENAB(cfg)) { + /* + * PLCP for Probe Response frames are filled in from + * core's rate table + */ + if (type == IEEE80211_STYPE_BEACON && !MBSS_BCN_ENAB(cfg)) /* fill in PLCP */ brcms_c_compute_plcp(wlc, bcn_rspec, (DOT11_MAC_HDR_LEN + body_len + FCS_LEN), (u8 *) plcp); - } /* "Regular" and 16 MBSS but not for 4 MBSS */ /* Update the phytxctl for the beacon based on the rspec */ if (!SOFTBCN_ENAB(cfg)) @@ -5306,10 +8963,32 @@ int brcms_c_get_header_len() return TXOFF; } -/* Update a beacon for a particular BSS - * For MBSS, this updates the software template and sets "latest" to the index of the - * template updated. - * Otherwise, it updates the hardware template. +/* mac is assumed to be suspended at this point */ +void +brcms_b_write_hw_bcntemplates(struct brcms_hardware *wlc_hw, u16 bcn[], + int len, bool both) +{ + struct d11regs *regs = wlc_hw->regs; + + if (both) { + brcms_c_write_hw_bcntemplate0(wlc_hw, bcn, len); + brcms_c_write_hw_bcntemplate1(wlc_hw, bcn, len); + } else { + /* bcn 0 */ + if (!(R_REG(®s->maccommand) & MCMD_BCN0VLD)) + brcms_c_write_hw_bcntemplate0(wlc_hw, bcn, len); + /* bcn 1 */ + else if (! + (R_REG(®s->maccommand) & MCMD_BCN1VLD)) + brcms_c_write_hw_bcntemplate1(wlc_hw, bcn, len); + } +} + +/* + * Update a beacon for a particular BSS + * For MBSS, this updates the software template and sets "latest" to + * the index of the template updated. Otherwise, it updates the hardware + * template. */ void brcms_c_bss_update_beacon(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg) @@ -5319,24 +8998,24 @@ void brcms_c_bss_update_beacon(struct brcms_c_info *wlc, /* Clear the soft intmask */ wlc->defmacintmask &= ~MI_BCNTPL; - if (!cfg->up) { /* Only allow updates on an UP bss */ + if (!cfg->up) + /* Only allow updates on an UP bss */ return; - } /* Optimize: Some of if/else could be combined */ if (!MBSS_BCN_ENAB(cfg) && HWBCN_ENAB(cfg)) { /* Hardware beaconing for this config */ u16 bcn[BCN_TMPL_LEN / 2]; u32 both_valid = MCMD_BCN0VLD | MCMD_BCN1VLD; - d11regs_t *regs = wlc->regs; + struct d11regs *regs = wlc->regs; /* Check if both templates are in use, if so sched. an interrupt * that will call back into this routine */ - if ((R_REG(®s->maccommand) & both_valid) == both_valid) { + if ((R_REG(®s->maccommand) & both_valid) == both_valid) /* clear any previous status */ W_REG(®s->macintstatus, MI_BCNTPL); - } + /* Check that after scheduling the interrupt both of the * templates are still busy. if not clear the int. & remask */ @@ -5363,10 +9042,10 @@ void brcms_c_update_beacon(struct brcms_c_info *wlc) struct brcms_bss_cfg *bsscfg; /* update AP or IBSS beacons */ - FOREACH_BSS(wlc, idx, bsscfg) { + FOREACH_BSS(wlc, idx, bsscfg) if (bsscfg->up && (BSSCFG_AP(bsscfg) || !bsscfg->BSS)) brcms_c_bss_update_beacon(wlc, bsscfg); - } + END_FOREACH_BSS() } /* Write ssid into shared memory */ @@ -5392,10 +9071,10 @@ void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend) struct brcms_bss_cfg *bsscfg; /* update AP or IBSS probe responses */ - FOREACH_BSS(wlc, idx, bsscfg) { + FOREACH_BSS(wlc, idx, bsscfg) if (bsscfg->up && (BSSCFG_AP(bsscfg) || !bsscfg->BSS)) brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend); - } + END_FOREACH_BSS() } void @@ -5406,7 +9085,10 @@ brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc, u16 prb_resp[BCN_TMPL_LEN / 2]; int len = BCN_TMPL_LEN; - /* write the probe response to hardware, or save in the config structure */ + /* + * write the probe response to hardware, or save in + * the config structure + */ if (!MBSS_PRB_ENAB(cfg)) { /* create the probe response template */ @@ -5427,17 +9109,18 @@ brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc, brcms_c_shm_ssid_upd(wlc, cfg); /* - * Write PLCP headers and durations for probe response frames at all rates. - * Use the actual frame length covered by the PLCP header for the call to - * brcms_c_mod_prb_rsp_rate_table() by subtracting the PLCP len - * and adding the FCS. + * Write PLCP headers and durations for probe response frames + * at all rates. Use the actual frame length covered by the + * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table() + * by subtracting the PLCP len and adding the FCS. */ len += (-D11_PHY_HDR_LEN + FCS_LEN); brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len); if (suspend) brcms_c_enable_mac(wlc); - } else { /* Generating probe resp in sw; update local template */ + } else { + /* Generating probe resp in sw; update local template */ /* error: No software probe response support without MBSS */ } } @@ -5476,9 +9159,9 @@ void brcms_c_reprate_init(struct brcms_c_info *wlc) int i; struct brcms_bss_cfg *bsscfg; - FOREACH_BSS(wlc, i, bsscfg) { + FOREACH_BSS(wlc, i, bsscfg) brcms_c_bsscfg_reprate_init(bsscfg); - } + END_FOREACH_BSS() } /* per bsscfg init tx reported rate mechanism */ @@ -5488,7 +9171,7 @@ void brcms_c_bsscfg_reprate_init(struct brcms_bss_cfg *bsscfg) memset((char *)bsscfg->txrspec, 0, sizeof(bsscfg->txrspec)); } -void brcms_default_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs) +void brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs) { brcms_c_rateset_default(rs, NULL, wlc->band->phytype, wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL, @@ -5499,7 +9182,7 @@ void brcms_default_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs) static void brcms_c_bss_default_init(struct brcms_c_info *wlc) { - chanspec_t chanspec; + u16 chanspec; struct brcms_band *band; struct brcms_bss_info *bi = wlc->default_bss; @@ -5529,22 +9212,21 @@ static void brcms_c_bss_default_init(struct brcms_c_info *wlc) bi->flags |= BRCMS_BSS_HT; } -static ratespec_t +static u32 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band, u32 int_val) { u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT; u8 rate = int_val & NRATE_RATE_MASK; - ratespec_t rspec; + u32 rspec; bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE); bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT); bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY) == NRATE_OVERRIDE_MCS_ONLY); int bcmerror = 0; - if (!ismcs) { - return (ratespec_t) rate; - } + if (!ismcs) + return (u32) rate; /* validate the combination of rate/mcs/stf is allowed */ if (N_ENAB(wlc->pub) && ismcs) { @@ -5576,7 +9258,10 @@ mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band, stf = PHY_TXC1_MODE_SDM; } } else { - /* MCS 0-7 may use SISO, CDD, and for phy_rev >= 3 STBC */ + /* + * MCS 0-7 may use SISO, CDD, and for + * phy_rev >= 3 STBC + */ if ((stf > PHY_TXC1_MODE_STBC) || (!BRCMS_STBC_CAP_PHY(wlc) && (stf == PHY_TXC1_MODE_STBC))) { @@ -5635,9 +9320,8 @@ mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band, rspec |= RSPEC_SHORT_GI; if ((rate != 0) - && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true)) { + && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true)) return rate; - } return rspec; done: @@ -5714,6 +9398,17 @@ void brcms_c_mhf(struct brcms_c_info *wlc, u8 idx, u16 mask, u16 val, int bands) brcms_b_mhf(wlc->hw, idx, mask, val, bands); } +int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo, + uint *blocks) +{ + if (fifo >= NFIFO) + return -EINVAL; + + *blocks = wlc_hw->xmtfifo_sz[fifo]; + + return 0; +} + int brcms_c_xmtfifo_sz_get(struct brcms_c_info *wlc, uint fifo, uint *blocks) { return brcms_b_xmtfifo_sz_get(wlc->hw, fifo, blocks); @@ -5725,8 +9420,8 @@ void brcms_c_write_template_ram(struct brcms_c_info *wlc, int offset, int len, brcms_b_write_template_ram(wlc->hw, offset, len, buf); } -void brcms_c_write_hw_bcntemplates(struct brcms_c_info *wlc, void *bcn, int len, - bool both) +void brcms_c_write_hw_bcntemplates(struct brcms_c_info *wlc, u16 bcn[], int len, + bool both) { brcms_b_write_hw_bcntemplates(wlc->hw, bcn, len, both); } @@ -5740,7 +9435,7 @@ brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset, memcpy(wlc->cfg->BSSID, addr, ETH_ALEN); } -void brcms_c_pllreq(struct brcms_c_info *wlc, bool set, mbool req_bit) +void brcms_c_pllreq(struct brcms_c_info *wlc, bool set, u32 req_bit) { brcms_b_pllreq(wlc->hw, set, req_bit); } @@ -5757,11 +9452,10 @@ brcms_c_txflowcontrol_prio_isset(struct brcms_c_info *wlc, { uint prio_mask; - if (prio == ALLPRIO) { + if (prio == ALLPRIO) prio_mask = TXQ_STOP_FOR_PRIOFC_MASK; - } else { + else prio_mask = NBITVAL(prio); - } return (q->stopped & prio_mask) == prio_mask; } @@ -5776,11 +9470,10 @@ void brcms_c_txflowcontrol(struct brcms_c_info *wlc, BCMMSG(wlc->wiphy, "flow control kicks in\n"); - if (prio == ALLPRIO) { + if (prio == ALLPRIO) prio_bits = TXQ_STOP_FOR_PRIOFC_MASK; - } else { + else prio_bits = NBITVAL(prio); - } cur_bits = qi->stopped & prio_bits; @@ -5788,23 +9481,22 @@ void brcms_c_txflowcontrol(struct brcms_c_info *wlc, * Otherwise update the bit and continue */ if (on) { - if (cur_bits == prio_bits) { + if (cur_bits == prio_bits) return; - } + mboolset(qi->stopped, prio_bits); } else { - if (cur_bits == 0) { + if (cur_bits == 0) return; - } + mboolclr(qi->stopped, prio_bits); } /* If there is a flow control override we will not change the external * flow control state. */ - if (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK) { + if (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK) return; - } brcms_c_txflowcontrol_signal(wlc, qi, on, prio); } @@ -5826,9 +9518,8 @@ brcms_c_txflowcontrol_override(struct brcms_c_info *wlc, /* if there was a previous override bit on, then setting this * makes no difference. */ - if (prev_override) { + if (prev_override) return; - } brcms_c_txflowcontrol_signal(wlc, qi, ON, ALLPRIO); } else { @@ -5837,9 +9528,8 @@ brcms_c_txflowcontrol_override(struct brcms_c_info *wlc, * flow control if it was the only bit set. For any other * override setting, just return */ - if (prev_override != override) { + if (prev_override != override) return; - } if (qi->stopped == 0) { brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); @@ -5871,15 +9561,7 @@ static void brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc, struct brcms_txq_info *qi, bool on, int prio) { -#ifdef NON_FUNCTIONAL - /* wlcif_list is never filled so this function is not functional */ - struct brcms_c_if *wlcif; - - for (wlcif = wlc->wlcif_list; wlcif != NULL; wlcif = wlcif->next) { - if (wlcif->qi == qi && wlcif->flags & BRCMS_IF_LINKED) - brcms_txflowcontrol(wlc->wl, wlcif->wlif, on, prio); - } -#endif + /* wlcif_list is never filled so this function is not functional yet */ } static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc) @@ -5983,9 +9665,8 @@ void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop) /* wait for queue and DMA fifos to run dry */ while (!pktq_empty(&wlc->pkt_queue->q) || - TXPKTPENDTOT(wlc) > 0) { + TXPKTPENDTOT(wlc) > 0) brcms_msleep(wlc->wl, 1); - } } int brcms_c_set_par(struct brcms_c_info *wlc, enum wlc_par_id par_id, @@ -6093,10 +9774,11 @@ char *getvar(char *vars, const char *name) int getintvar(char *vars, const char *name) { char *val; + unsigned long res; val = getvar(vars, name); - if (val == NULL) - return 0; + if (val && !kstrtoul(val, 0, &res)) + return res; - return simple_strtoul(val, NULL, 0); + return 0; } |