diff options
Diffstat (limited to 'drivers/staging/comedi')
60 files changed, 34187 insertions, 243 deletions
diff --git a/drivers/staging/comedi/Kconfig b/drivers/staging/comedi/Kconfig index 583bce9bb18e..9ab1ee7d36bf 100644 --- a/drivers/staging/comedi/Kconfig +++ b/drivers/staging/comedi/Kconfig @@ -1313,5 +1313,9 @@ config COMEDI_NI_LABPC_ISADMA config COMEDI_NI_TIO tristate + select COMEDI_NI_ROUTING + +config COMEDI_NI_ROUTING + tristate endif # COMEDI diff --git a/drivers/staging/comedi/comedi.h b/drivers/staging/comedi/comedi.h index bb961ac79b7e..e90b17775284 100644 --- a/drivers/staging/comedi/comedi.h +++ b/drivers/staging/comedi/comedi.h @@ -107,6 +107,7 @@ #define INSN_WRITE (1 | INSN_MASK_WRITE) #define INSN_BITS (2 | INSN_MASK_READ | INSN_MASK_WRITE) #define INSN_CONFIG (3 | INSN_MASK_READ | INSN_MASK_WRITE) +#define INSN_DEVICE_CONFIG (INSN_CONFIG | INSN_MASK_SPECIAL) #define INSN_GTOD (4 | INSN_MASK_READ | INSN_MASK_SPECIAL) #define INSN_WAIT (5 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) #define INSN_INTTRIG (6 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) @@ -301,6 +302,8 @@ enum comedi_io_direction { * @INSN_CONFIG_PWM_SET_H_BRIDGE: Set PWM H bridge duty cycle and polarity for * a relay simultaneously. * @INSN_CONFIG_PWM_GET_H_BRIDGE: Get PWM H bridge duty cycle and polarity. + * @INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: Get the hardware timing restraints, + * regardless of trigger sources. */ enum configuration_ids { INSN_CONFIG_DIO_INPUT = COMEDI_INPUT, @@ -344,7 +347,25 @@ enum configuration_ids { INSN_CONFIG_PWM_GET_PERIOD = 5001, INSN_CONFIG_GET_PWM_STATUS = 5002, INSN_CONFIG_PWM_SET_H_BRIDGE = 5003, - INSN_CONFIG_PWM_GET_H_BRIDGE = 5004 + INSN_CONFIG_PWM_GET_H_BRIDGE = 5004, + INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS = 5005, +}; + +/** + * enum device_configuration_ids - COMEDI configuration instruction codes global + * to an entire device. + * @INSN_DEVICE_CONFIG_TEST_ROUTE: Validate the possibility of a + * globally-named route + * @INSN_DEVICE_CONFIG_CONNECT_ROUTE: Connect a globally-named route + * @INSN_DEVICE_CONFIG_DISCONNECT_ROUTE:Disconnect a globally-named route + * @INSN_DEVICE_CONFIG_GET_ROUTES: Get a list of all globally-named routes + * that are valid for a particular device. + */ +enum device_config_route_ids { + INSN_DEVICE_CONFIG_TEST_ROUTE = 0, + INSN_DEVICE_CONFIG_CONNECT_ROUTE = 1, + INSN_DEVICE_CONFIG_DISCONNECT_ROUTE = 2, + INSN_DEVICE_CONFIG_GET_ROUTES = 3, }; /** @@ -928,6 +949,157 @@ enum i8254_mode { I8254_BINARY = 0 }; +/* *** BEGIN GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */ + +/* + * Common National Instruments Terminal/Signal names. + * Some of these have no NI_ prefix as they are useful for non-NI hardware, such + * as those that utilize the PXI/RTSI trigger lines. + * + * NOTE ABOUT THE CHOICE OF NAMES HERE AND THE CAMELSCRIPT: + * The choice to use CamelScript and the exact names below is for + * maintainability, clarity, similarity to manufacturer's documentation, + * _and_ a mitigation for confusion that has plagued the use of these drivers + * for years! + * + * More detail: + * There have been significant confusions over the past many years for users + * when trying to understand how to connect to/from signals and terminals on + * NI hardware using comedi. The major reason for this is that the actual + * register values were exposed and required to be used by users. Several + * major reasons exist why this caused major confusion for users: + * 1) The register values are _NOT_ in user documentation, but rather in + * arcane locations, such as a few register programming manuals that are + * increasingly hard to find and the NI MHDDK (comments in in example code). + * There is no one place to find the various valid values of the registers. + * 2) The register values are _NOT_ completely consistent. There is no way to + * gain any sense of intuition of which values, or even enums one should use + * for various registers. There was some attempt in prior use of comedi to + * name enums such that a user might know which enums should be used for + * varying purposes, but the end-user had to gain a knowledge of register + * values to correctly wield this approach. + * 3) The names for signals and registers found in the various register level + * programming manuals and vendor-provided documentation are _not_ even + * close to the same names that are in the end-user documentation. + * + * Similar, albeit less, confusion plagued NI's previous version of their own + * drivers. Earlier than 2003, NI greatly simplified the situation for users + * by releasing a new API that abstracted the names of signals/terminals to a + * common and intuitive set of names. + * + * The names below mirror the names chosen and well documented by NI. These + * names are exposed to the user via the comedilib user library. By keeping + * the names below, in spite of the use of CamelScript, maintenance will be + * greatly eased and confusion for users _and_ comedi developers will be + * greatly reduced. + */ + +/* + * Base of abstracted NI names. + * The first 16 bits of *_arg are reserved for channel selection. + * Since we only actually need the first 4 or 5 bits for all register values on + * NI select registers anyways, we'll identify all values >= (1<<15) as being an + * abstracted NI signal/terminal name. + * These values are also used/returned by INSN_DEVICE_CONFIG_TEST_ROUTE, + * INSN_DEVICE_CONFIG_CONNECT_ROUTE, INSN_DEVICE_CONFIG_DISCONNECT_ROUTE, + * and INSN_DEVICE_CONFIG_GET_ROUTES. + */ +#define NI_NAMES_BASE 0x8000u +/* + * not necessarily all allowed 64 PFIs are valid--certainly not for all devices + */ +#define NI_PFI(x) (NI_NAMES_BASE + ((x) & 0x3f)) +/* 8 trigger lines by standard, Some devices cannot talk to all eight. */ +#define TRIGGER_LINE(x) (NI_PFI(-1) + 1 + ((x) & 0x7)) +/* 4 RTSI shared MUXes to route signals to/from TRIGGER_LINES on NI hardware */ +#define NI_RTSI_BRD(x) (TRIGGER_LINE(-1) + 1 + ((x) & 0x3)) + +/* *** Counter/timer names : 8 counters max *** */ +#define NI_COUNTER_NAMES_BASE (NI_RTSI_BRD(-1) + 1) +#define NI_MAX_COUNTERS 7 +#define NI_CtrSource(x) (NI_COUNTER_NAMES_BASE + ((x) & NI_MAX_COUNTERS)) +/* Gate, Aux, A,B,Z are all treated, at times as gates */ +#define NI_GATES_NAMES_BASE (NI_CtrSource(-1) + 1) +#define NI_CtrGate(x) (NI_GATES_NAMES_BASE + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrAux(x) (NI_CtrGate(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrA(x) (NI_CtrAux(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrB(x) (NI_CtrA(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrZ(x) (NI_CtrB(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_GATES_NAMES_MAX NI_CtrZ(-1) +#define NI_CtrArmStartTrigger(x) (NI_CtrZ(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrInternalOutput(x) \ + (NI_CtrArmStartTrigger(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +/** external pin(s) labeled conveniently as Ctr<i>Out. */ +#define NI_CtrOut(x) (NI_CtrInternalOutput(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +/** For Buffered sampling of ctr -- x series capability. */ +#define NI_CtrSampleClock(x) (NI_CtrOut(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_COUNTER_NAMES_MAX NI_CtrSampleClock(-1) + +enum ni_common_signal_names { + /* PXI_Star: this is a non-NI-specific signal */ + PXI_Star = NI_COUNTER_NAMES_MAX + 1, + PXI_Clk10, + PXIe_Clk100, + NI_AI_SampleClock, + NI_AI_SampleClockTimebase, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_ConvertClockTimebase, + NI_AI_PauseTrigger, + NI_AI_HoldCompleteEvent, + NI_AI_HoldComplete, + NI_AI_ExternalMUXClock, + NI_AI_STOP, /* pulse signal that occurs when a update is finished(?) */ + NI_AO_SampleClock, + NI_AO_SampleClockTimebase, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_SampleClockTimebase, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_SampleClock, + NI_DO_SampleClockTimebase, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_MasterTimebase, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100MHzTimebase, + NI_200MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + NI_WatchdogExpiredEvent, + NI_WatchdogExpirationTrigger, + NI_SCXI_Trig1, + NI_LogicLow, + NI_LogicHigh, + NI_ExternalStrobe, + NI_PFI_DO, + NI_CaseGround, + /* special internal signal used as variable source for RTSI bus: */ + NI_RGOUT0, + + /* just a name to make the next more convenient, regardless of above */ + _NI_NAMES_MAX_PLUS_1, + NI_NUM_NAMES = _NI_NAMES_MAX_PLUS_1 - NI_NAMES_BASE, +}; + +/* *** END GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */ + #define NI_USUAL_PFI_SELECT(x) (((x) < 10) ? (0x1 + (x)) : (0xb + (x))) #define NI_USUAL_RTSI_SELECT(x) (((x) < 7) ? (0xb + (x)) : 0x1b) diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c index e18b61cdbdeb..c1c6b2b4ab91 100644 --- a/drivers/staging/comedi/comedi_fops.c +++ b/drivers/staging/comedi/comedi_fops.c @@ -1216,6 +1216,10 @@ static int check_insn_config_length(struct comedi_insn *insn, if (insn->n == 6) return 0; break; + case INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: + if (insn->n >= 4) + return 0; + break; /* * by default we allow the insn since we don't have checks for * all possible cases yet @@ -1230,6 +1234,57 @@ static int check_insn_config_length(struct comedi_insn *insn, return -EINVAL; } +static int check_insn_device_config_length(struct comedi_insn *insn, + unsigned int *data) +{ + if (insn->n < 1) + return -EINVAL; + + switch (data[0]) { + case INSN_DEVICE_CONFIG_TEST_ROUTE: + case INSN_DEVICE_CONFIG_CONNECT_ROUTE: + case INSN_DEVICE_CONFIG_DISCONNECT_ROUTE: + if (insn->n == 3) + return 0; + break; + case INSN_DEVICE_CONFIG_GET_ROUTES: + /* + * Big enough for config_id and the length of the userland + * memory buffer. Additional length should be in factors of 2 + * to communicate any returned route pairs (source,destination). + */ + if (insn->n >= 2) + return 0; + break; + } + return -EINVAL; +} + +/** + * get_valid_routes() - Calls low-level driver get_valid_routes function to + * either return a count of valid routes to user, or copy + * of list of all valid device routes to buffer in + * userspace. + * @dev: comedi device pointer + * @data: data from user insn call. The length of the data must be >= 2. + * data[0] must contain the INSN_DEVICE_CONFIG config_id. + * data[1](input) contains the number of _pairs_ for which memory is + * allotted from the user. If the user specifies '0', then only + * the number of pairs available is returned. + * data[1](output) returns either the number of pairs available (if none + * where requested) or the number of _pairs_ that are copied back + * to the user. + * data[2::2] returns each (source, destination) pair. + * + * Return: -EINVAL if low-level driver does not allocate and return routes as + * expected. Returns 0 otherwise. + */ +static int get_valid_routes(struct comedi_device *dev, unsigned int *data) +{ + data[1] = dev->get_valid_routes(dev, data[1], data + 2); + return 0; +} + static int parse_insn(struct comedi_device *dev, struct comedi_insn *insn, unsigned int *data, void *file) { @@ -1293,6 +1348,24 @@ static int parse_insn(struct comedi_device *dev, struct comedi_insn *insn, if (ret >= 0) ret = 1; break; + case INSN_DEVICE_CONFIG: + ret = check_insn_device_config_length(insn, data); + if (ret) + break; + + if (data[0] == INSN_DEVICE_CONFIG_GET_ROUTES) { + /* + * data[1] should be the number of _pairs_ that + * the memory can hold. + */ + data[1] = (insn->n - 2) / 2; + ret = get_valid_routes(dev, data); + break; + } + + /* other global device config instructions. */ + ret = dev->insn_device_config(dev, insn, data); + break; default: dev_dbg(dev->class_dev, "invalid insn\n"); ret = -EINVAL; diff --git a/drivers/staging/comedi/comedidev.h b/drivers/staging/comedi/comedidev.h index 5775a93917f4..a7d569cfca5d 100644 --- a/drivers/staging/comedi/comedidev.h +++ b/drivers/staging/comedi/comedidev.h @@ -516,6 +516,15 @@ struct comedi_driver { * called when @use_count changes from 0 to 1. * @close: Optional pointer to a function set by the low-level driver to be * called when @use_count changed from 1 to 0. + * @insn_device_config: Optional pointer to a handler for all sub-instructions + * except %INSN_DEVICE_CONFIG_GET_ROUTES of the %INSN_DEVICE_CONFIG + * instruction. If this is not initialized by the low-level driver, a + * default handler will be set during post-configuration. + * @get_valid_routes: Optional pointer to a handler for the + * %INSN_DEVICE_CONFIG_GET_ROUTES sub-instruction of the + * %INSN_DEVICE_CONFIG instruction set. If this is not initialized by the + * low-level driver, a default handler that copies zero routes back to the + * user will be used. * * This is the main control data structure for a COMEDI device (as far as the * COMEDI core is concerned). There are two groups of COMEDI devices - @@ -565,6 +574,11 @@ struct comedi_device { int (*open)(struct comedi_device *dev); void (*close)(struct comedi_device *dev); + int (*insn_device_config)(struct comedi_device *dev, + struct comedi_insn *insn, unsigned int *data); + unsigned int (*get_valid_routes)(struct comedi_device *dev, + unsigned int n_pairs, + unsigned int *pair_data); }; /* diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c index 57dd63d548b7..eefa62f42c0f 100644 --- a/drivers/staging/comedi/drivers.c +++ b/drivers/staging/comedi/drivers.c @@ -211,6 +211,19 @@ static int poll_invalid(struct comedi_device *dev, struct comedi_subdevice *s) return -EINVAL; } +static int insn_device_inval(struct comedi_device *dev, + struct comedi_insn *insn, unsigned int *data) +{ + return -EINVAL; +} + +static unsigned int get_zero_valid_routes(struct comedi_device *dev, + unsigned int n_pairs, + unsigned int *pair_data) +{ + return 0; +} + int insn_inval(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { @@ -652,6 +665,12 @@ static int __comedi_device_postconfig(struct comedi_device *dev) int ret; int i; + if (!dev->insn_device_config) + dev->insn_device_config = insn_device_inval; + + if (!dev->get_valid_routes) + dev->get_valid_routes = get_zero_valid_routes; + for (i = 0; i < dev->n_subdevices; i++) { s = &dev->subdevices[i]; diff --git a/drivers/staging/comedi/drivers/Makefile b/drivers/staging/comedi/drivers/Makefile index 98b42b47dfe1..b24ac00cab73 100644 --- a/drivers/staging/comedi/drivers/Makefile +++ b/drivers/staging/comedi/drivers/Makefile @@ -137,6 +137,33 @@ obj-$(CONFIG_COMEDI_VMK80XX) += vmk80xx.o obj-$(CONFIG_COMEDI_MITE) += mite.o obj-$(CONFIG_COMEDI_NI_TIO) += ni_tio.o obj-$(CONFIG_COMEDI_NI_TIOCMD) += ni_tiocmd.o +obj-$(CONFIG_COMEDI_NI_ROUTING) += ni_routing.o +ni_routing-objs += ni_routes.o \ + ni_routing/ni_route_values.o \ + ni_routing/ni_route_values/ni_660x.o \ + ni_routing/ni_route_values/ni_eseries.o \ + ni_routing/ni_route_values/ni_mseries.o \ + ni_routing/ni_device_routes.o \ + ni_routing/ni_device_routes/pxi-6030e.o \ + ni_routing/ni_device_routes/pci-6070e.o \ + ni_routing/ni_device_routes/pci-6220.o \ + ni_routing/ni_device_routes/pci-6221.o \ + ni_routing/ni_device_routes/pxi-6224.o \ + ni_routing/ni_device_routes/pxi-6225.o \ + ni_routing/ni_device_routes/pci-6229.o \ + ni_routing/ni_device_routes/pci-6251.o \ + ni_routing/ni_device_routes/pxi-6251.o \ + ni_routing/ni_device_routes/pxie-6251.o \ + ni_routing/ni_device_routes/pci-6254.o \ + ni_routing/ni_device_routes/pci-6259.o \ + ni_routing/ni_device_routes/pci-6534.o \ + ni_routing/ni_device_routes/pxie-6535.o \ + ni_routing/ni_device_routes/pci-6602.o \ + ni_routing/ni_device_routes/pci-6713.o \ + ni_routing/ni_device_routes/pci-6723.o \ + ni_routing/ni_device_routes/pci-6733.o \ + ni_routing/ni_device_routes/pxi-6733.o \ + ni_routing/ni_device_routes/pxie-6738.o obj-$(CONFIG_COMEDI_NI_LABPC) += ni_labpc_common.o obj-$(CONFIG_COMEDI_NI_LABPC_ISADMA) += ni_labpc_isadma.o @@ -145,3 +172,4 @@ obj-$(CONFIG_COMEDI_8255_SA) += 8255.o obj-$(CONFIG_COMEDI_AMPLC_DIO200) += amplc_dio200_common.o obj-$(CONFIG_COMEDI_AMPLC_PC236) += amplc_pc236_common.o obj-$(CONFIG_COMEDI_DAS08) += das08.o +obj-$(CONFIG_COMEDI_TESTS) += tests/ diff --git a/drivers/staging/comedi/drivers/comedi_test.c b/drivers/staging/comedi/drivers/comedi_test.c index d437af721bd8..ef4c7c8a2b71 100644 --- a/drivers/staging/comedi/drivers/comedi_test.c +++ b/drivers/staging/comedi/drivers/comedi_test.c @@ -626,6 +626,48 @@ static int waveform_ao_insn_write(struct comedi_device *dev, return insn->n; } +static int waveform_ai_insn_config(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + if (data[0] == INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS) { + /* + * input: data[1], data[2] : scan_begin_src, convert_src + * output: data[1], data[2] : scan_begin_min, convert_min + */ + if (data[1] == TRIG_FOLLOW) { + /* exactly TRIG_FOLLOW case */ + data[1] = 0; + data[2] = NSEC_PER_USEC; + } else { + data[1] = NSEC_PER_USEC; + if (data[2] & TRIG_TIMER) + data[2] = NSEC_PER_USEC; + else + data[2] = 0; + } + return 0; + } + + return -EINVAL; +} + +static int waveform_ao_insn_config(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + if (data[0] == INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS) { + /* we don't care about actual channels */ + data[1] = NSEC_PER_USEC; /* scan_begin_min */ + data[2] = 0; /* convert_min */ + return 0; + } + + return -EINVAL; +} + static int waveform_common_attach(struct comedi_device *dev, int amplitude, int period) { @@ -658,6 +700,7 @@ static int waveform_common_attach(struct comedi_device *dev, s->do_cmd = waveform_ai_cmd; s->do_cmdtest = waveform_ai_cmdtest; s->cancel = waveform_ai_cancel; + s->insn_config = waveform_ai_insn_config; s = &dev->subdevices[1]; dev->write_subdev = s; @@ -673,6 +716,7 @@ static int waveform_common_attach(struct comedi_device *dev, s->do_cmd = waveform_ao_cmd; s->do_cmdtest = waveform_ao_cmdtest; s->cancel = waveform_ao_cancel; + s->insn_config = waveform_ao_insn_config; /* Our default loopback value is just a 0V flatline */ for (i = 0; i < s->n_chan; i++) diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c index e521ed9d0887..e70a461e723f 100644 --- a/drivers/staging/comedi/drivers/ni_660x.c +++ b/drivers/staging/comedi/drivers/ni_660x.c @@ -7,7 +7,7 @@ * Driver: ni_660x * Description: National Instruments 660x counter/timer boards * Devices: [National Instruments] PCI-6601 (ni_660x), PCI-6602, PXI-6602, - * PXI-6608, PCI-6624, PXI-6624 + * PCI-6608, PXI-6608, PCI-6624, PXI-6624 * Author: J.P. Mellor <jpmellor@rose-hulman.edu>, * Herman.Bruyninckx@mech.kuleuven.ac.be, * Wim.Meeussen@mech.kuleuven.ac.be, @@ -31,6 +31,7 @@ #include "mite.h" #include "ni_tio.h" +#include "ni_routes.h" /* See Register-Level Programmer Manual page 3.1 */ enum ni_660x_register { @@ -201,6 +202,7 @@ enum ni_660x_boardid { BOARD_PCI6601, BOARD_PCI6602, BOARD_PXI6602, + BOARD_PCI6608, BOARD_PXI6608, BOARD_PCI6624, BOARD_PXI6624 @@ -224,6 +226,10 @@ static const struct ni_660x_board ni_660x_boards[] = { .name = "PXI-6602", .n_chips = 2, }, + [BOARD_PCI6608] = { + .name = "PCI-6608", + .n_chips = 2, + }, [BOARD_PXI6608] = { .name = "PXI-6608", .n_chips = 2, @@ -259,6 +265,7 @@ struct ni_660x_private { unsigned int dma_cfg[NI660X_MAX_CHIPS]; unsigned int io_cfg[NI660X_NUM_PFI_CHANNELS]; u64 io_dir; + struct ni_route_tables routing_tables; }; static void ni_660x_write(struct comedi_device *dev, unsigned int chip, @@ -561,6 +568,10 @@ static void ni_660x_select_pfi_output(struct comedi_device *dev, unsigned int idle_chip = 0; unsigned int bits; + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + if (board->n_chips > 1) { if (out_sel == NI_660X_PFI_OUTPUT_COUNTER && chan >= 8 && chan <= 23) { @@ -589,11 +600,54 @@ static void ni_660x_select_pfi_output(struct comedi_device *dev, ni_660x_write(dev, active_chip, bits, NI660X_IO_CFG(chan)); } +static void ni_660x_set_pfi_direction(struct comedi_device *dev, + unsigned int chan, + unsigned int direction) +{ + struct ni_660x_private *devpriv = dev->private; + u64 bit; + + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + + bit = 1ULL << chan; + + if (direction == COMEDI_OUTPUT) { + devpriv->io_dir |= bit; + /* reset the output to currently assigned output value */ + ni_660x_select_pfi_output(dev, chan, devpriv->io_cfg[chan]); + } else { + devpriv->io_dir &= ~bit; + /* set pin to high-z; do not change currently assigned route */ + ni_660x_select_pfi_output(dev, chan, 0); + } +} + +static unsigned int ni_660x_get_pfi_direction(struct comedi_device *dev, + unsigned int chan) +{ + struct ni_660x_private *devpriv = dev->private; + u64 bit; + + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + + bit = 1ULL << chan; + + return (devpriv->io_dir & bit) ? COMEDI_OUTPUT : COMEDI_INPUT; +} + static int ni_660x_set_pfi_routing(struct comedi_device *dev, unsigned int chan, unsigned int source) { struct ni_660x_private *devpriv = dev->private; + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + switch (source) { case NI_660X_PFI_OUTPUT_COUNTER: if (chan < 8) @@ -607,36 +661,56 @@ static int ni_660x_set_pfi_routing(struct comedi_device *dev, } devpriv->io_cfg[chan] = source; - if (devpriv->io_dir & (1ULL << chan)) + if (ni_660x_get_pfi_direction(dev, chan) == COMEDI_OUTPUT) ni_660x_select_pfi_output(dev, chan, devpriv->io_cfg[chan]); return 0; } +static int ni_660x_get_pfi_routing(struct comedi_device *dev, unsigned int chan) +{ + struct ni_660x_private *devpriv = dev->private; + + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + + return devpriv->io_cfg[chan]; +} + +static void ni_660x_set_pfi_filter(struct comedi_device *dev, + unsigned int chan, unsigned int value) +{ + unsigned int val; + + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + + val = ni_660x_read(dev, 0, NI660X_IO_CFG(chan)); + val &= ~NI660X_IO_CFG_IN_SEL_MASK(chan); + val |= NI660X_IO_CFG_IN_SEL(chan, value); + ni_660x_write(dev, 0, val, NI660X_IO_CFG(chan)); +} + static int ni_660x_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { - struct ni_660x_private *devpriv = dev->private; unsigned int chan = CR_CHAN(insn->chanspec); - u64 bit = 1ULL << chan; - unsigned int val; int ret; switch (data[0]) { case INSN_CONFIG_DIO_OUTPUT: - devpriv->io_dir |= bit; - ni_660x_select_pfi_output(dev, chan, devpriv->io_cfg[chan]); + ni_660x_set_pfi_direction(dev, chan, COMEDI_OUTPUT); break; case INSN_CONFIG_DIO_INPUT: - devpriv->io_dir &= ~bit; - ni_660x_select_pfi_output(dev, chan, 0); /* high-z */ + ni_660x_set_pfi_direction(dev, chan, COMEDI_INPUT); break; case INSN_CONFIG_DIO_QUERY: - data[1] = (devpriv->io_dir & bit) ? COMEDI_OUTPUT - : COMEDI_INPUT; + data[1] = ni_660x_get_pfi_direction(dev, chan); break; case INSN_CONFIG_SET_ROUTING: @@ -646,14 +720,11 @@ static int ni_660x_dio_insn_config(struct comedi_device *dev, break; case INSN_CONFIG_GET_ROUTING: - data[1] = devpriv->io_cfg[chan]; + data[1] = ni_660x_get_pfi_routing(dev, chan); break; case INSN_CONFIG_FILTER: - val = ni_660x_read(dev, 0, NI660X_IO_CFG(chan)); - val &= ~NI660X_IO_CFG_IN_SEL_MASK(chan); - val |= NI660X_IO_CFG_IN_SEL(chan, data[1]); - ni_660x_write(dev, 0, val, NI660X_IO_CFG(chan)); + ni_660x_set_pfi_filter(dev, chan, data[1]); break; default: @@ -663,6 +734,240 @@ static int ni_660x_dio_insn_config(struct comedi_device *dev, return insn->n; } +static unsigned int _ni_get_valid_routes(struct comedi_device *dev, + unsigned int n_pairs, + unsigned int *pair_data) +{ + struct ni_660x_private *devpriv = dev->private; + + return ni_get_valid_routes(&devpriv->routing_tables, n_pairs, + pair_data); +} + +/* + * Retrieves the current source of the output selector for the given + * destination. If the terminal for the destination is not already configured + * as an output, this function returns -EINVAL as error. + * + * Return: The register value of the destination output selector; + * -EINVAL if terminal is not configured for output. + */ +static inline int get_output_select_source(int dest, struct comedi_device *dev) +{ + struct ni_660x_private *devpriv = dev->private; + int reg = -1; + + if (channel_is_pfi(dest)) { + if (ni_660x_get_pfi_direction(dev, dest) == COMEDI_OUTPUT) + reg = ni_660x_get_pfi_routing(dev, dest); + } else if (channel_is_rtsi(dest)) { + dev_dbg(dev->class_dev, + "%s: unhandled rtsi destination (%d) queried\n", + __func__, dest); + /* + * The following can be enabled when RTSI routing info is + * determined (not currently documented): + * if (ni_get_rtsi_direction(dev, dest) == COMEDI_OUTPUT) { + * reg = ni_get_rtsi_routing(dev, dest); + + * if (reg == NI_RTSI_OUTPUT_RGOUT0) { + * dest = NI_RGOUT0; ** prepare for lookup below ** + * reg = get_rgout0_reg(dev); + * } else if (reg >= NI_RTSI_OUTPUT_RTSI_BRD(0) && + * reg <= NI_RTSI_OUTPUT_RTSI_BRD(3)) { + * const int i = reg - NI_RTSI_OUTPUT_RTSI_BRD(0); + + * dest = NI_RTSI_BRD(i); ** prepare for lookup ** + * reg = get_ith_rtsi_brd_reg(i, dev); + * } + * } + */ + } else if (channel_is_ctr(dest)) { + reg = ni_tio_get_routing(devpriv->counter_dev, dest); + } else { + dev_dbg(dev->class_dev, + "%s: unhandled destination (%d) queried\n", + __func__, dest); + } + + if (reg >= 0) + return ni_find_route_source(CR_CHAN(reg), dest, + &devpriv->routing_tables); + return -EINVAL; +} + +/* + * Test a route: + * + * Return: -1 if not connectible; + * 0 if connectible and not connected; + * 1 if connectible and connected. + */ +static inline int test_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_660x_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + + if (reg < 0) + return -1; + if (get_output_select_source(dest, dev) != CR_CHAN(src)) + return 0; + return 1; +} + +/* Connect the actual route. */ +static inline int connect_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_660x_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + s8 current_src; + + if (reg < 0) + /* route is not valid */ + return -EINVAL; + + current_src = get_output_select_source(dest, dev); + if (current_src == CR_CHAN(src)) + return -EALREADY; + if (current_src >= 0) + /* destination mux is already busy. complain, don't overwrite */ + return -EBUSY; + + /* The route is valid and available. Now connect... */ + if (channel_is_pfi(CR_CHAN(dest))) { + /* + * set routing and then direction so that the output does not + * first get generated with the wrong pin + */ + ni_660x_set_pfi_routing(dev, dest, reg); + ni_660x_set_pfi_direction(dev, dest, COMEDI_OUTPUT); + } else if (channel_is_rtsi(CR_CHAN(dest))) { + dev_dbg(dev->class_dev, "%s: unhandled rtsi destination (%d)\n", + __func__, dest); + return -EINVAL; + /* + * The following can be enabled when RTSI routing info is + * determined (not currently documented): + * if (reg == NI_RTSI_OUTPUT_RGOUT0) { + * int ret = incr_rgout0_src_use(src, dev); + + * if (ret < 0) + * return ret; + * } else if (ni_rtsi_route_requires_mux(reg)) { + * ** Attempt to allocate and route (src->brd) ** + * int brd = incr_rtsi_brd_src_use(src, dev); + + * if (brd < 0) + * return brd; + + * ** Now lookup the register value for (brd->dest) ** + * reg = ni_lookup_route_register(brd, CR_CHAN(dest), + * &devpriv->routing_tables); + * } + + * ni_set_rtsi_direction(dev, dest, COMEDI_OUTPUT); + * ni_set_rtsi_routing(dev, dest, reg); + */ + } else if (channel_is_ctr(CR_CHAN(dest))) { + /* + * we are adding back the channel modifier info to set + * invert/edge info passed by the user + */ + ni_tio_set_routing(devpriv->counter_dev, dest, + reg | (src & ~CR_CHAN(-1))); + } else { + return -EINVAL; + } + return 0; +} + +static inline int disconnect_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_660x_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), CR_CHAN(dest), + &devpriv->routing_tables); + + if (reg < 0) + /* route is not valid */ + return -EINVAL; + if (get_output_select_source(dest, dev) != CR_CHAN(src)) + /* cannot disconnect something not connected */ + return -EINVAL; + + /* The route is valid and is connected. Now disconnect... */ + if (channel_is_pfi(CR_CHAN(dest))) { + unsigned int source = ((CR_CHAN(dest) - NI_PFI(0)) < 8) + ? NI_660X_PFI_OUTPUT_DIO + : NI_660X_PFI_OUTPUT_COUNTER; + + /* set the pfi to high impedance, and disconnect */ + ni_660x_set_pfi_direction(dev, dest, COMEDI_INPUT); + ni_660x_set_pfi_routing(dev, dest, source); + } else if (channel_is_rtsi(CR_CHAN(dest))) { + dev_dbg(dev->class_dev, "%s: unhandled rtsi destination (%d)\n", + __func__, dest); + return -EINVAL; + /* + * The following can be enabled when RTSI routing info is + * determined (not currently documented): + * if (reg == NI_RTSI_OUTPUT_RGOUT0) { + * int ret = decr_rgout0_src_use(src, dev); + + * if (ret < 0) + * return ret; + * } else if (ni_rtsi_route_requires_mux(reg)) { + * ** find which RTSI_BRD line is source for rtsi pin ** + * int brd = ni_find_route_source( + * ni_get_rtsi_routing(dev, dest), CR_CHAN(dest), + * &devpriv->routing_tables); + + * if (brd < 0) + * return brd; + + * ** decrement/disconnect RTSI_BRD line from source ** + * decr_rtsi_brd_src_use(src, brd, dev); + * } + + * ** set rtsi output selector to default state ** + * reg = default_rtsi_routing[CR_CHAN(dest) - TRIGGER_LINE(0)]; + * ni_set_rtsi_direction(dev, dest, COMEDI_INPUT); + * ni_set_rtsi_routing(dev, dest, reg); + */ + } else if (channel_is_ctr(CR_CHAN(dest))) { + ni_tio_unset_routing(devpriv->counter_dev, dest); + } else { + return -EINVAL; + } + return 0; +} + +static int ni_global_insn_config(struct comedi_device *dev, + struct comedi_insn *insn, + unsigned int *data) +{ + switch (data[0]) { + case INSN_DEVICE_CONFIG_TEST_ROUTE: + data[0] = test_route(data[1], data[2], dev); + return 2; + case INSN_DEVICE_CONFIG_CONNECT_ROUTE: + return connect_route(data[1], data[2], dev); + case INSN_DEVICE_CONFIG_DISCONNECT_ROUTE: + return disconnect_route(data[1], data[2], dev); + /* + * This case is already handled one level up. + * case INSN_DEVICE_CONFIG_GET_ROUTES: + */ + default: + return -EINVAL; + } + return 1; +} + static void ni_660x_init_tio_chips(struct comedi_device *dev, unsigned int n_chips) { @@ -730,12 +1035,30 @@ static int ni_660x_auto_attach(struct comedi_device *dev, ni_660x_init_tio_chips(dev, board->n_chips); + /* prepare the device for globally-named routes. */ + if (ni_assign_device_routes("ni_660x", board->name, + &devpriv->routing_tables) < 0) { + dev_warn(dev->class_dev, "%s: %s device has no signal routing table.\n", + __func__, board->name); + dev_warn(dev->class_dev, "%s: High level NI signal names will not be available for this %s board.\n", + __func__, board->name); + } else { + /* + * only(?) assign insn_device_config if we have global names for + * this device. + */ + dev->insn_device_config = ni_global_insn_config; + dev->get_valid_routes = _ni_get_valid_routes; + } + n_counters = board->n_chips * NI660X_COUNTERS_PER_CHIP; gpct_dev = ni_gpct_device_construct(dev, ni_660x_gpct_write, ni_660x_gpct_read, ni_gpct_variant_660x, - n_counters); + n_counters, + NI660X_COUNTERS_PER_CHIP, + &devpriv->routing_tables); if (!gpct_dev) return -ENOMEM; devpriv->counter_dev = gpct_dev; @@ -822,7 +1145,7 @@ static int ni_660x_auto_attach(struct comedi_device *dev, : NI_660X_PFI_OUTPUT_COUNTER; ni_660x_set_pfi_routing(dev, i, source); - ni_660x_select_pfi_output(dev, i, 0); /* high-z */ + ni_660x_set_pfi_direction(dev, i, COMEDI_INPUT);/* high-z */ } /* Counter subdevices (4 NI TIO General Purpose Counters per chip) */ @@ -831,9 +1154,6 @@ static int ni_660x_auto_attach(struct comedi_device *dev, if (i < n_counters) { struct ni_gpct *counter = &gpct_dev->counters[i]; - counter->chip_index = i / NI660X_COUNTERS_PER_CHIP; - counter->counter_index = i % NI660X_COUNTERS_PER_CHIP; - s->type = COMEDI_SUBD_COUNTER; s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_LSAMPL | SDF_CMD_READ; @@ -915,6 +1235,7 @@ static const struct pci_device_id ni_660x_pci_table[] = { { PCI_VDEVICE(NI, 0x1310), BOARD_PCI6602 }, { PCI_VDEVICE(NI, 0x1360), BOARD_PXI6602 }, { PCI_VDEVICE(NI, 0x2c60), BOARD_PCI6601 }, + { PCI_VDEVICE(NI, 0x2db0), BOARD_PCI6608 }, { PCI_VDEVICE(NI, 0x2cc0), BOARD_PXI6608 }, { PCI_VDEVICE(NI, 0x1e30), BOARD_PCI6624 }, { PCI_VDEVICE(NI, 0x1e40), BOARD_PXI6624 }, diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c index 4dee2fc37aed..2d1e0325d04d 100644 --- a/drivers/staging/comedi/drivers/ni_mio_common.c +++ b/drivers/staging/comedi/drivers/ni_mio_common.c @@ -351,7 +351,8 @@ static const struct mio_regmap m_series_stc_write_regmap[] = { [NISTC_AO_PERSONAL_REG] = { 0x19c, 2 }, [NISTC_RTSI_TRIGA_OUT_REG] = { 0x19e, 2 }, [NISTC_RTSI_TRIGB_OUT_REG] = { 0x1a0, 2 }, - [NISTC_RTSI_BOARD_REG] = { 0, 0 }, /* Unknown */ + /* doc for following line: mhddk/nimseries/ChipObjects/tMSeries.h */ + [NISTC_RTSI_BOARD_REG] = { 0x1a2, 2 }, [NISTC_CFG_MEM_CLR_REG] = { 0x1a4, 2 }, [NISTC_ADC_FIFO_CLR_REG] = { 0x1a6, 2 }, [NISTC_DAC_FIFO_CLR_REG] = { 0x1a8, 2 }, @@ -2006,7 +2007,6 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, const struct ni_board_struct *board = dev->board_ptr; struct ni_private *devpriv = dev->private; int err = 0; - unsigned int tmp; unsigned int sources; /* Step 1 : check if triggers are trivially valid */ @@ -2047,12 +2047,9 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); break; case TRIG_EXT: - tmp = CR_CHAN(cmd->start_arg); - - if (tmp > 16) - tmp = 16; - tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE)); - err |= comedi_check_trigger_arg_is(&cmd->start_arg, tmp); + err |= ni_check_trigger_arg_roffs(CR_CHAN(cmd->start_arg), + NI_AI_StartTrigger, + &devpriv->routing_tables, 1); break; } @@ -2064,12 +2061,9 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, 0xffffff); } else if (cmd->scan_begin_src == TRIG_EXT) { /* external trigger */ - unsigned int tmp = CR_CHAN(cmd->scan_begin_arg); - - if (tmp > 16) - tmp = 16; - tmp |= (cmd->scan_begin_arg & (CR_INVERT | CR_EDGE)); - err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, tmp); + err |= ni_check_trigger_arg_roffs(CR_CHAN(cmd->scan_begin_arg), + NI_AI_SampleClock, + &devpriv->routing_tables, 1); } else { /* TRIG_OTHER */ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0); } @@ -2087,12 +2081,9 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, } } else if (cmd->convert_src == TRIG_EXT) { /* external trigger */ - unsigned int tmp = CR_CHAN(cmd->convert_arg); - - if (tmp > 16) - tmp = 16; - tmp |= (cmd->convert_arg & (CR_ALT_FILTER | CR_INVERT)); - err |= comedi_check_trigger_arg_is(&cmd->convert_arg, tmp); + err |= ni_check_trigger_arg_roffs(CR_CHAN(cmd->convert_arg), + NI_AI_ConvertClock, + &devpriv->routing_tables, 1); } else if (cmd->convert_src == TRIG_NOW) { err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); } @@ -2118,7 +2109,7 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, /* step 4: fix up any arguments */ if (cmd->scan_begin_src == TRIG_TIMER) { - tmp = cmd->scan_begin_arg; + unsigned int tmp = cmd->scan_begin_arg; cmd->scan_begin_arg = ni_timer_to_ns(dev, ni_ns_to_timer(dev, cmd->scan_begin_arg, @@ -2128,7 +2119,7 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, } if (cmd->convert_src == TRIG_TIMER) { if (!devpriv->is_611x && !devpriv->is_6143) { - tmp = cmd->convert_arg; + unsigned int tmp = cmd->convert_arg; cmd->convert_arg = ni_timer_to_ns(dev, ni_ns_to_timer(dev, cmd->convert_arg, @@ -2206,8 +2197,10 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) NISTC_AI_TRIG_START1_SEL(0); break; case TRIG_EXT: - ai_trig |= NISTC_AI_TRIG_START1_SEL(CR_CHAN(cmd->start_arg) + - 1); + ai_trig |= NISTC_AI_TRIG_START1_SEL( + ni_get_reg_value_roffs(CR_CHAN(cmd->start_arg), + NI_AI_StartTrigger, + &devpriv->routing_tables, 1)); if (cmd->start_arg & CR_INVERT) ai_trig |= NISTC_AI_TRIG_START1_POLARITY; @@ -2317,8 +2310,10 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) (cmd->scan_begin_arg & ~CR_EDGE) != (cmd->convert_arg & ~CR_EDGE)) start_stop_select |= NISTC_AI_START_SYNC; - start_stop_select |= - NISTC_AI_START_SEL(1 + CR_CHAN(cmd->scan_begin_arg)); + start_stop_select |= NISTC_AI_START_SEL( + ni_get_reg_value_roffs(CR_CHAN(cmd->scan_begin_arg), + NI_AI_SampleClock, + &devpriv->routing_tables, 1)); ni_stc_writew(dev, start_stop_select, NISTC_AI_START_STOP_REG); break; } @@ -2346,8 +2341,10 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) ni_stc_writew(dev, mode2, NISTC_AI_MODE2_REG); break; case TRIG_EXT: - mode1 |= NISTC_AI_MODE1_CONVERT_SRC(1 + - CR_CHAN(cmd->convert_arg)); + mode1 |= NISTC_AI_MODE1_CONVERT_SRC( + ni_get_reg_value_roffs(CR_CHAN(cmd->convert_arg), + NI_AI_ConvertClock, + &devpriv->routing_tables, 1)); if ((cmd->convert_arg & CR_INVERT) == 0) mode1 |= NISTC_AI_MODE1_CONVERT_POLARITY; ni_stc_writew(dev, mode1, NISTC_AI_MODE1_REG); @@ -2464,6 +2461,7 @@ static int ni_ai_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { + const struct ni_board_struct *board = dev->board_ptr; struct ni_private *devpriv = dev->private; if (insn->n < 1) @@ -2498,6 +2496,15 @@ static int ni_ai_insn_config(struct comedi_device *dev, } } return 2; + case INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: + /* we don't care about actual channels */ + /* data[3] : chanlist_len */ + data[1] = ni_min_ai_scan_period_ns(dev, data[3]); + if (devpriv->is_611x || devpriv->is_6143) + data[2] = 0; /* simultaneous output */ + else + data[2] = board->ai_speed; + return 0; default: break; } @@ -2834,6 +2841,11 @@ static int ni_ao_insn_config(struct comedi_device *dev, return 0; case INSN_CONFIG_ARM: return ni_ao_arm(dev, s); + case INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: + /* we don't care about actual channels */ + data[1] = board->ao_speed; + data[2] = 0; + return 0; default: break; } @@ -2955,7 +2967,10 @@ static void ni_ao_cmd_set_trigger(struct comedi_device *dev, trigsel = NISTC_AO_TRIG_START1_EDGE | NISTC_AO_TRIG_START1_SYNC; } else { /* TRIG_EXT */ - trigsel = NISTC_AO_TRIG_START1_SEL(CR_CHAN(cmd->start_arg) + 1); + trigsel = NISTC_AO_TRIG_START1_SEL( + ni_get_reg_value_roffs(CR_CHAN(cmd->start_arg), + NI_AO_StartTrigger, + &devpriv->routing_tables, 1)); /* 0=active high, 1=active low. see daq-stc 3-24 (p186) */ if (cmd->start_arg & CR_INVERT) trigsel |= NISTC_AO_TRIG_START1_POLARITY; @@ -3117,7 +3132,9 @@ static void ni_ao_cmd_set_update(struct comedi_device *dev, /* FIXME: assert scan_begin_arg != 0, ret failure otherwise */ devpriv->ao_cmd2 |= NISTC_AO_CMD2_BC_GATE_ENA; devpriv->ao_mode1 |= NISTC_AO_MODE1_UPDATE_SRC( - CR_CHAN(cmd->scan_begin_arg)); + ni_get_reg_value(CR_CHAN(cmd->scan_begin_arg), + NI_AO_SampleClock, + &devpriv->routing_tables)); if (cmd->scan_begin_arg & CR_INVERT) devpriv->ao_mode1 |= NISTC_AO_MODE1_UPDATE_SRC_POLARITY; } @@ -3313,12 +3330,9 @@ static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); break; case TRIG_EXT: - tmp = CR_CHAN(cmd->start_arg); - - if (tmp > 18) - tmp = 18; - tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE)); - err |= comedi_check_trigger_arg_is(&cmd->start_arg, tmp); + err |= ni_check_trigger_arg_roffs(CR_CHAN(cmd->start_arg), + NI_AO_StartTrigger, + &devpriv->routing_tables, 1); break; } @@ -3328,6 +3342,10 @@ static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg, devpriv->clock_ns * 0xffffff); + } else { /* TRIG_EXT */ + err |= ni_check_trigger_arg(CR_CHAN(cmd->scan_begin_arg), + NI_AO_SampleClock, + &devpriv->routing_tables); } err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); @@ -3475,6 +3493,15 @@ static int ni_m_series_dio_insn_config(struct comedi_device *dev, { int ret; + if (data[0] == INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS) { + const struct ni_board_struct *board = dev->board_ptr; + + /* we don't care about actual channels */ + data[1] = board->dio_speed; + data[2] = 0; + return 0; + } + ret = comedi_dio_insn_config(dev, s, insn, data, 0); if (ret) return ret; @@ -3516,8 +3543,8 @@ static int ni_cdio_check_chanlist(struct comedi_device *dev, static int ni_cdio_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_cmd *cmd) { + struct ni_private *devpriv = dev->private; int err = 0; - int tmp; /* Step 1 : check if triggers are trivially valid */ @@ -3537,9 +3564,15 @@ static int ni_cdio_cmdtest(struct comedi_device *dev, err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); - tmp = cmd->scan_begin_arg; - tmp &= CR_PACK_FLAGS(NI_M_CDO_MODE_SAMPLE_SRC_MASK, 0, 0, CR_INVERT); - if (tmp != cmd->scan_begin_arg) + /* + * Although NI_D[IO]_SampleClock are the same, perhaps we should still, + * for completeness, test whether the cmd is output or input? + */ + err |= ni_check_trigger_arg(CR_CHAN(cmd->scan_begin_arg), + NI_DO_SampleClock, + &devpriv->routing_tables); + if (CR_RANGE(cmd->scan_begin_arg) != 0 || + CR_AREF(cmd->scan_begin_arg) != 0) err |= -EINVAL; err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); @@ -3627,9 +3660,16 @@ static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s) int retval; ni_writel(dev, NI_M_CDO_CMD_RESET, NI_M_CDIO_CMD_REG); + /* + * Although NI_D[IO]_SampleClock are the same, perhaps we should still, + * for completeness, test whether the cmd is output or input(?) + */ cdo_mode_bits = NI_M_CDO_MODE_FIFO_MODE | NI_M_CDO_MODE_HALT_ON_ERROR | - NI_M_CDO_MODE_SAMPLE_SRC(CR_CHAN(cmd->scan_begin_arg)); + NI_M_CDO_MODE_SAMPLE_SRC( + ni_get_reg_value(CR_CHAN(cmd->scan_begin_arg), + NI_DO_SampleClock, + &devpriv->routing_tables)); if (cmd->scan_begin_arg & CR_INVERT) cdo_mode_bits |= NI_M_CDO_MODE_POLARITY; ni_writel(dev, cdo_mode_bits, NI_M_CDO_MODE_REG); @@ -4551,24 +4591,33 @@ static unsigned int ni_get_pfi_routing(struct comedi_device *dev, { struct ni_private *devpriv = dev->private; + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } return (devpriv->is_m_series) ? ni_m_series_get_pfi_routing(dev, chan) : ni_old_get_pfi_routing(dev, chan); } +/* Sets the output mux for the specified PFI channel. */ static int ni_set_pfi_routing(struct comedi_device *dev, unsigned int chan, unsigned int source) { struct ni_private *devpriv = dev->private; + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } return (devpriv->is_m_series) ? ni_m_series_set_pfi_routing(dev, chan, source) : ni_old_set_pfi_routing(dev, chan, source); } -static int ni_config_filter(struct comedi_device *dev, - unsigned int pfi_channel, - enum ni_pfi_filter_select filter) +static int ni_config_pfi_filter(struct comedi_device *dev, + unsigned int chan, + enum ni_pfi_filter_select filter) { struct ni_private *devpriv = dev->private; unsigned int bits; @@ -4576,19 +4625,46 @@ static int ni_config_filter(struct comedi_device *dev, if (!devpriv->is_m_series) return -ENOTSUPP; + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } + bits = ni_readl(dev, NI_M_PFI_FILTER_REG); - bits &= ~NI_M_PFI_FILTER_SEL_MASK(pfi_channel); - bits |= NI_M_PFI_FILTER_SEL(pfi_channel, filter); + bits &= ~NI_M_PFI_FILTER_SEL_MASK(chan); + bits |= NI_M_PFI_FILTER_SEL(chan, filter); ni_writel(dev, bits, NI_M_PFI_FILTER_REG); return 0; } +static void ni_set_pfi_direction(struct comedi_device *dev, int chan, + unsigned int direction) +{ + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } + direction = (direction == COMEDI_OUTPUT) ? 1u : 0u; + ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, direction); +} + +static int ni_get_pfi_direction(struct comedi_device *dev, int chan) +{ + struct ni_private *devpriv = dev->private; + + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } + return devpriv->io_bidirection_pin_reg & (1 << chan) ? + COMEDI_OUTPUT : COMEDI_INPUT; +} + static int ni_pfi_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { - struct ni_private *devpriv = dev->private; unsigned int chan; if (insn->n < 1) @@ -4598,23 +4674,19 @@ static int ni_pfi_insn_config(struct comedi_device *dev, switch (data[0]) { case COMEDI_OUTPUT: - ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, 1); - break; case COMEDI_INPUT: - ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, 0); + ni_set_pfi_direction(dev, chan, data[0]); break; case INSN_CONFIG_DIO_QUERY: - data[1] = - (devpriv->io_bidirection_pin_reg & (1 << chan)) ? - COMEDI_OUTPUT : COMEDI_INPUT; - return 0; + data[1] = ni_get_pfi_direction(dev, chan); + break; case INSN_CONFIG_SET_ROUTING: return ni_set_pfi_routing(dev, chan, data[1]); case INSN_CONFIG_GET_ROUTING: data[1] = ni_get_pfi_routing(dev, chan); break; case INSN_CONFIG_FILTER: - return ni_config_filter(dev, chan, data[1]); + return ni_config_pfi_filter(dev, chan, data[1]); default: return -EINVAL; } @@ -4980,7 +5052,10 @@ static int ni_valid_rtsi_output_source(struct comedi_device *dev, case NI_RTSI_OUTPUT_G_SRC0: case NI_RTSI_OUTPUT_G_GATE0: case NI_RTSI_OUTPUT_RGOUT0: - case NI_RTSI_OUTPUT_RTSI_BRD_0: + case NI_RTSI_OUTPUT_RTSI_BRD(0): + case NI_RTSI_OUTPUT_RTSI_BRD(1): + case NI_RTSI_OUTPUT_RTSI_BRD(2): + case NI_RTSI_OUTPUT_RTSI_BRD(3): return 1; case NI_RTSI_OUTPUT_RTSI_OSC: return (devpriv->is_m_series) ? 1 : 0; @@ -4994,6 +5069,10 @@ static int ni_set_rtsi_routing(struct comedi_device *dev, { struct ni_private *devpriv = dev->private; + if (chan >= TRIGGER_LINE(0)) + /* allow new and old names of rtsi channels to work. */ + chan -= TRIGGER_LINE(0); + if (ni_valid_rtsi_output_source(dev, chan, src) == 0) return -EINVAL; if (chan < 4) { @@ -5001,11 +5080,18 @@ static int ni_set_rtsi_routing(struct comedi_device *dev, devpriv->rtsi_trig_a_output_reg |= NISTC_RTSI_TRIG(chan, src); ni_stc_writew(dev, devpriv->rtsi_trig_a_output_reg, NISTC_RTSI_TRIGA_OUT_REG); - } else if (chan < 8) { + } else if (chan < NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series)) { devpriv->rtsi_trig_b_output_reg &= ~NISTC_RTSI_TRIG_MASK(chan); devpriv->rtsi_trig_b_output_reg |= NISTC_RTSI_TRIG(chan, src); ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg, NISTC_RTSI_TRIGB_OUT_REG); + } else if (chan != NISTC_RTSI_TRIG_OLD_CLK_CHAN) { + /* probably should never reach this, since the + * ni_valid_rtsi_output_source above errors out if chan is too + * high + */ + dev_err(dev->class_dev, "%s: unknown rtsi channel\n", __func__); + return -EINVAL; } return 2; } @@ -5015,31 +5101,35 @@ static unsigned int ni_get_rtsi_routing(struct comedi_device *dev, { struct ni_private *devpriv = dev->private; + if (chan >= TRIGGER_LINE(0)) + /* allow new and old names of rtsi channels to work. */ + chan -= TRIGGER_LINE(0); + if (chan < 4) { return NISTC_RTSI_TRIG_TO_SRC(chan, devpriv->rtsi_trig_a_output_reg); } else if (chan < NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series)) { return NISTC_RTSI_TRIG_TO_SRC(chan, devpriv->rtsi_trig_b_output_reg); - } else { - if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) - return NI_RTSI_OUTPUT_RTSI_OSC; - dev_err(dev->class_dev, "bug! should never get here?\n"); - return 0; + } else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) { + return NI_RTSI_OUTPUT_RTSI_OSC; } + + dev_err(dev->class_dev, "%s: unknown rtsi channel\n", __func__); + return -EINVAL; } -static int ni_rtsi_insn_config(struct comedi_device *dev, - struct comedi_subdevice *s, - struct comedi_insn *insn, - unsigned int *data) +static void ni_set_rtsi_direction(struct comedi_device *dev, int chan, + unsigned int direction) { struct ni_private *devpriv = dev->private; - unsigned int chan = CR_CHAN(insn->chanspec); unsigned int max_chan = NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series); - switch (data[0]) { - case INSN_CONFIG_DIO_OUTPUT: + if (chan >= TRIGGER_LINE(0)) + /* allow new and old names of rtsi channels to work. */ + chan -= TRIGGER_LINE(0); + + if (direction == COMEDI_OUTPUT) { if (chan < max_chan) { devpriv->rtsi_trig_direction_reg |= NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series); @@ -5047,10 +5137,7 @@ static int ni_rtsi_insn_config(struct comedi_device *dev, devpriv->rtsi_trig_direction_reg |= NISTC_RTSI_TRIG_DRV_CLK; } - ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg, - NISTC_RTSI_TRIG_DIR_REG); - break; - case INSN_CONFIG_DIO_INPUT: + } else { if (chan < max_chan) { devpriv->rtsi_trig_direction_reg &= ~NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series); @@ -5058,23 +5145,53 @@ static int ni_rtsi_insn_config(struct comedi_device *dev, devpriv->rtsi_trig_direction_reg &= ~NISTC_RTSI_TRIG_DRV_CLK; } - ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg, - NISTC_RTSI_TRIG_DIR_REG); + } + ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg, + NISTC_RTSI_TRIG_DIR_REG); +} + +static int ni_get_rtsi_direction(struct comedi_device *dev, int chan) +{ + struct ni_private *devpriv = dev->private; + unsigned int max_chan = NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series); + + if (chan >= TRIGGER_LINE(0)) + /* allow new and old names of rtsi channels to work. */ + chan -= TRIGGER_LINE(0); + + if (chan < max_chan) { + return (devpriv->rtsi_trig_direction_reg & + NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series)) + ? COMEDI_OUTPUT : COMEDI_INPUT; + } else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) { + return (devpriv->rtsi_trig_direction_reg & + NISTC_RTSI_TRIG_DRV_CLK) + ? COMEDI_OUTPUT : COMEDI_INPUT; + } + return -EINVAL; +} + +static int ni_rtsi_insn_config(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + struct ni_private *devpriv = dev->private; + unsigned int chan = CR_CHAN(insn->chanspec); + + switch (data[0]) { + case COMEDI_OUTPUT: + case COMEDI_INPUT: + ni_set_rtsi_direction(dev, chan, data[0]); break; - case INSN_CONFIG_DIO_QUERY: - if (chan < max_chan) { - data[1] = - (devpriv->rtsi_trig_direction_reg & - NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series)) - ? INSN_CONFIG_DIO_OUTPUT - : INSN_CONFIG_DIO_INPUT; - } else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) { - data[1] = (devpriv->rtsi_trig_direction_reg & - NISTC_RTSI_TRIG_DRV_CLK) - ? INSN_CONFIG_DIO_OUTPUT - : INSN_CONFIG_DIO_INPUT; - } + case INSN_CONFIG_DIO_QUERY: { + int ret = ni_get_rtsi_direction(dev, chan); + + if (ret < 0) + return ret; + data[1] = ret; return 2; + } case INSN_CONFIG_SET_CLOCK_SRC: return ni_set_master_clock(dev, data[1], data[2]); case INSN_CONFIG_GET_CLOCK_SRC: @@ -5083,9 +5200,14 @@ static int ni_rtsi_insn_config(struct comedi_device *dev, return 3; case INSN_CONFIG_SET_ROUTING: return ni_set_rtsi_routing(dev, chan, data[1]); - case INSN_CONFIG_GET_ROUTING: - data[1] = ni_get_rtsi_routing(dev, chan); + case INSN_CONFIG_GET_ROUTING: { + int ret = ni_get_rtsi_routing(dev, chan); + + if (ret < 0) + return ret; + data[1] = ret; return 2; + } default: return -EINVAL; } @@ -5102,9 +5224,275 @@ static int ni_rtsi_insn_bits(struct comedi_device *dev, return insn->n; } +/* + * Default routing for RTSI trigger lines. + * + * These values are used here in the init function, as well as in the + * disconnect_route function, after a RTSI route has been disconnected. + */ +static const int default_rtsi_routing[] = { + [0] = NI_RTSI_OUTPUT_ADR_START1, + [1] = NI_RTSI_OUTPUT_ADR_START2, + [2] = NI_RTSI_OUTPUT_SCLKG, + [3] = NI_RTSI_OUTPUT_DACUPDN, + [4] = NI_RTSI_OUTPUT_DA_START1, + [5] = NI_RTSI_OUTPUT_G_SRC0, + [6] = NI_RTSI_OUTPUT_G_GATE0, + [7] = NI_RTSI_OUTPUT_RTSI_OSC, +}; + +/* + * Route signals through RGOUT0 terminal. + * @reg: raw register value of RGOUT0 bits (only bit0 is important). + * @dev: comedi device handle. + */ +static void set_rgout0_reg(int reg, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + + if (devpriv->is_m_series) { + devpriv->rtsi_trig_direction_reg &= + ~NISTC_RTSI_TRIG_DIR_SUB_SEL1; + devpriv->rtsi_trig_direction_reg |= + (reg << NISTC_RTSI_TRIG_DIR_SUB_SEL1_SHIFT) & + NISTC_RTSI_TRIG_DIR_SUB_SEL1; + ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg, + NISTC_RTSI_TRIG_DIR_REG); + } else { + devpriv->rtsi_trig_b_output_reg &= ~NISTC_RTSI_TRIGB_SUB_SEL1; + devpriv->rtsi_trig_b_output_reg |= + (reg << NISTC_RTSI_TRIGB_SUB_SEL1_SHIFT) & + NISTC_RTSI_TRIGB_SUB_SEL1; + ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg, + NISTC_RTSI_TRIGB_OUT_REG); + } +} + +static int get_rgout0_reg(struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg; + + if (devpriv->is_m_series) + reg = (devpriv->rtsi_trig_direction_reg & + NISTC_RTSI_TRIG_DIR_SUB_SEL1) + >> NISTC_RTSI_TRIG_DIR_SUB_SEL1_SHIFT; + else + reg = (devpriv->rtsi_trig_b_output_reg & + NISTC_RTSI_TRIGB_SUB_SEL1) + >> NISTC_RTSI_TRIGB_SUB_SEL1_SHIFT; + return reg; +} + +static inline int get_rgout0_src(struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg = get_rgout0_reg(dev); + + return ni_find_route_source(reg, NI_RGOUT0, &devpriv->routing_tables); +} + +/* + * Route signals through RGOUT0 terminal and increment the RGOUT0 use for this + * particular route. + * @src: device-global signal name + * @dev: comedi device handle + * + * Return: -EINVAL if the source is not valid to route to RGOUT0; + * -EBUSY if the RGOUT0 is already used; + * 0 if successful. + */ +static int incr_rgout0_src_use(int src, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_lookup_route_register(CR_CHAN(src), NI_RGOUT0, + &devpriv->routing_tables); + + if (reg < 0) + return -EINVAL; + + if (devpriv->rgout0_usage > 0 && get_rgout0_reg(dev) != reg) + return -EBUSY; + + ++devpriv->rgout0_usage; + set_rgout0_reg(reg, dev); + return 0; +} + +/* + * Unroute signals through RGOUT0 terminal and deccrement the RGOUT0 use for + * this particular source. This function does not actually unroute anything + * with respect to RGOUT0. It does, on the other hand, decrement the usage + * counter for the current src->RGOUT0 mapping. + * + * Return: -EINVAL if the source is not already routed to RGOUT0 (or usage is + * already at zero); 0 if successful. + */ +static int decr_rgout0_src_use(int src, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_lookup_route_register(CR_CHAN(src), NI_RGOUT0, + &devpriv->routing_tables); + + if (devpriv->rgout0_usage > 0 && get_rgout0_reg(dev) == reg) { + --devpriv->rgout0_usage; + if (!devpriv->rgout0_usage) + set_rgout0_reg(0, dev); /* ok default? */ + return 0; + } + return -EINVAL; +} + +/* + * Route signals through given NI_RTSI_BRD mux. + * @i: index of mux to route + * @reg: raw register value of RTSI_BRD bits + * @dev: comedi device handle + */ +static void set_ith_rtsi_brd_reg(int i, int reg, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg_i_sz = 3; /* value for e-series */ + int reg_i_mask; + int reg_i_shift; + + if (devpriv->is_m_series) + reg_i_sz = 4; + reg_i_mask = ~((~0) << reg_i_sz); + reg_i_shift = i * reg_i_sz; + + /* clear out the current reg_i for ith brd */ + devpriv->rtsi_shared_mux_reg &= ~(reg_i_mask << reg_i_shift); + /* (softcopy) write the new reg_i for ith brd */ + devpriv->rtsi_shared_mux_reg |= (reg & reg_i_mask) << reg_i_shift; + /* (hardcopy) write the new reg_i for ith brd */ + ni_stc_writew(dev, devpriv->rtsi_shared_mux_reg, NISTC_RTSI_BOARD_REG); +} + +static int get_ith_rtsi_brd_reg(int i, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg_i_sz = 3; /* value for e-series */ + int reg_i_mask; + int reg_i_shift; + + if (devpriv->is_m_series) + reg_i_sz = 4; + reg_i_mask = ~((~0) << reg_i_sz); + reg_i_shift = i * reg_i_sz; + + return (devpriv->rtsi_shared_mux_reg >> reg_i_shift) & reg_i_mask; +} + +static inline int get_rtsi_brd_src(int brd, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int brd_index = brd; + int reg; + + if (brd >= NI_RTSI_BRD(0)) + brd_index = brd - NI_RTSI_BRD(0); + else + brd = NI_RTSI_BRD(brd); + /* + * And now: + * brd : device-global name + * brd_index : index number of RTSI_BRD mux + */ + + reg = get_ith_rtsi_brd_reg(brd_index, dev); + + return ni_find_route_source(reg, brd, &devpriv->routing_tables); +} + +/* + * Route signals through NI_RTSI_BRD mux and increment the use counter for this + * particular route. + * + * Return: -EINVAL if the source is not valid to route to NI_RTSI_BRD(i); + * -EBUSY if all NI_RTSI_BRD muxes are already used; + * NI_RTSI_BRD(i) of allocated ith mux if successful. + */ +static int incr_rtsi_brd_src_use(int src, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int first_available = -1; + int err = -EINVAL; + s8 reg; + int i; + + /* first look for a mux that is already configured to provide src */ + for (i = 0; i < NUM_RTSI_SHARED_MUXS; ++i) { + reg = ni_lookup_route_register(CR_CHAN(src), NI_RTSI_BRD(i), + &devpriv->routing_tables); + + if (reg < 0) + continue; /* invalid route */ + + if (!devpriv->rtsi_shared_mux_usage[i]) { + if (first_available < 0) + /* found the first unused, but usable mux */ + first_available = i; + } else { + /* + * we've seen at least one possible route, so change the + * final error to -EBUSY in case there are no muxes + * available. + */ + err = -EBUSY; + + if (get_ith_rtsi_brd_reg(i, dev) == reg) { + /* + * we've found a mux that is already being used + * to provide the requested signal. Reuse it. + */ + goto success; + } + } + } + + if (first_available < 0) + return err; + + /* we did not find a mux to reuse, but there is at least one usable */ + i = first_available; + +success: + ++devpriv->rtsi_shared_mux_usage[i]; + set_ith_rtsi_brd_reg(i, reg, dev); + return NI_RTSI_BRD(i); +} + +/* + * Unroute signals through NI_RTSI_BRD mux and decrement the user counter for + * this particular route. + * + * Return: -EINVAL if the source is not already routed to rtsi_brd(i) (or usage + * is already at zero); 0 if successful. + */ +static int decr_rtsi_brd_src_use(int src, int rtsi_brd, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_lookup_route_register(CR_CHAN(src), rtsi_brd, + &devpriv->routing_tables); + const int i = rtsi_brd - NI_RTSI_BRD(0); + + if (devpriv->rtsi_shared_mux_usage[i] > 0 && + get_ith_rtsi_brd_reg(i, dev) == reg) { + --devpriv->rtsi_shared_mux_usage[i]; + if (!devpriv->rtsi_shared_mux_usage[i]) + set_ith_rtsi_brd_reg(i, 0, dev); /* ok default? */ + return 0; + } + + return -EINVAL; +} + static void ni_rtsi_init(struct comedi_device *dev) { struct ni_private *devpriv = dev->private; + int i; /* Initialises the RTSI bus signal switch to a default state */ @@ -5117,28 +5505,328 @@ static void ni_rtsi_init(struct comedi_device *dev) /* Set clock mode to internal */ if (ni_set_master_clock(dev, NI_MIO_INTERNAL_CLOCK, 0) < 0) dev_err(dev->class_dev, "ni_set_master_clock failed, bug?\n"); - /* default internal lines routing to RTSI bus lines */ - devpriv->rtsi_trig_a_output_reg = - NISTC_RTSI_TRIG(0, NI_RTSI_OUTPUT_ADR_START1) | - NISTC_RTSI_TRIG(1, NI_RTSI_OUTPUT_ADR_START2) | - NISTC_RTSI_TRIG(2, NI_RTSI_OUTPUT_SCLKG) | - NISTC_RTSI_TRIG(3, NI_RTSI_OUTPUT_DACUPDN); - ni_stc_writew(dev, devpriv->rtsi_trig_a_output_reg, - NISTC_RTSI_TRIGA_OUT_REG); - devpriv->rtsi_trig_b_output_reg = - NISTC_RTSI_TRIG(4, NI_RTSI_OUTPUT_DA_START1) | - NISTC_RTSI_TRIG(5, NI_RTSI_OUTPUT_G_SRC0) | - NISTC_RTSI_TRIG(6, NI_RTSI_OUTPUT_G_GATE0); - if (devpriv->is_m_series) - devpriv->rtsi_trig_b_output_reg |= - NISTC_RTSI_TRIG(7, NI_RTSI_OUTPUT_RTSI_OSC); - ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg, - NISTC_RTSI_TRIGB_OUT_REG); + /* default internal lines routing to RTSI bus lines */ + for (i = 0; i < 8; ++i) { + ni_set_rtsi_direction(dev, i, COMEDI_INPUT); + ni_set_rtsi_routing(dev, i, default_rtsi_routing[i]); + } + + /* + * Sets the source and direction of the 4 on board lines. + * This configures all board lines to be: + * for e-series: + * 1) inputs (not sure what "output" would mean) + * 2) copying TRIGGER_LINE(0) (or RTSI0) output + * for m-series: + * copying NI_PFI(0) output + */ + devpriv->rtsi_shared_mux_reg = 0; + for (i = 0; i < 4; ++i) + set_ith_rtsi_brd_reg(i, 0, dev); + memset(devpriv->rtsi_shared_mux_usage, 0, + sizeof(devpriv->rtsi_shared_mux_usage)); + + /* initialize rgout0 pin as unused. */ + devpriv->rgout0_usage = 0; + set_rgout0_reg(0, dev); +} + +/* Get route of GPFO_i/CtrOut pins */ +static inline int ni_get_gout_routing(unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + unsigned int reg = devpriv->an_trig_etc_reg; + + switch (dest) { + case 0: + if (reg & NISTC_ATRIG_ETC_GPFO_0_ENA) + return NISTC_ATRIG_ETC_GPFO_0_SEL_TO_SRC(reg); + break; + case 1: + if (reg & NISTC_ATRIG_ETC_GPFO_1_ENA) + return NISTC_ATRIG_ETC_GPFO_1_SEL_TO_SRC(reg); + break; + } + + return -EINVAL; +} + +/* Set route of GPFO_i/CtrOut pins */ +static inline int ni_disable_gout_routing(unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + + switch (dest) { + case 0: + devpriv->an_trig_etc_reg &= ~NISTC_ATRIG_ETC_GPFO_0_ENA; + break; + case 1: + devpriv->an_trig_etc_reg &= ~NISTC_ATRIG_ETC_GPFO_1_ENA; + break; + default: + return -EINVAL; + } + + ni_stc_writew(dev, devpriv->an_trig_etc_reg, NISTC_ATRIG_ETC_REG); + return 0; +} + +/* Set route of GPFO_i/CtrOut pins */ +static inline int ni_set_gout_routing(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + + switch (dest) { + case 0: + /* clear reg */ + devpriv->an_trig_etc_reg &= ~NISTC_ATRIG_ETC_GPFO_0_SEL(-1); + /* set reg */ + devpriv->an_trig_etc_reg |= NISTC_ATRIG_ETC_GPFO_0_ENA + | NISTC_ATRIG_ETC_GPFO_0_SEL(src); + break; + case 1: + /* clear reg */ + devpriv->an_trig_etc_reg &= ~NISTC_ATRIG_ETC_GPFO_1_SEL; + src = src ? NISTC_ATRIG_ETC_GPFO_1_SEL : 0; + /* set reg */ + devpriv->an_trig_etc_reg |= NISTC_ATRIG_ETC_GPFO_1_ENA | src; + break; + default: + return -EINVAL; + } + + ni_stc_writew(dev, devpriv->an_trig_etc_reg, NISTC_ATRIG_ETC_REG); + return 0; +} + +/* + * Retrieves the current source of the output selector for the given + * destination. If the terminal for the destination is not already configured + * as an output, this function returns -EINVAL as error. + * + * Return: the register value of the destination output selector; + * -EINVAL if terminal is not configured for output. + */ +static int get_output_select_source(int dest, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg = -1; + + if (channel_is_pfi(dest)) { + if (ni_get_pfi_direction(dev, dest) == COMEDI_OUTPUT) + reg = ni_get_pfi_routing(dev, dest); + } else if (channel_is_rtsi(dest)) { + if (ni_get_rtsi_direction(dev, dest) == COMEDI_OUTPUT) { + reg = ni_get_rtsi_routing(dev, dest); + + if (reg == NI_RTSI_OUTPUT_RGOUT0) { + dest = NI_RGOUT0; /* prepare for lookup below */ + reg = get_rgout0_reg(dev); + } else if (reg >= NI_RTSI_OUTPUT_RTSI_BRD(0) && + reg <= NI_RTSI_OUTPUT_RTSI_BRD(3)) { + const int i = reg - NI_RTSI_OUTPUT_RTSI_BRD(0); + + dest = NI_RTSI_BRD(i); /* prepare for lookup */ + reg = get_ith_rtsi_brd_reg(i, dev); + } + } + } else if (dest >= NI_CtrOut(0) && dest <= NI_CtrOut(-1)) { + /* + * not handled by ni_tio. Only available for GPFO registers in + * e/m series. + */ + dest -= NI_CtrOut(0); + if (dest > 1) + /* there are only two g_out outputs. */ + return -EINVAL; + reg = ni_get_gout_routing(dest, dev); + } else if (channel_is_ctr(dest)) { + reg = ni_tio_get_routing(devpriv->counter_dev, dest); + } else { + dev_dbg(dev->class_dev, "%s: unhandled destination (%d) queried\n", + __func__, dest); + } + + if (reg >= 0) + return ni_find_route_source(CR_CHAN(reg), dest, + &devpriv->routing_tables); + return -EINVAL; +} + +/* + * Test a route: + * + * Return: -1 if not connectible; + * 0 if connectible and not connected; + * 1 if connectible and connected. + */ +static int test_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + + if (reg < 0) + return -1; + if (get_output_select_source(dest, dev) != CR_CHAN(src)) + return 0; + return 1; +} + +/* Connect the actual route. */ +static int connect_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + s8 current_src; + + if (reg < 0) + /* route is not valid */ + return -EINVAL; + + current_src = get_output_select_source(dest, dev); + if (current_src == CR_CHAN(src)) + return -EALREADY; + if (current_src >= 0) + /* destination mux is already busy. complain, don't overwrite */ + return -EBUSY; + + /* The route is valid and available. Now connect... */ + if (channel_is_pfi(dest)) { + /* set routing source, then open output */ + ni_set_pfi_routing(dev, dest, reg); + ni_set_pfi_direction(dev, dest, COMEDI_OUTPUT); + } else if (channel_is_rtsi(dest)) { + if (reg == NI_RTSI_OUTPUT_RGOUT0) { + int ret = incr_rgout0_src_use(src, dev); + + if (ret < 0) + return ret; + } else if (ni_rtsi_route_requires_mux(reg)) { + /* Attempt to allocate and route (src->brd) */ + int brd = incr_rtsi_brd_src_use(src, dev); + + if (brd < 0) + return brd; + + /* Now lookup the register value for (brd->dest) */ + reg = ni_lookup_route_register( + brd, dest, &devpriv->routing_tables); + } + + ni_set_rtsi_direction(dev, dest, COMEDI_OUTPUT); + ni_set_rtsi_routing(dev, dest, reg); + } else if (dest >= NI_CtrOut(0) && dest <= NI_CtrOut(-1)) { + /* + * not handled by ni_tio. Only available for GPFO registers in + * e/m series. + */ + dest -= NI_CtrOut(0); + if (dest > 1) + /* there are only two g_out outputs. */ + return -EINVAL; + if (ni_set_gout_routing(src, dest, dev)) + return -EINVAL; + } else if (channel_is_ctr(dest)) { + /* + * we are adding back the channel modifier info to set + * invert/edge info passed by the user + */ + ni_tio_set_routing(devpriv->counter_dev, dest, + reg | (src & ~CR_CHAN(-1))); + } else { + return -EINVAL; + } + return 0; +} + +static int disconnect_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + + if (reg < 0) + /* route is not valid */ + return -EINVAL; + if (get_output_select_source(dest, dev) != src) + /* cannot disconnect something not connected */ + return -EINVAL; + + /* The route is valid and is connected. Now disconnect... */ + if (channel_is_pfi(dest)) { + /* set the pfi to high impedance, and disconnect */ + ni_set_pfi_direction(dev, dest, COMEDI_INPUT); + ni_set_pfi_routing(dev, dest, NI_PFI_OUTPUT_PFI_DEFAULT); + } else if (channel_is_rtsi(dest)) { + if (reg == NI_RTSI_OUTPUT_RGOUT0) { + int ret = decr_rgout0_src_use(src, dev); + + if (ret < 0) + return ret; + } else if (ni_rtsi_route_requires_mux(reg)) { + /* find which RTSI_BRD line is source for rtsi pin */ + int brd = ni_find_route_source( + ni_get_rtsi_routing(dev, dest), dest, + &devpriv->routing_tables); + + if (brd < 0) + return brd; + + /* decrement/disconnect RTSI_BRD line from source */ + decr_rtsi_brd_src_use(src, brd, dev); + } + + /* set rtsi output selector to default state */ + reg = default_rtsi_routing[dest - TRIGGER_LINE(0)]; + ni_set_rtsi_direction(dev, dest, COMEDI_INPUT); + ni_set_rtsi_routing(dev, dest, reg); + } else if (dest >= NI_CtrOut(0) && dest <= NI_CtrOut(-1)) { + /* + * not handled by ni_tio. Only available for GPFO registers in + * e/m series. + */ + dest -= NI_CtrOut(0); + if (dest > 1) + /* there are only two g_out outputs. */ + return -EINVAL; + reg = ni_disable_gout_routing(dest, dev); + } else if (channel_is_ctr(dest)) { + ni_tio_unset_routing(devpriv->counter_dev, dest); + } else { + return -EINVAL; + } + return 0; +} + +static int ni_global_insn_config(struct comedi_device *dev, + struct comedi_insn *insn, + unsigned int *data) +{ + switch (data[0]) { + case INSN_DEVICE_CONFIG_TEST_ROUTE: + data[0] = test_route(data[1], data[2], dev); + return 2; + case INSN_DEVICE_CONFIG_CONNECT_ROUTE: + return connect_route(data[1], data[2], dev); + case INSN_DEVICE_CONFIG_DISCONNECT_ROUTE: + return disconnect_route(data[1], data[2], dev); /* - * Sets the source and direction of the 4 on board lines - * ni_stc_writew(dev, 0, NISTC_RTSI_BOARD_REG); + * This case is already handled one level up. + * case INSN_DEVICE_CONFIG_GET_ROUTES: */ + default: + return -EINVAL; + } + return 1; } #ifdef PCIDMA @@ -5244,6 +5932,16 @@ static int ni_alloc_private(struct comedi_device *dev) return 0; } +static unsigned int _ni_get_valid_routes(struct comedi_device *dev, + unsigned int n_pairs, + unsigned int *pair_data) +{ + struct ni_private *devpriv = dev->private; + + return ni_get_valid_routes(&devpriv->routing_tables, n_pairs, + pair_data); +} + static int ni_E_init(struct comedi_device *dev, unsigned int interrupt_pin, unsigned int irq_polarity) { @@ -5252,6 +5950,24 @@ static int ni_E_init(struct comedi_device *dev, struct comedi_subdevice *s; int ret; int i; + const char *dev_family = devpriv->is_m_series ? "ni_mseries" + : "ni_eseries"; + + /* prepare the device for globally-named routes. */ + if (ni_assign_device_routes(dev_family, board->name, + &devpriv->routing_tables) < 0) { + dev_warn(dev->class_dev, "%s: %s device has no signal routing table.\n", + __func__, board->name); + dev_warn(dev->class_dev, "%s: High level NI signal names will not be available for this %s board.\n", + __func__, board->name); + } else { + /* + * only(?) assign insn_device_config if we have global names for + * this device. + */ + dev->insn_device_config = ni_global_insn_config; + dev->get_valid_routes = _ni_get_valid_routes; + } if (board->n_aochan > MAX_N_AO_CHAN) { dev_err(dev->class_dev, "bug! n_aochan > MAX_N_AO_CHAN\n"); @@ -5508,7 +6224,9 @@ static int ni_E_init(struct comedi_device *dev, (devpriv->is_m_series) ? ni_gpct_variant_m_series : ni_gpct_variant_e_series, - NUM_GPCT); + NUM_GPCT, + NUM_GPCT, + &devpriv->routing_tables); if (!devpriv->counter_dev) return -ENOMEM; @@ -5517,8 +6235,6 @@ static int ni_E_init(struct comedi_device *dev, struct ni_gpct *gpct = &devpriv->counter_dev->counters[i]; /* setup and initialize the counter */ - gpct->chip_index = 0; - gpct->counter_index = i; ni_tio_init_counter(gpct); s = &dev->subdevices[NI_GPCT_SUBDEV(i)]; @@ -5544,6 +6260,10 @@ static int ni_E_init(struct comedi_device *dev, s->private = gpct; } + /* Initialize GPFO_{0,1} to produce output of counters */ + ni_set_gout_routing(0, 0, dev); /* output of counter 0; DAQ STC, p338 */ + ni_set_gout_routing(0, 1, dev); /* output of counter 1; DAQ STC, p338 */ + /* Frequency output subdevice */ s = &dev->subdevices[NI_FREQ_OUT_SUBDEV]; s->type = COMEDI_SUBD_COUNTER; diff --git a/drivers/staging/comedi/drivers/ni_pcidio.c b/drivers/staging/comedi/drivers/ni_pcidio.c index 6692af5ff79b..b9a0dc6eac44 100644 --- a/drivers/staging/comedi/drivers/ni_pcidio.c +++ b/drivers/staging/comedi/drivers/ni_pcidio.c @@ -260,18 +260,22 @@ enum nidio_boardid { struct nidio_board { const char *name; unsigned int uses_firmware:1; + unsigned int dio_speed; }; static const struct nidio_board nidio_boards[] = { [BOARD_PCIDIO_32HS] = { .name = "pci-dio-32hs", + .dio_speed = 50, }, [BOARD_PXI6533] = { .name = "pxi-6533", + .dio_speed = 50, }, [BOARD_PCI6534] = { .name = "pci-6534", .uses_firmware = 1, + .dio_speed = 50, }, }; @@ -467,6 +471,15 @@ static int ni_pcidio_insn_config(struct comedi_device *dev, { int ret; + if (data[0] == INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS) { + const struct nidio_board *board = dev->board_ptr; + + /* we don't care about actual channels */ + data[1] = board->dio_speed; + data[2] = 0; + return 0; + } + ret = comedi_dio_insn_config(dev, s, insn, data, 0); if (ret) return ret; diff --git a/drivers/staging/comedi/drivers/ni_pcimio.c b/drivers/staging/comedi/drivers/ni_pcimio.c index f9e466d18b3f..14b26fffe049 100644 --- a/drivers/staging/comedi/drivers/ni_pcimio.c +++ b/drivers/staging/comedi/drivers/ni_pcimio.c @@ -693,6 +693,7 @@ static const struct ni_board_struct ni_boards[] = { .ai_speed = 4000, .reg_type = ni_reg_622x, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6221] = { .name = "pci-6221", @@ -708,6 +709,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_622x, .ao_speed = 1200, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6221_37PIN] = { .name = "pci-6221_37pin", @@ -738,6 +740,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_622x, .ao_speed = 1200, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6224] = { .name = "pci-6224", @@ -749,6 +752,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_622x, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PXI6224] = { .name = "pxi-6224", @@ -760,6 +764,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_622x, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6225] = { .name = "pci-6225", @@ -776,6 +781,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 1200, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PXI6225] = { .name = "pxi-6225", @@ -792,6 +798,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 1200, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6229] = { .name = "pci-6229", @@ -824,6 +831,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 1200, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6250] = { .name = "pci-6250", @@ -844,6 +852,7 @@ static const struct ni_board_struct ni_boards[] = { .ai_speed = 800, .reg_type = ni_reg_625x, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6251] = { .name = "pci-6251", @@ -859,6 +868,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PXI6251] = { .name = "pxi-6251", @@ -874,6 +884,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCIE6251] = { .name = "pcie-6251", @@ -889,6 +900,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PXIE6251] = { .name = "pxie-6251", @@ -904,6 +916,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6254] = { .name = "pci-6254", @@ -926,6 +939,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6259] = { .name = "pci-6259", @@ -958,6 +972,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 350, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCIE6259] = { .name = "pcie-6259", @@ -990,6 +1005,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 350, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6280] = { .name = "pci-6280", @@ -1012,6 +1028,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_fifo_depth = 8191, .reg_type = ni_reg_628x, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6281] = { .name = "pci-6281", @@ -1027,6 +1044,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_628x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PXI6281] = { .name = "pxi-6281", @@ -1042,6 +1060,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_628x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6284] = { .name = "pci-6284", @@ -1064,6 +1083,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_628x, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6289] = { .name = "pci-6289", @@ -1096,6 +1116,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 350, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6143] = { .name = "pci-6143", diff --git a/drivers/staging/comedi/drivers/ni_routes.c b/drivers/staging/comedi/drivers/ni_routes.c new file mode 100644 index 000000000000..eb61494dc2bd --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routes.c @@ -0,0 +1,523 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routes.c + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/module.h> +#include <linux/slab.h> +#include <linux/bsearch.h> +#include <linux/sort.h> + +#include "../comedi.h" + +#include "ni_routes.h" +#include "ni_routing/ni_route_values.h" +#include "ni_routing/ni_device_routes.h" + +/* + * This is defined in ni_routing/ni_route_values.h: + * #define B(x) ((x) - NI_NAMES_BASE) + */ + +/* + * These are defined in ni_routing/ni_route_values.h to identify clearly + * elements of the table that were set. In other words, entries that are zero + * are invalid. To get the value to use for the register, one must mask out the + * high bit. + * + * #define V(x) ((x) | 0x80) + * + * #define UNMARK(x) ((x) & (~(0x80))) + * + */ + +/* Helper for accessing data. */ +#define RVi(table, src, dest) ((table)[(dest) * NI_NUM_NAMES + (src)]) + +static const size_t route_table_size = NI_NUM_NAMES * NI_NUM_NAMES; + +/* + * Find the proper route_values and ni_device_routes tables for this particular + * device. + * + * Return: -ENODATA if either was not found; 0 if both were found. + */ +static int ni_find_device_routes(const char *device_family, + const char *board_name, + struct ni_route_tables *tables) +{ + const struct ni_device_routes *dr = NULL; + const u8 *rv = NULL; + int i; + + /* First, find the register_values table for this device family */ + for (i = 0; ni_all_route_values[i]; ++i) { + if (memcmp(ni_all_route_values[i]->family, device_family, + strnlen(device_family, 30)) == 0) { + rv = &ni_all_route_values[i]->register_values[0][0]; + break; + } + } + + if (!rv) + return -ENODATA; + + /* Second, find the set of routes valid for this device. */ + for (i = 0; ni_device_routes_list[i]; ++i) { + if (memcmp(ni_device_routes_list[i]->device, board_name, + strnlen(board_name, 30)) == 0) { + dr = ni_device_routes_list[i]; + break; + } + } + + if (!dr) + return -ENODATA; + + tables->route_values = rv; + tables->valid_routes = dr; + + return 0; +} + +/** + * ni_assign_device_routes() - Assign the proper lookup table for NI signal + * routing to the specified NI device. + * + * Return: -ENODATA if assignment was not successful; 0 if successful. + */ +int ni_assign_device_routes(const char *device_family, + const char *board_name, + struct ni_route_tables *tables) +{ + memset(tables, 0, sizeof(struct ni_route_tables)); + return ni_find_device_routes(device_family, board_name, tables); +} +EXPORT_SYMBOL_GPL(ni_assign_device_routes); + +/** + * ni_count_valid_routes() - Count the number of valid routes. + * @tables: Routing tables for which to count all valid routes. + */ +unsigned int ni_count_valid_routes(const struct ni_route_tables *tables) +{ + int total = 0; + int i; + + for (i = 0; i < tables->valid_routes->n_route_sets; ++i) { + const struct ni_route_set *R = &tables->valid_routes->routes[i]; + int j; + + for (j = 0; j < R->n_src; ++j) { + const int src = R->src[j]; + const int dest = R->dest; + const u8 *rv = tables->route_values; + + if (RVi(rv, B(src), B(dest))) + /* direct routing is valid */ + ++total; + else if (channel_is_rtsi(dest) && + (RVi(rv, B(src), B(NI_RGOUT0)) || + RVi(rv, B(src), B(NI_RTSI_BRD(0))) || + RVi(rv, B(src), B(NI_RTSI_BRD(1))) || + RVi(rv, B(src), B(NI_RTSI_BRD(2))) || + RVi(rv, B(src), B(NI_RTSI_BRD(3))))) { + ++total; + } + } + } + return total; +} +EXPORT_SYMBOL_GPL(ni_count_valid_routes); + +/** + * ni_get_valid_routes() - Implements INSN_DEVICE_CONFIG_GET_ROUTES. + * @tables: pointer to relevant set of routing tables. + * @n_pairs: Number of pairs for which memory is allocated by the user. If + * the user specifies '0', only the number of available pairs is + * returned. + * @pair_data: Pointer to memory allocated to return pairs back to user. Each + * even, odd indexed member of this array will hold source, + * destination of a route pair respectively. + * + * Return: the number of valid routes if n_pairs == 0; otherwise, the number of + * valid routes copied. + */ +unsigned int ni_get_valid_routes(const struct ni_route_tables *tables, + unsigned int n_pairs, + unsigned int *pair_data) +{ + unsigned int n_valid = ni_count_valid_routes(tables); + int i; + + if (n_pairs == 0 || n_valid == 0) + return n_valid; + + if (!pair_data) + return 0; + + n_valid = 0; + + for (i = 0; i < tables->valid_routes->n_route_sets; ++i) { + const struct ni_route_set *R = &tables->valid_routes->routes[i]; + int j; + + for (j = 0; j < R->n_src; ++j) { + const int src = R->src[j]; + const int dest = R->dest; + bool valid = false; + const u8 *rv = tables->route_values; + + if (RVi(rv, B(src), B(dest))) + /* direct routing is valid */ + valid = true; + else if (channel_is_rtsi(dest) && + (RVi(rv, B(src), B(NI_RGOUT0)) || + RVi(rv, B(src), B(NI_RTSI_BRD(0))) || + RVi(rv, B(src), B(NI_RTSI_BRD(1))) || + RVi(rv, B(src), B(NI_RTSI_BRD(2))) || + RVi(rv, B(src), B(NI_RTSI_BRD(3))))) { + /* indirect routing also valid */ + valid = true; + } + + if (valid) { + pair_data[2 * n_valid] = src; + pair_data[2 * n_valid + 1] = dest; + ++n_valid; + } + + if (n_valid >= n_pairs) + return n_valid; + } + } + return n_valid; +} +EXPORT_SYMBOL_GPL(ni_get_valid_routes); + +/** + * List of NI global signal names that, as destinations, are only routeable + * indirectly through the *_arg elements of the comedi_cmd structure. + */ +static const int NI_CMD_DESTS[] = { + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, +}; + +/** + * ni_is_cmd_dest() - Determine whether the given destination is only + * configurable via a comedi_cmd struct. + * @dest: Destination to test. + */ +bool ni_is_cmd_dest(int dest) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(NI_CMD_DESTS); ++i) + if (NI_CMD_DESTS[i] == dest) + return true; + return false; +} +EXPORT_SYMBOL_GPL(ni_is_cmd_dest); + +/* **** BEGIN Routes sort routines **** */ +static int _ni_sort_destcmp(const void *va, const void *vb) +{ + const struct ni_route_set *a = va; + const struct ni_route_set *b = vb; + + if (a->dest < b->dest) + return -1; + else if (a->dest > b->dest) + return 1; + return 0; +} + +static int _ni_sort_srccmp(const void *vsrc0, const void *vsrc1) +{ + const int *src0 = vsrc0; + const int *src1 = vsrc1; + + if (*src0 < *src1) + return -1; + else if (*src0 > *src1) + return 1; + return 0; +} + +/** + * ni_sort_device_routes() - Sort the list of valid device signal routes in + * preparation for use. + * @valid_routes: pointer to ni_device_routes struct to sort. + */ +void ni_sort_device_routes(struct ni_device_routes *valid_routes) +{ + unsigned int n; + + /* 1. Count and set the number of ni_route_set objects. */ + valid_routes->n_route_sets = 0; + while (valid_routes->routes[valid_routes->n_route_sets].dest != 0) + ++valid_routes->n_route_sets; + + /* 2. sort all ni_route_set objects by destination. */ + sort(valid_routes->routes, valid_routes->n_route_sets, + sizeof(struct ni_route_set), _ni_sort_destcmp, NULL); + + /* 3. Loop through each route_set for sorting. */ + for (n = 0; n < valid_routes->n_route_sets; ++n) { + struct ni_route_set *rs = &valid_routes->routes[n]; + + /* 3a. Count and set the number of sources. */ + rs->n_src = 0; + while (rs->src[rs->n_src]) + ++rs->n_src; + + /* 3a. Sort sources. */ + sort(valid_routes->routes[n].src, valid_routes->routes[n].n_src, + sizeof(int), _ni_sort_srccmp, NULL); + } +} +EXPORT_SYMBOL_GPL(ni_sort_device_routes); + +/* sort all valid device signal routes in prep for use */ +static void ni_sort_all_device_routes(void) +{ + unsigned int i; + + for (i = 0; ni_device_routes_list[i]; ++i) + ni_sort_device_routes(ni_device_routes_list[i]); +} + +/* **** BEGIN Routes search routines **** */ +static int _ni_bsearch_destcmp(const void *vkey, const void *velt) +{ + const int *key = vkey; + const struct ni_route_set *elt = velt; + + if (*key < elt->dest) + return -1; + else if (*key > elt->dest) + return 1; + return 0; +} + +static int _ni_bsearch_srccmp(const void *vkey, const void *velt) +{ + const int *key = vkey; + const int *elt = velt; + + if (*key < *elt) + return -1; + else if (*key > *elt) + return 1; + return 0; +} + +/** + * ni_find_route_set() - Finds the proper route set with the specified + * destination. + * @destination: Destination of which to search for the route set. + * @valid_routes: Pointer to device routes within which to search. + * + * Return: NULL if no route_set is found with the specified @destination; + * otherwise, a pointer to the route_set if found. + */ +const struct ni_route_set * +ni_find_route_set(const int destination, + const struct ni_device_routes *valid_routes) +{ + return bsearch(&destination, valid_routes->routes, + valid_routes->n_route_sets, sizeof(struct ni_route_set), + _ni_bsearch_destcmp); +} +EXPORT_SYMBOL_GPL(ni_find_route_set); + +/** + * ni_route_set_has_source() - Determines whether the given source is in + * included given route_set. + * + * Return: true if found; false otherwise. + */ +bool ni_route_set_has_source(const struct ni_route_set *routes, + const int source) +{ + if (!bsearch(&source, routes->src, routes->n_src, sizeof(int), + _ni_bsearch_srccmp)) + return false; + return true; +} +EXPORT_SYMBOL_GPL(ni_route_set_has_source); + +/** + * ni_lookup_route_register() - Look up a register value for a particular route + * without checking whether the route is valid for + * the particular device. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Return: -EINVAL if the specified route is not valid for this device family. + */ +s8 ni_lookup_route_register(int src, int dest, + const struct ni_route_tables *tables) +{ + s8 regval; + + /* + * Be sure to use the B() macro to subtract off the NI_NAMES_BASE before + * indexing into the route_values array. + */ + src = B(src); + dest = B(dest); + if (src < 0 || src >= NI_NUM_NAMES || dest < 0 || dest >= NI_NUM_NAMES) + return -EINVAL; + regval = RVi(tables->route_values, src, dest); + if (!regval) + return -EINVAL; + /* mask out the valid-value marking bit */ + return UNMARK(regval); +} +EXPORT_SYMBOL_GPL(ni_lookup_route_register); + +/** + * ni_route_to_register() - Validates and converts the specified signal route + * (src-->dest) to the value used at the appropriate + * register. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Generally speaking, most routes require the first six bits and a few require + * 7 bits. Special handling is given for the return value when the route is to + * be handled by the RTSI sub-device. In this case, the returned register may + * not be sufficient to define the entire route path, but rather may only + * indicate the intermediate route. For example, if the route must go through + * the RGOUT0 pin, the (src->RGOUT0) register value will be returned. + * Similarly, if the route must go through the NI_RTSI_BRD lines, the BIT(6) + * will be set: + * + * if route does not need RTSI_BRD lines: + * bits 0:7 : register value + * for a route that must go through RGOUT0 pin, this will be equal + * to the (src->RGOUT0) register value. + * else: * route is (src->RTSI_BRD(x), RTSI_BRD(x)->TRIGGER_LINE(i)) * + * bits 0:5 : zero + * bits 6 : set to 1 + * bits 7:7 : zero + * + * Return: register value to be used for source at destination with special + * cases given above; Otherwise, -1 if the specified route is not valid for + * this particular device. + */ +s8 ni_route_to_register(const int src, const int dest, + const struct ni_route_tables *tables) +{ + const struct ni_route_set *routes = + ni_find_route_set(dest, tables->valid_routes); + const u8 *rv; + s8 regval; + + /* first check to see if source is listed with bunch of destinations. */ + if (!routes) + return -1; + /* 2nd, check to see if destination is in list of source's targets. */ + if (!ni_route_set_has_source(routes, src)) + return -1; + /* + * finally, check to see if we know how to route... + * Be sure to use the B() macro to subtract off the NI_NAMES_BASE before + * indexing into the route_values array. + */ + rv = tables->route_values; + regval = RVi(rv, B(src), B(dest)); + + /* + * if we did not validate the route, we'll see if we can route through + * one of the muxes + */ + if (!regval && channel_is_rtsi(dest)) { + regval = RVi(rv, B(src), B(NI_RGOUT0)); + if (!regval && (RVi(rv, B(src), B(NI_RTSI_BRD(0))) || + RVi(rv, B(src), B(NI_RTSI_BRD(1))) || + RVi(rv, B(src), B(NI_RTSI_BRD(2))) || + RVi(rv, B(src), B(NI_RTSI_BRD(3))))) + regval = BIT(6); + } + + if (!regval) + return -1; + /* mask out the valid-value marking bit */ + return UNMARK(regval); +} +EXPORT_SYMBOL_GPL(ni_route_to_register); + +/** + * ni_find_route_source() - Finds the signal source corresponding to a signal + * route (src-->dest) of the specified routing register + * value and the specified route destination on the + * specified device. + * + * Note that this function does _not_ validate the source based on device + * routes. + * + * Return: The NI signal value (e.g. NI_PFI(0) or PXI_Clk10) if found. + * If the source was not found (i.e. the register value is not + * valid for any routes to the destination), -EINVAL is returned. + */ +int ni_find_route_source(const u8 src_sel_reg_value, int dest, + const struct ni_route_tables *tables) +{ + int src; + + dest = B(dest); /* subtract NI names offset */ + /* ensure we are not going to under/over run the route value table */ + if (dest < 0 || dest >= NI_NUM_NAMES) + return -EINVAL; + for (src = 0; src < NI_NUM_NAMES; ++src) + if (RVi(tables->route_values, src, dest) == + V(src_sel_reg_value)) + return src + NI_NAMES_BASE; + return -EINVAL; +} +EXPORT_SYMBOL_GPL(ni_find_route_source); + +/* **** END Routes search routines **** */ + +/* **** BEGIN simple module entry/exit functions **** */ +static int __init ni_routes_module_init(void) +{ + ni_sort_all_device_routes(); + return 0; +} + +static void __exit ni_routes_module_exit(void) +{ +} + +module_init(ni_routes_module_init); +module_exit(ni_routes_module_exit); + +MODULE_AUTHOR("Comedi http://www.comedi.org"); +MODULE_DESCRIPTION("Comedi helper for routing signals-->terminals for NI"); +MODULE_LICENSE("GPL"); +/* **** END simple module entry/exit functions **** */ diff --git a/drivers/staging/comedi/drivers/ni_routes.h b/drivers/staging/comedi/drivers/ni_routes.h new file mode 100644 index 000000000000..3211a16adc6f --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routes.h @@ -0,0 +1,329 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routes.h + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTES_H +#define _COMEDI_DRIVERS_NI_ROUTES_H + +#include <linux/types.h> +#include <linux/errno.h> + +#ifndef NI_ROUTE_VALUE_EXTERNAL_CONVERSION +#include <linux/bitops.h> +#endif + +#include "../comedi.h" + +/** + * struct ni_route_set - Set of destinations with a common source. + * @dest: Destination of all sources in this route set. + * @n_src: Number of sources for this route set. + * @src: List of sources that all map to the same destination. + */ +struct ni_route_set { + int dest; + int n_src; + int *src; +}; + +/** + * struct ni_device_routes - List of all src->dest sets for a particular device. + * @device: Name of board/device (e.g. pxi-6733). + * @n_route_sets: Number of route sets that are valid for this device. + * @routes: List of route sets that are valid for this device. + */ +struct ni_device_routes { + const char *device; + int n_route_sets; + struct ni_route_set *routes; +}; + +/** + * struct ni_route_tables - Register values and valid routes for a device. + * @valid_routes: Pointer to a all valid route sets for a single device. + * @route_values: Pointer to register values for all routes for the family to + * which the device belongs. + * + * Link to the valid src->dest routes and the register values used to assign + * such routes for that particular device. + */ +struct ni_route_tables { + const struct ni_device_routes *valid_routes; + const u8 *route_values; +}; + +/* + * ni_assign_device_routes() - Assign the proper lookup table for NI signal + * routing to the specified NI device. + * + * Return: -ENODATA if assignment was not successful; 0 if successful. + */ +int ni_assign_device_routes(const char *device_family, + const char *board_name, + struct ni_route_tables *tables); + +/* + * ni_find_route_set() - Finds the proper route set with the specified + * destination. + * @destination: Destination of which to search for the route set. + * @valid_routes: Pointer to device routes within which to search. + * + * Return: NULL if no route_set is found with the specified @destination; + * otherwise, a pointer to the route_set if found. + */ +const struct ni_route_set * +ni_find_route_set(const int destination, + const struct ni_device_routes *valid_routes); + +/* + * ni_route_set_has_source() - Determines whether the given source is in + * included given route_set. + * + * Return: true if found; false otherwise. + */ +bool ni_route_set_has_source(const struct ni_route_set *routes, const int src); + +/* + * ni_route_to_register() - Validates and converts the specified signal route + * (src-->dest) to the value used at the appropriate + * register. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Generally speaking, most routes require the first six bits and a few require + * 7 bits. Special handling is given for the return value when the route is to + * be handled by the RTSI sub-device. In this case, the returned register may + * not be sufficient to define the entire route path, but rather may only + * indicate the intermediate route. For example, if the route must go through + * the RGOUT0 pin, the (src->RGOUT0) register value will be returned. + * Similarly, if the route must go through the NI_RTSI_BRD lines, the BIT(6) + * will be set: + * + * if route does not need RTSI_BRD lines: + * bits 0:7 : register value + * for a route that must go through RGOUT0 pin, this will be equal + * to the (src->RGOUT0) register value. + * else: * route is (src->RTSI_BRD(x), RTSI_BRD(x)->TRIGGER_LINE(i)) * + * bits 0:5 : zero + * bits 6 : set to 1 + * bits 7:7 : zero + * + * Return: register value to be used for source at destination with special + * cases given above; Otherwise, -1 if the specified route is not valid for + * this particular device. + */ +s8 ni_route_to_register(const int src, const int dest, + const struct ni_route_tables *tables); + +static inline bool ni_rtsi_route_requires_mux(s8 value) +{ + return value & BIT(6); +} + +/* + * ni_lookup_route_register() - Look up a register value for a particular route + * without checking whether the route is valid for + * the particular device. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Return: -EINVAL if the specified route is not valid for this device family. + */ +s8 ni_lookup_route_register(int src, int dest, + const struct ni_route_tables *tables); + +/** + * route_is_valid() - Determines whether the specified signal route (src-->dest) + * is valid for the given NI comedi_device. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Return: True if the route is valid, otherwise false. + */ +static inline bool route_is_valid(const int src, const int dest, + const struct ni_route_tables *tables) +{ + return ni_route_to_register(src, dest, tables) >= 0; +} + +/* + * ni_is_cmd_dest() - Determine whether the given destination is only + * configurable via a comedi_cmd struct. + * @dest: Destination to test. + */ +bool ni_is_cmd_dest(int dest); + +static inline bool channel_is_pfi(int channel) +{ + return NI_PFI(0) <= channel && channel <= NI_PFI(-1); +} + +static inline bool channel_is_rtsi(int channel) +{ + return TRIGGER_LINE(0) <= channel && channel <= TRIGGER_LINE(-1); +} + +static inline bool channel_is_ctr(int channel) +{ + return channel >= NI_COUNTER_NAMES_BASE && + channel <= NI_COUNTER_NAMES_MAX; +} + +/* + * ni_count_valid_routes() - Count the number of valid routes. + * @tables: Routing tables for which to count all valid routes. + */ +unsigned int ni_count_valid_routes(const struct ni_route_tables *tables); + +/* + * ni_get_valid_routes() - Implements INSN_DEVICE_CONFIG_GET_ROUTES. + * @tables: pointer to relevant set of routing tables. + * @n_pairs: Number of pairs for which memory is allocated by the user. If + * the user specifies '0', only the number of available pairs is + * returned. + * @pair_data: Pointer to memory allocated to return pairs back to user. Each + * even, odd indexed member of this array will hold source, + * destination of a route pair respectively. + * + * Return: the number of valid routes if n_pairs == 0; otherwise, the number of + * valid routes copied. + */ +unsigned int ni_get_valid_routes(const struct ni_route_tables *tables, + unsigned int n_pairs, + unsigned int *pair_data); + +/* + * ni_sort_device_routes() - Sort the list of valid device signal routes in + * preparation for use. + * @valid_routes: pointer to ni_device_routes struct to sort. + */ +void ni_sort_device_routes(struct ni_device_routes *valid_routes); + +/* + * ni_find_route_source() - Finds the signal source corresponding to a signal + * route (src-->dest) of the specified routing register + * value and the specified route destination on the + * specified device. + * + * Note that this function does _not_ validate the source based on device + * routes. + * + * Return: The NI signal value (e.g. NI_PFI(0) or PXI_Clk10) if found. + * If the source was not found (i.e. the register value is not + * valid for any routes to the destination), -EINVAL is returned. + */ +int ni_find_route_source(const u8 src_sel_reg_value, const int dest, + const struct ni_route_tables *tables); + +/** + * route_register_is_valid() - Determines whether the register value for the + * specified route destination on the specified + * device is valid. + */ +static inline bool route_register_is_valid(const u8 src_sel_reg_value, + const int dest, + const struct ni_route_tables *tables) +{ + return ni_find_route_source(src_sel_reg_value, dest, tables) >= 0; +} + +/** + * ni_get_reg_value_roffs() - Determines the proper register value for a + * particular valid NI signal/terminal route. + * @src: Either a direct register value or one of NI_* signal names. + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * @direct_reg_offset: + * Compatibility compensation argument. This argument allows us to + * arbitrarily apply an offset to src if src is a direct register + * value reference. This is necessary to be compatible with + * definitions of register values as previously exported directly + * to user space. + * + * Return: the register value (>0) to be used at the destination if the src is + * valid for the given destination; -1 otherwise. + */ +static inline s8 ni_get_reg_value_roffs(int src, const int dest, + const struct ni_route_tables *tables, + const int direct_reg_offset) +{ + if (src < NI_NAMES_BASE) { + src += direct_reg_offset; + /* + * In this case, the src is expected to actually be a register + * value. + */ + if (route_register_is_valid(src, dest, tables)) + return src; + return -1; + } + + /* + * Otherwise, the src is expected to be one of the abstracted NI + * signal/terminal names. + */ + return ni_route_to_register(src, dest, tables); +} + +static inline int ni_get_reg_value(const int src, const int dest, + const struct ni_route_tables *tables) +{ + return ni_get_reg_value_roffs(src, dest, tables, 0); +} + +/** + * ni_check_trigger_arg_roffs() - Checks the trigger argument (*_arg) of an NI + * device to ensure that the *_arg value + * corresponds to _either_ a valid register value + * to define a trigger source, _or_ a valid NI + * signal/terminal name that has a valid route to + * the destination on the particular device. + * @src: Either a direct register value or one of NI_* signal names. + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * @direct_reg_offset: + * Compatibility compensation argument. This argument allows us to + * arbitrarily apply an offset to src if src is a direct register + * value reference. This is necessary to be compatible with + * definitions of register values as previously exported directly + * to user space. + * + * Return: 0 if the src (either register value or NI signal/terminal name) is + * valid for the destination; -EINVAL otherwise. + */ +static inline +int ni_check_trigger_arg_roffs(int src, const int dest, + const struct ni_route_tables *tables, + const int direct_reg_offset) +{ + if (ni_get_reg_value_roffs(src, dest, tables, direct_reg_offset) < 0) + return -EINVAL; + return 0; +} + +static inline int ni_check_trigger_arg(const int src, const int dest, + const struct ni_route_tables *tables) +{ + return ni_check_trigger_arg_roffs(src, dest, tables, 0); +} + +#endif /* _COMEDI_DRIVERS_NI_ROUTES_H */ diff --git a/drivers/staging/comedi/drivers/ni_routing/README b/drivers/staging/comedi/drivers/ni_routing/README new file mode 100644 index 000000000000..b65c4ebedbc4 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/README @@ -0,0 +1,240 @@ +Framework for Maintaining Common National Instruments Terminal/Signal names + +The contents of this directory are primarily for maintaining and formatting all +known valid signal routes for various National Instruments devices. + +Some background: + There have been significant confusions over the past many years for users + when trying to understand how to connect to/from signals and terminals on + NI hardware using comedi. The major reason for this is that the actual + register values were exposed and required to be used by users. Several + major reasons exist why this caused major confusion for users: + + 1) The register values are _NOT_ in user documentation, but rather in + arcane locations, such as a few register programming manuals that are + increasingly hard to find and the NI-MHDDK (comments in in example code). + There is no one place to find the various valid values of the registers. + + 2) The register values are _NOT_ completely consistent. There is no way to + gain any sense of intuition of which values, or even enums one should use + for various registers. There was some attempt in prior use of comedi to + name enums such that a user might know which enums should be used for + varying purposes, but the end-user had to gain a knowledge of register + values to correctly wield this approach. + + 3) The names for signals and registers found in the various register level + programming manuals and vendor-provided documentation are _not_ even + close to the same names that are in the end-user documentation. + + 4) The sets of routes that are valid are not consistent from device to device. + One additional major challenge is that this information does not seem to be + obtainable in any programmatic fashion, neither through the proprietary + NIDAQmx(-base) c-libraries, nor with register level programming, _nor_ + through any documentation. In fact, the only consistent source of this + information is through the proprietary NI-MAX software, which currently only + runs on Windows platforms. A further challenge is that this information + cannot be exported from NI-MAX, except by screenshot. + + + +The content of this directory is part of an effort to greatly simplify the use +of signal routing capabilities of National Instruments data-acquisition and +control hardware. In order to facilitate the transfer of register-level +information _and_ the knowledge of valid routes per device, a few specific +choices were made: + + +1) The names of the National Instruments signals/terminals that are used in this + directory are chosen to be consistent with (a) the NI's user level + documentation, (b) NI's user-level code, (c) the information as provided by + the proprietary NI-MAX software, and (d) the user interface code provided by + the user-land comedilib library. + + The impact of this choice implies that one allows the use of CamelScript names + in the kernel. In short, the choice to use CamelScript and the exact names + below is for maintainability, clarity, similarity to manufacturer's + documentation, _and_ a mitigation for confusion that has plagued the use of + these drivers for years! + +2) The bulk of the real content for this directory is stored in two separate + collections (i.e. sub-directories) of tables stored in c source files: + + (a) ni_route_values/ni_[series-label]series.c + + This data represents all the various register values to use for the + multiple different signal MUXes for the specific device families. + + The values are all wrapped in one of three macros to help document and + track which values have been implemented and tested. + These macros are: + V(<value>) : register value is valid, tested, and implemented + I(<value>) : register value is implemented but needs testing + U(<value>) : register value is not implemented + + The actual function of these macros will depend on whether the code is + compiled in the kernel or whether it is compiled into the conversion + tools. For the conversion tools, it can be used to indicate the status + of the register value. For the kernel, V() and I() both perform the + same function and prepare data to be used; U() zeroes out the value to + ensure that it cannot be used. + + *** It would be a great help for users to test these values such that + these files can be correctly marked/documented *** + + (b) ni_device_routes/[board-name].c + + This data represents the known set of valid signal routes that are + possible for each specific board. Although the family defines the + register values to use for a particular signal MUX, not all possible + signals are actually available on each board. + + In order for a particular board to take advantage of the effort to + simplify/clarify signal routing on NI devices, a corresponding + [board-name].c file must be created. This file should reflect the known + valid _direct_ routing capabilities of the board. + + As noted above, the only known consistent source of information for + valid device routes comes from the proprietary National Instruments + Windows software, NI-MAX. Also, as noted above, this information can + only be visually conveyed from NI-MAX to other media. To make this + easier, the naming conventions used in the [board-name].c file are + similar to the naming conventions as presented by NI-MAX. + + +3) Two other files aggregate the above data to integrate it into comedi: + ni_route_values.c + ni_device_routes.c + + When adding a new [board-name].c file, be sure to also add in the line in + ni_device_routes.c to include this information into comedi. + + +4) Several tools have been included to convert from/to the c file formats. + These tools are best used/demonstrated via the included Makefile targets: + (a) `make csv-files` + Creates new csv-files using content of c-files of existing + ni_routing/* content. New csv files are placed in csv + sub-directory. + + As noted above, the only consistent source of information of valid + device routes comes from the proprietary National Instruments Windows + software, NI-MAX. Also, as noted above, this information can only be + visually conveyed from NI-MAX to other media. This make target creates + spreadsheet representations of the routing data. The choice of using a + spreadsheet (ala CSV) to copy this information allows for easy direct + visual comparison to the NI-MAX "Valid Routes" tables. + + Furthermore, the register-level information is much easier to identify and + correct when entire families of NI devices are shown side by side in table + format. This is made easy by using a file-storage format that can be + loaded into a spreadsheet application. + + Finally, .csv content is very easy to edit and read using a variety of + tools, including spreadsheets or various other scripting languages. In + fact, the tools provided here enable quick conversion of the + spreadsheet-like .csv format to c-files that follow the kernel coding + conventions. + + + (b) `make c-files` + Creates new c-files using content of csv sub-directory. These + new c-files can be compared to the active content in the + ni_routing directory. + (c) `make csv-blank` + Create a new blank csv file. This is useful for establishing a + new data table for either a device family (less likely) or a + specific board of an existing device family (more likely). + (d) `make clean` + Remove all generated files/directories. + (e) `make everything` + Build all csv-files, then all new c-files. + + + + +In summary, similar confusion about signal routing configuration, albeit less, +plagued NI's previous version of their own proprietary drivers. Earlier than +2003, NI greatly simplified the situation for users by releasing a new API that +abstracted the names of signals/terminals to a common and intuitive set of +names. In addition, this new API provided a much more common interface to use +for most of NI hardware. + +Comedi already provides such a common interface for data-acquisition and control +hardware. This effort complements comedi's abstraction layers by further +abstracting much more of the use cases for NI hardware, but allowing users _and_ +developers to directly refer to NI documentation (user-level, register-level, +and the register-level examples of the NI-MHDDK). + + + +-------------------------------------------------------------------------------- +Various naming conventions and relations: +-------------------------------------------------------------------------------- +These are various notes that help to relate the naming conventions used in the +NI-STC with those naming conventions used here. +-------------------------------------------------------------------------------- + + Signal sources for most signals-destinations are given a specific naming + convention, although the register values are not consistent. This next table + shows the mapping between the names used in comedi for NI and those names + typically used within the NI-STC documentation. + + (comedi) (NI-STC input or output) (NOTE) + ------------------------------------------------------------------------------ + TRIGGER_LINE(i) RTSI_Trig_i_Output_Select i in range [0..7] + NI_AI_STOP AI_STOP + NI_AI_SampleClock AI_START_Select + NI_AI_SampleClockTimebase AI_SI If internal sample + clock signal is used + NI_AI_StartTrigger AI_START1_Select + NI_AI_ReferenceTrigger AI_START2_Select for pre-triggered + acquisition---not + currently supported + in comedi + NI_AI_ConvertClock AI_CONVERT_Source_Select + NI_AI_ConvertClockTimebase AI_SI2 If internal convert + signal is used + NI_AI_HoldCompleteEvent + NI_AI_PauseTrigger AI_External_Gate + NI_AO_SampleClock AO_UPDATE + NI_AO_SampleClockTimebase AO_UI + NI_AO_StartTrigger AO_START1 + NI_AO_PauseTrigger AO_External_Gate + NI_DI_SampleClock + NI_DO_SampleClock + NI_MasterTimebase + NI_20MHzTimebase TIMEBASE 1 && TIMEBASE 3 if no higher clock exists + NI_80MHzTimebase TIMEBASE 3 + NI_100kHzTimebase TIMEBASE 2 + NI_10MHzRefClock + PXI_Clk10 + NI_CtrOut(0) GPFO_0 external ctr0out pin + NI_CtrOut(1) GPFO_1 external ctr1out pin + NI_CtrSource(0) + NI_CtrSource(1) + NI_CtrGate(0) + NI_CtrGate(1) + NI_CtrInternalOutput(0) G_OUT0, G0_TC for Ctr1Source, Ctr1Gate + NI_CtrInternalOutput(1) G_OUT1, G1_TC for Ctr0Source, Ctr0Gate + NI_RGOUT0 RGOUT0 internal signal + NI_FrequencyOutput + #NI_FrequencyOutputTimebase + NI_ChangeDetectionEvent + NI_RTSI_BRD(0) + NI_RTSI_BRD(1) + NI_RTSI_BRD(2) + NI_RTSI_BRD(3) + #NI_SoftwareStrobe + NI_LogicLow + NI_CtrA(0) G0_A_Select see M-Series user + manual (371022K-01) + NI_CtrA(1) G1_A_Select see M-Series user + manual (371022K-01) + NI_CtrB(0) G0_B_Select, up/down see M-Series user + manual (371022K-01) + NI_CtrB(1) G1_B_Select, up/down see M-Series user + manual (371022K-01) + NI_CtrZ(0) see M-Series user + manual (371022K-01) + NI_CtrZ(1) see M-Series user + manual (371022K-01) diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c new file mode 100644 index 000000000000..7b6a74dfe48b --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "ni_device_routes.h" +#include "ni_device_routes/all.h" + +struct ni_device_routes *const ni_device_routes_list[] = { + &ni_pxi_6030e_device_routes, + &ni_pci_6070e_device_routes, + &ni_pci_6220_device_routes, + &ni_pci_6221_device_routes, + &ni_pxi_6224_device_routes, + &ni_pxi_6225_device_routes, + &ni_pci_6229_device_routes, + &ni_pci_6251_device_routes, + &ni_pxi_6251_device_routes, + &ni_pxie_6251_device_routes, + &ni_pci_6254_device_routes, + &ni_pci_6259_device_routes, + &ni_pci_6534_device_routes, + &ni_pci_6602_device_routes, + &ni_pci_6713_device_routes, + &ni_pci_6723_device_routes, + &ni_pci_6733_device_routes, + &ni_pxi_6733_device_routes, + NULL, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.h b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.h new file mode 100644 index 000000000000..b9f1c47d19e1 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file is meant to be included by comedi/drivers/ni_routes.c + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTINT_NI_DEVICE_ROUTES_H +#define _COMEDI_DRIVERS_NI_ROUTINT_NI_DEVICE_ROUTES_H + +#include "../ni_routes.h" + +extern struct ni_device_routes *const ni_device_routes_list[]; + +#endif /* _COMEDI_DRIVERS_NI_ROUTINT_NI_DEVICE_ROUTES_H */ diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/all.h b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/all.h new file mode 100644 index 000000000000..78b24138acb7 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/all.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/all.h + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H +#define _COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H + +#include "../ni_device_routes.h" + +extern struct ni_device_routes ni_pxi_6030e_device_routes; +extern struct ni_device_routes ni_pci_6070e_device_routes; +extern struct ni_device_routes ni_pci_6220_device_routes; +extern struct ni_device_routes ni_pci_6221_device_routes; +extern struct ni_device_routes ni_pxi_6224_device_routes; +extern struct ni_device_routes ni_pxi_6225_device_routes; +extern struct ni_device_routes ni_pci_6229_device_routes; +extern struct ni_device_routes ni_pci_6251_device_routes; +extern struct ni_device_routes ni_pxi_6251_device_routes; +extern struct ni_device_routes ni_pxie_6251_device_routes; +extern struct ni_device_routes ni_pci_6254_device_routes; +extern struct ni_device_routes ni_pci_6259_device_routes; +extern struct ni_device_routes ni_pci_6534_device_routes; +extern struct ni_device_routes ni_pxie_6535_device_routes; +extern struct ni_device_routes ni_pci_6602_device_routes; +extern struct ni_device_routes ni_pci_6713_device_routes; +extern struct ni_device_routes ni_pci_6723_device_routes; +extern struct ni_device_routes ni_pci_6733_device_routes; +extern struct ni_device_routes ni_pxi_6733_device_routes; +extern struct ni_device_routes ni_pxie_6738_device_routes; + +#endif //_COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c new file mode 100644 index 000000000000..f1126a0cb285 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c @@ -0,0 +1,639 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6070e_device_routes = { + .device = "pci-6070e", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + NI_AI_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + NI_AI_ConvertClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + NI_AI_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_AI_SampleClockTimebase, + NI_MasterTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_HoldComplete, + .src = (int[]){ + NI_AI_HoldCompleteEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6220.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6220.c new file mode 100644 index 000000000000..74a59222963f --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6220.c @@ -0,0 +1,1418 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6220.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6220_device_routes = { + .device = "pci-6220", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6221.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6221.c new file mode 100644 index 000000000000..44dcbabf2a99 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6221.c @@ -0,0 +1,1602 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6221.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6221_device_routes = { + .device = "pci-6221", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6229.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6229.c new file mode 100644 index 000000000000..fa5794e4e2b3 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6229.c @@ -0,0 +1,1602 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6229.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6229_device_routes = { + .device = "pci-6229", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6251.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6251.c new file mode 100644 index 000000000000..645fd1cd2de4 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6251.c @@ -0,0 +1,1652 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6251.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6251_device_routes = { + .device = "pci-6251", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6254.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6254.c new file mode 100644 index 000000000000..056a240cd3a2 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6254.c @@ -0,0 +1,1464 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6254.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6254_device_routes = { + .device = "pci-6254", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6259.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6259.c new file mode 100644 index 000000000000..e0b5fa78c3bc --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6259.c @@ -0,0 +1,1652 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6259.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6259_device_routes = { + .device = "pci-6259", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6534.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6534.c new file mode 100644 index 000000000000..a2472ed288cf --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6534.c @@ -0,0 +1,290 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6534.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6534_device_routes = { + .device = "pci-6534", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6602.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6602.c new file mode 100644 index 000000000000..91de9dac2d6a --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6602.c @@ -0,0 +1,3378 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6602.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6602_device_routes = { + .device = "pci-6602", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(2), + .src = (int[]){ + NI_80MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_80MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_PFI(7), + NI_PFI(15), + NI_PFI(23), + NI_PFI(31), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_PFI(7), + NI_PFI(15), + NI_PFI(23), + NI_PFI(31), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + NI_CtrGate(7), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + NI_CtrSource(7), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + NI_PFI(6), + NI_PFI(14), + NI_PFI(22), + NI_PFI(30), + NI_PFI(38), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + NI_PFI(6), + NI_PFI(14), + NI_PFI(22), + NI_PFI(30), + NI_PFI(38), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + NI_CtrGate(6), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + NI_CtrSource(6), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(16), + .src = (int[]){ + NI_PFI(5), + NI_PFI(13), + NI_PFI(21), + NI_PFI(29), + NI_PFI(37), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(17), + .src = (int[]){ + NI_PFI(5), + NI_PFI(13), + NI_PFI(21), + NI_PFI(29), + NI_PFI(37), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(18), + .src = (int[]){ + NI_CtrGate(5), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(19), + .src = (int[]){ + NI_CtrSource(5), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(20), + .src = (int[]){ + NI_PFI(4), + NI_PFI(12), + NI_PFI(28), + NI_PFI(36), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(21), + .src = (int[]){ + NI_PFI(4), + NI_PFI(12), + NI_PFI(20), + NI_PFI(28), + NI_PFI(36), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(22), + .src = (int[]){ + NI_CtrGate(4), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(23), + .src = (int[]){ + NI_CtrSource(4), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(24), + .src = (int[]){ + NI_PFI(3), + NI_PFI(11), + NI_PFI(19), + NI_PFI(27), + NI_PFI(35), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(3), + NI_CtrSource(7), + NI_CtrGate(3), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(25), + .src = (int[]){ + NI_PFI(3), + NI_PFI(11), + NI_PFI(19), + NI_PFI(27), + NI_PFI(35), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(3), + NI_CtrSource(7), + NI_CtrGate(3), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(26), + .src = (int[]){ + NI_CtrGate(3), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(27), + .src = (int[]){ + NI_CtrSource(3), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(28), + .src = (int[]){ + NI_PFI(2), + NI_PFI(10), + NI_PFI(18), + NI_PFI(26), + NI_PFI(34), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(2), + NI_CtrSource(6), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(29), + .src = (int[]){ + NI_PFI(2), + NI_PFI(10), + NI_PFI(18), + NI_PFI(26), + NI_PFI(34), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(2), + NI_CtrSource(6), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(30), + .src = (int[]){ + NI_CtrGate(2), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(31), + .src = (int[]){ + NI_CtrSource(2), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(32), + .src = (int[]){ + NI_PFI(1), + NI_PFI(9), + NI_PFI(17), + NI_PFI(25), + NI_PFI(33), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(5), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(33), + .src = (int[]){ + NI_PFI(1), + NI_PFI(9), + NI_PFI(17), + NI_PFI(25), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(5), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(34), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(35), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(36), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(5), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(37), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(5), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(38), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(39), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(3), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(7), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6713.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6713.c new file mode 100644 index 000000000000..d378b36d2084 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6713.c @@ -0,0 +1,400 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6713.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6713_device_routes = { + .device = "pci-6713", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6723.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6723.c new file mode 100644 index 000000000000..e0cc57ab06e7 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6723.c @@ -0,0 +1,400 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6723.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6723_device_routes = { + .device = "pci-6723", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6733.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6733.c new file mode 100644 index 000000000000..f6e1e17ab854 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6733.c @@ -0,0 +1,428 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6733.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6733_device_routes = { + .device = "pci-6733", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6030e.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6030e.c new file mode 100644 index 000000000000..9978d632117f --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6030e.c @@ -0,0 +1,608 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6030e.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6030e_device_routes = { + .device = "pxi-6030e", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + NI_AI_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + NI_AI_ConvertClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + NI_AI_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_AI_SampleClockTimebase, + NI_MasterTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_HoldComplete, + .src = (int[]){ + NI_AI_HoldCompleteEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6224.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6224.c new file mode 100644 index 000000000000..1b89e27d7aa5 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6224.c @@ -0,0 +1,1432 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6224.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6224_device_routes = { + .device = "pxi-6224", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6225.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6225.c new file mode 100644 index 000000000000..10dfc34bc87c --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6225.c @@ -0,0 +1,1613 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6225.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6225_device_routes = { + .device = "pxi-6225", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6251.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6251.c new file mode 100644 index 000000000000..25db4b7363de --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6251.c @@ -0,0 +1,1655 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6251.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6251_device_routes = { + .device = "pxi-6251", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + PXI_Star, + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c new file mode 100644 index 000000000000..27da4433fc4a --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c @@ -0,0 +1,428 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6733_device_routes = { + .device = "pxi-6733", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + PXI_Star, + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + PXI_Star, + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(1), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = PXI_Star, + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + PXI_Star, + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + PXI_Star, + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + PXI_Star, + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6251.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6251.c new file mode 100644 index 000000000000..8354fe971d59 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6251.c @@ -0,0 +1,1656 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxie-6251.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxie_6251_device_routes = { + .device = "pxie-6251", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c new file mode 100644 index 000000000000..2ebb679e0129 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c @@ -0,0 +1,575 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxie_6535_device_routes = { + .device = "pxie-6535", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(5), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(4), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c new file mode 100644 index 000000000000..d88504314d7f --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c @@ -0,0 +1,3083 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxie_6738_device_routes = { + .device = "pxie-6738", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + PXI_Clk10, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + PXI_Clk10, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + PXI_Clk10, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + PXI_Clk10, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSampleClock(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSampleClock(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSampleClock(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSampleClock(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClockTimebase, + NI_DI_SampleClock, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_DI_SampleClockTimebase, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClockTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_WatchdogExpirationTrigger, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values.c b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.c new file mode 100644 index 000000000000..5901762734ed --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values.c + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes the tables that are a list of all the values of various + * signals routes available on NI hardware. In many cases, one does not + * explicitly make these routes, rather one might indicate that something is + * used as the source of one particular trigger or another (using + * *_src=TRIG_EXT). + * + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "ni_route_values.h" +#include "ni_route_values/all.h" + +const struct family_route_values *const ni_all_route_values[] = { + &ni_660x_route_values, + &ni_eseries_route_values, + &ni_mseries_route_values, + NULL, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values.h b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.h new file mode 100644 index 000000000000..80e0145fb82b --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values.h + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTINT_NI_ROUTE_VALUES_H +#define _COMEDI_DRIVERS_NI_ROUTINT_NI_ROUTE_VALUES_H + +#include "../../comedi.h" +#include <linux/types.h> + +/* + * This file includes the tables that are a list of all the values of various + * signals routes available on NI hardware. In many cases, one does not + * explicitly make these routes, rather one might indicate that something is + * used as the source of one particular trigger or another (using + * *_src=TRIG_EXT). + * + * This file is meant to be included by comedi/drivers/ni_routes.c + */ + +#define B(x) ((x) - NI_NAMES_BASE) + +/** Marks a register value as valid, implemented, and tested. */ +#define V(x) (((x) & 0x7f) | 0x80) + +#ifndef NI_ROUTE_VALUE_EXTERNAL_CONVERSION + /** Marks a register value as implemented but needing testing. */ + #define I(x) V(x) + /** Marks a register value as not implemented. */ + #define U(x) 0x0 + + typedef u8 register_type; +#else + /** Marks a register value as implemented but needing testing. */ + #define I(x) (((x) & 0x7f) | 0x100) + /** Marks a register value as not implemented. */ + #define U(x) (((x) & 0x7f) | 0x200) + + /** Tests whether a register is marked as valid/implemented/tested */ + #define MARKED_V(x) (((x) & 0x80) != 0) + /** Tests whether a register is implemented but not tested */ + #define MARKED_I(x) (((x) & 0x100) != 0) + /** Tests whether a register is not implemented */ + #define MARKED_U(x) (((x) & 0x200) != 0) + + /* need more space to store extra marks */ + typedef u16 register_type; +#endif + +/* Mask out the marking bit(s). */ +#define UNMARK(x) ((x) & 0x7f) + +/* + * Gi_SRC(x,1) implements Gi_Src_SubSelect = 1 + * + * This appears to only really be a valid MUX for m-series devices. + */ +#define Gi_SRC(val, subsel) ((val) | ((subsel) << 6)) + +/** + * struct family_route_values - Register values for all routes for a particular + * family. + * @family: lower-case string representation of a specific series or family of + * devices from National Instruments where each member of this family + * shares the same register values for the various signal MUXes. It + * should be noted that not all devices of any family have access to + * all routes defined. + * @register_values: Table of all register values for various signal MUXes on + * National Instruments devices. The first index of this table is the + * signal destination (i.e. identification of the signal MUX). The + * second index of this table is the signal source (i.e. input of the + * signal MUX). + */ +struct family_route_values { + const char *family; + const register_type register_values[NI_NUM_NAMES][NI_NUM_NAMES]; + +}; + +extern const struct family_route_values *const ni_all_route_values[]; + +#endif /* _COMEDI_DRIVERS_NI_ROUTINT_NI_ROUTE_VALUES_H */ diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values/all.h b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/all.h new file mode 100644 index 000000000000..7227461500b5 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/all.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values/all.h + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H +#define _COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H + +#include "../ni_route_values.h" + +extern const struct family_route_values ni_660x_route_values; +extern const struct family_route_values ni_eseries_route_values; +extern const struct family_route_values ni_mseries_route_values; + +#endif //_COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_660x.c b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_660x.c new file mode 100644 index 000000000000..f1c7e6646261 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_660x.c @@ -0,0 +1,650 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values/ni_660x.c + * Route information for NI_660X boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes a list of all the values of various signals routes + * available on NI 660x hardware. In many cases, one does not explicitly make + * these routes, rather one might indicate that something is used as the source + * of one particular trigger or another (using *_src=TRIG_EXT). + * + * The contents of this file can be generated using the tools in + * comedi/drivers/ni_routing/tools. This file also contains specific notes to + * this family of devices. + * + * Please use those tools to help maintain the contents of this file, but be + * mindful to not lose the notes already made in this file, since these notes + * are critical to a complete undertsanding of the register values of this + * family. + */ + +#include "../ni_route_values.h" +#include "all.h" + +const struct family_route_values ni_660x_route_values = { + .family = "ni_660x", + .register_values = { + /* + * destination = { + * source = register value, + * ... + * } + */ + [B(NI_PFI(8))] = { + [B(NI_CtrInternalOutput(7))] = I(1), + }, + [B(NI_PFI(10))] = { + [B(NI_CtrGate(7))] = I(1), + }, + [B(NI_PFI(11))] = { + [B(NI_CtrSource(7))] = I(1), + }, + [B(NI_PFI(12))] = { + [B(NI_CtrInternalOutput(6))] = I(1), + }, + [B(NI_PFI(14))] = { + [B(NI_CtrGate(6))] = I(1), + }, + [B(NI_PFI(15))] = { + [B(NI_CtrSource(6))] = I(1), + }, + [B(NI_PFI(16))] = { + [B(NI_CtrInternalOutput(5))] = I(1), + }, + [B(NI_PFI(18))] = { + [B(NI_CtrGate(5))] = I(1), + }, + [B(NI_PFI(19))] = { + [B(NI_CtrSource(5))] = I(1), + }, + [B(NI_PFI(20))] = { + [B(NI_CtrInternalOutput(4))] = I(1), + }, + [B(NI_PFI(22))] = { + [B(NI_CtrGate(4))] = I(1), + }, + [B(NI_PFI(23))] = { + [B(NI_CtrSource(4))] = I(1), + }, + [B(NI_PFI(24))] = { + [B(NI_CtrInternalOutput(3))] = I(1), + }, + [B(NI_PFI(26))] = { + [B(NI_CtrGate(3))] = I(1), + }, + [B(NI_PFI(27))] = { + [B(NI_CtrSource(3))] = I(1), + }, + [B(NI_PFI(28))] = { + [B(NI_CtrInternalOutput(2))] = I(1), + }, + [B(NI_PFI(30))] = { + [B(NI_CtrGate(2))] = I(1), + }, + [B(NI_PFI(31))] = { + [B(NI_CtrSource(2))] = I(1), + }, + [B(NI_PFI(32))] = { + [B(NI_CtrInternalOutput(1))] = I(1), + }, + [B(NI_PFI(34))] = { + [B(NI_CtrGate(1))] = I(1), + }, + [B(NI_PFI(35))] = { + [B(NI_CtrSource(1))] = I(1), + }, + [B(NI_PFI(36))] = { + [B(NI_CtrInternalOutput(0))] = I(1), + }, + [B(NI_PFI(38))] = { + [B(NI_CtrGate(0))] = I(1), + }, + [B(NI_PFI(39))] = { + [B(NI_CtrSource(0))] = I(1), + }, + [B(NI_CtrSource(0))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2 /* or 1 */), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(1))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(1))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3 /* or 1 */), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(2))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(2))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4 /* or 1 */), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(3))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(3))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5 /* or 1 */), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(4))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(4))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6 /* or 1 */), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(5))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(5))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7 /* or 1 */), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(6))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(6))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8 /* or 1 */), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(7))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(7))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9 /* or 1 */), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(0))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrGate(0))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2 /* or 1 */), + [B(NI_PFI(39))] = I(0), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(1))] = I(10), + [B(NI_CtrInternalOutput(1))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(1))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3 /* or 1 */), + [B(NI_PFI(35))] = I(0), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(2))] = I(10), + [B(NI_CtrInternalOutput(2))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(2))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4 /* or 1 */), + [B(NI_PFI(31))] = I(0), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(3))] = I(10), + [B(NI_CtrInternalOutput(3))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(3))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5 /* or 1 */), + [B(NI_PFI(27))] = I(0), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(4))] = I(10), + [B(NI_CtrInternalOutput(4))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(4))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6 /* or 1 */), + [B(NI_PFI(23))] = I(0), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(5))] = I(10), + [B(NI_CtrInternalOutput(5))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(5))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7 /* or 1 */), + [B(NI_PFI(19))] = I(0), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(6))] = I(10), + [B(NI_CtrInternalOutput(6))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(6))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8 /* or 1 */), + [B(NI_PFI(15))] = I(0), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(7))] = I(10), + [B(NI_CtrInternalOutput(7))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(7))] = { + [B(NI_PFI(10))] = I(9 /* or 1 */), + [B(NI_PFI(11))] = I(0), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(0))] = I(10), + [B(NI_CtrInternalOutput(0))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrAux(0))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2 /* or 1 */), + [B(NI_PFI(39))] = I(0), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(1))] = I(10), + [B(NI_CtrGate(1))] = I(30), + [B(NI_CtrInternalOutput(1))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(1))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3 /* or 1 */), + [B(NI_PFI(35))] = I(0), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(2))] = I(10), + [B(NI_CtrGate(2))] = I(30), + [B(NI_CtrInternalOutput(2))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(2))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4 /* or 1 */), + [B(NI_PFI(31))] = I(0), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(3))] = I(10), + [B(NI_CtrGate(3))] = I(30), + [B(NI_CtrInternalOutput(3))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(3))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5 /* or 1 */), + [B(NI_PFI(27))] = I(0), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(4))] = I(10), + [B(NI_CtrGate(4))] = I(30), + [B(NI_CtrInternalOutput(4))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(4))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6 /* or 1 */), + [B(NI_PFI(23))] = I(0), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(5))] = I(10), + [B(NI_CtrGate(5))] = I(30), + [B(NI_CtrInternalOutput(5))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(5))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7 /* or 1 */), + [B(NI_PFI(19))] = I(0), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(6))] = I(10), + [B(NI_CtrGate(6))] = I(30), + [B(NI_CtrInternalOutput(6))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(6))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8 /* or 1 */), + [B(NI_PFI(15))] = I(0), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(7))] = I(10), + [B(NI_CtrGate(7))] = I(30), + [B(NI_CtrInternalOutput(7))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(7))] = { + [B(NI_PFI(9))] = I(9 /* or 1 */), + [B(NI_PFI(11))] = I(0), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(0))] = I(10), + [B(NI_CtrGate(0))] = I(30), + [B(NI_CtrInternalOutput(0))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_eseries.c b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_eseries.c new file mode 100644 index 000000000000..d1ab3c9ce585 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_eseries.c @@ -0,0 +1,602 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values/ni_eseries.c + * Route information for NI_ESERIES boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes a list of all the values of various signals routes + * available on NI 660x hardware. In many cases, one does not explicitly make + * these routes, rather one might indicate that something is used as the source + * of one particular trigger or another (using *_src=TRIG_EXT). + * + * The contents of this file can be generated using the tools in + * comedi/drivers/ni_routing/tools. This file also contains specific notes to + * this family of devices. + * + * Please use those tools to help maintain the contents of this file, but be + * mindful to not lose the notes already made in this file, since these notes + * are critical to a complete undertsanding of the register values of this + * family. + */ + +#include "../ni_route_values.h" +#include "all.h" + +/* + * Note that for e-series devices, the backplane TRIGGER_LINE(6) is generally + * not connected to RTSI(6). + */ + +const struct family_route_values ni_eseries_route_values = { + .family = "ni_eseries", + .register_values = { + /* + * destination = { + * source = register value, + * ... + * } + */ + [B(NI_PFI(0))] = { + [B(NI_AI_StartTrigger)] = I(NI_PFI_OUTPUT_AI_START1), + }, + [B(NI_PFI(1))] = { + [B(NI_AI_ReferenceTrigger)] = I(NI_PFI_OUTPUT_AI_START2), + }, + [B(NI_PFI(2))] = { + [B(NI_AI_ConvertClock)] = I(NI_PFI_OUTPUT_AI_CONVERT), + }, + [B(NI_PFI(3))] = { + [B(NI_CtrSource(1))] = I(NI_PFI_OUTPUT_G_SRC1), + }, + [B(NI_PFI(4))] = { + [B(NI_CtrGate(1))] = I(NI_PFI_OUTPUT_G_GATE1), + }, + [B(NI_PFI(5))] = { + [B(NI_AO_SampleClock)] = I(NI_PFI_OUTPUT_AO_UPDATE_N), + }, + [B(NI_PFI(6))] = { + [B(NI_AO_StartTrigger)] = I(NI_PFI_OUTPUT_AO_START1), + }, + [B(NI_PFI(7))] = { + [B(NI_AI_SampleClock)] = I(NI_PFI_OUTPUT_AI_START_PULSE), + }, + [B(NI_PFI(8))] = { + [B(NI_CtrSource(0))] = I(NI_PFI_OUTPUT_G_SRC0), + }, + [B(NI_PFI(9))] = { + [B(NI_CtrGate(0))] = I(NI_PFI_OUTPUT_G_GATE0), + }, + [B(TRIGGER_LINE(0))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(1))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(2))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(3))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(4))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(5))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(6))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(7))] = { + [B(NI_20MHzTimebase)] = I(NI_RTSI_OUTPUT_RTSI_OSC), + }, + [B(NI_RTSI_BRD(0))] = { + [B(TRIGGER_LINE(0))] = I(0), + [B(TRIGGER_LINE(1))] = I(1), + [B(TRIGGER_LINE(2))] = I(2), + [B(TRIGGER_LINE(3))] = I(3), + [B(TRIGGER_LINE(4))] = I(4), + [B(TRIGGER_LINE(5))] = I(5), + [B(TRIGGER_LINE(6))] = I(6), + [B(PXI_Star)] = I(6), + [B(NI_AI_STOP)] = I(7), + }, + [B(NI_RTSI_BRD(1))] = { + [B(TRIGGER_LINE(0))] = I(0), + [B(TRIGGER_LINE(1))] = I(1), + [B(TRIGGER_LINE(2))] = I(2), + [B(TRIGGER_LINE(3))] = I(3), + [B(TRIGGER_LINE(4))] = I(4), + [B(TRIGGER_LINE(5))] = I(5), + [B(TRIGGER_LINE(6))] = I(6), + [B(PXI_Star)] = I(6), + [B(NI_AI_STOP)] = I(7), + }, + [B(NI_RTSI_BRD(2))] = { + [B(TRIGGER_LINE(0))] = I(0), + [B(TRIGGER_LINE(1))] = I(1), + [B(TRIGGER_LINE(2))] = I(2), + [B(TRIGGER_LINE(3))] = I(3), + [B(TRIGGER_LINE(4))] = I(4), + [B(TRIGGER_LINE(5))] = I(5), + [B(TRIGGER_LINE(6))] = I(6), + [B(PXI_Star)] = I(6), + [B(NI_AI_SampleClock)] = I(7), + }, + [B(NI_RTSI_BRD(3))] = { + [B(TRIGGER_LINE(0))] = I(0), + [B(TRIGGER_LINE(1))] = I(1), + [B(TRIGGER_LINE(2))] = I(2), + [B(TRIGGER_LINE(3))] = I(3), + [B(TRIGGER_LINE(4))] = I(4), + [B(TRIGGER_LINE(5))] = I(5), + [B(TRIGGER_LINE(6))] = I(6), + [B(PXI_Star)] = I(6), + [B(NI_AI_SampleClock)] = I(7), + }, + [B(NI_CtrSource(0))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrInternalOutput(1))] = U(19), + [B(PXI_Star)] = U(17), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(1))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrInternalOutput(0))] = U(19), + [B(PXI_Star)] = U(17), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrGate(0))] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(1))] = I(20), + [B(PXI_Star)] = I(17), + [B(NI_AI_StartTrigger)] = I(21), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrGate(1))] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(0))] = I(20), + [B(PXI_Star)] = I(17), + [B(NI_AI_StartTrigger)] = I(21), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrOut(0))] = { + [B(TRIGGER_LINE(0))] = I(1), + [B(TRIGGER_LINE(1))] = I(2), + [B(TRIGGER_LINE(2))] = I(3), + [B(TRIGGER_LINE(3))] = I(4), + [B(TRIGGER_LINE(4))] = I(5), + [B(TRIGGER_LINE(5))] = I(6), + [B(TRIGGER_LINE(6))] = I(7), + [B(NI_CtrInternalOutput(0))] = I(0), + [B(PXI_Star)] = I(7), + }, + [B(NI_CtrOut(1))] = { + [B(NI_CtrInternalOutput(1))] = I(0), + }, + [B(NI_AI_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(0))] = I(19), + [B(PXI_Star)] = I(17), + [B(NI_AI_SampleClockTimebase)] = I(0), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_SampleClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_100kHzTimebase)] = U(19), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AI_StartTrigger)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(0))] = I(18), + [B(PXI_Star)] = I(17), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_ReferenceTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AI_ConvertClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(0))] = I(19), + [B(PXI_Star)] = I(17), + [B(NI_AI_ConvertClockTimebase)] = I(0), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_ConvertClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_AI_SampleClockTimebase)] = U(0), + [B(NI_20MHzTimebase)] = U(1), + }, + [B(NI_AI_PauseTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AO_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(1))] = I(19), + [B(PXI_Star)] = I(17), + [B(NI_AO_SampleClockTimebase)] = I(0), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AO_SampleClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_100kHzTimebase)] = U(19), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AO_StartTrigger)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(PXI_Star)] = I(17), + /* + * for the signal route + * (NI_AI_StartTrigger->NI_AO_StartTrigger), MHDDK says + * used register value 18 and DAQ-STC says 19. + * Hoping that the MHDDK is correct--being a "working" + * example. + */ + [B(NI_AI_StartTrigger)] = I(18), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AO_PauseTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_MasterTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(TRIGGER_LINE(7))] = U(1), + [B(PXI_Star)] = U(2), + [B(PXI_Clk10)] = U(3), + [B(NI_10MHzRefClock)] = U(0), + }, + /* + * This symbol is not defined and nothing for this is + * implemented--just including this because data was found in + * the NI-STC for it--can't remember where. + * [B(NI_FrequencyOutTimebase)] = { + * ** These are not currently implemented in ni modules ** + * [B(NI_20MHzTimebase)] = U(0), + * [B(NI_100kHzTimebase)] = U(1), + * }, + */ + [B(NI_RGOUT0)] = { + [B(NI_CtrInternalOutput(0))] = I(0), + [B(NI_CtrOut(0))] = I(1), + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_mseries.c b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_mseries.c new file mode 100644 index 000000000000..c59d8afe0ae9 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_mseries.c @@ -0,0 +1,1752 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values/ni_mseries.c + * Route information for NI_MSERIES boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes a list of all the values of various signals routes + * available on NI 660x hardware. In many cases, one does not explicitly make + * these routes, rather one might indicate that something is used as the source + * of one particular trigger or another (using *_src=TRIG_EXT). + * + * The contents of this file can be generated using the tools in + * comedi/drivers/ni_routing/tools. This file also contains specific notes to + * this family of devices. + * + * Please use those tools to help maintain the contents of this file, but be + * mindful to not lose the notes already made in this file, since these notes + * are critical to a complete undertsanding of the register values of this + * family. + */ + +#include "../ni_route_values.h" +#include "all.h" + +/* + * GATE SELECT NOTE: + * CtrAux and CtrArmStartrigger register values are not documented in the + * DAQ-STC. There is some evidence that using CtrGate values is valid (see + * comedi.h). Some information and hints exist in the M-Series user manual + * (ni-62xx user-manual 371022K-01). + */ + +const struct family_route_values ni_mseries_route_values = { + .family = "ni_mseries", + .register_values = { + /* + * destination = { + * source = register value, + * ... + * } + */ + [B(NI_PFI(0))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(1))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(2))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(3))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(4))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(5))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(6))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(7))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(8))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(9))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(10))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(11))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(12))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(13))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(14))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(15))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(TRIGGER_LINE(0))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(1))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(2))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(3))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(4))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(5))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(6))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(7))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(NI_RTSI_BRD(0))] = { + [B(NI_PFI(0))] = I(0), + [B(NI_PFI(1))] = I(1), + [B(NI_PFI(2))] = I(2), + [B(NI_PFI(3))] = I(3), + [B(NI_PFI(4))] = I(4), + [B(NI_PFI(5))] = I(5), + [B(NI_CtrSource(1))] = I(11), + [B(NI_CtrGate(1))] = I(10), + [B(NI_CtrZ(0))] = I(13), + [B(NI_CtrZ(1))] = I(12), + [B(NI_CtrOut(1))] = I(9), + [B(NI_AI_SampleClock)] = I(15), + [B(NI_AI_PauseTrigger)] = I(7), + [B(NI_AO_PauseTrigger)] = I(6), + [B(NI_FrequencyOutput)] = I(8), + [B(NI_AnalogComparisonEvent)] = I(14), + }, + [B(NI_RTSI_BRD(1))] = { + [B(NI_PFI(0))] = I(0), + [B(NI_PFI(1))] = I(1), + [B(NI_PFI(2))] = I(2), + [B(NI_PFI(3))] = I(3), + [B(NI_PFI(4))] = I(4), + [B(NI_PFI(5))] = I(5), + [B(NI_CtrSource(1))] = I(11), + [B(NI_CtrGate(1))] = I(10), + [B(NI_CtrZ(0))] = I(13), + [B(NI_CtrZ(1))] = I(12), + [B(NI_CtrOut(1))] = I(9), + [B(NI_AI_SampleClock)] = I(15), + [B(NI_AI_PauseTrigger)] = I(7), + [B(NI_AO_PauseTrigger)] = I(6), + [B(NI_FrequencyOutput)] = I(8), + [B(NI_AnalogComparisonEvent)] = I(14), + }, + [B(NI_RTSI_BRD(2))] = { + [B(NI_PFI(0))] = I(0), + [B(NI_PFI(1))] = I(1), + [B(NI_PFI(2))] = I(2), + [B(NI_PFI(3))] = I(3), + [B(NI_PFI(4))] = I(4), + [B(NI_PFI(5))] = I(5), + [B(NI_CtrSource(1))] = I(11), + [B(NI_CtrGate(1))] = I(10), + [B(NI_CtrZ(0))] = I(13), + [B(NI_CtrZ(1))] = I(12), + [B(NI_CtrOut(1))] = I(9), + [B(NI_AI_SampleClock)] = I(15), + [B(NI_AI_PauseTrigger)] = I(7), + [B(NI_AO_PauseTrigger)] = I(6), + [B(NI_FrequencyOutput)] = I(8), + [B(NI_AnalogComparisonEvent)] = I(14), + }, + [B(NI_RTSI_BRD(3))] = { + [B(NI_PFI(0))] = I(0), + [B(NI_PFI(1))] = I(1), + [B(NI_PFI(2))] = I(2), + [B(NI_PFI(3))] = I(3), + [B(NI_PFI(4))] = I(4), + [B(NI_PFI(5))] = I(5), + [B(NI_CtrSource(1))] = I(11), + [B(NI_CtrGate(1))] = I(10), + [B(NI_CtrZ(0))] = I(13), + [B(NI_CtrZ(1))] = I(12), + [B(NI_CtrOut(1))] = I(9), + [B(NI_AI_SampleClock)] = I(15), + [B(NI_AI_PauseTrigger)] = I(7), + [B(NI_AO_PauseTrigger)] = I(6), + [B(NI_FrequencyOutput)] = I(8), + [B(NI_AnalogComparisonEvent)] = I(14), + }, + [B(NI_CtrSource(0))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(NI_CtrGate(1))] = U(Gi_SRC(20, 0)), + [B(NI_CtrInternalOutput(1))] = U(19), + [B(PXI_Star)] = U(Gi_SRC(20, 1)), + [B(PXI_Clk10)] = U(29), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(Gi_SRC(30, 0)), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_AnalogComparisonEvent)] = U(Gi_SRC(30, 1)), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(1))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(NI_CtrGate(0))] = U(Gi_SRC(20, 0)), + [B(NI_CtrInternalOutput(0))] = U(19), + [B(PXI_Star)] = U(Gi_SRC(20, 1)), + [B(PXI_Clk10)] = U(29), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(Gi_SRC(30, 0)), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_AnalogComparisonEvent)] = U(Gi_SRC(30, 1)), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrGate(0))] = { + [B(NI_PFI(0))] = I(1 /* source: mhddk examples */), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(1))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(1))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrGate(1))] = { + /* source for following line: mhddk examples */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(0))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(0))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(0))] = { + /* these are just a guess; see GATE SELECT NOTE */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(1))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(1))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(1))] = { + /* these are just a guess; see GATE SELECT NOTE */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(0))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(0))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrA(0))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrA(1))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrB(0))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrB(1))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrZ(0))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrZ(1))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrArmStartTrigger(0))] = { + /* these are just a guess; see GATE SELECT NOTE */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(1))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(1))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrArmStartTrigger(1))] = { + /* these are just a guess; see GATE SELECT NOTE */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(0))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(0))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrOut(0))] = { + [B(TRIGGER_LINE(0))] = I(1), + [B(TRIGGER_LINE(1))] = I(2), + [B(TRIGGER_LINE(2))] = I(3), + [B(TRIGGER_LINE(3))] = I(4), + [B(TRIGGER_LINE(4))] = I(5), + [B(TRIGGER_LINE(5))] = I(6), + [B(TRIGGER_LINE(6))] = I(7), + [B(NI_CtrInternalOutput(0))] = I(0), + }, + [B(NI_CtrOut(1))] = { + [B(NI_CtrInternalOutput(1))] = I(0), + }, + [B(NI_AI_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(19), + [B(NI_CtrInternalOutput(1))] = I(28), + [B(PXI_Star)] = I(20), + [B(NI_AI_SampleClockTimebase)] = I(0), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_SCXI_Trig1)] = I(29), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_SampleClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(PXI_Clk10)] = U(29), + /* + * For routes (*->NI_AI_SampleClockTimebase) and + * (*->NI_AO_SampleClockTimebase), tMSeries.h of MHDDK + * shows 0 value as selecting ground (case ground?) and + * 28 value selecting TIMEBASE 1. + */ + [B(NI_20MHzTimebase)] = U(28), + [B(NI_100kHzTimebase)] = U(19), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + [B(NI_CaseGround)] = U(0), + }, + [B(NI_AI_StartTrigger)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(18), + [B(NI_CtrInternalOutput(1))] = I(19), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_ReferenceTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AI_ConvertClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + /* source for following line: mhddk example headers */ + [B(NI_CtrInternalOutput(0))] = I(19), + /* source for following line: mhddk example headers */ + [B(NI_CtrInternalOutput(1))] = I(18), + [B(PXI_Star)] = I(20), + [B(NI_AI_ConvertClockTimebase)] = I(0), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_ConvertClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_AI_SampleClockTimebase)] = U(0), + [B(NI_20MHzTimebase)] = U(1), + }, + [B(NI_AI_PauseTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AO_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(18), + [B(NI_CtrInternalOutput(1))] = I(19), + [B(PXI_Star)] = I(20), + [B(NI_AO_SampleClockTimebase)] = I(0), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AO_SampleClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(PXI_Clk10)] = U(29), + /* + * For routes (*->NI_AI_SampleClockTimebase) and + * (*->NI_AO_SampleClockTimebase), tMSeries.h of MHDDK + * shows 0 value as selecting ground (case ground?) and + * 28 value selecting TIMEBASE 1. + */ + [B(NI_20MHzTimebase)] = U(28), + [B(NI_100kHzTimebase)] = U(19), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + [B(NI_CaseGround)] = U(0), + }, + [B(NI_AO_StartTrigger)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + /* + * for the signal route + * (NI_AI_StartTrigger->NI_AO_StartTrigger), DAQ-STC & + * MHDDK disagreed for e-series. MHDDK for m-series + * agrees with DAQ-STC description and uses the value 18 + * for the route + * (NI_AI_ReferenceTrigger->NI_AO_StartTrigger). The + * m-series devices are supposed to have DAQ-STC2. + * There are no DAQ-STC2 docs to compare with. + */ + [B(NI_AI_StartTrigger)] = I(19), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AO_PauseTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_DI_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(28), + [B(NI_CtrInternalOutput(1))] = I(29), + [B(PXI_Star)] = I(20), + [B(NI_AI_SampleClock)] = I(18), + [B(NI_AI_ConvertClock)] = I(19), + [B(NI_AO_SampleClock)] = I(31), + [B(NI_FrequencyOutput)] = I(32), + [B(NI_ChangeDetectionEvent)] = I(33), + [B(NI_CaseGround)] = I(0), + }, + [B(NI_DO_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(28), + [B(NI_CtrInternalOutput(1))] = I(29), + [B(PXI_Star)] = I(20), + [B(NI_AI_SampleClock)] = I(18), + [B(NI_AI_ConvertClock)] = I(19), + [B(NI_AO_SampleClock)] = I(31), + [B(NI_FrequencyOutput)] = I(32), + [B(NI_ChangeDetectionEvent)] = I(33), + [B(NI_CaseGround)] = I(0), + }, + [B(NI_MasterTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(PXI_Clk10)] = U(29), + [B(NI_10MHzRefClock)] = U(0), + }, + /* + * This symbol is not defined and nothing for this is + * implemented--just including this because data was found in + * the NI-STC for it--can't remember where. + * [B(NI_FrequencyOutTimebase)] = { + * ** These are not currently implemented in ni modules ** + * [B(NI_20MHzTimebase)] = U(0), + * [B(NI_100kHzTimebase)] = U(1), + * }, + */ + [B(NI_RGOUT0)] = { + [B(NI_CtrInternalOutput(0))] = I(0), + [B(NI_CtrOut(0))] = I(1), + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/.gitignore b/drivers/staging/comedi/drivers/ni_routing/tools/.gitignore new file mode 100644 index 000000000000..ef38008280a9 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/.gitignore @@ -0,0 +1,7 @@ +comedi_h.py +*.pyc +ni_values.py +convert_c_to_py +c/ +csv/ +all_cfiles.c diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/Makefile b/drivers/staging/comedi/drivers/ni_routing/tools/Makefile new file mode 100644 index 000000000000..1966850584d2 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/Makefile @@ -0,0 +1,79 @@ +# this make file is simply to help autogenerate these files: +# ni_route_values.h +# ni_device_routes.h +# in order to do this, we are also generating a python representation (using +# ctypesgen) of ../../comedi.h. +# This allows us to sort NI signal/terminal names numerically to use a binary +# search through the device_routes tables to find valid routes. + +ALL: + @echo Typical targets: + @echo "\`make csv-files\`" + @echo " Creates new csv-files using content of c-files of existing" + @echo " ni_routing/* content. New csv files are placed in csv" + @echo " sub-directory." + @echo "\`make c-files\`" + @echo " Creates new c-files using content of csv sub-directory. These" + @echo " new c-files can be compared to the active content in the" + @echo " ni_routing directory." + @echo "\`make csv-blank\`" + @echo " Create a new blank csv file. This is useful for establishing a" + @echo " new data table for either a device family \(less likely\) or a" + @echo " specific board of an existing device family \(more likely\)." + @echo "\`make clean-partial\`" + @echo " Remove all generated files/directories EXCEPT for csv/c files." + @echo "\`make clean\`" + @echo " Remove all generated files/directories." + @echo "\`make everything\`" + @echo " Build all csv-files, then all new c-files." + +everything : csv-files c-files csv-blank + +CPPFLAGS=-D"BIT(x)=(1UL<<(x))" -D__user= + +comedi_h.py : ../../../comedi.h + ctypesgen $< --include "sys/ioctl.h" --cpp 'gcc -E $(CPPFLAGS)' -o $@ + +convert_c_to_py: all_cfiles.c + gcc -g convert_c_to_py.c -o convert_c_to_py -std=c99 + +ni_values.py: convert_c_to_py + ./convert_c_to_py + +csv-files : ni_values.py comedi_h.py + ./convert_py_to_csv.py + +csv-blank : + ./make_blank_csv.py + @echo New blank csv signal table in csv/blank_route_table.csv + +c-files : comedi_h.py + ./convert_csv_to_c.py --route_values --device_routes + +ROUTE_VALUES_SRC=$(wildcard ../ni_route_values/*.c) +DEVICE_ROUTES_SRC=$(wildcard ../ni_device_routes/*.c) +all_cfiles.c : $(DEVICE_ROUTES_SRC) $(ROUTE_VALUES_SRC) + @for i in $(DEVICE_ROUTES_SRC) $(ROUTE_VALUES_SRC); do \ + echo "#include \"$$i\"" >> all_cfiles.c; \ + done + +clean-partial : + $(RM) -rf comedi_h.py ni_values.py convert_c_to_py all_cfiles.c *.pyc \ + __pycache__/ + +clean : partial_clean + $(RM) -rf c/ csv/ + +# Note: One could also use ctypeslib in order to generate these files. The +# caveat is that ctypeslib does not do a great job at handling macro functions. +# The make rules are as follows: +# comedi.h.xml : ../../comedi.h +# # note that we have to use PWD here to avoid h2xml finding a system +# # installed version of the comedilib/comedi.h file +# h2xml ${PWD}/../../comedi.h -c -D__user="" -D"BIT(x)=(1<<(x))" \ +# -o comedi.h.xml +# +# comedi_h.py : comedi.h.xml +# xml2py ./comedi.h.xml -o comedi_h.py +# clean : +# rm -f comedi.h.xml comedi_h.py comedi_h.pyc diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c b/drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c new file mode 100644 index 000000000000..dedb6f2fc678 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ + +#include <stdint.h> +#include <stdbool.h> +#include <stddef.h> +#include <errno.h> +#include <stdlib.h> + +typedef uint8_t u8; +typedef uint16_t u16; +typedef int8_t s8; +#define __user +#define BIT(x) (1UL << (x)) + +#define NI_ROUTE_VALUE_EXTERNAL_CONVERSION 1 + +#include "../ni_route_values.c" +#include "../ni_device_routes.c" +#include "all_cfiles.c" + +#include <stdio.h> + +#define RVij(rv, src, dest) ((rv)->register_values[(dest)][(src)]) + +/* + * write out + * { + * "family" : "<family-name>", + * "register_values": { + * <destination0>:[src0, src1, ...], + * <destination0>:[src0, src1, ...], + * ... + * } + * } + */ +void family_write(const struct family_route_values *rv, FILE *fp) +{ + fprintf(fp, + " \"%s\" : {\n" + " # dest -> {src0:val0, src1:val1, ...}\n" + , rv->family); + for (unsigned int dest = NI_NAMES_BASE; + dest < (NI_NAMES_BASE + NI_NUM_NAMES); + ++dest) { + unsigned int src = NI_NAMES_BASE; + + for (; src < (NI_NAMES_BASE + NI_NUM_NAMES) && + RVij(rv, B(src), B(dest)) == 0; ++src) + ; + + if (src >= (NI_NAMES_BASE + NI_NUM_NAMES)) + continue; /* no data here */ + + fprintf(fp, " %u : {\n", dest); + for (src = NI_NAMES_BASE; src < (NI_NAMES_BASE + NI_NUM_NAMES); + ++src) { + register_type r = RVij(rv, B(src), B(dest)); + const char *M; + + if (r == 0) { + continue; + } else if (MARKED_V(r)) { + M = "V"; + } else if (MARKED_I(r)) { + M = "I"; + } else if (MARKED_U(r)) { + M = "U"; + } else { + fprintf(stderr, + "Invalid register marking %s[%u][%u] = %u\n", + rv->family, dest, src, r); + exit(1); + } + + fprintf(fp, " %u : \"%s(%u)\",\n", + src, M, UNMARK(r)); + } + fprintf(fp, " },\n"); + } + fprintf(fp, " },\n\n"); +} + +bool is_valid_ni_sig(unsigned int sig) +{ + return (sig >= NI_NAMES_BASE) && (sig < (NI_NAMES_BASE + NI_NUM_NAMES)); +} + +/* + * write out + * { + * "family" : "<family-name>", + * "register_values": { + * <destination0>:[src0, src1, ...], + * <destination0>:[src0, src1, ...], + * ... + * } + * } + */ +void device_write(const struct ni_device_routes *dR, FILE *fp) +{ + fprintf(fp, + " \"%s\" : {\n" + " # dest -> [src0, src1, ...]\n" + , dR->device); + + unsigned int i = 0; + + while (dR->routes[i].dest != 0) { + if (!is_valid_ni_sig(dR->routes[i].dest)) { + fprintf(stderr, + "Invalid NI signal value [%u] for destination %s.[%u]\n", + dR->routes[i].dest, dR->device, i); + exit(1); + } + + fprintf(fp, " %u : [", dR->routes[i].dest); + + unsigned int j = 0; + + while (dR->routes[i].src[j] != 0) { + if (!is_valid_ni_sig(dR->routes[i].src[j])) { + fprintf(stderr, + "Invalid NI signal value [%u] for source %s.[%u].[%u]\n", + dR->routes[i].src[j], dR->device, i, j); + exit(1); + } + + fprintf(fp, "%u,", dR->routes[i].src[j]); + + ++j; + } + fprintf(fp, "],\n"); + + ++i; + } + fprintf(fp, " },\n\n"); +} + +int main(void) +{ + FILE *fp = fopen("ni_values.py", "w"); + + /* write route register values */ + fprintf(fp, "ni_route_values = {\n"); + for (int i = 0; ni_all_route_values[i]; ++i) + family_write(ni_all_route_values[i], fp); + fprintf(fp, "}\n\n"); + + /* write valid device routes */ + fprintf(fp, "ni_device_routes = {\n"); + for (int i = 0; ni_device_routes_list[i]; ++i) + device_write(ni_device_routes_list[i], fp); + fprintf(fp, "}\n"); + + /* finish; close file */ + fclose(fp); + return 0; +} diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/convert_csv_to_c.py b/drivers/staging/comedi/drivers/ni_routing/tools/convert_csv_to_c.py new file mode 100755 index 000000000000..532eb6372a5a --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/convert_csv_to_c.py @@ -0,0 +1,503 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap + +# This is simply to aide in creating the entries in the order of the value of +# the device-global NI signal/terminal constants defined in comedi.h +import comedi_h +import os, sys, re +from csv_collection import CSVCollection + + +def c_to_o(filename, prefix='\t\t\t\t\t ni_routing/', suffix=' \\'): + if not filename.endswith('.c'): + return '' + return prefix + filename.rpartition('.c')[0] + '.o' + suffix + + +def routedict_to_structinit_single(name, D, return_name=False): + Locals = dict() + lines = [ + '\t.family = "{}",'.format(name), + '\t.register_values = {', + '\t\t/*', + '\t\t * destination = {', + '\t\t * source = register value,', + '\t\t * ...', + '\t\t * }', + '\t\t */', + ] + if (False): + # print table with index0:src, index1:dest + D0 = D # (src-> dest->reg_value) + #D1 : destD + else: + D0 = dict() + for src, destD in D.items(): + for dest, val in destD.items(): + D0.setdefault(dest, {})[src] = val + + + D0 = sorted(D0.items(), key=lambda i: eval(i[0], comedi_h.__dict__, Locals)) + + for D0_sig, D1_D in D0: + D1 = sorted(D1_D.items(), key=lambda i: eval(i[0], comedi_h.__dict__, Locals)) + + lines.append('\t\t[B({})] = {{'.format(D0_sig)) + for D1_sig, value in D1: + if not re.match('[VIU]\([^)]*\)', value): + sys.stderr.write('Invalid register format: {}\n'.format(repr(value))) + sys.stderr.write( + 'Register values should be formatted with V(),I(),or U()\n') + raise RuntimeError('Invalid register values format') + lines.append('\t\t\t[B({})]\t= {},'.format(D1_sig, value)) + lines.append('\t\t},') + lines.append('\t},') + + lines = '\n'.join(lines) + if return_name: + return N, lines + else: + return lines + + +def routedict_to_routelist_single(name, D, indent=1): + Locals = dict() + + indents = dict( + I0 = '\t'*(indent), + I1 = '\t'*(indent+1), + I2 = '\t'*(indent+2), + I3 = '\t'*(indent+3), + I4 = '\t'*(indent+4), + ) + + if (False): + # data is src -> dest-list + D0 = D + keyname = 'src' + valname = 'dest' + else: + # data is dest -> src-list + keyname = 'dest' + valname = 'src' + D0 = dict() + for src, destD in D.items(): + for dest, val in destD.items(): + D0.setdefault(dest, {})[src] = val + + # Sort by order of device-global names (numerically) + D0 = sorted(D0.items(), key=lambda i: eval(i[0], comedi_h.__dict__, Locals)) + + lines = [ '{I0}.device = "{name}",\n' + '{I0}.routes = (struct ni_route_set[]){{' + .format(name=name, **indents) ] + for D0_sig, D1_D in D0: + D1 = [ k for k,v in D1_D.items() if v ] + D1.sort(key=lambda i: eval(i, comedi_h.__dict__, Locals)) + + lines.append('{I1}{{\n{I2}.{keyname} = {D0_sig},\n' + '{I2}.{valname} = (int[]){{' + .format(keyname=keyname, valname=valname, D0_sig=D0_sig, **indents) + ) + for D1_sig in D1: + lines.append( '{I3}{D1_sig},'.format(D1_sig=D1_sig, **indents) ) + lines.append( '{I3}0, /* Termination */'.format(**indents) ) + + lines.append('{I2}}}\n{I1}}},'.format(**indents)) + + lines.append('{I1}{{ /* Termination of list */\n{I2}.{keyname} = 0,\n{I1}}},' + .format(keyname=keyname, **indents)) + + lines.append('{I0}}},'.format(**indents)) + + return '\n'.join(lines) + + +class DeviceRoutes(CSVCollection): + MKFILE_SEGMENTS = 'device-route.mk' + SET_C = 'ni_device_routes.c' + ITEMS_DIR = 'ni_device_routes' + EXTERN_H = 'all.h' + OUTPUT_DIR = 'c' + + output_file_top = """\ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "ni_device_routes.h" +#include "{extern_h}"\ +""".format(filename=SET_C, extern_h=os.path.join(ITEMS_DIR, EXTERN_H)) + + extern_header = """\ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H +#define _COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H + +#include "../ni_device_routes.h" + +{externs} + +#endif //_COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H +""" + + single_output_file_top = """\ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "{extern_h}" + +struct ni_device_routes {table_name} = {{\ +""" + + def __init__(self, pattern='csv/device_routes/*.csv'): + super(DeviceRoutes,self).__init__(pattern) + + def to_listinit(self): + chunks = [ self.output_file_top, + '', + 'struct ni_device_routes *const ni_device_routes_list[] = {' + ] + # put the sheets in lexical order of device numbers then bus + sheets = sorted(self.items(), key=lambda i : tuple(i[0].split('-')[::-1]) ) + + externs = [] + objs = [c_to_o(self.SET_C)] + + for sheet,D in sheets: + S = sheet.lower() + dev_table_name = 'ni_{}_device_routes'.format(S.replace('-','_')) + sheet_filename = os.path.join(self.ITEMS_DIR,'{}.c'.format(S)) + externs.append('extern struct ni_device_routes {};'.format(dev_table_name)) + + chunks.append('\t&{},'.format(dev_table_name)) + + s_chunks = [ + self.single_output_file_top.format( + filename = sheet_filename, + table_name = dev_table_name, + extern_h = self.EXTERN_H, + ), + routedict_to_routelist_single(S, D), + '};', + ] + + objs.append(c_to_o(sheet_filename)) + + with open(os.path.join(self.OUTPUT_DIR, sheet_filename), 'w') as f: + f.write('\n'.join(s_chunks)) + f.write('\n') + + with open(os.path.join(self.OUTPUT_DIR, self.MKFILE_SEGMENTS), 'w') as f: + f.write('# This is the segment that should be included in comedi/drivers/Makefile\n') + f.write('ni_routing-objs\t\t\t\t+= \\\n') + f.write('\n'.join(objs)) + f.write('\n') + + EXTERN_H = os.path.join(self.ITEMS_DIR, self.EXTERN_H) + with open(os.path.join(self.OUTPUT_DIR, EXTERN_H), 'w') as f: + f.write(self.extern_header.format( + filename=EXTERN_H, externs='\n'.join(externs))) + + chunks.append('\tNULL,') # terminate list + chunks.append('};') + return '\n'.join(chunks) + + def save(self): + filename=os.path.join(self.OUTPUT_DIR, self.SET_C) + + try: + os.makedirs(os.path.join(self.OUTPUT_DIR, self.ITEMS_DIR)) + except: + pass + with open(filename,'w') as f: + f.write( self.to_listinit() ) + f.write( '\n' ) + + +class RouteValues(CSVCollection): + MKFILE_SEGMENTS = 'route-values.mk' + SET_C = 'ni_route_values.c' + ITEMS_DIR = 'ni_route_values' + EXTERN_H = 'all.h' + OUTPUT_DIR = 'c' + + output_file_top = """\ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes the tables that are a list of all the values of various + * signals routes available on NI hardware. In many cases, one does not + * explicitly make these routes, rather one might indicate that something is + * used as the source of one particular trigger or another (using + * *_src=TRIG_EXT). + * + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "ni_route_values.h" +#include "{extern_h}"\ +""".format(filename=SET_C, extern_h=os.path.join(ITEMS_DIR, EXTERN_H)) + + extern_header = """\ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H +#define _COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H + +#include "../ni_route_values.h" + +{externs} + +#endif //_COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H +""" + + single_output_file_top = """\ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * Route information for {sheet} boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes a list of all the values of various signals routes + * available on NI 660x hardware. In many cases, one does not explicitly make + * these routes, rather one might indicate that something is used as the source + * of one particular trigger or another (using *_src=TRIG_EXT). + * + * The contents of this file can be generated using the tools in + * comedi/drivers/ni_routing/tools. This file also contains specific notes to + * this family of devices. + * + * Please use those tools to help maintain the contents of this file, but be + * mindful to not lose the notes already made in this file, since these notes + * are critical to a complete undertsanding of the register values of this + * family. + */ + +#include "../ni_route_values.h" +#include "{extern_h}" + +const struct family_route_values {table_name} = {{\ +""" + + def __init__(self, pattern='csv/route_values/*.csv'): + super(RouteValues,self).__init__(pattern) + + def to_structinit(self): + chunks = [ self.output_file_top, + '', + 'const struct family_route_values *const ni_all_route_values[] = {' + ] + # put the sheets in lexical order for consistency + sheets = sorted(self.items(), key=lambda i : i[0] ) + + externs = [] + objs = [c_to_o(self.SET_C)] + + for sheet,D in sheets: + S = sheet.lower() + fam_table_name = '{}_route_values'.format(S.replace('-','_')) + sheet_filename = os.path.join(self.ITEMS_DIR,'{}.c'.format(S)) + externs.append('extern const struct family_route_values {};'.format(fam_table_name)) + + chunks.append('\t&{},'.format(fam_table_name)) + + s_chunks = [ + self.single_output_file_top.format( + filename = sheet_filename, + sheet = sheet.upper(), + table_name = fam_table_name, + extern_h = self.EXTERN_H, + ), + routedict_to_structinit_single(S, D), + '};', + ] + + objs.append(c_to_o(sheet_filename)) + + with open(os.path.join(self.OUTPUT_DIR, sheet_filename), 'w') as f: + f.write('\n'.join(s_chunks)) + f.write( '\n' ) + + with open(os.path.join(self.OUTPUT_DIR, self.MKFILE_SEGMENTS), 'w') as f: + f.write('# This is the segment that should be included in comedi/drivers/Makefile\n') + f.write('ni_routing-objs\t\t\t\t+= \\\n') + f.write('\n'.join(objs)) + f.write('\n') + + EXTERN_H = os.path.join(self.ITEMS_DIR, self.EXTERN_H) + with open(os.path.join(self.OUTPUT_DIR, EXTERN_H), 'w') as f: + f.write(self.extern_header.format( + filename=EXTERN_H, externs='\n'.join(externs))) + + chunks.append('\tNULL,') # terminate list + chunks.append('};') + return '\n'.join(chunks) + + def save(self): + filename=os.path.join(self.OUTPUT_DIR, self.SET_C) + + try: + os.makedirs(os.path.join(self.OUTPUT_DIR, self.ITEMS_DIR)) + except: + pass + with open(filename,'w') as f: + f.write( self.to_structinit() ) + f.write( '\n' ) + + + +if __name__ == '__main__': + import argparse + parser = argparse.ArgumentParser() + parser.add_argument( '--route_values', action='store_true', + help='Extract route values from csv/route_values/*.csv' ) + parser.add_argument( '--device_routes', action='store_true', + help='Extract route values from csv/device_routes/*.csv' ) + args = parser.parse_args() + KL = list() + if args.route_values: + KL.append( RouteValues ) + if args.device_routes: + KL.append( DeviceRoutes ) + if not KL: + parser.error('nothing to do...') + for K in KL: + doc = K() + doc.save() diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/convert_py_to_csv.py b/drivers/staging/comedi/drivers/ni_routing/tools/convert_py_to_csv.py new file mode 100755 index 000000000000..b3e6472bac22 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/convert_py_to_csv.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap + +from os import path +import os, csv +from itertools import chain + +from csv_collection import CSVCollection +from ni_names import value_to_name +import ni_values + +CSV_DIR = 'csv' + +def iter_src_values(D): + return D.items() + +def iter_src(D): + for dest in D: + yield dest, 1 + +def create_csv(name, D, src_iter): + # have to change dest->{src:val} to src->{dest:val} + fieldnames = [value_to_name[i] for i in sorted(D.keys())] + fieldnames.insert(0, CSVCollection.source_column_name) + + S = dict() + for dest, srcD in D.items(): + for src,val in src_iter(srcD): + S.setdefault(src,{})[dest] = val + + S = sorted(S.items(), key = lambda src_destD : src_destD[0]) + + + csv_fname = path.join(CSV_DIR, name + '.csv') + with open(csv_fname, 'w') as F_csv: + dR = csv.DictWriter(F_csv, fieldnames, delimiter=';', quotechar='"') + dR.writeheader() + + # now change the json back into the csv dictionaries + rows = [ + dict(chain( + ((CSVCollection.source_column_name,value_to_name[src]),), + *(((value_to_name[dest],v),) for dest,v in destD.items()) + )) + for src, destD in S + ] + + dR.writerows(rows) + + +def to_csv(): + for d in ['route_values', 'device_routes']: + try: + os.makedirs(path.join(CSV_DIR,d)) + except: + pass + + for family, dst_src_map in ni_values.ni_route_values.items(): + create_csv(path.join('route_values',family), dst_src_map, iter_src_values) + + for device, dst_src_map in ni_values.ni_device_routes.items(): + create_csv(path.join('device_routes',device), dst_src_map, iter_src) + + +if __name__ == '__main__': + to_csv() diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/csv_collection.py b/drivers/staging/comedi/drivers/ni_routing/tools/csv_collection.py new file mode 100644 index 000000000000..12617329a928 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/csv_collection.py @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap + +import os, csv, glob + +class CSVCollection(dict): + delimiter=';' + quotechar='"' + source_column_name = 'Sources / Destinations' + + """ + This class is a dictionary representation of the collection of sheets that + exist in a given .ODS file. + """ + def __init__(self, pattern, skip_commented_lines=True, strip_lines=True): + super(CSVCollection, self).__init__() + self.pattern = pattern + C = '#' if skip_commented_lines else 'blahblahblah' + + if strip_lines: + strip = lambda s:s.strip() + else: + strip = lambda s:s + + # load all CSV files + key = self.source_column_name + for fname in glob.glob(pattern): + with open(fname) as F: + dR = csv.DictReader(F, delimiter=self.delimiter, + quotechar=self.quotechar) + name = os.path.basename(fname).partition('.')[0] + D = { + r[key]:{f:strip(c) for f,c in r.items() + if f != key and f[:1] not in ['', C] and + strip(c)[:1] not in ['', C]} + for r in dR if r[key][:1] not in ['', C] + } + # now, go back through and eliminate all empty dictionaries + D = {k:v for k,v in D.items() if v} + self[name] = D diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/make_blank_csv.py b/drivers/staging/comedi/drivers/ni_routing/tools/make_blank_csv.py new file mode 100755 index 000000000000..89c90a0ba24d --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/make_blank_csv.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap + +from os import path +import os, csv + +from csv_collection import CSVCollection +from ni_names import value_to_name + +CSV_DIR = 'csv' + +def to_csv(): + try: + os.makedirs(CSV_DIR) + except: + pass + + csv_fname = path.join(CSV_DIR, 'blank_route_table.csv') + + fieldnames = [sig for sig_val, sig in sorted(value_to_name.items())] + fieldnames.insert(0, CSVCollection.source_column_name) + + with open(csv_fname, 'w') as F_csv: + dR = csv.DictWriter(F_csv, fieldnames, delimiter=';', quotechar='"') + dR.writeheader() + + for sig in fieldnames[1:]: + dR.writerow({CSVCollection.source_column_name: sig}) + +if __name__ == '__main__': + to_csv() diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/ni_names.py b/drivers/staging/comedi/drivers/ni_routing/tools/ni_names.py new file mode 100644 index 000000000000..5f9b825968b1 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/ni_names.py @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap +""" +This file helps to extract string names of NI signals as included in comedi.h +between NI_NAMES_BASE and NI_NAMES_BASE+NI_NUM_NAMES. +""" + +# This is simply to aide in creating the entries in the order of the value of +# the device-global NI signal/terminal constants defined in comedi.h +import comedi_h + + +ni_macros = ( + 'NI_PFI', + 'TRIGGER_LINE', + 'NI_RTSI_BRD', + 'NI_CtrSource', + 'NI_CtrGate', + 'NI_CtrAux', + 'NI_CtrA', + 'NI_CtrB', + 'NI_CtrZ', + 'NI_CtrArmStartTrigger', + 'NI_CtrInternalOutput', + 'NI_CtrOut', + 'NI_CtrSampleClock', +) + +def get_ni_names(): + name_dict = dict() + + # load all the static names; start with those that do not begin with NI_ + name_dict['PXI_Star'] = comedi_h.PXI_Star + name_dict['PXI_Clk10'] = comedi_h.PXI_Clk10 + + #load all macro values + for fun in ni_macros: + f = getattr(comedi_h, fun) + name_dict.update({ + '{}({})'.format(fun,i):f(i) for i in range(1 + f(-1) - f(0)) + }) + + #load everything else in ni_common_signal_names enum + name_dict.update({ + k:v for k,v in comedi_h.__dict__.items() + if k.startswith('NI_') and (not callable(v)) and + comedi_h.NI_COUNTER_NAMES_MAX < v < (comedi_h.NI_NAMES_BASE + comedi_h.NI_NUM_NAMES) + }) + + # now create reverse lookup (value -> name) + + val_dict = {v:k for k,v in name_dict.items()} + + return name_dict, val_dict + +name_to_value, value_to_name = get_ni_names() diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h index 831088c5cabb..6c023b40fb53 100644 --- a/drivers/staging/comedi/drivers/ni_stc.h +++ b/drivers/staging/comedi/drivers/ni_stc.h @@ -15,6 +15,7 @@ #define _COMEDI_NI_STC_H #include "ni_tio.h" +#include "ni_routes.h" /* * Registers in the National Instruments DAQ-STC chip @@ -253,6 +254,8 @@ #define NISTC_RTSI_TRIG_OLD_CLK_CHAN 7 #define NISTC_RTSI_TRIG_NUM_CHAN(_m) ((_m) ? 8 : 7) #define NISTC_RTSI_TRIG_DIR(_c, _m) ((_m) ? BIT(8 + (_c)) : BIT(7 + (_c))) +#define NISTC_RTSI_TRIG_DIR_SUB_SEL1 BIT(2) /* only for M-Series */ +#define NISTC_RTSI_TRIG_DIR_SUB_SEL1_SHIFT 2 /* only for M-Series */ #define NISTC_RTSI_TRIG_USE_CLK BIT(1) #define NISTC_RTSI_TRIG_DRV_CLK BIT(0) @@ -281,11 +284,15 @@ #define NISTC_ATRIG_ETC_REG 61 #define NISTC_ATRIG_ETC_GPFO_1_ENA BIT(15) #define NISTC_ATRIG_ETC_GPFO_0_ENA BIT(14) -#define NISTC_ATRIG_ETC_GPFO_0_SEL(x) (((x) & 0x3) << 11) +#define NISTC_ATRIG_ETC_GPFO_0_SEL(x) (((x) & 0x7) << 11) +#define NISTC_ATRIG_ETC_GPFO_0_SEL_TO_SRC(x) (((x) >> 11) & 0x7) #define NISTC_ATRIG_ETC_GPFO_1_SEL BIT(7) +#define NISTC_ATRIG_ETC_GPFO_1_SEL_TO_SRC(x) (((x) >> 7) & 0x1) #define NISTC_ATRIG_ETC_DRV BIT(4) #define NISTC_ATRIG_ETC_ENA BIT(3) #define NISTC_ATRIG_ETC_MODE(x) (((x) & 0x7) << 0) +#define NISTC_GPFO_0_G_OUT 0 /* input to GPFO_0_SEL for Ctr0Out */ +#define NISTC_GPFO_1_G_OUT 0 /* input to GPFO_1_SEL for Ctr1Out */ #define NISTC_AI_START_STOP_REG 62 #define NISTC_AI_START_POLARITY BIT(15) @@ -422,6 +429,7 @@ #define NISTC_RTSI_TRIGA_OUT_REG 79 #define NISTC_RTSI_TRIGB_OUT_REG 80 #define NISTC_RTSI_TRIGB_SUB_SEL1 BIT(15) /* not for M-Series */ +#define NISTC_RTSI_TRIGB_SUB_SEL1_SHIFT 15 /* not for M-Series */ #define NISTC_RTSI_TRIG(_c, _s) (((_s) & 0xf) << (((_c) % 4) * 4)) #define NISTC_RTSI_TRIG_MASK(_c) NISTC_RTSI_TRIG((_c), 0xf) #define NISTC_RTSI_TRIG_TO_SRC(_c, _b) (((_b) >> (((_c) % 4) * 4)) & 0xf) @@ -953,6 +961,7 @@ struct ni_board_struct { int reg_type; unsigned int has_8255:1; unsigned int has_32dio_chan:1; + unsigned int dio_speed; /* not for e-series */ enum caldac_enum caldac[3]; }; @@ -962,6 +971,7 @@ struct ni_board_struct { #define NUM_GPCT 2 #define NUM_PFI_OUTPUT_SELECT_REGS 6 +#define NUM_RTSI_SHARED_MUXS (NI_RTSI_BRD(-1) - NI_RTSI_BRD(0) + 1) #define M_SERIES_EEPROM_SIZE 1024 @@ -1057,6 +1067,73 @@ struct ni_private { * possible. */ unsigned int ao_needs_arming:1; + + /* device signal route tables */ + struct ni_route_tables routing_tables; + + /* + * Number of clients (RTSI lines) for current RTSI MUX source. + * + * This allows resource management of RTSI board/shared mux lines by + * marking the RTSI line that is using a particular MUX. Currently, + * these lines are only automatically allocated based on source of the + * route requested. Furthermore, the only way that this auto-allocation + * and configuration works is via the globally-named ni signal/terminal + * names. + */ + u8 rtsi_shared_mux_usage[NUM_RTSI_SHARED_MUXS]; + + /* + * softcopy register for rtsi shared mux/board lines. + * For e-series, the bit layout of this register is + * (docs: mhddk/nieseries/ChipObjects/tSTC.{h,ipp}, + * DAQ-STC, Jan 1999, 340934B-01): + * bits 0:2 -- NI_RTSI_BRD(0) source selection + * bits 3:5 -- NI_RTSI_BRD(1) source selection + * bits 6:8 -- NI_RTSI_BRD(2) source selection + * bits 9:11 -- NI_RTSI_BRD(3) source selection + * bit 12 -- NI_RTSI_BRD(0) direction, 0:input, 1:output + * bit 13 -- NI_RTSI_BRD(1) direction, 0:input, 1:output + * bit 14 -- NI_RTSI_BRD(2) direction, 0:input, 1:output + * bit 15 -- NI_RTSI_BRD(3) direction, 0:input, 1:output + * According to DAQ-STC: + * RTSI Board Interface--Configured as an input, each bidirectional + * RTSI_BRD pin can drive any of the seven RTSI_TRIGGER pins. + * RTSI_BRD<0..1> can also be driven by AI STOP and RTSI_BRD<2..3> + * can also be driven by the AI START and SCAN_IN_PROG signals. + * These pins provide a mechanism for additional board-level signals + * to be sent on or received from the RTSI bus. + * Couple of comments: + * - Neither the DAQ-STC nor the MHDDK is clear on what the direction + * of the RTSI_BRD pins actually means. There does not appear to be + * any clear indication on what "output" would mean, since the point + * of the RTSI_BRD lines is to always drive one of the + * RTSI_TRIGGER<0..6> lines. + * - The DAQ-STC also indicates that the NI_RTSI_BRD lines can be + * driven by any of the RTSI_TRIGGER<0..6> lines. + * But, looking at valid device routes, as visually imported from + * NI-MAX, there appears to be only one family (so far) that has the + * ability to route a signal from one TRIGGER_LINE to another + * TRIGGER_LINE: the 653x family of DIO devices. + * + * For m-series, the bit layout of this register is + * (docs: mhddk/nimseries/ChipObjects/tMSeries.{h,ipp}): + * bits 0:3 -- NI_RTSI_BRD(0) source selection + * bits 4:7 -- NI_RTSI_BRD(1) source selection + * bits 8:11 -- NI_RTSI_BRD(2) source selection + * bits 12:15 -- NI_RTSI_BRD(3) source selection + * Note: The m-series does not have any option to change direction of + * NI_RTSI_BRD muxes. Furthermore, there are no register values that + * indicate the ability to have TRIGGER_LINES driving the output of + * the NI_RTSI_BRD muxes. + */ + u16 rtsi_shared_mux_reg; + + /* + * Number of clients (RTSI lines) for current RGOUT0 path. + * Stored in part of in RTSI_TRIG_DIR or RTSI_TRIGB registers + */ + u8 rgout0_usage; }; static const struct comedi_lrange range_ni_E_ao_ext; diff --git a/drivers/staging/comedi/drivers/ni_tio.c b/drivers/staging/comedi/drivers/ni_tio.c index ef919b21b7d9..0eb388c0e1f0 100644 --- a/drivers/staging/comedi/drivers/ni_tio.c +++ b/drivers/staging/comedi/drivers/ni_tio.c @@ -818,10 +818,79 @@ static int ni_tio_get_clock_src(struct ni_gpct *counter, return 0; } +static inline void ni_tio_set_gate_raw(struct ni_gpct *counter, + unsigned int gate_source) +{ + ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(counter->counter_index), + GI_GATE_SEL_MASK, GI_GATE_SEL(gate_source)); +} + +static inline void ni_tio_set_gate2_raw(struct ni_gpct *counter, + unsigned int gate_source) +{ + ni_tio_set_bits(counter, NITIO_GATE2_REG(counter->counter_index), + GI_GATE2_SEL_MASK, GI_GATE2_SEL(gate_source)); +} + +/* Set the mode bits for gate. */ +static inline void ni_tio_set_gate_mode(struct ni_gpct *counter, + unsigned int src) +{ + unsigned int mode_bits = 0; + + if (CR_CHAN(src) & NI_GPCT_DISABLED_GATE_SELECT) { + /* + * Allowing bitwise comparison here to allow non-zero raw + * register value to be used for channel when disabling. + */ + mode_bits = GI_GATING_DISABLED; + } else { + if (src & CR_INVERT) + mode_bits |= GI_GATE_POL_INVERT; + if (src & CR_EDGE) + mode_bits |= GI_RISING_EDGE_GATING; + else + mode_bits |= GI_LEVEL_GATING; + } + ni_tio_set_bits(counter, NITIO_MODE_REG(counter->counter_index), + GI_GATE_POL_INVERT | GI_GATING_MODE_MASK, + mode_bits); +} + +/* + * Set the mode bits for gate2. + * + * Previously, the code this function represents did not actually write anything + * to the register. Rather, writing to this register was reserved for the code + * ni ni_tio_set_gate2_raw. + */ +static inline void ni_tio_set_gate2_mode(struct ni_gpct *counter, + unsigned int src) +{ + /* + * The GI_GATE2_MODE bit was previously set in the code that also sets + * the gate2 source. + * We'll set mode bits _after_ source bits now, and thus, this function + * will effectively enable the second gate after all bits are set. + */ + unsigned int mode_bits = GI_GATE2_MODE; + + if (CR_CHAN(src) & NI_GPCT_DISABLED_GATE_SELECT) + /* + * Allowing bitwise comparison here to allow non-zero raw + * register value to be used for channel when disabling. + */ + mode_bits = GI_GATING_DISABLED; + if (src & CR_INVERT) + mode_bits |= GI_GATE2_POL_INVERT; + + ni_tio_set_bits(counter, NITIO_GATE2_REG(counter->counter_index), + GI_GATE2_POL_INVERT | GI_GATE2_MODE, mode_bits); +} + static int ni_660x_set_gate(struct ni_gpct *counter, unsigned int gate_source) { unsigned int chan = CR_CHAN(gate_source); - unsigned int cidx = counter->counter_index; unsigned int gate_sel; unsigned int i; @@ -854,15 +923,13 @@ static int ni_660x_set_gate(struct ni_gpct *counter, unsigned int gate_source) break; return -EINVAL; } - ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), - GI_GATE_SEL_MASK, GI_GATE_SEL(gate_sel)); + ni_tio_set_gate_raw(counter, gate_sel); return 0; } static int ni_m_set_gate(struct ni_gpct *counter, unsigned int gate_source) { unsigned int chan = CR_CHAN(gate_source); - unsigned int cidx = counter->counter_index; unsigned int gate_sel; unsigned int i; @@ -896,17 +963,13 @@ static int ni_m_set_gate(struct ni_gpct *counter, unsigned int gate_source) break; return -EINVAL; } - ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), - GI_GATE_SEL_MASK, GI_GATE_SEL(gate_sel)); + ni_tio_set_gate_raw(counter, gate_sel); return 0; } static int ni_660x_set_gate2(struct ni_gpct *counter, unsigned int gate_source) { - struct ni_gpct_device *counter_dev = counter->counter_dev; - unsigned int cidx = counter->counter_index; unsigned int chan = CR_CHAN(gate_source); - unsigned int gate2_reg = NITIO_GATE2_REG(cidx); unsigned int gate2_sel; unsigned int i; @@ -940,94 +1003,106 @@ static int ni_660x_set_gate2(struct ni_gpct *counter, unsigned int gate_source) break; return -EINVAL; } - counter_dev->regs[gate2_reg] |= GI_GATE2_MODE; - counter_dev->regs[gate2_reg] &= ~GI_GATE2_SEL_MASK; - counter_dev->regs[gate2_reg] |= GI_GATE2_SEL(gate2_sel); - ni_tio_write(counter, counter_dev->regs[gate2_reg], gate2_reg); + ni_tio_set_gate2_raw(counter, gate2_sel); return 0; } static int ni_m_set_gate2(struct ni_gpct *counter, unsigned int gate_source) { - struct ni_gpct_device *counter_dev = counter->counter_dev; - unsigned int cidx = counter->counter_index; - unsigned int chan = CR_CHAN(gate_source); - unsigned int gate2_reg = NITIO_GATE2_REG(cidx); - unsigned int gate2_sel; - /* * FIXME: We don't know what the m-series second gate codes are, * so we'll just pass the bits through for now. */ - switch (chan) { - default: - gate2_sel = chan & 0x1f; + ni_tio_set_gate2_raw(counter, gate_source); + return 0; +} + +int ni_tio_set_gate_src_raw(struct ni_gpct *counter, + unsigned int gate, unsigned int src) +{ + struct ni_gpct_device *counter_dev = counter->counter_dev; + + switch (gate) { + case 0: + /* 1. start by disabling gate */ + ni_tio_set_gate_mode(counter, NI_GPCT_DISABLED_GATE_SELECT); + /* 2. set the requested gate source */ + ni_tio_set_gate_raw(counter, src); + /* 3. reenable & set mode to starts things back up */ + ni_tio_set_gate_mode(counter, src); + break; + case 1: + if (!ni_tio_has_gate2_registers(counter_dev)) + return -EINVAL; + + /* 1. start by disabling gate */ + ni_tio_set_gate2_mode(counter, NI_GPCT_DISABLED_GATE_SELECT); + /* 2. set the requested gate source */ + ni_tio_set_gate2_raw(counter, src); + /* 3. reenable & set mode to starts things back up */ + ni_tio_set_gate2_mode(counter, src); break; + default: + return -EINVAL; } - counter_dev->regs[gate2_reg] |= GI_GATE2_MODE; - counter_dev->regs[gate2_reg] &= ~GI_GATE2_SEL_MASK; - counter_dev->regs[gate2_reg] |= GI_GATE2_SEL(gate2_sel); - ni_tio_write(counter, counter_dev->regs[gate2_reg], gate2_reg); return 0; } +EXPORT_SYMBOL_GPL(ni_tio_set_gate_src_raw); int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned int gate, unsigned int src) { struct ni_gpct_device *counter_dev = counter->counter_dev; - unsigned int cidx = counter->counter_index; - unsigned int chan = CR_CHAN(src); - unsigned int gate2_reg = NITIO_GATE2_REG(cidx); - unsigned int mode = 0; + /* + * mask off disable flag. This high bit still passes CR_CHAN. + * Doing this allows one to both set the gate as disabled, but also + * change the route value of the gate. + */ + int chan = CR_CHAN(src) & (~NI_GPCT_DISABLED_GATE_SELECT); + int ret; switch (gate) { case 0: - if (chan == NI_GPCT_DISABLED_GATE_SELECT) { - ni_tio_set_bits(counter, NITIO_MODE_REG(cidx), - GI_GATING_MODE_MASK, - GI_GATING_DISABLED); - return 0; - } - if (src & CR_INVERT) - mode |= GI_GATE_POL_INVERT; - if (src & CR_EDGE) - mode |= GI_RISING_EDGE_GATING; - else - mode |= GI_LEVEL_GATING; - ni_tio_set_bits(counter, NITIO_MODE_REG(cidx), - GI_GATE_POL_INVERT | GI_GATING_MODE_MASK, - mode); + /* 1. start by disabling gate */ + ni_tio_set_gate_mode(counter, NI_GPCT_DISABLED_GATE_SELECT); + /* 2. set the requested gate source */ switch (counter_dev->variant) { case ni_gpct_variant_e_series: case ni_gpct_variant_m_series: - default: - return ni_m_set_gate(counter, src); + ret = ni_m_set_gate(counter, chan); + break; case ni_gpct_variant_660x: - return ni_660x_set_gate(counter, src); + ret = ni_660x_set_gate(counter, chan); + break; + default: + return -EINVAL; } + if (ret) + return ret; + /* 3. reenable & set mode to starts things back up */ + ni_tio_set_gate_mode(counter, src); break; case 1: if (!ni_tio_has_gate2_registers(counter_dev)) return -EINVAL; - if (chan == NI_GPCT_DISABLED_GATE_SELECT) { - counter_dev->regs[gate2_reg] &= ~GI_GATE2_MODE; - ni_tio_write(counter, counter_dev->regs[gate2_reg], - gate2_reg); - return 0; - } - if (src & CR_INVERT) - counter_dev->regs[gate2_reg] |= GI_GATE2_POL_INVERT; - else - counter_dev->regs[gate2_reg] &= ~GI_GATE2_POL_INVERT; + /* 1. start by disabling gate */ + ni_tio_set_gate2_mode(counter, NI_GPCT_DISABLED_GATE_SELECT); + /* 2. set the requested gate source */ switch (counter_dev->variant) { case ni_gpct_variant_m_series: - return ni_m_set_gate2(counter, src); + ret = ni_m_set_gate2(counter, chan); + break; case ni_gpct_variant_660x: - return ni_660x_set_gate2(counter, src); + ret = ni_660x_set_gate2(counter, chan); + break; default: return -EINVAL; } + if (ret) + return ret; + /* 3. reenable & set mode to starts things back up */ + ni_tio_set_gate2_mode(counter, src); break; default: return -EINVAL; @@ -1047,19 +1122,21 @@ static int ni_tio_set_other_src(struct ni_gpct *counter, unsigned int index, return -EINVAL; abz_reg = NITIO_ABZ_REG(cidx); - switch (index) { - case NI_GPCT_SOURCE_ENCODER_A: + + /* allow for new device-global names */ + if (index == NI_GPCT_SOURCE_ENCODER_A || + (index >= NI_CtrA(0) && index <= NI_CtrA(-1))) { shift = 10; - break; - case NI_GPCT_SOURCE_ENCODER_B: + } else if (index == NI_GPCT_SOURCE_ENCODER_B || + (index >= NI_CtrB(0) && index <= NI_CtrB(-1))) { shift = 5; - break; - case NI_GPCT_SOURCE_ENCODER_Z: + } else if (index == NI_GPCT_SOURCE_ENCODER_Z || + (index >= NI_CtrZ(0) && index <= NI_CtrZ(-1))) { shift = 0; - break; - default: + } else { return -EINVAL; } + mask = 0x1f << shift; if (source > 0x1f) source = 0x1f; /* Disable gate */ @@ -1070,6 +1147,39 @@ static int ni_tio_set_other_src(struct ni_gpct *counter, unsigned int index, return 0; } +static int ni_tio_get_other_src(struct ni_gpct *counter, unsigned int index, + unsigned int *source) +{ + struct ni_gpct_device *counter_dev = counter->counter_dev; + unsigned int cidx = counter->counter_index; + unsigned int abz_reg, shift, mask; + + if (counter_dev->variant != ni_gpct_variant_m_series) + /* A,B,Z only valid for m-series */ + return -EINVAL; + + abz_reg = NITIO_ABZ_REG(cidx); + + /* allow for new device-global names */ + if (index == NI_GPCT_SOURCE_ENCODER_A || + (index >= NI_CtrA(0) && index <= NI_CtrA(-1))) { + shift = 10; + } else if (index == NI_GPCT_SOURCE_ENCODER_B || + (index >= NI_CtrB(0) && index <= NI_CtrB(-1))) { + shift = 5; + } else if (index == NI_GPCT_SOURCE_ENCODER_Z || + (index >= NI_CtrZ(0) && index <= NI_CtrZ(-1))) { + shift = 0; + } else { + return -EINVAL; + } + + mask = 0x1f; + + *source = (ni_tio_get_soft_copy(counter, abz_reg) >> shift) & mask; + return 0; +} + static int ni_660x_gate_to_generic_gate(unsigned int gate, unsigned int *src) { unsigned int source; @@ -1112,7 +1222,7 @@ static int ni_660x_gate_to_generic_gate(unsigned int gate, unsigned int *src) } *src = source; return 0; -}; +} static int ni_m_gate_to_generic_gate(unsigned int gate, unsigned int *src) { @@ -1165,7 +1275,7 @@ static int ni_m_gate_to_generic_gate(unsigned int gate, unsigned int *src) } *src = source; return 0; -}; +} static int ni_660x_gate2_to_generic_gate(unsigned int gate, unsigned int *src) { @@ -1212,7 +1322,7 @@ static int ni_660x_gate2_to_generic_gate(unsigned int gate, unsigned int *src) } *src = source; return 0; -}; +} static int ni_m_gate2_to_generic_gate(unsigned int gate, unsigned int *src) { @@ -1222,32 +1332,60 @@ static int ni_m_gate2_to_generic_gate(unsigned int gate, unsigned int *src) */ *src = gate; return 0; -}; +} + +static inline unsigned int ni_tio_get_gate_mode(struct ni_gpct *counter) +{ + unsigned int mode = ni_tio_get_soft_copy( + counter, NITIO_MODE_REG(counter->counter_index)); + unsigned int ret = 0; + + if ((mode & GI_GATING_MODE_MASK) == GI_GATING_DISABLED) + ret |= NI_GPCT_DISABLED_GATE_SELECT; + if (mode & GI_GATE_POL_INVERT) + ret |= CR_INVERT; + if ((mode & GI_GATING_MODE_MASK) != GI_LEVEL_GATING) + ret |= CR_EDGE; + + return ret; +} + +static inline unsigned int ni_tio_get_gate2_mode(struct ni_gpct *counter) +{ + unsigned int mode = ni_tio_get_soft_copy( + counter, NITIO_GATE2_REG(counter->counter_index)); + unsigned int ret = 0; + + if (!(mode & GI_GATE2_MODE)) + ret |= NI_GPCT_DISABLED_GATE_SELECT; + if (mode & GI_GATE2_POL_INVERT) + ret |= CR_INVERT; + + return ret; +} + +static inline unsigned int ni_tio_get_gate_val(struct ni_gpct *counter) +{ + return GI_BITS_TO_GATE(ni_tio_get_soft_copy(counter, + NITIO_INPUT_SEL_REG(counter->counter_index))); +} + +static inline unsigned int ni_tio_get_gate2_val(struct ni_gpct *counter) +{ + return GI_BITS_TO_GATE2(ni_tio_get_soft_copy(counter, + NITIO_GATE2_REG(counter->counter_index))); +} static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned int gate_index, unsigned int *gate_source) { - struct ni_gpct_device *counter_dev = counter->counter_dev; - unsigned int cidx = counter->counter_index; - unsigned int mode; - unsigned int reg; unsigned int gate; int ret; - mode = ni_tio_get_soft_copy(counter, NITIO_MODE_REG(cidx)); - if (((mode & GI_GATING_MODE_MASK) == GI_GATING_DISABLED) || - (gate_index == 1 && - !(counter_dev->regs[NITIO_GATE2_REG(cidx)] & GI_GATE2_MODE))) { - *gate_source = NI_GPCT_DISABLED_GATE_SELECT; - return 0; - } - switch (gate_index) { case 0: - reg = NITIO_INPUT_SEL_REG(cidx); - gate = GI_BITS_TO_GATE(ni_tio_get_soft_copy(counter, reg)); - - switch (counter_dev->variant) { + gate = ni_tio_get_gate_val(counter); + switch (counter->counter_dev->variant) { case ni_gpct_variant_e_series: case ni_gpct_variant_m_series: default: @@ -1259,16 +1397,11 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned int gate_index, } if (ret) return ret; - if (mode & GI_GATE_POL_INVERT) - *gate_source |= CR_INVERT; - if ((mode & GI_GATING_MODE_MASK) != GI_LEVEL_GATING) - *gate_source |= CR_EDGE; + *gate_source |= ni_tio_get_gate_mode(counter); break; case 1: - reg = NITIO_GATE2_REG(cidx); - gate = GI_BITS_TO_GATE2(counter_dev->regs[reg]); - - switch (counter_dev->variant) { + gate = ni_tio_get_gate2_val(counter); + switch (counter->counter_dev->variant) { case ni_gpct_variant_e_series: case ni_gpct_variant_m_series: default: @@ -1280,11 +1413,26 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned int gate_index, } if (ret) return ret; - if (counter_dev->regs[reg] & GI_GATE2_POL_INVERT) - *gate_source |= CR_INVERT; - /* second gate can't have edge/level mode set independently */ - if ((mode & GI_GATING_MODE_MASK) != GI_LEVEL_GATING) - *gate_source |= CR_EDGE; + *gate_source |= ni_tio_get_gate2_mode(counter); + break; + default: + return -EINVAL; + } + return 0; +} + +static int ni_tio_get_gate_src_raw(struct ni_gpct *counter, + unsigned int gate_index, + unsigned int *gate_source) +{ + switch (gate_index) { + case 0: + *gate_source = ni_tio_get_gate_mode(counter) + | ni_tio_get_gate_val(counter); + break; + case 1: + *gate_source = ni_tio_get_gate2_mode(counter) + | ni_tio_get_gate2_val(counter); break; default: return -EINVAL; @@ -1347,6 +1495,107 @@ int ni_tio_insn_config(struct comedi_device *dev, } EXPORT_SYMBOL_GPL(ni_tio_insn_config); +/** + * Retrieves the register value of the current source of the output selector for + * the given destination. + * + * If the terminal for the destination is not already configured as an output, + * this function returns -EINVAL as error. + * + * Return: the register value of the destination output selector; + * -EINVAL if terminal is not configured for output. + */ +int ni_tio_get_routing(struct ni_gpct_device *counter_dev, unsigned int dest) +{ + /* we need to know the actual counter below... */ + int ctr_index = (dest - NI_COUNTER_NAMES_BASE) % NI_MAX_COUNTERS; + struct ni_gpct *counter = &counter_dev->counters[ctr_index]; + int ret = 1; + unsigned int reg; + + if (dest >= NI_CtrA(0) && dest <= NI_CtrZ(-1)) { + ret = ni_tio_get_other_src(counter, dest, ®); + } else if (dest >= NI_CtrGate(0) && dest <= NI_CtrGate(-1)) { + ret = ni_tio_get_gate_src_raw(counter, 0, ®); + } else if (dest >= NI_CtrAux(0) && dest <= NI_CtrAux(-1)) { + ret = ni_tio_get_gate_src_raw(counter, 1, ®); + /* + * This case is not possible through this interface. A user must use + * INSN_CONFIG_SET_CLOCK_SRC instead. + * } else if (dest >= NI_CtrSource(0) && dest <= NI_CtrSource(-1)) { + * ret = ni_tio_set_clock_src(counter, ®, &period_ns); + */ + } + + if (ret) + return -EINVAL; + + return reg; +} +EXPORT_SYMBOL_GPL(ni_tio_get_routing); + +/** + * Sets the register value of the selector MUX for the given destination. + * @counter_dev:Pointer to general counter device. + * @destination:Device-global identifier of route destination. + * @register_value: + * The first several bits of this value should store the desired + * value to write to the register. All other bits are for + * transmitting information that modify the mode of the particular + * destination/gate. These mode bits might include a bitwise or of + * CR_INVERT and CR_EDGE. Note that the calling function should + * have already validated the correctness of this value. + */ +int ni_tio_set_routing(struct ni_gpct_device *counter_dev, unsigned int dest, + unsigned int reg) +{ + /* we need to know the actual counter below... */ + int ctr_index = (dest - NI_COUNTER_NAMES_BASE) % NI_MAX_COUNTERS; + struct ni_gpct *counter = &counter_dev->counters[ctr_index]; + int ret; + + if (dest >= NI_CtrA(0) && dest <= NI_CtrZ(-1)) { + ret = ni_tio_set_other_src(counter, dest, reg); + } else if (dest >= NI_CtrGate(0) && dest <= NI_CtrGate(-1)) { + ret = ni_tio_set_gate_src_raw(counter, 0, reg); + } else if (dest >= NI_CtrAux(0) && dest <= NI_CtrAux(-1)) { + ret = ni_tio_set_gate_src_raw(counter, 1, reg); + /* + * This case is not possible through this interface. A user must use + * INSN_CONFIG_SET_CLOCK_SRC instead. + * } else if (dest >= NI_CtrSource(0) && dest <= NI_CtrSource(-1)) { + * ret = ni_tio_set_clock_src(counter, reg, period_ns); + */ + } else { + return -EINVAL; + } + + return ret; +} +EXPORT_SYMBOL_GPL(ni_tio_set_routing); + +/** + * Sets the given destination MUX to its default value or disable it. + * + * Return: 0 if successful; -EINVAL if terminal is unknown. + */ +int ni_tio_unset_routing(struct ni_gpct_device *counter_dev, unsigned int dest) +{ + if (dest >= NI_GATES_NAMES_BASE && dest <= NI_GATES_NAMES_MAX) + /* Disable gate (via mode bits) and set to default 0-value */ + return ni_tio_set_routing(counter_dev, dest, + NI_GPCT_DISABLED_GATE_SELECT); + /* + * This case is not possible through this interface. A user must use + * INSN_CONFIG_SET_CLOCK_SRC instead. + * if (dest >= NI_CtrSource(0) && dest <= NI_CtrSource(-1)) + * return ni_tio_set_clock_src(counter, reg, period_ns); + */ + + return -EINVAL; +} +EXPORT_SYMBOL_GPL(ni_tio_unset_routing); + static unsigned int ni_tio_read_sw_save_reg(struct comedi_device *dev, struct comedi_subdevice *s) { @@ -1504,13 +1753,15 @@ ni_gpct_device_construct(struct comedi_device *dev, unsigned int (*read)(struct ni_gpct *counter, enum ni_gpct_register reg), enum ni_gpct_variant variant, - unsigned int num_counters) + unsigned int num_counters, + unsigned int counters_per_chip, + const struct ni_route_tables *routing_tables) { struct ni_gpct_device *counter_dev; struct ni_gpct *counter; unsigned int i; - if (num_counters == 0) + if (num_counters == 0 || counters_per_chip == 0) return NULL; counter_dev = kzalloc(sizeof(*counter_dev), GFP_KERNEL); @@ -1521,6 +1772,7 @@ ni_gpct_device_construct(struct comedi_device *dev, counter_dev->write = write; counter_dev->read = read; counter_dev->variant = variant; + counter_dev->routing_tables = routing_tables; spin_lock_init(&counter_dev->regs_lock); @@ -1534,9 +1786,12 @@ ni_gpct_device_construct(struct comedi_device *dev, for (i = 0; i < num_counters; ++i) { counter = &counter_dev->counters[i]; counter->counter_dev = counter_dev; + counter->chip_index = i / counters_per_chip; + counter->counter_index = i % counters_per_chip; spin_lock_init(&counter->lock); } counter_dev->num_counters = num_counters; + counter_dev->counters_per_chip = counters_per_chip; return counter_dev; } diff --git a/drivers/staging/comedi/drivers/ni_tio.h b/drivers/staging/comedi/drivers/ni_tio.h index 23221cead8ca..340d63c74467 100644 --- a/drivers/staging/comedi/drivers/ni_tio.h +++ b/drivers/staging/comedi/drivers/ni_tio.h @@ -107,8 +107,10 @@ struct ni_gpct_device { enum ni_gpct_variant variant; struct ni_gpct *counters; unsigned int num_counters; + unsigned int counters_per_chip; unsigned int regs[NITIO_NUM_REGS]; spinlock_t regs_lock; /* protects 'regs' */ + const struct ni_route_tables *routing_tables; /* link to routes */ }; struct ni_gpct_device * @@ -119,7 +121,9 @@ ni_gpct_device_construct(struct comedi_device *dev, unsigned int (*read)(struct ni_gpct *counter, enum ni_gpct_register), enum ni_gpct_variant, - unsigned int num_counters); + unsigned int num_counters, + unsigned int counters_per_chip, + const struct ni_route_tables *routing_tables); void ni_gpct_device_destroy(struct ni_gpct_device *counter_dev); void ni_tio_init_counter(struct ni_gpct *counter); int ni_tio_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, @@ -138,4 +142,40 @@ void ni_tio_set_mite_channel(struct ni_gpct *counter, struct mite_channel *mite_chan); void ni_tio_acknowledge(struct ni_gpct *counter); +/* + * Retrieves the register value of the current source of the output selector for + * the given destination. + * + * If the terminal for the destination is not already configured as an output, + * this function returns -EINVAL as error. + * + * Return: the register value of the destination output selector; + * -EINVAL if terminal is not configured for output. + */ +int ni_tio_get_routing(struct ni_gpct_device *counter_dev, + unsigned int destination); + +/* + * Sets the register value of the selector MUX for the given destination. + * @counter_dev:Pointer to general counter device. + * @destination:Device-global identifier of route destination. + * @register_value: + * The first several bits of this value should store the desired + * value to write to the register. All other bits are for + * transmitting information that modify the mode of the particular + * destination/gate. These mode bits might include a bitwise or of + * CR_INVERT and CR_EDGE. Note that the calling function should + * have already validated the correctness of this value. + */ +int ni_tio_set_routing(struct ni_gpct_device *counter_dev, + unsigned int destination, unsigned int register_value); + +/* + * Sets the given destination MUX to its default value or disable it. + * + * Return: 0 if successful; -EINVAL if terminal is unknown. + */ +int ni_tio_unset_routing(struct ni_gpct_device *counter_dev, + unsigned int destination); + #endif /* _COMEDI_NI_TIO_H */ diff --git a/drivers/staging/comedi/drivers/ni_tio_internal.h b/drivers/staging/comedi/drivers/ni_tio_internal.h index f4d99d78208a..652a28990132 100644 --- a/drivers/staging/comedi/drivers/ni_tio_internal.h +++ b/drivers/staging/comedi/drivers/ni_tio_internal.h @@ -170,5 +170,7 @@ unsigned int ni_tio_get_soft_copy(const struct ni_gpct *counter, int ni_tio_arm(struct ni_gpct *counter, bool arm, unsigned int start_trigger); int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned int gate, unsigned int src); +int ni_tio_set_gate_src_raw(struct ni_gpct *counter, unsigned int gate, + unsigned int src); #endif /* _COMEDI_NI_TIO_INTERNAL_H */ diff --git a/drivers/staging/comedi/drivers/ni_tiocmd.c b/drivers/staging/comedi/drivers/ni_tiocmd.c index 050bee0b9515..2a9f7e9821a7 100644 --- a/drivers/staging/comedi/drivers/ni_tiocmd.c +++ b/drivers/staging/comedi/drivers/ni_tiocmd.c @@ -33,6 +33,7 @@ #include <linux/module.h> #include "ni_tio_internal.h" #include "mite.h" +#include "ni_routes.h" static void ni_tio_configure_dma(struct ni_gpct *counter, bool enable, bool read) @@ -100,6 +101,8 @@ static int ni_tio_input_cmd(struct comedi_subdevice *s) { struct ni_gpct *counter = s->private; struct ni_gpct_device *counter_dev = counter->counter_dev; + const struct ni_route_tables *routing_tables = + counter_dev->routing_tables; unsigned int cidx = counter->counter_index; struct comedi_async *async = s->async; struct comedi_cmd *cmd = &async->cmd; @@ -128,8 +131,19 @@ static int ni_tio_input_cmd(struct comedi_subdevice *s) if (cmd->start_src == TRIG_NOW) ret = ni_tio_arm(counter, true, NI_GPCT_ARM_IMMEDIATE); - else if (cmd->start_src == TRIG_EXT) - ret = ni_tio_arm(counter, true, cmd->start_arg); + else if (cmd->start_src == TRIG_EXT) { + int reg = CR_CHAN(cmd->start_arg); + + if (reg >= NI_NAMES_BASE) { + /* using a device-global name. lookup reg */ + reg = ni_get_reg_value(reg, + NI_CtrArmStartTrigger(cidx), + routing_tables); + /* mark this as a raw register value */ + reg |= NI_GPCT_HW_ARM; + } + ret = ni_tio_arm(counter, true, reg); + } } return ret; } @@ -148,6 +162,8 @@ static int ni_tio_cmd_setup(struct comedi_subdevice *s) struct comedi_cmd *cmd = &s->async->cmd; struct ni_gpct *counter = s->private; unsigned int cidx = counter->counter_index; + const struct ni_route_tables *routing_tables = + counter->counter_dev->routing_tables; int set_gate_source = 0; unsigned int gate_source; int retval = 0; @@ -159,8 +175,24 @@ static int ni_tio_cmd_setup(struct comedi_subdevice *s) set_gate_source = 1; gate_source = cmd->convert_arg; } - if (set_gate_source) - retval = ni_tio_set_gate_src(counter, 0, gate_source); + if (set_gate_source) { + if (CR_CHAN(gate_source) >= NI_NAMES_BASE) { + /* Lookup and use the real register values */ + int reg = ni_get_reg_value(CR_CHAN(gate_source), + NI_CtrGate(cidx), + routing_tables); + if (reg < 0) + return -EINVAL; + retval = ni_tio_set_gate_src_raw(counter, 0, reg); + } else { + /* + * This function must be used separately since it does + * not expect real register values and attempts to + * convert these to real register values. + */ + retval = ni_tio_set_gate_src(counter, 0, gate_source); + } + } if (cmd->flags & CMDF_WAKE_EOS) { ni_tio_set_bits(counter, NITIO_INT_ENA_REG(cidx), GI_GATE_INTERRUPT_ENABLE(cidx), @@ -203,6 +235,9 @@ int ni_tio_cmdtest(struct comedi_device *dev, struct comedi_cmd *cmd) { struct ni_gpct *counter = s->private; + unsigned int cidx = counter->counter_index; + const struct ni_route_tables *routing_tables = + counter->counter_dev->routing_tables; int err = 0; unsigned int sources; @@ -247,14 +282,37 @@ int ni_tio_cmdtest(struct comedi_device *dev, break; case TRIG_EXT: /* start_arg is the start_trigger passed to ni_tio_arm() */ + /* + * This should be done, but we don't yet know the actual + * register values. These should be tested and then documented + * in the ni_route_values/ni_*.csv files, with indication of + * who/when/which/how these these were tested. + * When at least a e/m/660x series have been tested, this code + * should be uncommented: + * + * err |= ni_check_trigger_arg(CR_CHAN(cmd->start_arg), + * NI_CtrArmStartTrigger(cidx), + * routing_tables); + */ break; } + /* + * It seems that convention is to allow either scan_begin_arg or + * convert_arg to specify the Gate source, with scan_begin_arg taking + * precedence. + */ if (cmd->scan_begin_src != TRIG_EXT) err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0); + else + err |= ni_check_trigger_arg(CR_CHAN(cmd->scan_begin_arg), + NI_CtrGate(cidx), routing_tables); if (cmd->convert_src != TRIG_EXT) err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); + else + err |= ni_check_trigger_arg(CR_CHAN(cmd->convert_arg), + NI_CtrGate(cidx), routing_tables); err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len); diff --git a/drivers/staging/comedi/drivers/tests/Makefile b/drivers/staging/comedi/drivers/tests/Makefile new file mode 100644 index 000000000000..b5d8e13d4162 --- /dev/null +++ b/drivers/staging/comedi/drivers/tests/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +# Makefile for comedi drivers unit tests +# +ccflags-$(CONFIG_COMEDI_DEBUG) := -DDEBUG + +obj-$(CONFIG_COMEDI_TESTS) += example_test.o ni_routes_test.o +CFLAGS_ni_routes_test.o := -DDEBUG diff --git a/drivers/staging/comedi/drivers/tests/example_test.c b/drivers/staging/comedi/drivers/tests/example_test.c new file mode 100644 index 000000000000..fc65158b8e8e --- /dev/null +++ b/drivers/staging/comedi/drivers/tests/example_test.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/tests/example_test.c + * Example set of unit tests. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/module.h> + +#include "unittest.h" + +/* *** BEGIN fake board data *** */ +struct comedi_device { + const char *board_name; + int item; +}; + +static struct comedi_device dev = { + .board_name = "fake_device", +}; + +/* *** END fake board data *** */ + +/* *** BEGIN fake data init *** */ +void init_fake(void) +{ + dev.item = 10; +} + +/* *** END fake data init *** */ + +void test0(void) +{ + init_fake(); + unittest(dev.item != 11, "negative result\n"); + unittest(dev.item == 10, "positive result\n"); +} + +/* **** BEGIN simple module entry/exit functions **** */ +static int __init unittest_enter(void) +{ + const unittest_fptr unit_tests[] = { + (unittest_fptr)test0, + NULL, + }; + + exec_unittests("example", unit_tests); + return 0; +} + +static void __exit unittest_exit(void) { } + +module_init(unittest_enter); +module_exit(unittest_exit); + +MODULE_AUTHOR("Spencer Olson <olsonse@umich.edu>"); +MODULE_DESCRIPTION("Comedi unit-tests example"); +MODULE_LICENSE("GPL"); +/* **** END simple module entry/exit functions **** */ diff --git a/drivers/staging/comedi/drivers/tests/ni_routes_test.c b/drivers/staging/comedi/drivers/tests/ni_routes_test.c new file mode 100644 index 000000000000..a1eda035f270 --- /dev/null +++ b/drivers/staging/comedi/drivers/tests/ni_routes_test.c @@ -0,0 +1,613 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/tests/ni_routes_test.c + * Unit tests for NI routes (ni_routes.c module). + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/module.h> + +#include "../ni_stc.h" +#include "../ni_routes.h" +#include "unittest.h" + +#define RVi(table, src, dest) ((table)[(dest) * NI_NUM_NAMES + (src)]) +#define O(x) ((x) + NI_NAMES_BASE) +#define B(x) ((x) - NI_NAMES_BASE) +#define V(x) ((x) | 0x80) + +/* *** BEGIN fake board data *** */ +static const char *pci_6070e = "pci-6070e"; +static const char *pci_6220 = "pci-6220"; +static const char *pci_fake = "pci-fake"; + +static const char *ni_eseries = "ni_eseries"; +static const char *ni_mseries = "ni_mseries"; + +static struct ni_board_struct board = { + .name = NULL, +}; + +static struct ni_private private = { + .is_m_series = 0, +}; + +static const int bad_dest = O(8), dest0 = O(0), desti = O(5); +static const int ith_dest_index = 2; +static const int no_val_dest = O(7), no_val_index = 4; + +/* These have to be defs to be used in init code below */ +#define rgout0_src0 (O(100)) +#define rgout0_src1 (O(101)) +#define brd0_src0 (O(110)) +#define brd0_src1 (O(111)) +#define brd1_src0 (O(120)) +#define brd1_src1 (O(121)) +#define brd2_src0 (O(130)) +#define brd2_src1 (O(131)) +#define brd3_src0 (O(140)) +#define brd3_src1 (O(141)) + +/* I1 and I2 should not call O(...). Mostly here to shut checkpatch.pl up */ +#define I1(x1) \ + (int[]){ \ + x1, 0 \ + } +#define I2(x1, x2) \ + (int[]){ \ + (x1), (x2), 0 \ + } +#define I3(x1, x2, x3) \ + (int[]){ \ + (x1), (x2), (x3), 0 \ + } + +/* O9 is build to call O(...) for each arg */ +#define O9(x1, x2, x3, x4, x5, x6, x7, x8, x9) \ + (int[]){ \ + O(x1), O(x2), O(x3), O(x4), O(x5), O(x6), O(x7), O(x8), O(x9), \ + 0 \ + } + +static struct ni_device_routes DR = { + .device = "testdev", + .routes = (struct ni_route_set[]){ + {.dest = O(0), .src = O9(/**/1, 2, 3, 4, 5, 6, 7, 8, 9)}, + {.dest = O(1), .src = O9(0, /**/2, 3, 4, 5, 6, 7, 8, 9)}, + /* ith route_set */ + {.dest = O(5), .src = O9(0, 1, 2, 3, 4,/**/ 6, 7, 8, 9)}, + {.dest = O(6), .src = O9(0, 1, 2, 3, 4, 5,/**/ 7, 8, 9)}, + /* next one will not have valid reg values */ + {.dest = O(7), .src = O9(0, 1, 2, 3, 4, 5, 6,/**/ 8, 9)}, + {.dest = O(9), .src = O9(0, 1, 2, 3, 4, 5, 6, 7, 8/**/)}, + + /* indirect routes done through muxes */ + {.dest = TRIGGER_LINE(0), .src = I1(rgout0_src0)}, + {.dest = TRIGGER_LINE(1), .src = I3(rgout0_src0, + brd3_src0, + brd3_src1)}, + {.dest = TRIGGER_LINE(2), .src = I3(rgout0_src1, + brd2_src0, + brd2_src1)}, + {.dest = TRIGGER_LINE(3), .src = I3(rgout0_src1, + brd1_src0, + brd1_src1)}, + {.dest = TRIGGER_LINE(4), .src = I2(brd0_src0, + brd0_src1)}, + {.dest = 0}, + }, +}; + +#undef I1 +#undef I2 +#undef O9 + +#define RV9(x1, x2, x3, x4, x5, x6, x7, x8, x9) \ + [x1] = V(x1), [x2] = V(x2), [x3] = V(x3), [x4] = V(x4), \ + [x5] = V(x5), [x6] = V(x6), [x7] = V(x7), [x8] = V(x8), \ + [x9] = V(x9), + +/* This table is indexed as RV[destination][source] */ +static const u8 RV[NI_NUM_NAMES][NI_NUM_NAMES] = { + [0] = {RV9(/**/1, 2, 3, 4, 5, 6, 7, 8, 9)}, + [1] = {RV9(0,/**/ 2, 3, 4, 5, 6, 7, 8, 9)}, + [2] = {RV9(0, 1,/**/3, 4, 5, 6, 7, 8, 9)}, + [3] = {RV9(0, 1, 2,/**/4, 5, 6, 7, 8, 9)}, + [4] = {RV9(0, 1, 2, 3,/**/5, 6, 7, 8, 9)}, + [5] = {RV9(0, 1, 2, 3, 4,/**/6, 7, 8, 9)}, + [6] = {RV9(0, 1, 2, 3, 4, 5,/**/7, 8, 9)}, + /* [7] is intentionaly left absent to test invalid routes */ + [8] = {RV9(0, 1, 2, 3, 4, 5, 6, 7,/**/9)}, + [9] = {RV9(0, 1, 2, 3, 4, 5, 6, 7, 8/**/)}, + /* some tests for needing extra muxes */ + [B(NI_RGOUT0)] = {[B(rgout0_src0)] = V(0), + [B(rgout0_src1)] = V(1)}, + [B(NI_RTSI_BRD(0))] = {[B(brd0_src0)] = V(0), + [B(brd0_src1)] = V(1)}, + [B(NI_RTSI_BRD(1))] = {[B(brd1_src0)] = V(0), + [B(brd1_src1)] = V(1)}, + [B(NI_RTSI_BRD(2))] = {[B(brd2_src0)] = V(0), + [B(brd2_src1)] = V(1)}, + [B(NI_RTSI_BRD(3))] = {[B(brd3_src0)] = V(0), + [B(brd3_src1)] = V(1)}, +}; + +#undef RV9 + +/* *** END fake board data *** */ + +/* *** BEGIN board data initializers *** */ +static void init_private(void) +{ + memset(&private, 0, sizeof(struct ni_private)); +} + +static void init_pci_6070e(void) +{ + board.name = pci_6070e; + init_private(); + private.is_m_series = 0; +} + +static void init_pci_6220(void) +{ + board.name = pci_6220; + init_private(); + private.is_m_series = 1; +} + +static void init_pci_fake(void) +{ + board.name = pci_fake; + init_private(); + private.routing_tables.route_values = &RV[0][0]; + private.routing_tables.valid_routes = &DR; +} + +/* *** END board data initializers *** */ + +/* Tests that route_sets are in order of the signal destination. */ +static bool route_set_dests_in_order(const struct ni_device_routes *devroutes) +{ + int i; + int last = NI_NAMES_BASE - 1; + + for (i = 0; i < devroutes->n_route_sets; ++i) { + if (last >= devroutes->routes[i].dest) + return false; + last = devroutes->routes[i].dest; + } + return true; +} + +/* Tests that all route_set->src are in order of the signal source. */ +bool route_set_sources_in_order(const struct ni_device_routes *devroutes) +{ + int i; + + for (i = 0; i < devroutes->n_route_sets; ++i) { + int j; + int last = NI_NAMES_BASE - 1; + + for (j = 0; j < devroutes->routes[i].n_src; ++j) { + if (last >= devroutes->routes[i].src[j]) + return false; + last = devroutes->routes[i].src[j]; + } + } + return true; +} + +void test_ni_assign_device_routes(void) +{ + const struct ni_device_routes *devroutes, *olddevroutes; + const u8 *table, *oldtable; + + init_pci_6070e(); + ni_assign_device_routes(ni_eseries, pci_6070e, &private.routing_tables); + devroutes = private.routing_tables.valid_routes; + table = private.routing_tables.route_values; + + unittest(strncmp(devroutes->device, pci_6070e, 10) == 0, + "find device pci-6070e\n"); + unittest(devroutes->n_route_sets == 37, + "number of pci-6070e route_sets == 37\n"); + unittest(devroutes->routes->dest == NI_PFI(0), + "first pci-6070e route_set is for NI_PFI(0)\n"); + unittest(devroutes->routes->n_src == 1, + "first pci-6070e route_set length == 1\n"); + unittest(devroutes->routes->src[0] == NI_AI_StartTrigger, + "first pci-6070e route_set src. == NI_AI_StartTrigger\n"); + unittest(devroutes->routes[10].dest == TRIGGER_LINE(0), + "10th pci-6070e route_set is for TRIGGER_LINE(0)\n"); + unittest(devroutes->routes[10].n_src == 10, + "10th pci-6070e route_set length == 10\n"); + unittest(devroutes->routes[10].src[0] == NI_CtrSource(0), + "10th pci-6070e route_set src. == NI_CtrSource(0)\n"); + unittest(route_set_dests_in_order(devroutes), + "all pci-6070e route_sets in order of signal destination\n"); + unittest(route_set_sources_in_order(devroutes), + "all pci-6070e route_set->src's in order of signal source\n"); + + unittest( + RVi(table, B(PXI_Star), B(NI_AI_SampleClock)) == V(17) && + RVi(table, B(NI_10MHzRefClock), B(TRIGGER_LINE(0))) == 0 && + RVi(table, B(NI_AI_ConvertClock), B(NI_PFI(0))) == 0 && + RVi(table, B(NI_AI_ConvertClock), B(NI_PFI(2))) == + V(NI_PFI_OUTPUT_AI_CONVERT), + "pci-6070e finds e-series route_values table\n"); + + olddevroutes = devroutes; + oldtable = table; + init_pci_6220(); + ni_assign_device_routes(ni_mseries, pci_6220, &private.routing_tables); + devroutes = private.routing_tables.valid_routes; + table = private.routing_tables.route_values; + + unittest(strncmp(devroutes->device, pci_6220, 10) == 0, + "find device pci-6220\n"); + unittest(oldtable != table, "pci-6220 find other route_values table\n"); + + unittest( + RVi(table, B(PXI_Star), B(NI_AI_SampleClock)) == V(20) && + RVi(table, B(NI_10MHzRefClock), B(TRIGGER_LINE(0))) == V(12) && + RVi(table, B(NI_AI_ConvertClock), B(NI_PFI(0))) == V(3) && + RVi(table, B(NI_AI_ConvertClock), B(NI_PFI(2))) == V(3), + "pci-6220 finds m-series route_values table\n"); +} + +void test_ni_sort_device_routes(void) +{ + /* We begin by sorting the device routes for use in later tests */ + ni_sort_device_routes(&DR); + /* now we test that sorting. */ + unittest(route_set_dests_in_order(&DR), + "all route_sets of fake data in order of sig. destination\n"); + unittest(route_set_sources_in_order(&DR), + "all route_set->src's of fake data in order of sig. source\n"); +} + +void test_ni_find_route_set(void) +{ + unittest(ni_find_route_set(bad_dest, &DR) == NULL, + "check for nonexistent route_set\n"); + unittest(ni_find_route_set(dest0, &DR) == &DR.routes[0], + "find first route_set\n"); + unittest(ni_find_route_set(desti, &DR) == &DR.routes[ith_dest_index], + "find ith route_set\n"); + unittest(ni_find_route_set(no_val_dest, &DR) == + &DR.routes[no_val_index], + "find no_val route_set in spite of missing values\n"); + unittest(ni_find_route_set(DR.routes[DR.n_route_sets - 1].dest, &DR) == + &DR.routes[DR.n_route_sets - 1], + "find last route_set\n"); +} + +void test_ni_route_set_has_source(void) +{ + unittest(!ni_route_set_has_source(&DR.routes[0], O(0)), + "check for bad source\n"); + unittest(ni_route_set_has_source(&DR.routes[0], O(1)), + "find first source\n"); + unittest(ni_route_set_has_source(&DR.routes[0], O(5)), + "find fifth source\n"); + unittest(ni_route_set_has_source(&DR.routes[0], O(9)), + "find last source\n"); +} + +void test_ni_route_to_register(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_route_to_register(O(0), O(0), T) < 0, + "check for bad route 0-->0\n"); + unittest(ni_route_to_register(O(1), O(0), T) == 1, + "validate first destination\n"); + unittest(ni_route_to_register(O(6), O(5), T) == 6, + "validate middle destination\n"); + unittest(ni_route_to_register(O(8), O(9), T) == 8, + "validate last destination\n"); + + /* choice of trigger line in the following is somewhat random */ + unittest(ni_route_to_register(rgout0_src0, TRIGGER_LINE(0), T) == 0, + "validate indirect route through rgout0 to TRIGGER_LINE(0)\n"); + unittest(ni_route_to_register(rgout0_src0, TRIGGER_LINE(1), T) == 0, + "validate indirect route through rgout0 to TRIGGER_LINE(1)\n"); + unittest(ni_route_to_register(rgout0_src1, TRIGGER_LINE(2), T) == 1, + "validate indirect route through rgout0 to TRIGGER_LINE(2)\n"); + unittest(ni_route_to_register(rgout0_src1, TRIGGER_LINE(3), T) == 1, + "validate indirect route through rgout0 to TRIGGER_LINE(3)\n"); + + unittest(ni_route_to_register(brd0_src0, TRIGGER_LINE(4), T) == + BIT(6), + "validate indirect route through brd0 to TRIGGER_LINE(4)\n"); + unittest(ni_route_to_register(brd0_src1, TRIGGER_LINE(4), T) == + BIT(6), + "validate indirect route through brd0 to TRIGGER_LINE(4)\n"); + unittest(ni_route_to_register(brd1_src0, TRIGGER_LINE(3), T) == + BIT(6), + "validate indirect route through brd1 to TRIGGER_LINE(3)\n"); + unittest(ni_route_to_register(brd1_src1, TRIGGER_LINE(3), T) == + BIT(6), + "validate indirect route through brd1 to TRIGGER_LINE(3)\n"); + unittest(ni_route_to_register(brd2_src0, TRIGGER_LINE(2), T) == + BIT(6), + "validate indirect route through brd2 to TRIGGER_LINE(2)\n"); + unittest(ni_route_to_register(brd2_src1, TRIGGER_LINE(2), T) == + BIT(6), + "validate indirect route through brd2 to TRIGGER_LINE(2)\n"); + unittest(ni_route_to_register(brd3_src0, TRIGGER_LINE(1), T) == + BIT(6), + "validate indirect route through brd3 to TRIGGER_LINE(1)\n"); + unittest(ni_route_to_register(brd3_src1, TRIGGER_LINE(1), T) == + BIT(6), + "validate indirect route through brd3 to TRIGGER_LINE(1)\n"); +} + +void test_ni_lookup_route_register(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_lookup_route_register(O(0), O(0), T) == -EINVAL, + "check for bad route 0-->0\n"); + unittest(ni_lookup_route_register(O(1), O(0), T) == 1, + "validate first destination\n"); + unittest(ni_lookup_route_register(O(6), O(5), T) == 6, + "validate middle destination\n"); + unittest(ni_lookup_route_register(O(8), O(9), T) == 8, + "validate last destination\n"); + unittest(ni_lookup_route_register(O(10), O(9), T) == -EINVAL, + "lookup invalid desination\n"); + + unittest(ni_lookup_route_register(rgout0_src0, TRIGGER_LINE(0), T) == + -EINVAL, + "rgout0_src0: no direct lookup of indirect route\n"); + unittest(ni_lookup_route_register(rgout0_src0, NI_RGOUT0, T) == 0, + "rgout0_src0: lookup indirect route register\n"); + unittest(ni_lookup_route_register(rgout0_src1, TRIGGER_LINE(2), T) == + -EINVAL, + "rgout0_src1: no direct lookup of indirect route\n"); + unittest(ni_lookup_route_register(rgout0_src1, NI_RGOUT0, T) == 1, + "rgout0_src1: lookup indirect route register\n"); + + unittest(ni_lookup_route_register(brd0_src0, TRIGGER_LINE(4), T) == + -EINVAL, + "brd0_src0: no direct lookup of indirect route\n"); + unittest(ni_lookup_route_register(brd0_src0, NI_RTSI_BRD(0), T) == 0, + "brd0_src0: lookup indirect route register\n"); + unittest(ni_lookup_route_register(brd0_src1, TRIGGER_LINE(4), T) == + -EINVAL, + "brd0_src1: no direct lookup of indirect route\n"); + unittest(ni_lookup_route_register(brd0_src1, NI_RTSI_BRD(0), T) == 1, + "brd0_src1: lookup indirect route register\n"); +} + +void test_route_is_valid(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(!route_is_valid(O(0), O(0), T), + "check for bad route 0-->0\n"); + unittest(route_is_valid(O(0), O(1), T), + "validate first destination\n"); + unittest(route_is_valid(O(5), O(6), T), + "validate middle destination\n"); + unittest(route_is_valid(O(8), O(9), T), + "validate last destination\n"); +} + +void test_ni_is_cmd_dest(void) +{ + init_pci_fake(); + unittest(ni_is_cmd_dest(NI_AI_SampleClock), + "check that AI/SampleClock is cmd destination\n"); + unittest(ni_is_cmd_dest(NI_AI_StartTrigger), + "check that AI/StartTrigger is cmd destination\n"); + unittest(ni_is_cmd_dest(NI_AI_ConvertClock), + "check that AI/ConvertClock is cmd destination\n"); + unittest(ni_is_cmd_dest(NI_AO_SampleClock), + "check that AO/SampleClock is cmd destination\n"); + unittest(ni_is_cmd_dest(NI_DO_SampleClock), + "check that DO/SampleClock is cmd destination\n"); + unittest(!ni_is_cmd_dest(NI_AO_SampleClockTimebase), + "check that AO/SampleClockTimebase _not_ cmd destination\n"); +} + +void test_channel_is_pfi(void) +{ + init_pci_fake(); + unittest(channel_is_pfi(NI_PFI(0)), "check First pfi channel\n"); + unittest(channel_is_pfi(NI_PFI(10)), "check 10th pfi channel\n"); + unittest(channel_is_pfi(NI_PFI(-1)), "check last pfi channel\n"); + unittest(!channel_is_pfi(NI_PFI(-1) + 1), + "check first non pfi channel\n"); +} + +void test_channel_is_rtsi(void) +{ + init_pci_fake(); + unittest(channel_is_rtsi(TRIGGER_LINE(0)), + "check First rtsi channel\n"); + unittest(channel_is_rtsi(TRIGGER_LINE(3)), + "check 3rd rtsi channel\n"); + unittest(channel_is_rtsi(TRIGGER_LINE(-1)), + "check last rtsi channel\n"); + unittest(!channel_is_rtsi(TRIGGER_LINE(-1) + 1), + "check first non rtsi channel\n"); +} + +void test_ni_count_valid_routes(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_count_valid_routes(T) == 57, "count all valid routes\n"); +} + +void test_ni_get_valid_routes(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + unsigned int pair_data[2]; + + init_pci_fake(); + unittest(ni_get_valid_routes(T, 0, NULL) == 57, + "count all valid routes through ni_get_valid_routes\n"); + + unittest(ni_get_valid_routes(T, 1, pair_data) == 1, + "copied first valid route from ni_get_valid_routes\n"); + unittest(pair_data[0] == O(1), + "source of first valid pair from ni_get_valid_routes\n"); + unittest(pair_data[1] == O(0), + "destination of first valid pair from ni_get_valid_routes\n"); +} + +void test_ni_find_route_source(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_find_route_source(4, O(4), T) == -EINVAL, + "check for bad source 4-->4\n"); + unittest(ni_find_route_source(0, O(1), T) == O(0), + "find first source\n"); + unittest(ni_find_route_source(4, O(6), T) == O(4), + "find middle source\n"); + unittest(ni_find_route_source(9, O(8), T) == O(9), + "find last source"); + unittest(ni_find_route_source(8, O(9), T) == O(8), + "find invalid source (without checking device routes)\n"); +} + +void test_route_register_is_valid(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(route_register_is_valid(4, O(4), T) == false, + "check for bad source 4-->4\n"); + unittest(route_register_is_valid(0, O(1), T) == true, + "find first source\n"); + unittest(route_register_is_valid(4, O(6), T) == true, + "find middle source\n"); + unittest(route_register_is_valid(9, O(8), T) == true, + "find last source"); +} + +void test_ni_check_trigger_arg(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_check_trigger_arg(0, O(0), T) == -EINVAL, + "check bad direct trigger arg for first reg->dest\n"); + unittest(ni_check_trigger_arg(0, O(1), T) == 0, + "check direct trigger arg for first reg->dest\n"); + unittest(ni_check_trigger_arg(4, O(6), T) == 0, + "check direct trigger arg for middle reg->dest\n"); + unittest(ni_check_trigger_arg(9, O(8), T) == 0, + "check direct trigger arg for last reg->dest\n"); + + unittest(ni_check_trigger_arg_roffs(-1, O(0), T, 1) == -EINVAL, + "check bad direct trigger arg for first reg->dest w/offs\n"); + unittest(ni_check_trigger_arg_roffs(0, O(1), T, 0) == 0, + "check direct trigger arg for first reg->dest w/offs\n"); + unittest(ni_check_trigger_arg_roffs(3, O(6), T, 1) == 0, + "check direct trigger arg for middle reg->dest w/offs\n"); + unittest(ni_check_trigger_arg_roffs(7, O(8), T, 2) == 0, + "check direct trigger arg for last reg->dest w/offs\n"); + + unittest(ni_check_trigger_arg(O(0), O(0), T) == -EINVAL, + "check bad trigger arg for first src->dest\n"); + unittest(ni_check_trigger_arg(O(0), O(1), T) == 0, + "check trigger arg for first src->dest\n"); + unittest(ni_check_trigger_arg(O(5), O(6), T) == 0, + "check trigger arg for middle src->dest\n"); + unittest(ni_check_trigger_arg(O(8), O(9), T) == 0, + "check trigger arg for last src->dest\n"); +} + +void test_ni_get_reg_value(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_get_reg_value(0, O(0), T) == -1, + "check bad direct trigger arg for first reg->dest\n"); + unittest(ni_get_reg_value(0, O(1), T) == 0, + "check direct trigger arg for first reg->dest\n"); + unittest(ni_get_reg_value(4, O(6), T) == 4, + "check direct trigger arg for middle reg->dest\n"); + unittest(ni_get_reg_value(9, O(8), T) == 9, + "check direct trigger arg for last reg->dest\n"); + + unittest(ni_get_reg_value_roffs(-1, O(0), T, 1) == -1, + "check bad direct trigger arg for first reg->dest w/offs\n"); + unittest(ni_get_reg_value_roffs(0, O(1), T, 0) == 0, + "check direct trigger arg for first reg->dest w/offs\n"); + unittest(ni_get_reg_value_roffs(3, O(6), T, 1) == 4, + "check direct trigger arg for middle reg->dest w/offs\n"); + unittest(ni_get_reg_value_roffs(7, O(8), T, 2) == 9, + "check direct trigger arg for last reg->dest w/offs\n"); + + unittest(ni_get_reg_value(O(0), O(0), T) == -1, + "check bad trigger arg for first src->dest\n"); + unittest(ni_get_reg_value(O(0), O(1), T) == 0, + "check trigger arg for first src->dest\n"); + unittest(ni_get_reg_value(O(5), O(6), T) == 5, + "check trigger arg for middle src->dest\n"); + unittest(ni_get_reg_value(O(8), O(9), T) == 8, + "check trigger arg for last src->dest\n"); +} + +/* **** BEGIN simple module entry/exit functions **** */ +static int __init ni_routes_unittest(void) +{ + const unittest_fptr unit_tests[] = { + (unittest_fptr)test_ni_assign_device_routes, + (unittest_fptr)test_ni_sort_device_routes, + (unittest_fptr)test_ni_find_route_set, + (unittest_fptr)test_ni_route_set_has_source, + (unittest_fptr)test_ni_route_to_register, + (unittest_fptr)test_ni_lookup_route_register, + (unittest_fptr)test_route_is_valid, + (unittest_fptr)test_ni_is_cmd_dest, + (unittest_fptr)test_channel_is_pfi, + (unittest_fptr)test_channel_is_rtsi, + (unittest_fptr)test_ni_count_valid_routes, + (unittest_fptr)test_ni_get_valid_routes, + (unittest_fptr)test_ni_find_route_source, + (unittest_fptr)test_route_register_is_valid, + (unittest_fptr)test_ni_check_trigger_arg, + (unittest_fptr)test_ni_get_reg_value, + NULL, + }; + + exec_unittests("ni_routes", unit_tests); + return 0; +} + +static void __exit ni_routes_unittest_exit(void) { } + +module_init(ni_routes_unittest); +module_exit(ni_routes_unittest_exit); + +MODULE_AUTHOR("Comedi http://www.comedi.org"); +MODULE_DESCRIPTION("Comedi unit-tests for ni_routes module"); +MODULE_LICENSE("GPL"); +/* **** END simple module entry/exit functions **** */ diff --git a/drivers/staging/comedi/drivers/tests/unittest.h b/drivers/staging/comedi/drivers/tests/unittest.h new file mode 100644 index 000000000000..b8e622ea1de1 --- /dev/null +++ b/drivers/staging/comedi/drivers/tests/unittest.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/tests/unittest.h + * Simple framework for unittests for comedi drivers. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * based of parts of drivers/of/unittest.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _COMEDI_DRIVERS_TESTS_UNITTEST_H +#define _COMEDI_DRIVERS_TESTS_UNITTEST_H + +static struct unittest_results { + int passed; + int failed; +} unittest_results; + +typedef void *(*unittest_fptr)(void); + +#define unittest(result, fmt, ...) ({ \ + bool failed = !(result); \ + if (failed) { \ + ++unittest_results.failed; \ + pr_err("FAIL %s():%i " fmt, __func__, __LINE__, \ + ##__VA_ARGS__); \ + } else { \ + ++unittest_results.passed; \ + pr_debug("pass %s():%i " fmt, __func__, __LINE__, \ + ##__VA_ARGS__); \ + } \ + failed; \ +}) + +/** + * Execute an array of unit tests. + * @name: Name of set of unit tests--will be shown at INFO log level. + * @unit_tests: A null-terminated list of unit tests to execute. + */ +static inline void exec_unittests(const char *name, + const unittest_fptr *unit_tests) +{ + pr_info("begin comedi:\"%s\" unittests\n", name); + + for (; (*unit_tests) != NULL; ++unit_tests) + (*unit_tests)(); + + pr_info("end of comedi:\"%s\" unittests - %i passed, %i failed\n", name, + unittest_results.passed, unittest_results.failed); +} + +#endif /* _COMEDI_DRIVERS_TESTS_UNITTEST_H */ |