diff options
Diffstat (limited to 'drivers/staging/dwc2/hcd_intr.c')
-rw-r--r-- | drivers/staging/dwc2/hcd_intr.c | 26 |
1 files changed, 10 insertions, 16 deletions
diff --git a/drivers/staging/dwc2/hcd_intr.c b/drivers/staging/dwc2/hcd_intr.c index e24062f0a49e..e75dccb3b80b 100644 --- a/drivers/staging/dwc2/hcd_intr.c +++ b/drivers/staging/dwc2/hcd_intr.c @@ -115,16 +115,13 @@ static void dwc2_sof_intr(struct dwc2_hsotg *hsotg) { struct list_head *qh_entry; struct dwc2_qh *qh; - u32 hfnum; enum dwc2_transaction_type tr_type; #ifdef DEBUG_SOF dev_vdbg(hsotg->dev, "--Start of Frame Interrupt--\n"); #endif - hfnum = readl(hsotg->regs + HFNUM); - hsotg->frame_number = hfnum >> HFNUM_FRNUM_SHIFT & - HFNUM_FRNUM_MASK >> HFNUM_FRNUM_SHIFT; + hsotg->frame_number = dwc2_hcd_get_frame_number(hsotg); dwc2_track_missed_sofs(hsotg); @@ -244,6 +241,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, u32 usbcfg; u32 prtspd; u32 hcfg; + u32 fslspclksel; u32 hfir; dev_vdbg(hsotg->dev, "%s(%p)\n", __func__, hsotg); @@ -275,6 +273,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, } hcfg = readl(hsotg->regs + HCFG); + fslspclksel = hcfg & HCFG_FSLSPCLKSEL_MASK; if (prtspd == HPRT0_SPD_LOW_SPEED && params->host_ls_low_power_phy_clk == @@ -282,8 +281,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, /* 6 MHZ */ dev_vdbg(hsotg->dev, "FS_PHY programming HCFG to 6 MHz\n"); - if ((hcfg & HCFG_FSLSPCLKSEL_MASK) != - HCFG_FSLSPCLKSEL_6_MHZ) { + if (fslspclksel != HCFG_FSLSPCLKSEL_6_MHZ) { hcfg &= ~HCFG_FSLSPCLKSEL_MASK; hcfg |= HCFG_FSLSPCLKSEL_6_MHZ; writel(hcfg, hsotg->regs + HCFG); @@ -293,8 +291,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, /* 48 MHZ */ dev_vdbg(hsotg->dev, "FS_PHY programming HCFG to 48 MHz\n"); - if ((hcfg & HCFG_FSLSPCLKSEL_MASK) != - HCFG_FSLSPCLKSEL_48_MHZ) { + if (fslspclksel != HCFG_FSLSPCLKSEL_48_MHZ) { hcfg &= ~HCFG_FSLSPCLKSEL_MASK; hcfg |= HCFG_FSLSPCLKSEL_48_MHZ; writel(hcfg, hsotg->regs + HCFG); @@ -2060,14 +2057,14 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg) } /* This function handles interrupts for the HCD */ -int dwc2_hcd_intr(struct dwc2_hsotg *hsotg) +irqreturn_t dwc2_handle_hcd_intr(struct dwc2_hsotg *hsotg) { u32 gintsts, dbg_gintsts; - int retval = 0; + irqreturn_t retval = IRQ_NONE; if (dwc2_check_core_status(hsotg) < 0) { dev_warn(hsotg->dev, "Controller is disconnected\n"); - return 0; + return retval; } spin_lock(&hsotg->lock); @@ -2077,10 +2074,10 @@ int dwc2_hcd_intr(struct dwc2_hsotg *hsotg) gintsts = dwc2_read_core_intr(hsotg); if (!gintsts) { spin_unlock(&hsotg->lock); - return 0; + return retval; } - retval = 1; + retval = IRQ_HANDLED; dbg_gintsts = gintsts; #ifndef DEBUG_SOF @@ -2102,9 +2099,6 @@ int dwc2_hcd_intr(struct dwc2_hsotg *hsotg) dwc2_rx_fifo_level_intr(hsotg); if (gintsts & GINTSTS_NPTXFEMP) dwc2_np_tx_fifo_empty_intr(hsotg); - if (gintsts & GINTSTS_I2CINT) - /* Todo: Implement i2cintr handler */ - writel(GINTSTS_I2CINT, hsotg->regs + GINTSTS); if (gintsts & GINTSTS_PRTINT) dwc2_port_intr(hsotg); if (gintsts & GINTSTS_HCHINT) |