diff options
Diffstat (limited to 'drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c')
| -rw-r--r-- | drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c | 75 |
1 files changed, 61 insertions, 14 deletions
diff --git a/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c b/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c index f6e4243e0c7b..23b7205722b5 100644 --- a/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c +++ b/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -#include "../include/odm_precomp.h" #include "../include/rtw_iol.h" #define read_next_pair(array, v1, v2, i) \ @@ -167,17 +166,23 @@ static u32 array_agc_tab_1t_8188e[] = { 0xC78, 0x407F0001, }; -enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) +static void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) +{ + rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data); + /* Add 1us delay between BB/RF register setting. */ + udelay(1); +} + +int ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) { u32 hex = 0; u32 i = 0; - u32 arraylen = sizeof(array_agc_tab_1t_8188e) / sizeof(u32); + u32 arraylen = ARRAY_SIZE(array_agc_tab_1t_8188e); u32 *array = array_agc_tab_1t_8188e; bool biol = false; struct adapter *adapter = dm_odm->Adapter; struct xmit_frame *pxmit_frame = NULL; u8 bndy_cnt = 1; - enum HAL_STATUS rst = HAL_STATUS_SUCCESS; hex += ODM_ITRF_USB << 8; hex += ODM_CE << 16; @@ -188,7 +193,7 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter); if (!pxmit_frame) { pr_info("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; + return -ENOMEM; } } @@ -239,10 +244,10 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) if (biol) { if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { printk("~~~ %s IOL_exec_cmds Failed !!!\n", __func__); - rst = HAL_STATUS_FAILURE; + return -1; } } - return rst; + return 0; } /****************************************************************************** @@ -443,17 +448,40 @@ static u32 array_phy_reg_1t_8188e[] = { 0xF00, 0x00000300, }; -enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) +static void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) +{ + if (Addr == 0xfe) { + msleep(50); + } else if (Addr == 0xfd) { + mdelay(5); + } else if (Addr == 0xfc) { + mdelay(1); + } else if (Addr == 0xfb) { + udelay(50); + } else if (Addr == 0xfa) { + udelay(5); + } else if (Addr == 0xf9) { + udelay(1); + } else { + if (Addr == 0xa24) + pDM_Odm->RFCalibrateInfo.RegA24 = Data; + rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data); + + /* Add 1us delay between BB/RF register setting. */ + udelay(1); + } +} + +int ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) { u32 hex = 0; u32 i = 0; - u32 arraylen = sizeof(array_phy_reg_1t_8188e) / sizeof(u32); + u32 arraylen = ARRAY_SIZE(array_phy_reg_1t_8188e); u32 *array = array_phy_reg_1t_8188e; bool biol = false; struct adapter *adapter = dm_odm->Adapter; struct xmit_frame *pxmit_frame = NULL; u8 bndy_cnt = 1; - enum HAL_STATUS rst = HAL_STATUS_SUCCESS; hex += ODM_ITRF_USB << 8; hex += ODM_CE << 16; hex += 0xFF000000; @@ -463,7 +491,7 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter); if (!pxmit_frame) { pr_info("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; + return -ENOMEM; } } @@ -545,11 +573,11 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) } if (biol) { if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { - rst = HAL_STATUS_FAILURE; pr_info("~~~ IOL Config %s Failed !!!\n", __func__); + return -1; } } - return rst; + return 0; } /****************************************************************************** @@ -648,11 +676,30 @@ static u32 array_phy_reg_pg_8188e[] = { }; +static void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, + u32 Data) +{ + if (Addr == 0xfe) + msleep(50); + else if (Addr == 0xfd) + mdelay(5); + else if (Addr == 0xfc) + mdelay(1); + else if (Addr == 0xfb) + udelay(50); + else if (Addr == 0xfa) + udelay(5); + else if (Addr == 0xf9) + udelay(1); + else + storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data); +} + void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm) { u32 hex; u32 i = 0; - u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32); + u32 arraylen = ARRAY_SIZE(array_phy_reg_pg_8188e); u32 *array = array_phy_reg_pg_8188e; hex = ODM_ITRF_USB << 8; |