diff options
Diffstat (limited to 'drivers/staging/r8188eu/hal')
24 files changed, 628 insertions, 4113 deletions
diff --git a/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c b/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c index d873672feb27..2d351f831289 100644 --- a/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c +++ b/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c @@ -471,16 +471,6 @@ odm_RATxRPTTimerSetting( } } -void -ODM_RASupport_Init( - struct odm_dm_struct *dm_odm - ) -{ - /* 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!! */ - if (dm_odm->SupportICType == ODM_RTL8188E) - dm_odm->RaSupport88E = true; -} - int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid) { struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid]; @@ -548,7 +538,7 @@ int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm) u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid) { - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM)) return 0; return dm_odm->RAInfo[macid].RateSGI; } @@ -557,7 +547,7 @@ u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid) { u8 DecisionRate = 0; - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM)) return 0; DecisionRate = (dm_odm->RAInfo[macid].DecisionRate); return DecisionRate; @@ -567,7 +557,7 @@ u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid) { u8 PTStage = 5; - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM)) return 0; PTStage = (dm_odm->RAInfo[macid].PTStage); return PTStage; @@ -577,7 +567,7 @@ void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rate { struct odm_ra_info *pRaInfo = NULL; - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM)) return; pRaInfo = &dm_odm->RAInfo[macid]; @@ -591,7 +581,7 @@ void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi) { struct odm_ra_info *pRaInfo = NULL; - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM)) return; pRaInfo = &dm_odm->RAInfo[macid]; @@ -615,7 +605,7 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 pBuffer = TxRPT_Buf; do { - if (MacId >= ASSOCIATE_ENTRY_NUM) + if (MacId >= ODM_ASSOCIATE_ENTRY_NUM) valid = 0; else if (MacId >= 32) valid = (1 << (MacId - 32)) & macid_entry1; diff --git a/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c b/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c index 55aa20a30342..f6e4243e0c7b 100644 --- a/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c +++ b/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c @@ -13,7 +13,6 @@ static bool CheckCondition(const u32 condition, const u32 hex) { - u32 _board = (hex & 0x000000FF); u32 _interface = (hex & 0x0000FF00) >> 8; u32 _platform = (hex & 0x00FF0000) >> 16; u32 cond = condition; @@ -21,10 +20,6 @@ static bool CheckCondition(const u32 condition, const u32 hex) if (condition == 0xCDCDCDCD) return true; - cond = condition & 0x000000FF; - if ((_board == cond) && cond != 0x00) - return false; - cond = condition & 0x0000FF00; cond = cond >> 8; if ((_interface & cond) == 0 && cond != 0x07) @@ -176,9 +171,6 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) { u32 hex = 0; u32 i = 0; - u8 platform = dm_odm->SupportPlatform; - u8 interfaceValue = dm_odm->SupportInterface; - u8 board = dm_odm->BoardType; u32 arraylen = sizeof(array_agc_tab_1t_8188e) / sizeof(u32); u32 *array = array_agc_tab_1t_8188e; bool biol = false; @@ -187,9 +179,8 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) u8 bndy_cnt = 1; enum HAL_STATUS rst = HAL_STATUS_SUCCESS; - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; + hex += ODM_ITRF_USB << 8; + hex += ODM_CE << 16; hex += 0xFF000000; biol = rtw_IOL_applied(adapter); @@ -246,7 +237,7 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) } } if (biol) { - if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { + if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { printk("~~~ %s IOL_exec_cmds Failed !!!\n", __func__); rst = HAL_STATUS_FAILURE; } @@ -456,9 +447,6 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) { u32 hex = 0; u32 i = 0; - u8 platform = dm_odm->SupportPlatform; - u8 interfaceValue = dm_odm->SupportInterface; - u8 board = dm_odm->BoardType; u32 arraylen = sizeof(array_phy_reg_1t_8188e) / sizeof(u32); u32 *array = array_phy_reg_1t_8188e; bool biol = false; @@ -466,9 +454,8 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) struct xmit_frame *pxmit_frame = NULL; u8 bndy_cnt = 1; enum HAL_STATUS rst = HAL_STATUS_SUCCESS; - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; + hex += ODM_ITRF_USB << 8; + hex += ODM_CE << 16; hex += 0xFF000000; biol = rtw_IOL_applied(adapter); @@ -557,7 +544,7 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) } } if (biol) { - if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { + if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { rst = HAL_STATUS_FAILURE; pr_info("~~~ IOL Config %s Failed !!!\n", __func__); } @@ -665,14 +652,11 @@ void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm) { u32 hex; u32 i = 0; - u8 platform = dm_odm->SupportPlatform; - u8 interfaceValue = dm_odm->SupportInterface; - u8 board = dm_odm->BoardType; u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32); u32 *array = array_phy_reg_pg_8188e; - hex = board + (interfaceValue << 8); - hex += (platform << 16) + 0xFF000000; + hex = ODM_ITRF_USB << 8; + hex += (ODM_CE << 16) + 0xFF000000; for (i = 0; i < arraylen; i += 3) { u32 v1 = array[i]; diff --git a/drivers/staging/r8188eu/hal/HalHWImg8188E_MAC.c b/drivers/staging/r8188eu/hal/HalHWImg8188E_MAC.c index 0ff2609c26bb..b4c55863d3fb 100644 --- a/drivers/staging/r8188eu/hal/HalHWImg8188E_MAC.c +++ b/drivers/staging/r8188eu/hal/HalHWImg8188E_MAC.c @@ -133,9 +133,6 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm) u32 hex = 0; u32 i; - u8 platform = dm_odm->SupportPlatform; - u8 interface_val = dm_odm->SupportInterface; - u8 board = dm_odm->BoardType; u32 array_len = sizeof(array_MAC_REG_8188E) / sizeof(u32); u32 *array = array_MAC_REG_8188E; bool biol = false; @@ -144,9 +141,8 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm) struct xmit_frame *pxmit_frame = NULL; u8 bndy_cnt = 1; enum HAL_STATUS rst = HAL_STATUS_SUCCESS; - hex += board; - hex += interface_val << 8; - hex += platform << 16; + hex += ODM_ITRF_USB << 8; + hex += ODM_CE << 16; hex += 0xFF000000; biol = rtw_IOL_applied(adapt); @@ -204,7 +200,7 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm) } } if (biol) { - if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { + if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { pr_info("~~~ MAC IOL_exec_cmds Failed !!!\n"); rst = HAL_STATUS_FAILURE; } diff --git a/drivers/staging/r8188eu/hal/HalHWImg8188E_RF.c b/drivers/staging/r8188eu/hal/HalHWImg8188E_RF.c index 55e4b4a877a4..5e0a96200078 100644 --- a/drivers/staging/r8188eu/hal/HalHWImg8188E_RF.c +++ b/drivers/staging/r8188eu/hal/HalHWImg8188E_RF.c @@ -6,7 +6,6 @@ static bool CheckCondition(const u32 Condition, const u32 Hex) { - u32 _board = (Hex & 0x000000FF); u32 _interface = (Hex & 0x0000FF00) >> 8; u32 _platform = (Hex & 0x00FF0000) >> 16; u32 cond = Condition; @@ -14,10 +13,6 @@ static bool CheckCondition(const u32 Condition, const u32 Hex) if (Condition == 0xCDCDCDCD) return true; - cond = Condition & 0x000000FF; - if ((_board == cond) && cond != 0x00) - return false; - cond = Condition & 0x0000FF00; cond = cond >> 8; if ((_interface & cond) == 0 && cond != 0x07) @@ -144,9 +139,6 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm) u32 hex = 0; u32 i = 0; - u8 platform = pDM_Odm->SupportPlatform; - u8 interfaceValue = pDM_Odm->SupportInterface; - u8 board = pDM_Odm->BoardType; u32 ArrayLen = sizeof(Array_RadioA_1T_8188E) / sizeof(u32); u32 *Array = Array_RadioA_1T_8188E; bool biol = false; @@ -155,9 +147,8 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm) u8 bndy_cnt = 1; enum HAL_STATUS rst = HAL_STATUS_SUCCESS; - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; + hex += ODM_ITRF_USB << 8; + hex += ODM_CE << 16; hex += 0xFF000000; biol = rtw_IOL_applied(Adapter); @@ -241,7 +232,7 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm) } } if (biol) { - if (!rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { + if (!rtl8188e_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { rst = HAL_STATUS_FAILURE; pr_info("~~~ IOL Config %s Failed !!!\n", __func__); } diff --git a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c index 356885e27edd..60d4ba275196 100644 --- a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c +++ b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c @@ -110,7 +110,6 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( bool is2t = false; u8 OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ - u8 Indexforchannel = 0/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/; s8 OFDM_index_mapping[2][index_mapping_NUM_88E] = { {0, 0, 2, 3, 4, 4, /* 2.4G, decrease power */ 5, 6, 7, 7, 8, 9, @@ -280,8 +279,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( /* Adujst OFDM Ant_A according to IQK result */ ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000) >> 22; - X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][0]; - Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][1]; + X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][0]; + Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][1]; /* Revse TX power table. */ dm_odm->BbSwingIdxOfdm = (u8)OFDM_index[0]; @@ -315,10 +314,10 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000) >> 22; /* new element A = element D x X */ - X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][4]; - Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][5]; + X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][4]; + Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][5]; - if ((X != 0) && (*dm_odm->pBandType == ODM_BAND_2_4G)) { + if (X != 0) { if ((X & 0x00000200) != 0) /* consider minus */ X = X | 0xFFFFFC00; ele_A = ((X * ele_D) >> 8) & 0x000003FF; @@ -584,68 +583,12 @@ static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u } } -static void pathb_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u8 final_candidate, bool txonly) -{ - u32 Oldval_1, X, TX1_A, reg; - s32 Y, TX1_C; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - if (final_candidate == 0xFF) { - return; - } else if (iqkok) { - Oldval_1 = (ODM_GetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][4]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX1_A = (X * Oldval_1) >> 8; - ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); - - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(27), ((X * Oldval_1 >> 7) & 0x1)); - - Y = result[final_candidate][5]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - - TX1_C = (Y * Oldval_1) >> 8; - ODM_SetBBReg(dm_odm, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C & 0x3C0) >> 6)); - ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C & 0x3F)); - - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(25), ((Y * Oldval_1 >> 7) & 0x1)); - - if (txonly) - return; - - reg = result[final_candidate][6]; - ODM_SetBBReg(dm_odm, rOFDM0_XBRxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][7] & 0x3F; - ODM_SetBBReg(dm_odm, rOFDM0_XBRxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][7] >> 6) & 0xF; - ODM_SetBBReg(dm_odm, rOFDM0_AGCRSSITable, 0x0000F000, reg); - } -} - -/* */ -/* 2011/07/26 MH Add an API for testing IQK fail case. */ -/* */ -/* MP Already declare in odm.c */ -static bool ODM_CheckPowerStatus(struct adapter *Adapter) -{ - return true; -} - void _PHY_SaveADDARegisters(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegisterNum) { u32 i; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - if (!ODM_CheckPowerStatus(adapt)) - return; - for (i = 0; i < RegisterNum; i++) { ADDABackup[i] = ODM_GetBBReg(dm_odm, ADDAReg[i], bMaskDWord); } @@ -772,23 +715,11 @@ static bool phy_SimularityCompare_8188E( ) { u32 i, j, diff, sim_bitmap, bound = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */ bool result = true; - bool is2t; s32 tmp1 = 0, tmp2 = 0; - if ((dm_odm->RFType == ODM_2T2R) || (dm_odm->RFType == ODM_2T3R) || (dm_odm->RFType == ODM_2T4R)) - is2t = true; - else - is2t = false; - - if (is2t) - bound = 8; - else - bound = 4; - + bound = 4; sim_bitmap = 0; for (i = 0; i < bound; i++) { @@ -881,12 +812,7 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t, rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD }; - - u32 retryCount = 9; - if (*dm_odm->mp_mode == 1) - retryCount = 9; - else - retryCount = 2; + u32 retryCount = 2; /* Note: IQ calibration must be performed after loading */ /* PHY_REG.txt , and radio_a, radio_b.txt */ @@ -1065,11 +991,10 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) { struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - struct mpt_context *pMptCtx = &adapt->mppriv.MptCtx; s32 result[4][8]; /* last is final result */ u8 i, final_candidate; - bool pathaok, pathbok; - s32 RegE94, RegE9C, RegEA4, RegEB4, RegEBC, RegEC4; + bool pathaok; + s32 RegE94, RegE9C, RegEA4, RegEB4, RegEBC; bool is12simular, is13simular, is23simular; bool singletone = false, carrier_sup = false; u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { @@ -1078,20 +1003,10 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, rOFDM0_RxIQExtAnta}; - bool is2t; - - is2t = (dm_odm->RFType == ODM_2T2R) ? true : false; - if (!ODM_CheckPowerStatus(adapt)) - return; if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION)) return; - if (*dm_odm->mp_mode == 1) { - singletone = pMptCtx->bSingleTone; - carrier_sup = pMptCtx->bCarrierSuppression; - } - /* 20120213<Kordan> Turn on when continuous Tx to pass lab testing. (required by Edlu) */ if (singletone || carrier_sup) return; @@ -1112,13 +1027,12 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) } final_candidate = 0xff; pathaok = false; - pathbok = false; is12simular = false; is23simular = false; is13simular = false; for (i = 0; i < 3; i++) { - phy_IQCalibrate_8188E(adapt, result, i, is2t); + phy_IQCalibrate_8188E(adapt, result, i, false); if (i == 1) { is12simular = phy_SimularityCompare_8188E(adapt, result, 0, 1); @@ -1150,7 +1064,6 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) RegEA4 = result[i][2]; RegEB4 = result[i][4]; RegEBC = result[i][5]; - RegEC4 = result[i][6]; } if (final_candidate != 0xff) { @@ -1163,9 +1076,7 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) dm_odm->RFCalibrateInfo.RegE9C = RegE9C; dm_odm->RFCalibrateInfo.RegEB4 = RegEB4; dm_odm->RFCalibrateInfo.RegEBC = RegEBC; - RegEC4 = result[final_candidate][6]; pathaok = true; - pathbok = true; } else { dm_odm->RFCalibrateInfo.RegE94 = 0x100; dm_odm->RFCalibrateInfo.RegEB4 = 0x100; /* X default value */ @@ -1174,17 +1085,13 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) } if (RegE94 != 0) patha_fill_iqk(adapt, pathaok, result, final_candidate, (RegEA4 == 0)); - if (is2t) { - if (RegEB4 != 0) - pathb_fill_iqk(adapt, pathbok, result, final_candidate, (RegEC4 == 0)); - } /* To Fix BSOD when final_candidate is 0xff */ /* by sherry 20120321 */ if (final_candidate < 4) { for (i = 0; i < IQK_Matrix_REG_NUM; i++) - dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].Value[0][i] = result[final_candidate][i]; - dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].bIQKDone = true; + dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][i] = result[final_candidate][i]; + dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.bIQKDone = true; } _PHY_SaveADDARegisters(adapt, IQK_BB_REG_92C, dm_odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); @@ -1196,12 +1103,7 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt) u32 timeout = 2000, timecount = 0; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - struct mpt_context *pMptCtx = &adapt->mppriv.MptCtx; - if (*dm_odm->mp_mode == 1) { - singletone = pMptCtx->bSingleTone; - carrier_sup = pMptCtx->bCarrierSuppression; - } if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION)) return; /* 20120213<Kordan> Turn on when continuous Tx to pass lab testing. (required by Edlu) */ @@ -1213,52 +1115,5 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt) timecount += 50; } - dm_odm->RFCalibrateInfo.bLCKInProgress = true; - - if (dm_odm->RFType == ODM_2T2R) { - phy_LCCalibrate_8188E(adapt, true); - } else { - /* For 88C 1T1R */ - phy_LCCalibrate_8188E(adapt, false); - } - - dm_odm->RFCalibrateInfo.bLCKInProgress = false; -} - -static void phy_setrfpathswitch_8188e(struct adapter *adapt, bool main, bool is2t) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - if (!adapt->hw_init_completed) { - u8 u1btmp; - u1btmp = ODM_Read1Byte(dm_odm, REG_LEDCFG2) | BIT(7); - ODM_Write1Byte(dm_odm, REG_LEDCFG2, u1btmp); - ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFParameter, BIT(13), 0x01); - } - - if (is2t) { /* 92C */ - if (main) - ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT(5) | BIT(6), 0x1); /* 92C_Path_A */ - else - ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT(5) | BIT(6), 0x2); /* BT */ - } else { /* 88C */ - if (main) - ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(8) | BIT(9), 0x2); /* Main */ - else - ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(8) | BIT(9), 0x1); /* Aux */ - } -} - -void PHY_SetRFPathSwitch_8188E(struct adapter *adapt, bool main) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - if (dm_odm->RFType == ODM_2T2R) { - phy_setrfpathswitch_8188e(adapt, main, true); - } else { - /* For 88C 1T1R */ - phy_setrfpathswitch_8188e(adapt, main, false); - } + phy_LCCalibrate_8188E(adapt, false); } diff --git a/drivers/staging/r8188eu/hal/hal_com.c b/drivers/staging/r8188eu/hal/hal_com.c index f09d4d49b159..ba5d027d765f 100644 --- a/drivers/staging/r8188eu/hal/hal_com.c +++ b/drivers/staging/r8188eu/hal/hal_com.c @@ -15,18 +15,7 @@ void dump_chip_info(struct HAL_VERSION chip_vers) uint cnt = 0; char buf[128]; - if (IS_81XXC(chip_vers)) { - cnt += sprintf((buf + cnt), "Chip Version Info: %s_", - IS_92C_SERIAL(chip_vers) ? - "CHIP_8192C" : "CHIP_8188C"); - } else if (IS_92D(chip_vers)) { - cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8192D_"); - } else if (IS_8723_SERIES(chip_vers)) { - cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8723A_"); - } else if (IS_8188E(chip_vers)) { - cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_"); - } - + cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_"); cnt += sprintf((buf + cnt), "%s_", IS_NORMAL_CHIP(chip_vers) ? "Normal_Chip" : "Test_Chip"); cnt += sprintf((buf + cnt), "%s_", IS_CHIP_VENDOR_TSMC(chip_vers) ? @@ -45,15 +34,7 @@ void dump_chip_info(struct HAL_VERSION chip_vers) cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_", chip_vers.CUTVersion); - if (IS_1T1R(chip_vers)) - cnt += sprintf((buf + cnt), "1T1R_"); - else if (IS_1T2R(chip_vers)) - cnt += sprintf((buf + cnt), "1T2R_"); - else if (IS_2T2R(chip_vers)) - cnt += sprintf((buf + cnt), "2T2R_"); - else - cnt += sprintf((buf + cnt), "UNKNOWN_RFTYPE(%d)_", - chip_vers.RFType); + cnt += sprintf((buf + cnt), "1T1R_"); cnt += sprintf((buf + cnt), "RomVer(%d)\n", chip_vers.ROMVer); @@ -300,8 +281,7 @@ bool Hal_MappingOutPipe(struct adapter *adapter, u8 numoutpipe) void hal_init_macaddr(struct adapter *adapter) { - rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, - adapter->eeprompriv.mac_addr); + SetHwReg8188EU(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr); } /* diff --git a/drivers/staging/r8188eu/hal/hal_intf.c b/drivers/staging/r8188eu/hal/hal_intf.c index a6d589e89aeb..fee3a598b59d 100644 --- a/drivers/staging/r8188eu/hal/hal_intf.c +++ b/drivers/staging/r8188eu/hal/hal_intf.c @@ -6,83 +6,19 @@ #include "../include/drv_types.h" #include "../include/hal_intf.h" -void rtw_hal_chip_configure(struct adapter *adapt) -{ - if (adapt->HalFunc.intf_chip_configure) - adapt->HalFunc.intf_chip_configure(adapt); -} - -void rtw_hal_read_chip_info(struct adapter *adapt) -{ - if (adapt->HalFunc.read_adapter_info) - adapt->HalFunc.read_adapter_info(adapt); -} - -void rtw_hal_read_chip_version(struct adapter *adapt) -{ - if (adapt->HalFunc.read_chip_version) - adapt->HalFunc.read_chip_version(adapt); -} - -void rtw_hal_def_value_init(struct adapter *adapt) -{ - if (adapt->HalFunc.init_default_value) - adapt->HalFunc.init_default_value(adapt); -} - -void rtw_hal_free_data(struct adapter *adapt) -{ - if (adapt->HalFunc.free_hal_data) - adapt->HalFunc.free_hal_data(adapt); -} - -void rtw_hal_dm_init(struct adapter *adapt) -{ - if (adapt->HalFunc.dm_init) - adapt->HalFunc.dm_init(adapt); -} - -void rtw_hal_dm_deinit(struct adapter *adapt) -{ - /* cancel dm timer */ - if (adapt->HalFunc.dm_deinit) - adapt->HalFunc.dm_deinit(adapt); -} - -void rtw_hal_sw_led_init(struct adapter *adapt) -{ - if (adapt->HalFunc.InitSwLeds) - adapt->HalFunc.InitSwLeds(adapt); -} - -void rtw_hal_sw_led_deinit(struct adapter *adapt) -{ - if (adapt->HalFunc.DeInitSwLeds) - adapt->HalFunc.DeInitSwLeds(adapt); -} - -u32 rtw_hal_power_on(struct adapter *adapt) -{ - if (adapt->HalFunc.hal_power_on) - return adapt->HalFunc.hal_power_on(adapt); - return _FAIL; -} - uint rtw_hal_init(struct adapter *adapt) { uint status = _SUCCESS; adapt->hw_init_completed = false; - status = adapt->HalFunc.hal_init(adapt); + status = rtl8188eu_hal_init(adapt); if (status == _SUCCESS) { adapt->hw_init_completed = true; if (adapt->registrypriv.notch_filter == 1) - rtw_hal_notch_filter(adapt, 1); - - rtw_hal_reset_security_engine(adapt); + hal_notch_filter_8188e(adapt, 1); } else { adapt->hw_init_completed = false; DBG_88E("rtw_hal_init: hal__init fail\n"); @@ -95,7 +31,7 @@ uint rtw_hal_deinit(struct adapter *adapt) { uint status = _SUCCESS; - status = adapt->HalFunc.hal_deinit(adapt); + status = rtl8188eu_hal_deinit(adapt); if (status == _SUCCESS) adapt->hw_init_completed = false; @@ -105,337 +41,18 @@ uint rtw_hal_deinit(struct adapter *adapt) return status; } -void rtw_hal_set_hwreg(struct adapter *adapt, u8 variable, u8 *val) -{ - if (adapt->HalFunc.SetHwRegHandler) - adapt->HalFunc.SetHwRegHandler(adapt, variable, val); -} - -void rtw_hal_get_hwreg(struct adapter *adapt, u8 variable, u8 *val) -{ - if (adapt->HalFunc.GetHwRegHandler) - adapt->HalFunc.GetHwRegHandler(adapt, variable, val); -} - -u8 rtw_hal_set_def_var(struct adapter *adapt, enum hal_def_variable var, - void *val) -{ - if (adapt->HalFunc.SetHalDefVarHandler) - return adapt->HalFunc.SetHalDefVarHandler(adapt, var, val); - return _FAIL; -} - -u8 rtw_hal_get_def_var(struct adapter *adapt, - enum hal_def_variable var, void *val) -{ - if (adapt->HalFunc.GetHalDefVarHandler) - return adapt->HalFunc.GetHalDefVarHandler(adapt, var, val); - return _FAIL; -} - -void rtw_hal_set_odm_var(struct adapter *adapt, - enum hal_odm_variable var, void *val1, - bool set) -{ - if (adapt->HalFunc.SetHalODMVarHandler) - adapt->HalFunc.SetHalODMVarHandler(adapt, var, - val1, set); -} - -void rtw_hal_get_odm_var(struct adapter *adapt, - enum hal_odm_variable var, void *val1, - bool set) -{ - if (adapt->HalFunc.GetHalODMVarHandler) - adapt->HalFunc.GetHalODMVarHandler(adapt, var, - val1, set); -} - -void rtw_hal_enable_interrupt(struct adapter *adapt) -{ - if (adapt->HalFunc.enable_interrupt) - adapt->HalFunc.enable_interrupt(adapt); - else - DBG_88E("%s: HalFunc.enable_interrupt is NULL!\n", __func__); -} - -void rtw_hal_disable_interrupt(struct adapter *adapt) -{ - if (adapt->HalFunc.disable_interrupt) - adapt->HalFunc.disable_interrupt(adapt); - else - DBG_88E("%s: HalFunc.disable_interrupt is NULL!\n", __func__); -} - -u32 rtw_hal_inirp_init(struct adapter *adapt) -{ - u32 rst = _FAIL; - - if (adapt->HalFunc.inirp_init) - rst = adapt->HalFunc.inirp_init(adapt); - else - DBG_88E(" %s HalFunc.inirp_init is NULL!!!\n", __func__); - return rst; -} - -u32 rtw_hal_inirp_deinit(struct adapter *adapt) -{ - if (adapt->HalFunc.inirp_deinit) - return adapt->HalFunc.inirp_deinit(adapt); - - return _FAIL; -} - -u8 rtw_hal_intf_ps_func(struct adapter *adapt, - enum hal_intf_ps_func efunc_id, u8 *val) -{ - if (adapt->HalFunc.interface_ps_func) - return adapt->HalFunc.interface_ps_func(adapt, efunc_id, - val); - return _FAIL; -} - -s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter, - struct xmit_frame *pxmitframe) -{ - if (padapter->HalFunc.hal_xmitframe_enqueue) - return padapter->HalFunc.hal_xmitframe_enqueue(padapter, pxmitframe); - return false; -} - -s32 rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe) -{ - if (adapt->HalFunc.hal_xmit) - return adapt->HalFunc.hal_xmit(adapt, pxmitframe); - - return false; -} - -s32 rtw_hal_mgnt_xmit(struct adapter *adapt, struct xmit_frame *pmgntframe) -{ - s32 ret = _FAIL; - if (adapt->HalFunc.mgnt_xmit) - ret = adapt->HalFunc.mgnt_xmit(adapt, pmgntframe); - return ret; -} - -s32 rtw_hal_init_xmit_priv(struct adapter *adapt) -{ - if (adapt->HalFunc.init_xmit_priv) - return adapt->HalFunc.init_xmit_priv(adapt); - return _FAIL; -} - -s32 rtw_hal_init_recv_priv(struct adapter *adapt) -{ - if (adapt->HalFunc.init_recv_priv) - return adapt->HalFunc.init_recv_priv(adapt); - - return _FAIL; -} - -void rtw_hal_free_recv_priv(struct adapter *adapt) -{ - if (adapt->HalFunc.free_recv_priv) - adapt->HalFunc.free_recv_priv(adapt); -} - void rtw_hal_update_ra_mask(struct adapter *adapt, u32 mac_id, u8 rssi_level) { struct mlme_priv *pmlmepriv = &adapt->mlmepriv; if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { -#ifdef CONFIG_88EU_AP_MODE struct sta_info *psta = NULL; struct sta_priv *pstapriv = &adapt->stapriv; - if ((mac_id - 1) > 0) + if (mac_id >= 2) psta = pstapriv->sta_aid[(mac_id - 1) - 1]; if (psta) add_RATid(adapt, psta, 0);/* todo: based on rssi_level*/ -#endif } else { - if (adapt->HalFunc.UpdateRAMaskHandler) - adapt->HalFunc.UpdateRAMaskHandler(adapt, mac_id, - rssi_level); + UpdateHalRAMask8188EUsb(adapt, mac_id, rssi_level); } } - -void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, u8 arg, - u8 rssi_level) -{ - if (adapt->HalFunc.Add_RateATid) - adapt->HalFunc.Add_RateATid(adapt, bitmap, arg, - rssi_level); -} - -/* Start specifical interface thread */ -void rtw_hal_start_thread(struct adapter *adapt) -{ - if (adapt->HalFunc.run_thread) - adapt->HalFunc.run_thread(adapt); -} - -/* Start specifical interface thread */ -void rtw_hal_stop_thread(struct adapter *adapt) -{ - if (adapt->HalFunc.cancel_thread) - adapt->HalFunc.cancel_thread(adapt); -} - -u32 rtw_hal_read_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask) -{ - u32 data = 0; - - if (adapt->HalFunc.read_bbreg) - data = adapt->HalFunc.read_bbreg(adapt, regaddr, bitmask); - return data; -} - -void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask, - u32 data) -{ - if (adapt->HalFunc.write_bbreg) - adapt->HalFunc.write_bbreg(adapt, regaddr, bitmask, data); -} - -u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rfpath, - u32 regaddr, u32 bitmask) -{ - u32 data = 0; - - if (adapt->HalFunc.read_rfreg) - data = adapt->HalFunc.read_rfreg(adapt, rfpath, regaddr, - bitmask); - return data; -} - -void rtw_hal_write_rfreg(struct adapter *adapt, enum rf_radio_path rfpath, - u32 regaddr, u32 bitmask, u32 data) -{ - if (adapt->HalFunc.write_rfreg) - adapt->HalFunc.write_rfreg(adapt, rfpath, regaddr, - bitmask, data); -} - -s32 rtw_hal_interrupt_handler(struct adapter *adapt) -{ - if (adapt->HalFunc.interrupt_handler) - return adapt->HalFunc.interrupt_handler(adapt); - return _FAIL; -} - -void rtw_hal_set_bwmode(struct adapter *adapt, - enum ht_channel_width bandwidth, u8 offset) -{ - if (adapt->HalFunc.set_bwmode_handler) - adapt->HalFunc.set_bwmode_handler(adapt, bandwidth, - offset); -} - -void rtw_hal_set_chan(struct adapter *adapt, u8 channel) -{ - if (adapt->HalFunc.set_channel_handler) - adapt->HalFunc.set_channel_handler(adapt, channel); -} - -void rtw_hal_dm_watchdog(struct adapter *adapt) -{ - if (adapt->HalFunc.hal_dm_watchdog) - adapt->HalFunc.hal_dm_watchdog(adapt); -} - -void rtw_hal_bcn_related_reg_setting(struct adapter *adapt) -{ - if (adapt->HalFunc.SetBeaconRelatedRegistersHandler) - adapt->HalFunc.SetBeaconRelatedRegistersHandler(adapt); -} - -u8 rtw_hal_antdiv_before_linked(struct adapter *adapt) -{ - if (adapt->HalFunc.AntDivBeforeLinkHandler) - return adapt->HalFunc.AntDivBeforeLinkHandler(adapt); - return false; -} - -void rtw_hal_antdiv_rssi_compared(struct adapter *adapt, - struct wlan_bssid_ex *dst, - struct wlan_bssid_ex *src) -{ - if (adapt->HalFunc.AntDivCompareHandler) - adapt->HalFunc.AntDivCompareHandler(adapt, dst, src); -} - -void rtw_hal_sreset_init(struct adapter *adapt) -{ - if (adapt->HalFunc.sreset_init_value) - adapt->HalFunc.sreset_init_value(adapt); -} - -void rtw_hal_sreset_reset(struct adapter *adapt) -{ - if (adapt->HalFunc.silentreset) - adapt->HalFunc.silentreset(adapt); -} - -void rtw_hal_sreset_reset_value(struct adapter *adapt) -{ - if (adapt->HalFunc.sreset_reset_value) - adapt->HalFunc.sreset_reset_value(adapt); -} - -void rtw_hal_sreset_xmit_status_check(struct adapter *adapt) -{ - if (adapt->HalFunc.sreset_xmit_status_check) - adapt->HalFunc.sreset_xmit_status_check(adapt); -} - -void rtw_hal_sreset_linked_status_check(struct adapter *adapt) -{ - if (adapt->HalFunc.sreset_linked_status_check) - adapt->HalFunc.sreset_linked_status_check(adapt); -} - -u8 rtw_hal_sreset_get_wifi_status(struct adapter *adapt) -{ - u8 status = 0; - - if (adapt->HalFunc.sreset_get_wifi_status) - status = adapt->HalFunc.sreset_get_wifi_status(adapt); - return status; -} - -int rtw_hal_iol_cmd(struct adapter *adapter, struct xmit_frame *xmit_frame, - u32 max_wating_ms, u32 bndy_cnt) -{ - if (adapter->HalFunc.IOL_exec_cmds_sync) - return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, - max_wating_ms, - bndy_cnt); - return _FAIL; -} - -void rtw_hal_notch_filter(struct adapter *adapter, bool enable) -{ - if (adapter->HalFunc.hal_notch_filter) - adapter->HalFunc.hal_notch_filter(adapter, enable); -} - -void rtw_hal_reset_security_engine(struct adapter *adapter) -{ - if (adapter->HalFunc.hal_reset_security_engine) - adapter->HalFunc.hal_reset_security_engine(adapter); -} - -s32 rtw_hal_c2h_handler(struct adapter *adapter, struct c2h_evt_hdr *c2h_evt) -{ - s32 ret = _FAIL; - - if (adapter->HalFunc.c2h_handler) - ret = adapter->HalFunc.c2h_handler(adapter, c2h_evt); - return ret; -} - -c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter) -{ - return adapter->HalFunc.c2h_id_filter_ccx; -} diff --git a/drivers/staging/r8188eu/hal/odm.c b/drivers/staging/r8188eu/hal/odm.c index ed94f64d878d..21f115194df8 100644 --- a/drivers/staging/r8188eu/hal/odm.c +++ b/drivers/staging/r8188eu/hal/odm.c @@ -5,17 +5,6 @@ #include "../include/odm_precomp.h" -static const u16 dB_Invert_Table[8][12] = { - {1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4}, - {4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16}, - {18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63}, - {71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251}, - {282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000}, - {1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, - {4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849}, - {17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535} -}; - /* avoid to warn in FreeBSD ==> To DO modify */ static u32 EDCAParam[HT_IOT_PEER_MAX][3] = { /* UL DL */ @@ -163,22 +152,15 @@ void ODM_DMInit(struct odm_dm_struct *pDM_Odm) odm_DIGInit(pDM_Odm); odm_RateAdaptiveMaskInit(pDM_Odm); - if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { - ; - } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { - odm_PrimaryCCA_Init(pDM_Odm); /* Gary */ - odm_DynamicBBPowerSavingInit(pDM_Odm); - odm_DynamicTxPowerInit(pDM_Odm); - odm_TXPowerTrackingInit(pDM_Odm); - ODM_EdcaTurboInit(pDM_Odm); - ODM_RAInfo_Init_all(pDM_Odm); - if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) - odm_InitHybridAntDiv(pDM_Odm); - else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) - odm_SwAntDivInit(pDM_Odm); - } + odm_PrimaryCCA_Init(pDM_Odm); /* Gary */ + odm_DynamicBBPowerSavingInit(pDM_Odm); + odm_TXPowerTrackingInit(pDM_Odm); + ODM_EdcaTurboInit(pDM_Odm); + ODM_RAInfo_Init_all(pDM_Odm); + if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || + (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || + (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) + odm_InitHybridAntDiv(pDM_Odm); } /* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ @@ -187,22 +169,11 @@ void ODM_DMInit(struct odm_dm_struct *pDM_Odm) void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) { /* 2012.05.03 Luke: For all IC series */ - odm_GlobalAdapterCheck(); odm_CommonInfoSelfUpdate(pDM_Odm); odm_FalseAlarmCounterStatistics(pDM_Odm); odm_RSSIMonitorCheck(pDM_Odm); - /* For CE Platform(SPRD or Tablet) */ - /* 8723A or 8189ES platform */ - /* NeilChen--2012--08--24-- */ - /* Fix Leave LPS issue */ - if ((pDM_Odm->Adapter->pwrctrlpriv.pwr_mode != PS_MODE_ACTIVE) &&/* in LPS mode */ - ((pDM_Odm->SupportICType & (ODM_RTL8723A)) || - (pDM_Odm->SupportICType & (ODM_RTL8188E) && - ((pDM_Odm->SupportInterface == ODM_ITRF_SDIO))))) - odm_DIGbyRSSI_LPS(pDM_Odm); - else - odm_DIG(pDM_Odm); + odm_DIG(pDM_Odm); odm_CCKPacketDetectionThresh(pDM_Odm); if (*pDM_Odm->pbPowerSaving) @@ -210,22 +181,13 @@ void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) odm_RefreshRateAdaptiveMask(pDM_Odm); - odm_DynamicBBPowerSaving(pDM_Odm); if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) odm_HwAntDiv(pDM_Odm); - else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) - odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_PEAK); - - if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { - ; - } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { - ODM_TXPowerTrackingCheck(pDM_Odm); - odm_EdcaTurboCheck(pDM_Odm); - odm_DynamicTxPower(pDM_Odm); - } - odm_dtc(pDM_Odm); + + ODM_TXPowerTrackingCheck(pDM_Odm); + odm_EdcaTurboCheck(pDM_Odm); } /* Init /.. Fixed HW value. Only init time. */ @@ -237,54 +199,12 @@ void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def Cmn case ODM_CMNINFO_ABILITY: pDM_Odm->SupportAbility = (u32)Value; break; - case ODM_CMNINFO_PLATFORM: - pDM_Odm->SupportPlatform = (u8)Value; - break; - case ODM_CMNINFO_INTERFACE: - pDM_Odm->SupportInterface = (u8)Value; - break; case ODM_CMNINFO_MP_TEST_CHIP: pDM_Odm->bIsMPChip = (u8)Value; break; - case ODM_CMNINFO_IC_TYPE: - pDM_Odm->SupportICType = Value; - break; - case ODM_CMNINFO_CUT_VER: - pDM_Odm->CutVersion = (u8)Value; - break; - case ODM_CMNINFO_FAB_VER: - pDM_Odm->FabVersion = (u8)Value; - break; - case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u8)Value; - break; case ODM_CMNINFO_RF_ANTENNA_TYPE: pDM_Odm->AntDivType = (u8)Value; break; - case ODM_CMNINFO_BOARD_TYPE: - pDM_Odm->BoardType = (u8)Value; - break; - case ODM_CMNINFO_EXT_LNA: - pDM_Odm->ExtLNA = (u8)Value; - break; - case ODM_CMNINFO_EXT_PA: - pDM_Odm->ExtPA = (u8)Value; - break; - case ODM_CMNINFO_EXT_TRSW: - pDM_Odm->ExtTRSW = (u8)Value; - break; - case ODM_CMNINFO_PATCH_ID: - pDM_Odm->PatchID = (u8)Value; - break; - case ODM_CMNINFO_BINHCT_TEST: - pDM_Odm->bInHctTest = (bool)Value; - break; - case ODM_CMNINFO_BWIFI_TEST: - pDM_Odm->bWIFITest = (bool)Value; - break; - case ODM_CMNINFO_SMART_CONCURRENT: - pDM_Odm->bDualMacSmartConcurrent = (bool)Value; - break; /* To remove the compiler warning, must add an empty default statement to handle the other values. */ default: /* do nothing */ @@ -305,9 +225,6 @@ void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def Cmn /* */ switch (CmnInfo) { /* Dynamic call by reference pointer. */ - case ODM_CMNINFO_MAC_PHY_MODE: - pDM_Odm->pMacPhyMode = (u8 *)pValue; - break; case ODM_CMNINFO_TX_UNI: pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue; break; @@ -317,9 +234,6 @@ void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def Cmn case ODM_CMNINFO_WM_MODE: pDM_Odm->pWirelessMode = (u8 *)pValue; break; - case ODM_CMNINFO_BAND: - pDM_Odm->pBandType = (u8 *)pValue; - break; case ODM_CMNINFO_SEC_CHNL_OFFSET: pDM_Odm->pSecChOffset = (u8 *)pValue; break; @@ -332,57 +246,15 @@ void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def Cmn case ODM_CMNINFO_CHNL: pDM_Odm->pChannel = (u8 *)pValue; break; - case ODM_CMNINFO_DMSP_GET_VALUE: - pDM_Odm->pbGetValueFromOtherMac = (bool *)pValue; - break; - case ODM_CMNINFO_BUDDY_ADAPTOR: - pDM_Odm->pBuddyAdapter = (struct adapter **)pValue; - break; - case ODM_CMNINFO_DMSP_IS_MASTER: - pDM_Odm->pbMasterOfDMSP = (bool *)pValue; - break; case ODM_CMNINFO_SCAN: pDM_Odm->pbScanInProcess = (bool *)pValue; break; case ODM_CMNINFO_POWER_SAVING: pDM_Odm->pbPowerSaving = (bool *)pValue; break; - case ODM_CMNINFO_ONE_PATH_CCA: - pDM_Odm->pOnePathCCA = (u8 *)pValue; - break; - case ODM_CMNINFO_DRV_STOP: - pDM_Odm->pbDriverStopped = (bool *)pValue; - break; - case ODM_CMNINFO_PNP_IN: - pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (bool *)pValue; - break; - case ODM_CMNINFO_INIT_ON: - pDM_Odm->pinit_adpt_in_progress = (bool *)pValue; - break; - case ODM_CMNINFO_ANT_TEST: - pDM_Odm->pAntennaTest = (u8 *)pValue; - break; case ODM_CMNINFO_NET_CLOSED: pDM_Odm->pbNet_closed = (bool *)pValue; break; - case ODM_CMNINFO_MP_MODE: - pDM_Odm->mp_mode = (u8 *)pValue; - break; - /* To remove the compiler warning, must add an empty default statement to handle the other values. */ - default: - /* do nothing */ - break; - } -} - -void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue) -{ - /* Hook call by reference pointer. */ - switch (CmnInfo) { - /* Dynamic call by reference pointer. */ - case ODM_CMNINFO_STA_STATUS: - pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue; - break; /* To remove the compiler warning, must add an empty default statement to handle the other values. */ default: /* do nothing */ @@ -400,9 +272,6 @@ void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) case ODM_CMNINFO_ABILITY: pDM_Odm->SupportAbility = (u32)Value; break; - case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u8)Value; - break; case ODM_CMNINFO_WIFI_DIRECT: pDM_Odm->bWIFI_Direct = (bool)Value; break; @@ -415,12 +284,6 @@ void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) case ODM_CMNINFO_RSSI_MIN: pDM_Odm->RSSI_Min = (u8)Value; break; - case ODM_CMNINFO_RA_THRESHOLD_HIGH: - pDM_Odm->RateAdaptive.HighRSSIThresh = (u8)Value; - break; - case ODM_CMNINFO_RA_THRESHOLD_LOW: - pDM_Odm->RateAdaptive.LowRSSIThresh = (u8)Value; - break; } } @@ -428,10 +291,6 @@ void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) { pDM_Odm->bCckHighPower = (bool)ODM_GetBBReg(pDM_Odm, 0x824, BIT(9)); pDM_Odm->RFPathRxEnable = (u8)ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); - if (pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) - pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; - if (pDM_Odm->SupportICType & (ODM_RTL8723A)) - pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; } void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) @@ -460,118 +319,27 @@ void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) pDM_Odm->bOneEntryOnly = false; } -static int getIGIForDiff(int value_IGI) -{ - #define ONERCCA_LOW_TH 0x30 - #define ONERCCA_LOW_DIFF 8 - - if (value_IGI < ONERCCA_LOW_TH) { - if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF) - return ONERCCA_LOW_TH; - else - return value_IGI + ONERCCA_LOW_DIFF; - } else { - return value_IGI; - } -} - void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; if (pDM_DigTable->CurIGValue != CurrentIGI) { - if (pDM_Odm->SupportPlatform & (ODM_CE | ODM_MP)) { - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - } else if (pDM_Odm->SupportPlatform & (ODM_AP | ODM_ADSL)) { - switch (*pDM_Odm->pOnePathCCA) { - case ODM_CCA_2R: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - break; - case ODM_CCA_1R_A: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), getIGIForDiff(CurrentIGI)); - break; - case ODM_CCA_1R_B: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), getIGIForDiff(CurrentIGI)); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - break; - } - } - /* pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue; */ + ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI); pDM_DigTable->CurIGValue = CurrentIGI; } -/* Add by Neil Chen to enable edcca to MP Platform */ -} - -/* Need LPS mode for CE platform --2012--08--24--- */ -/* 8723AS/8189ES */ -void odm_DIGbyRSSI_LPS(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *pAdapter = pDM_Odm->Adapter; - struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - - u8 RSSI_Lower = DM_DIG_MIN_NIC; /* 0x1E or 0x1C */ - u8 bFwCurrentInPSMode = false; - u8 CurrentIGI = pDM_Odm->RSSI_Min; - - if (!(pDM_Odm->SupportICType & (ODM_RTL8723A | ODM_RTL8188E))) - return; - - CurrentIGI = CurrentIGI + RSSI_OFFSET_DIG; - bFwCurrentInPSMode = pAdapter->pwrctrlpriv.bFwCurrentInPSMode; - - /* Using FW PS mode to make IGI */ - if (bFwCurrentInPSMode) { - /* Adjust by FA in LPS MODE */ - if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_LPS) - CurrentIGI = CurrentIGI + 2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS) - CurrentIGI = CurrentIGI + 1; - else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) - CurrentIGI = CurrentIGI - 1; - } else { - CurrentIGI = RSSI_Lower; - } - - /* Lower bound checking */ - - /* RSSI Lower bound check */ - if ((pDM_Odm->RSSI_Min - 10) > DM_DIG_MIN_NIC) - RSSI_Lower = (pDM_Odm->RSSI_Min - 10); - else - RSSI_Lower = DM_DIG_MIN_NIC; - - /* Upper and Lower Bound checking */ - if (CurrentIGI > DM_DIG_MAX_NIC) - CurrentIGI = DM_DIG_MAX_NIC; - else if (CurrentIGI < RSSI_Lower) - CurrentIGI = RSSI_Lower; - - ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */ } void odm_DIGInit(struct odm_dm_struct *pDM_Odm) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - pDM_DigTable->CurIGValue = (u8)ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)); + pDM_DigTable->CurIGValue = (u8)ODM_GetBBReg(pDM_Odm, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N); pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW; pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH; - if (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) { - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - } else { - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - } + pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; + pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; @@ -609,86 +377,38 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) if (!pDM_Odm->bDMInitialGainEnable) return; - if (pDM_Odm->SupportICType == ODM_RTL8192D) { - if (*pDM_Odm->pMacPhyMode == ODM_DMSP) { - if (*pDM_Odm->pbMasterOfDMSP) { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); - } else { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_1); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1); - } - } else { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_1); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1); - } - } else { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); - } + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); /* 1 Boundary Decision */ - if ((pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8723A)) && - ((pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) || pDM_Odm->ExtLNA)) { - if (pDM_Odm->SupportPlatform & (ODM_AP | ODM_ADSL)) { - dm_dig_max = DM_DIG_MAX_AP_HP; - dm_dig_min = DM_DIG_MIN_AP_HP; - } else { - dm_dig_max = DM_DIG_MAX_NIC_HP; - dm_dig_min = DM_DIG_MIN_NIC_HP; - } - DIG_MaxOfMin = DM_DIG_MAX_AP_HP; - } else { - if (pDM_Odm->SupportPlatform & (ODM_AP | ODM_ADSL)) { - dm_dig_max = DM_DIG_MAX_AP; - dm_dig_min = DM_DIG_MIN_AP; - DIG_MaxOfMin = dm_dig_max; - } else { - dm_dig_max = DM_DIG_MAX_NIC; - dm_dig_min = DM_DIG_MIN_NIC; - DIG_MaxOfMin = DM_DIG_MAX_AP; - } - } + dm_dig_max = DM_DIG_MAX_NIC; + dm_dig_min = DM_DIG_MIN_NIC; + DIG_MaxOfMin = DM_DIG_MAX_AP; + if (pDM_Odm->bLinked) { - /* 2 8723A Series, offset need to be 10 */ - if (pDM_Odm->SupportICType == (ODM_RTL8723A)) { - /* 2 Upper Bound */ - if ((pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC) - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - else if ((pDM_Odm->RSSI_Min + 10) < DM_DIG_MIN_NIC) - pDM_DigTable->rx_gain_range_max = DM_DIG_MIN_NIC; + /* 2 8723A Series, offset need to be 10 */ + /* 2 Modify DIG upper bound */ + if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max) + pDM_DigTable->rx_gain_range_max = dm_dig_max; + else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min) + pDM_DigTable->rx_gain_range_max = dm_dig_min; + else + pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; + /* 2 Modify DIG lower bound */ + if (pDM_Odm->bOneEntryOnly) { + if (pDM_Odm->RSSI_Min < dm_dig_min) + DIG_Dynamic_MIN = dm_dig_min; + else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) + DIG_Dynamic_MIN = DIG_MaxOfMin; else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; - /* 2 If BT is Concurrent, need to set Lower Bound */ - DIG_Dynamic_MIN = DM_DIG_MIN_NIC; + DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; + } else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) { + /* 1 Lower Bound for 88E AntDiv */ + if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) + DIG_Dynamic_MIN = (u8)pDM_DigTable->AntDiv_RSSI_max; } else { - /* 2 Modify DIG upper bound */ - if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; - /* 2 Modify DIG lower bound */ - if (pDM_Odm->bOneEntryOnly) { - if (pDM_Odm->RSSI_Min < dm_dig_min) - DIG_Dynamic_MIN = dm_dig_min; - else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) - DIG_Dynamic_MIN = DIG_MaxOfMin; - else - DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; - } else if ((pDM_Odm->SupportICType == ODM_RTL8188E) && - (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { - /* 1 Lower Bound for 88E AntDiv */ - if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - DIG_Dynamic_MIN = (u8)pDM_DigTable->AntDiv_RSSI_max; - } else { - DIG_Dynamic_MIN = dm_dig_min; - } + DIG_Dynamic_MIN = dm_dig_min; } } else { pDM_DigTable->rx_gain_range_max = dm_dig_max; @@ -736,21 +456,12 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) if (FirstConnect) { CurrentIGI = pDM_Odm->RSSI_Min; } else { - if (pDM_Odm->SupportICType == ODM_RTL8192D) { - if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_92D) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_92D) - CurrentIGI = CurrentIGI + 1; /* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ - else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_92D) - CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ - } else { - if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ - else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ - } + if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) + CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ + else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) + CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ + else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) + CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ } } else { if (FirstDisConnect) { @@ -790,85 +501,51 @@ void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) return; - if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { - /* hold ofdm counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */ - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); - FalseAlmCnt->Cnt_Fast_Fsync = (ret_value & 0xffff); - FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value & 0xffff0000) >> 16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); - FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff); - FalseAlmCnt->Cnt_Parity_Fail = ((ret_value & 0xffff0000) >> 16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); - FalseAlmCnt->Cnt_Rate_Illegal = (ret_value & 0xffff); - FalseAlmCnt->Cnt_Crc8_fail = ((ret_value & 0xffff0000) >> 16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); - FalseAlmCnt->Cnt_Mcs_fail = (ret_value & 0xffff); - - FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; - - if (pDM_Odm->SupportICType == ODM_RTL8188E) { - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_BW_LSC = (ret_value & 0xffff); - FalseAlmCnt->Cnt_BW_USC = ((ret_value & 0xffff0000) >> 16); - } - - /* hold cck counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(12), 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(14), 1); - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); - FalseAlmCnt->Cnt_Cck_fail = ret_value; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); - FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8; - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_CCK_CCA = ((ret_value & 0xFF) << 8) | ((ret_value & 0xFF00) >> 8); - - FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + - FalseAlmCnt->Cnt_SB_Search_fail + - FalseAlmCnt->Cnt_Parity_Fail + - FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + - FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Cck_fail); - - FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; - - if (pDM_Odm->SupportICType >= ODM_RTL8723A) { - /* reset false alarm counter registers */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(31), 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(31), 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 0); - /* update ofdm counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 0); /* update page C counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 0); /* update page D counter */ - - /* reset CCK CCA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(13) | BIT(12), 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(13) | BIT(12), 2); - /* reset CCK FA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(15) | BIT(14), 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(15) | BIT(14), 2); - } - } else { /* FOR ODM_IC_11AC_SERIES */ - /* read OFDM FA counter */ - FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); - FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); - FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; - - /* reset OFDM FA coutner */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 0); - /* reset CCK FA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT(15), 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT(15), 1); - } + /* hold ofdm counter */ + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */ + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */ + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); + FalseAlmCnt->Cnt_Fast_Fsync = (ret_value & 0xffff); + FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value & 0xffff0000) >> 16); + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); + FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff); + FalseAlmCnt->Cnt_Parity_Fail = ((ret_value & 0xffff0000) >> 16); + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); + FalseAlmCnt->Cnt_Rate_Illegal = (ret_value & 0xffff); + FalseAlmCnt->Cnt_Crc8_fail = ((ret_value & 0xffff0000) >> 16); + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); + FalseAlmCnt->Cnt_Mcs_fail = (ret_value & 0xffff); + + FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + + FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); + FalseAlmCnt->Cnt_BW_LSC = (ret_value & 0xffff); + FalseAlmCnt->Cnt_BW_USC = ((ret_value & 0xffff0000) >> 16); + + /* hold cck counter */ + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(12), 1); + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(14), 1); + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); + FalseAlmCnt->Cnt_Cck_fail = ret_value; + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); + FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8; + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); + FalseAlmCnt->Cnt_CCK_CCA = ((ret_value & 0xFF) << 8) | ((ret_value & 0xFF00) >> 8); + + FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + + FalseAlmCnt->Cnt_SB_Search_fail + + FalseAlmCnt->Cnt_Parity_Fail + + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + + FalseAlmCnt->Cnt_Mcs_fail + + FalseAlmCnt->Cnt_Cck_fail); + + FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; } /* 3============================================================ */ @@ -882,8 +559,6 @@ void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD | ODM_BB_FA_CNT))) return; - if (pDM_Odm->ExtLNA) - return; if (pDM_Odm->bLinked) { if (pDM_Odm->RSSI_Min > 25) { CurCCK_CCAThres = 0xcd; @@ -909,7 +584,7 @@ void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres) struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */ - ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA, pDM_Odm), CurCCK_CCAThres); + ODM_Write1Byte(pDM_Odm, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres); pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; } @@ -929,69 +604,12 @@ void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm) pDM_PSTable->initialize = 0; } -void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm) -{ - if ((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8723A)) - return; - if (!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) - return; - if (!(pDM_Odm->SupportPlatform & (ODM_MP | ODM_CE))) - return; - - /* 1 2.Power Saving for 92C */ - if ((pDM_Odm->SupportICType == ODM_RTL8192C) && (pDM_Odm->RFType == ODM_2T2R)) { - odm_1R_CCA(pDM_Odm); - } else { - /* 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. */ - /* 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. */ - /* 1 3.Power Saving for 88C */ - ODM_RF_Saving(pDM_Odm, false); - } -} - -void odm_1R_CCA(struct odm_dm_struct *pDM_Odm) -{ - struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; - - if (pDM_Odm->RSSI_Min != 0xFF) { - if (pDM_PSTable->pre_cca_state == CCA_2R) { - if (pDM_Odm->RSSI_Min >= 35) - pDM_PSTable->cur_cca_state = CCA_1R; - else - pDM_PSTable->cur_cca_state = CCA_2R; - } else { - if (pDM_Odm->RSSI_Min <= 30) - pDM_PSTable->cur_cca_state = CCA_2R; - else - pDM_PSTable->cur_cca_state = CCA_1R; - } - } else { - pDM_PSTable->cur_cca_state = CCA_MAX; - } - - if (pDM_PSTable->pre_cca_state != pDM_PSTable->cur_cca_state) { - if (pDM_PSTable->cur_cca_state == CCA_1R) { - if (pDM_Odm->RFType == ODM_2T2R) - ODM_SetBBReg(pDM_Odm, 0xc04, bMaskByte0, 0x13); - else - ODM_SetBBReg(pDM_Odm, 0xc04, bMaskByte0, 0x23); - } else { - ODM_SetBBReg(pDM_Odm, 0xc04, bMaskByte0, 0x33); - } - pDM_PSTable->pre_cca_state = pDM_PSTable->cur_cca_state; - } -} - void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) { struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; u8 Rssi_Up_bound = 30; u8 Rssi_Low_bound = 25; - if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */ - Rssi_Up_bound = 50; - Rssi_Low_bound = 45; - } if (pDM_PSTable->initialize == 0) { pDM_PSTable->reg_874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord) & 0x1CC000) >> 14; pDM_PSTable->reg_c70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord) & BIT(3)) >> 3; @@ -1022,10 +640,6 @@ void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) if (pDM_PSTable->pre_rf_state != pDM_PSTable->cur_rf_state) { if (pDM_PSTable->cur_rf_state == RF_Save) { - /* <tynli_note> 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. */ - /* Suggested by SD3 Yu-Nan. 2011.01.20. */ - if (pDM_Odm->SupportICType == ODM_RTL8723A) - ODM_SetBBReg(pDM_Odm, 0x874, BIT(5), 0x1); /* Reg874[5]=1b'1 */ ODM_SetBBReg(pDM_Odm, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ ODM_SetBBReg(pDM_Odm, 0xc70, BIT(3), 0); /* RegC70[3]=1'b0 */ ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ @@ -1039,9 +653,6 @@ void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->reg_85c); ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->reg_a74); ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x0); - - if (pDM_Odm->SupportICType == ODM_RTL8723A) - ODM_SetBBReg(pDM_Odm, 0x874, BIT(5), 0x0); /* Reg874[5]=1b'0 */ } pDM_PSTable->pre_rf_state = pDM_PSTable->cur_rf_state; } @@ -1058,12 +669,6 @@ void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm) { struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive; - pOdmRA->Type = DM_Type_ByDriver; - if (pOdmRA->Type == DM_Type_ByDriver) - pDM_Odm->bUseRAMask = true; - else - pDM_Odm->bUseRAMask = false; - pOdmRA->RATRState = DM_RATR_STA_INIT; pOdmRA->HighRSSIThresh = 50; pOdmRA->LowRSSIThresh = 20; @@ -1097,36 +702,20 @@ u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u rate_bitmap = 0x00000ff5; break; case (ODM_WM_B | ODM_WM_G | ODM_WM_N24G): - if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { - if (rssi_level == DM_RATR_STA_HIGH) { - rate_bitmap = 0x000f0000; - } else if (rssi_level == DM_RATR_STA_MIDDLE) { - rate_bitmap = 0x000ff000; - } else { - if (*pDM_Odm->pBandWidth == ODM_BW40M) - rate_bitmap = 0x000ff015; - else - rate_bitmap = 0x000ff005; - } + if (rssi_level == DM_RATR_STA_HIGH) { + rate_bitmap = 0x000f0000; + } else if (rssi_level == DM_RATR_STA_MIDDLE) { + rate_bitmap = 0x000ff000; } else { - if (rssi_level == DM_RATR_STA_HIGH) { - rate_bitmap = 0x0f8f0000; - } else if (rssi_level == DM_RATR_STA_MIDDLE) { - rate_bitmap = 0x0f8ff000; - } else { - if (*pDM_Odm->pBandWidth == ODM_BW40M) - rate_bitmap = 0x0f8ff015; - else - rate_bitmap = 0x0f8ff005; - } + if (*pDM_Odm->pBandWidth == ODM_BW40M) + rate_bitmap = 0x000ff015; + else + rate_bitmap = 0x000ff005; } break; default: /* case WIRELESS_11_24N: */ - if (pDM_Odm->RFType == RF_1T2R) - rate_bitmap = 0x000fffff; - else - rate_bitmap = 0x0fffffff; + rate_bitmap = 0x0fffffff; break; } @@ -1151,40 +740,13 @@ u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u *---------------------------------------------------------------------------*/ void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) { - if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) - return; - /* */ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - /* */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - odm_RefreshRateAdaptiveMaskMP(pDM_Odm); - break; - case ODM_CE: - odm_RefreshRateAdaptiveMaskCE(pDM_Odm); - break; - case ODM_AP: - case ODM_ADSL: - odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); - break; - } -} - -void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm) -{ -} - -void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm) -{ u8 i; struct adapter *pAdapter = pDM_Odm->Adapter; - if (pAdapter->bDriverStopped) + if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) return; - if (!pDM_Odm->bUseRAMask) + if (pAdapter->bDriverStopped) return; for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { @@ -1196,10 +758,6 @@ void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm) } } -void odm_RefreshRateAdaptiveMaskAPADSL(struct odm_dm_struct *pDM_Odm) -{ -} - /* Return Value: bool */ /* - true: RATRState is changed. */ bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState) @@ -1244,97 +802,9 @@ bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate } /* 3============================================================ */ -/* 3 Dynamic Tx Power */ -/* 3============================================================ */ - -void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - pdmpriv->bDynamicTxPowerEnable = false; - pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -} - -void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm) -{ - /* For AP/ADSL use struct rtl8192cd_priv * */ - /* For CE/NIC use struct adapter * */ - - if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) - return; - - /* 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. */ - if (!pDM_Odm->ExtPA) - return; - - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - case ODM_CE: - odm_DynamicTxPowerNIC(pDM_Odm); - break; - case ODM_AP: - odm_DynamicTxPowerAP(pDM_Odm); - break; - case ODM_ADSL: - break; - } -} - -void odm_DynamicTxPowerNIC(struct odm_dm_struct *pDM_Odm) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) - return; - - if (pDM_Odm->SupportICType == ODM_RTL8188E) { - /* ??? */ - /* This part need to be redefined. */ - } -} - -void odm_DynamicTxPowerAP(struct odm_dm_struct *pDM_Odm) -{ -} - -/* 3============================================================ */ /* 3 RSSI Monitor */ /* 3============================================================ */ -void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) - return; - - /* */ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - /* */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - odm_RSSIMonitorCheckMP(pDM_Odm); - break; - case ODM_CE: - odm_RSSIMonitorCheckCE(pDM_Odm); - break; - case ODM_AP: - odm_RSSIMonitorCheckAP(pDM_Odm); - break; - case ODM_ADSL: - /* odm_DIGAP(pDM_Odm); */ - break; - } - -} /* odm_RSSIMonitorCheck */ - -void odm_RSSIMonitorCheckMP(struct odm_dm_struct *pDM_Odm) -{ -} - static void FindMinimumRSSI(struct adapter *pAdapter) { struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); @@ -1345,13 +815,11 @@ static void FindMinimumRSSI(struct adapter *pAdapter) if (!check_fwstate(pmlmepriv, _FW_LINKED) && pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0) pdmpriv->MinUndecoratedPWDBForDM = 0; - if (check_fwstate(pmlmepriv, _FW_LINKED)) /* Default port */ - pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - else /* associated entry pwdb */ - pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + + pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; } -void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) +void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) { struct adapter *Adapter = pDM_Odm->Adapter; struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); @@ -1361,7 +829,9 @@ void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) u8 sta_cnt = 0; u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */ struct sta_info *psta; - u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) + return; if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) return; @@ -1370,7 +840,7 @@ void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) psta = pDM_Odm->pODM_StaInfo[i]; if (IS_STA_VALID(psta) && (psta->state & WIFI_ASOC_STATE) && - memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) && + !is_broadcast_ether_addr(psta->hwaddr) && memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) { if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; @@ -1407,27 +877,6 @@ void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); } -void odm_RSSIMonitorCheckAP(struct odm_dm_struct *pDM_Odm) -{ -} - -void ODM_InitAllTimers(struct odm_dm_struct *pDM_Odm) -{ - timer_setup(&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer, odm_SwAntDivChkAntSwitchCallback, 0); -} - -void ODM_CancelAllTimers(struct odm_dm_struct *pDM_Odm) -{ - ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); -} - -void ODM_ReleaseAllTimers(struct odm_dm_struct *pDM_Odm) -{ - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); - - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->FastAntTrainingTimer); -} - /* 3============================================================ */ /* 3 Tx Power Tracking */ /* 3============================================================ */ @@ -1442,8 +891,6 @@ void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm) pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; pDM_Odm->RFCalibrateInfo.TXPowercount = 0; pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false; - if (*pDM_Odm->mp_mode != 1) - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; MSG_88E("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; @@ -1451,26 +898,6 @@ void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm) void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm) { - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - odm_TXPowerTrackingCheckMP(pDM_Odm); - break; - case ODM_CE: - odm_TXPowerTrackingCheckCE(pDM_Odm); - break; - case ODM_AP: - odm_TXPowerTrackingCheckAP(pDM_Odm); - break; - case ODM_ADSL: - break; - } -} - -void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm) -{ struct adapter *Adapter = pDM_Odm->Adapter; if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) @@ -1487,79 +914,12 @@ void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm) } } -void odm_TXPowerTrackingCheckMP(struct odm_dm_struct *pDM_Odm) -{ -} - -void odm_TXPowerTrackingCheckAP(struct odm_dm_struct *pDM_Odm) -{ -} - -/* antenna mapping info */ -/* 1: right-side antenna */ -/* 2/0: left-side antenna */ -/* PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt: for right-side antenna: Ant:1 RxDefaultAnt1 */ -/* PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt: for left-side antenna: Ant:0 RxDefaultAnt2 */ -/* We select left antenna as default antenna in initial process, modify it as needed */ -/* */ - -/* 3============================================================ */ -/* 3 SW Antenna Diversity */ -/* 3============================================================ */ -void odm_SwAntDivInit(struct odm_dm_struct *pDM_Odm) -{ -} - -void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u8 StationID, struct odm_phy_status_info *pPhyInfo) -{ -} - -void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step) -{ -} - -void ODM_SwAntDivRestAfterLink(struct odm_dm_struct *pDM_Odm) -{ -} - -void odm_SwAntDivChkAntSwitchCallback(struct timer_list *t) -{ -} - -/* 3============================================================ */ -/* 3 SW Antenna Diversity */ -/* 3============================================================ */ - void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) { if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) return; - if (pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) - ; - else if (pDM_Odm->SupportICType == ODM_RTL8188E) - ODM_AntennaDiversityInit_88E(pDM_Odm); -} - -void ODM_AntselStatistics_88C(struct odm_dm_struct *pDM_Odm, u8 MacId, u32 PWDBAll, bool isCCKrate) -{ - struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - if (pDM_SWAT_Table->antsel == 1) { - if (isCCKrate) { - pDM_SWAT_Table->CCK_Ant1_Cnt[MacId]++; - } else { - pDM_SWAT_Table->OFDM_Ant1_Cnt[MacId]++; - pDM_SWAT_Table->RSSI_Ant1_Sum[MacId] += PWDBAll; - } - } else { - if (isCCKrate) { - pDM_SWAT_Table->CCK_Ant2_Cnt[MacId]++; - } else { - pDM_SWAT_Table->OFDM_Ant2_Cnt[MacId]++; - pDM_SWAT_Table->RSSI_Ant2_Sum[MacId] += PWDBAll; - } - } + ODM_AntennaDiversityInit_88E(pDM_Odm); } void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) @@ -1567,8 +927,7 @@ void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) return; - if (pDM_Odm->SupportICType == ODM_RTL8188E) - ODM_AntennaDiversity_88E(pDM_Odm); + ODM_AntennaDiversity_88E(pDM_Odm); } /* EDCA Turbo */ @@ -1583,26 +942,6 @@ void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm) void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) { - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) - return; - - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - break; - case ODM_CE: - odm_EdcaTurboCheckCE(pDM_Odm); - break; - case ODM_AP: - case ODM_ADSL: - break; - } -} /* odm_CheckEdcaTurbo */ - -void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) -{ struct adapter *Adapter = pDM_Odm->Adapter; u32 trafficIndex; u32 edca_param; @@ -1616,6 +955,9 @@ void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) + return; + if (pregpriv->wifi_spec == 1) goto dm_CheckEdcaTurbo_EXIT; @@ -1674,295 +1016,3 @@ dm_CheckEdcaTurbo_EXIT: pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; precvpriv->last_rx_bytes = precvpriv->rx_bytes; } - -/* need to ODM CE Platform */ -/* move to here for ANT detection mechanism using */ - -u32 GetPSDData(struct odm_dm_struct *pDM_Odm, unsigned int point, u8 initial_gain_psd) -{ - u32 psd_report; - - /* Set DCO frequency index, offset=(40MHz/SamplePts)*point */ - ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); - - /* Start PSD calculation, Reg808[22]=0->1 */ - ODM_SetBBReg(pDM_Odm, 0x808, BIT(22), 1); - /* Need to wait for HW PSD report */ - ODM_StallExecution(30); - ODM_SetBBReg(pDM_Odm, 0x808, BIT(22), 0); - /* Read PSD report, Reg8B4[15:0] */ - psd_report = ODM_GetBBReg(pDM_Odm, 0x8B4, bMaskDWord) & 0x0000FFFF; - - psd_report = (u32)(ConvertTo_dB(psd_report)) + (u32)(initial_gain_psd - 0x1c); - - return psd_report; -} - -u32 ConvertTo_dB(u32 Value) -{ - u8 i; - u8 j; - u32 dB; - - Value = Value & 0xFFFF; - for (i = 0; i < 8; i++) { - if (Value <= dB_Invert_Table[i][11]) - break; - } - - if (i >= 8) - return 96; /* maximum 96 dB */ - - for (j = 0; j < 12; j++) { - if (Value <= dB_Invert_Table[i][j]) - break; - } - - dB = i * 12 + j + 1; - - return dB; -} - -/* 2011/09/22 MH Add for 92D global spin lock utilization. */ -void odm_GlobalAdapterCheck(void) -{ -} /* odm_GlobalAdapterCheck */ - -/* Description: */ -/* Set Single/Dual Antenna default setting for products that do not do detection in advance. */ -/* Added by Joseph, 2012.03.22 */ -void ODM_SingleDualAntennaDefaultSetting(struct odm_dm_struct *pDM_Odm) -{ - struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - pDM_SWAT_Table->ANTA_ON = true; - pDM_SWAT_Table->ANTB_ON = true; -} - -/* 2 8723A ANT DETECT */ - -static void odm_PHY_SaveAFERegisters(struct odm_dm_struct *pDM_Odm, u32 *AFEReg, u32 *AFEBackup, u32 RegisterNum) -{ - u32 i; - - /* RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); */ - for (i = 0; i < RegisterNum; i++) - AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord); -} - -static void odm_PHY_ReloadAFERegisters(struct odm_dm_struct *pDM_Odm, u32 *AFEReg, u32 *AFEBackup, u32 RegiesterNum) -{ - u32 i; - - for (i = 0; i < RegiesterNum; i++) - ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]); -} - -/* 2 8723A ANT DETECT */ -/* Description: */ -/* Implement IQK single tone for RF DPK loopback and BB PSD scanning. */ -/* This function is cooperated with BB team Neil. */ -bool ODM_SingleDualAntennaDetection(struct odm_dm_struct *pDM_Odm, u8 mode) -{ - struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u32 CurrentChannel, RfLoopReg; - u8 n; - u32 Reg88c, Regc08, Reg874, Regc50; - u8 initial_gain = 0x5a; - u32 PSD_report_tmp; - u32 AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0; - bool bResult = true; - u32 AFE_Backup[16]; - u32 AFE_REG_8723A[16] = { - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN, - rFPGA0_XCD_SwitchControl, rBlue_Tooth}; - - if (!(pDM_Odm->SupportICType & (ODM_RTL8723A | ODM_RTL8192C))) - return bResult; - - if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - return bResult; - - if (pDM_Odm->SupportICType == ODM_RTL8192C) { - /* Which path in ADC/DAC is turnned on for PSD: both I/Q */ - ODM_SetBBReg(pDM_Odm, 0x808, BIT(10) | BIT(11), 0x3); - /* Ageraged number: 8 */ - ODM_SetBBReg(pDM_Odm, 0x808, BIT(12) | BIT(13), 0x1); - /* pts = 128; */ - ODM_SetBBReg(pDM_Odm, 0x808, BIT(14) | BIT(15), 0x0); - } - - /* 1 Backup Current RF/BB Settings */ - - CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); - RfLoopReg = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask); - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); /* change to Antenna A */ - /* Step 1: USE IQK to transmitter single tone */ - - ODM_StallExecution(10); - - /* Store A Path Register 88c, c08, 874, c50 */ - Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); - Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); - Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); - Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); - - /* Store AFE Registers */ - odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); - - /* Set PSD 128 pts */ - ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT(14) | BIT(15), 0x0); /* 128 pts */ - - /* To SET CH1 to do */ - ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01); /* Channel 1 */ - - /* AFE all on step */ - ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4); - - /* 3 wire Disable */ - ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); - - /* BB IQK Setting */ - ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); - - /* IQK setting tone@ 4.34Mhz */ - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); - ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); - - /* Page B init */ - ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); - ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); - ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008); - ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); - - /* RF loop Setting */ - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0, 0xFFFFF, 0x50008); - - /* IQK Single tone start */ - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - ODM_StallExecution(1000); - PSD_report_tmp = 0x0; - - for (n = 0; n < 2; n++) { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if (PSD_report_tmp > AntA_report) - AntA_report = PSD_report_tmp; - } - - PSD_report_tmp = 0x0; - - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); /* change to Antenna B */ - ODM_StallExecution(10); - - for (n = 0; n < 2; n++) { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if (PSD_report_tmp > AntB_report) - AntB_report = PSD_report_tmp; - } - - /* change to open case */ - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, 0); /* change to Ant A and B all open case */ - ODM_StallExecution(10); - - for (n = 0; n < 2; n++) { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if (PSD_report_tmp > AntO_report) - AntO_report = PSD_report_tmp; - } - - /* Close IQK Single Tone function */ - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - PSD_report_tmp = 0x0; - - /* 1 Return to antanna A */ - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); - ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); - ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask, RfLoopReg); - - /* Reload AFE Registers */ - odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); - - if (pDM_Odm->SupportICType == ODM_RTL8723A) { - /* 2 Test Ant B based on Ant A is ON */ - if (mode == ANTTESTB) { - if (AntA_report >= 100) { - if (AntB_report > (AntA_report + 1)) - pDM_SWAT_Table->ANTB_ON = false; - else - pDM_SWAT_Table->ANTB_ON = true; - } else { - pDM_SWAT_Table->ANTB_ON = false; /* Set Antenna B off as default */ - bResult = false; - } - } else if (mode == ANTTESTALL) { - /* 2 Test Ant A and B based on DPDT Open */ - if ((AntO_report >= 100) & (AntO_report < 118)) { - if (AntA_report > (AntO_report + 1)) - pDM_SWAT_Table->ANTA_ON = false; - else - pDM_SWAT_Table->ANTA_ON = true; - - if (AntB_report > (AntO_report + 2)) - pDM_SWAT_Table->ANTB_ON = false; - else - pDM_SWAT_Table->ANTB_ON = true; - } - } - } else if (pDM_Odm->SupportICType == ODM_RTL8192C) { - if (AntA_report >= 100) { - if (AntB_report > (AntA_report + 2)) { - pDM_SWAT_Table->ANTA_ON = false; - pDM_SWAT_Table->ANTB_ON = true; - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); - } else if (AntA_report > (AntB_report + 2)) { - pDM_SWAT_Table->ANTA_ON = true; - pDM_SWAT_Table->ANTB_ON = false; - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); - } else { - pDM_SWAT_Table->ANTA_ON = true; - pDM_SWAT_Table->ANTB_ON = true; - } - } else { - pDM_SWAT_Table->ANTA_ON = true; /* Set Antenna A on as default */ - pDM_SWAT_Table->ANTB_ON = false; /* Set Antenna B off as default */ - bResult = false; - } - } - return bResult; -} - -/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ -void odm_dtc(struct odm_dm_struct *pDM_Odm) -{ -} diff --git a/drivers/staging/r8188eu/hal/odm_HWConfig.c b/drivers/staging/r8188eu/hal/odm_HWConfig.c index ada22a526fee..3125886e6731 100644 --- a/drivers/staging/r8188eu/hal/odm_HWConfig.c +++ b/drivers/staging/r8188eu/hal/odm_HWConfig.c @@ -6,7 +6,6 @@ #define READ_AND_CONFIG READ_AND_CONFIG_MP #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm)) -#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm)) static u8 odm_QueryRxPwrPercentage(s8 AntPower) { @@ -18,63 +17,28 @@ static u8 odm_QueryRxPwrPercentage(s8 AntPower) return 100 + AntPower; } -/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */ -/* IF other SW team do not support the feature, remove this section.?? */ -static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig) -{ - return 0; -} - -static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig) -{ - return 0; -} - -static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig) +static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig) { s32 RetSig = 0; - if ((dm_odm->SupportInterface == ODM_ITRF_USB) || - (dm_odm->SupportInterface == ODM_ITRF_SDIO)) { - if (CurrSig >= 51 && CurrSig <= 100) - RetSig = 100; - else if (CurrSig >= 41 && CurrSig <= 50) - RetSig = 80 + ((CurrSig - 40) * 2); - else if (CurrSig >= 31 && CurrSig <= 40) - RetSig = 66 + (CurrSig - 30); - else if (CurrSig >= 21 && CurrSig <= 30) - RetSig = 54 + (CurrSig - 20); - else if (CurrSig >= 10 && CurrSig <= 20) - RetSig = 42 + (((CurrSig - 10) * 2) / 3); - else if (CurrSig >= 5 && CurrSig <= 9) - RetSig = 22 + (((CurrSig - 5) * 3) / 2); - else if (CurrSig >= 1 && CurrSig <= 4) - RetSig = 6 + (((CurrSig - 1) * 3) / 2); - else - RetSig = CurrSig; - } - return RetSig; -} - -static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig) -{ - if ((dm_odm->SupportPlatform == ODM_MP) && - (dm_odm->SupportInterface != ODM_ITRF_PCIE) && /* USB & SDIO */ - (dm_odm->PatchID == 10)) - return odm_sig_patch_netcore(dm_odm, CurrSig); - else if ((dm_odm->SupportPlatform == ODM_MP) && - (dm_odm->SupportInterface == ODM_ITRF_PCIE) && - (dm_odm->PatchID == 19)) - return odm_sig_patch_lenove(dm_odm, CurrSig); + if (CurrSig >= 51 && CurrSig <= 100) + RetSig = 100; + else if (CurrSig >= 41 && CurrSig <= 50) + RetSig = 80 + ((CurrSig - 40) * 2); + else if (CurrSig >= 31 && CurrSig <= 40) + RetSig = 66 + (CurrSig - 30); + else if (CurrSig >= 21 && CurrSig <= 30) + RetSig = 54 + (CurrSig - 20); + else if (CurrSig >= 10 && CurrSig <= 20) + RetSig = 42 + (((CurrSig - 10) * 2) / 3); + else if (CurrSig >= 5 && CurrSig <= 9) + RetSig = 22 + (((CurrSig - 5) * 3) / 2); + else if (CurrSig >= 1 && CurrSig <= 4) + RetSig = 6 + (((CurrSig - 1) * 3) / 2); else - return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig); -} + RetSig = CurrSig; -/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */ -static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm, - u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI) -{ - return 0; + return RetSig; } static u8 odm_evm_db_to_percentage(s8 value) @@ -89,15 +53,14 @@ static u8 odm_evm_db_to_percentage(s8 value) } static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, + struct phy_info *pPhyInfo, u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo, struct adapter *adapt) { - struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table; u8 i, Max_spatial_stream; s8 rx_pwr[4], rx_pwr_all = 0; - u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT; + u8 EVM, PWDB_ALL = 0; u8 RSSI, total_rssi = 0; u8 isCCKrate = 0; u8 rf_rx_num = 0; @@ -112,7 +75,6 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1; if (isCCKrate) { - u8 report; u8 cck_agc_rpt; dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++; @@ -126,125 +88,60 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */ /* The RSSI formula should be modified according to the gain table */ /* In 88E, cck_highpwr is always set to 1 */ - if (dm_odm->SupportICType & (ODM_RTL8188E | ODM_RTL8812)) { - LNA_idx = ((cck_agc_rpt & 0xE0) >> 5); - VGA_idx = (cck_agc_rpt & 0x1F); - switch (LNA_idx) { - case 7: - if (VGA_idx <= 27) - rx_pwr_all = -100 + 2 * (27 - VGA_idx); /* VGA_idx = 27~2 */ - else - rx_pwr_all = -100; - break; - case 6: - rx_pwr_all = -48 + 2 * (2 - VGA_idx); /* VGA_idx = 2~0 */ - break; - case 5: - rx_pwr_all = -42 + 2 * (7 - VGA_idx); /* VGA_idx = 7~5 */ - break; - case 4: - rx_pwr_all = -36 + 2 * (7 - VGA_idx); /* VGA_idx = 7~4 */ - break; - case 3: - rx_pwr_all = -24 + 2 * (7 - VGA_idx); /* VGA_idx = 7~0 */ - break; - case 2: - if (cck_highpwr) - rx_pwr_all = -12 + 2 * (5 - VGA_idx); /* VGA_idx = 5~0 */ - else - rx_pwr_all = -6 + 2 * (5 - VGA_idx); - break; - case 1: - rx_pwr_all = 8 - 2 * VGA_idx; - break; - case 0: - rx_pwr_all = 14 - 2 * VGA_idx; - break; - default: - break; - } - rx_pwr_all += 6; - PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - if (!cck_highpwr) { - if (PWDB_ALL >= 80) - PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80; - else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) - PWDB_ALL += 3; - if (PWDB_ALL > 100) - PWDB_ALL = 100; - } - } else { - if (!cck_highpwr) { - report = (cck_agc_rpt & 0xc0) >> 6; - switch (report) { - /* 03312009 modified by cosa */ - /* Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */ - /* Note: different RF with the different RNA gain. */ - case 0x3: - rx_pwr_all = -46 - (cck_agc_rpt & 0x3e); - break; - case 0x2: - rx_pwr_all = -26 - (cck_agc_rpt & 0x3e); - break; - case 0x1: - rx_pwr_all = -12 - (cck_agc_rpt & 0x3e); - break; - case 0x0: - rx_pwr_all = 16 - (cck_agc_rpt & 0x3e); - break; - } - } else { - report = (cck_agc_rpt & 0x60) >> 5; - switch (report) { - case 0x3: - rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1); - break; - case 0x2: - rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1); - break; - case 0x1: - rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1); - break; - case 0x0: - rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1); - break; - } - } - - PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - - /* Modification for ext-LNA board */ - if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) { - if ((cck_agc_rpt >> 7) == 0) { - PWDB_ALL = (PWDB_ALL > 94) ? 100 : (PWDB_ALL + 6); - } else { - if (PWDB_ALL > 38) - PWDB_ALL -= 16; - else - PWDB_ALL = (PWDB_ALL <= 16) ? (PWDB_ALL >> 2) : (PWDB_ALL - 12); - } - - /* CCK modification */ - if (PWDB_ALL > 25 && PWDB_ALL <= 60) - PWDB_ALL += 6; - } else {/* Modification for int-LNA board */ - if (PWDB_ALL > 99) - PWDB_ALL -= 8; - else if (PWDB_ALL > 50 && PWDB_ALL <= 68) - PWDB_ALL += 4; - } + LNA_idx = ((cck_agc_rpt & 0xE0) >> 5); + VGA_idx = (cck_agc_rpt & 0x1F); + switch (LNA_idx) { + case 7: + if (VGA_idx <= 27) + rx_pwr_all = -100 + 2 * (27 - VGA_idx); /* VGA_idx = 27~2 */ + else + rx_pwr_all = -100; + break; + case 6: + rx_pwr_all = -48 + 2 * (2 - VGA_idx); /* VGA_idx = 2~0 */ + break; + case 5: + rx_pwr_all = -42 + 2 * (7 - VGA_idx); /* VGA_idx = 7~5 */ + break; + case 4: + rx_pwr_all = -36 + 2 * (7 - VGA_idx); /* VGA_idx = 7~4 */ + break; + case 3: + rx_pwr_all = -24 + 2 * (7 - VGA_idx); /* VGA_idx = 7~0 */ + break; + case 2: + if (cck_highpwr) + rx_pwr_all = -12 + 2 * (5 - VGA_idx); /* VGA_idx = 5~0 */ + else + rx_pwr_all = -6 + 2 * (5 - VGA_idx); + break; + case 1: + rx_pwr_all = 8 - 2 * VGA_idx; + break; + case 0: + rx_pwr_all = 14 - 2 * VGA_idx; + break; + default: + break; + } + rx_pwr_all += 6; + PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); + if (!cck_highpwr) { + if (PWDB_ALL >= 80) + PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80; + else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) + PWDB_ALL += 3; + if (PWDB_ALL > 100) + PWDB_ALL = 100; } pPhyInfo->RxPWDBAll = PWDB_ALL; - pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; - pPhyInfo->RecvSignalPower = rx_pwr_all; + pPhyInfo->recvpower = rx_pwr_all; /* (3) Get Signal Quality (EVM) */ if (pPktinfo->bPacketMatchBSSID) { u8 SQ, SQ_rpt; - if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) { - SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, 0, 0); - } else if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) { + if (pPhyInfo->RxPWDBAll > 40) { SQ = 100; } else { SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all; @@ -280,62 +177,37 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); total_rssi += RSSI; - /* Modification for ext-LNA board */ - if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) { - if ((pPhyStaRpt->path_agc[i].trsw) == 1) - RSSI = (RSSI > 94) ? 100 : (RSSI + 6); - else - RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16); - - if ((RSSI <= 34) && (RSSI >= 4)) - RSSI -= 4; - } - pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI; /* Get Rx snr value in DB */ pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2); dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2); - - /* Record Signal Strength for next packet */ - if (pPktinfo->bPacketMatchBSSID) { - if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) { - if (i == RF_PATH_A) - pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, i, RSSI); - } - } } /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */ rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110; PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - PWDB_ALL_BT = PWDB_ALL; pPhyInfo->RxPWDBAll = PWDB_ALL; - pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; pPhyInfo->RxPower = rx_pwr_all; - pPhyInfo->RecvSignalPower = rx_pwr_all; + pPhyInfo->recvpower = rx_pwr_all; - if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) { - /* do nothing */ - } else { - /* (3)EVM of HT rate */ - if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15) - Max_spatial_stream = 2; /* both spatial stream make sense */ - else - Max_spatial_stream = 1; /* only spatial stream 1 makes sense */ - - for (i = 0; i < Max_spatial_stream; i++) { - /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */ - /* fill most significant bit to "zero" when doing shifting operation which may change a negative */ - /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */ - EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */ - - if (pPktinfo->bPacketMatchBSSID) { - if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */ - pPhyInfo->SignalQuality = (u8)(EVM & 0xff); - pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff); - } + /* (3)EVM of HT rate */ + if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15) + Max_spatial_stream = 2; /* both spatial stream make sense */ + else + Max_spatial_stream = 1; /* only spatial stream 1 makes sense */ + + for (i = 0; i < Max_spatial_stream; i++) { + /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */ + /* fill most significant bit to "zero" when doing shifting operation which may change a negative */ + /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */ + EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */ + + if (pPktinfo->bPacketMatchBSSID) { + if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */ + pPhyInfo->SignalQuality = (u8)(EVM & 0xff); + pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff); } } } @@ -348,20 +220,14 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num)); } - /* For 92C/92D HW (Hybrid) Antenna Diversity */ - pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel; /* For 88E HW Antenna Diversity */ dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel; dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b; dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2; } -void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm) -{ -} - static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, + struct phy_info *pPhyInfo, struct odm_per_pkt_info *pPktinfo) { s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK; @@ -371,6 +237,8 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, u32 OFDM_pkt = 0; u32 Weighting = 0; struct sta_info *pEntry; + u8 antsel_tr_mux; + struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable; if (pPktinfo->StationID == 0xFF) return; @@ -383,28 +251,24 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false; /* Smart Antenna Debug Message------------------ */ - if (dm_odm->SupportICType == ODM_RTL8188E) { - u8 antsel_tr_mux; - struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable; - - if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) { - if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) { - if (pPktinfo->bPacketToSelf) { - antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) | - (pDM_FatTable->antsel_rx_keep_1 << 1) | - pDM_FatTable->antsel_rx_keep_0; - pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll; - pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; - } - } - } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) { - if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { + if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) { + if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) { + if (pPktinfo->bPacketToSelf) { antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) | - (pDM_FatTable->antsel_rx_keep_1 << 1) | pDM_FatTable->antsel_rx_keep_0; - ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll); + (pDM_FatTable->antsel_rx_keep_1 << 1) | + pDM_FatTable->antsel_rx_keep_0; + pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll; + pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; } } + } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) { + if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { + antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) | + (pDM_FatTable->antsel_rx_keep_1 << 1) | pDM_FatTable->antsel_rx_keep_0; + ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll); + } } + /* Smart Antenna Debug Message------------------ */ UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK; @@ -498,47 +362,24 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, } /* Endianness before calling this API */ -static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, - u8 *pPhyStatus, - struct odm_per_pkt_info *pPktinfo, - struct adapter *adapt) +void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm, + struct phy_info *pPhyInfo, + u8 *pPhyStatus, + struct odm_per_pkt_info *pPktinfo, + struct adapter *adapt) { odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus, pPktinfo, adapt); - if (dm_odm->RSSI_test) { - /* Select the packets to do RSSI checking for antenna switching. */ - if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) - ODM_SwAntDivChkPerPktRssi(dm_odm, pPktinfo->StationID, pPhyInfo); - } else { + if (!dm_odm->RSSI_test) odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo); - } -} - -void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, - u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo, - struct adapter *adapt) -{ - ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo, adapt); -} - -/* For future use. */ -void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat, - u8 macid, bool pkt_match_bssid, - bool pkttoself, bool pkt_beacon) -{ - /* 2011/10/19 Driver team will handle in the future. */ } enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm, enum rf_radio_path content, enum rf_radio_path rfpath) { - if (dm_odm->SupportICType == ODM_RTL8188E) { - if (rfpath == RF_PATH_A) - READ_AND_CONFIG(8188E, _RadioA_1T_); - } + if (rfpath == RF_PATH_A) + READ_AND_CONFIG(8188E, _RadioA_1T_); return HAL_STATUS_SUCCESS; } @@ -546,22 +387,20 @@ enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm, enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm, enum odm_bb_config_type config_tp) { - if (dm_odm->SupportICType == ODM_RTL8188E) { - if (config_tp == CONFIG_BB_PHY_REG) { - READ_AND_CONFIG(8188E, _PHY_REG_1T_); - } else if (config_tp == CONFIG_BB_AGC_TAB) { - READ_AND_CONFIG(8188E, _AGC_TAB_1T_); - } else if (config_tp == CONFIG_BB_PHY_REG_PG) { - READ_AND_CONFIG(8188E, _PHY_REG_PG_); - } + if (config_tp == CONFIG_BB_PHY_REG) { + READ_AND_CONFIG(8188E, _PHY_REG_1T_); + } else if (config_tp == CONFIG_BB_AGC_TAB) { + READ_AND_CONFIG(8188E, _AGC_TAB_1T_); + } else if (config_tp == CONFIG_BB_PHY_REG_PG) { + READ_AND_CONFIG(8188E, _PHY_REG_PG_); } + return HAL_STATUS_SUCCESS; } enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm) { u8 result = HAL_STATUS_SUCCESS; - if (dm_odm->SupportICType == ODM_RTL8188E) - result = READ_AND_CONFIG(8188E, _MAC_REG_); + result = READ_AND_CONFIG(8188E, _MAC_REG_); return result; } diff --git a/drivers/staging/r8188eu/hal/odm_RTL8188E.c b/drivers/staging/r8188eu/hal/odm_RTL8188E.c index c64a291f9966..e7a765f375d6 100644 --- a/drivers/staging/r8188eu/hal/odm_RTL8188E.c +++ b/drivers/staging/r8188eu/hal/odm_RTL8188E.c @@ -3,26 +3,10 @@ #include "../include/odm_precomp.h" -void ODM_DIG_LowerBound_88E(struct odm_dm_struct *dm_odm) -{ - struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable; - - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - pDM_DigTable->rx_gain_range_min = (u8)pDM_DigTable->AntDiv_RSSI_max; - /* If only one Entry connected */ -} - static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm) { u32 value32; - if (*dm_odm->mp_mode == 1) { - dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; - ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* 1:CG, 0:CS */ - return; - } - /* MAC Setting */ value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ @@ -44,13 +28,6 @@ static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm) { u32 value32; - if (*dm_odm->mp_mode == 1) { - dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; - ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), 0); /* Default RX (0/1) */ - return; - } - /* MAC Setting */ value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ @@ -83,9 +60,6 @@ static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm) struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; u32 AntCombination = 2; - if (*dm_odm->mp_mode == 1) - return; - for (i = 0; i < 6; i++) { dm_fat_tbl->Bssid[i] = 0; dm_fat_tbl->antSumRSSI[i] = 0; @@ -155,9 +129,6 @@ static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm) void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm) { - if (dm_odm->SupportICType != ODM_RTL8188E) - return; - if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) odm_RX_HWAntDivInit(dm_odm); else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) @@ -296,7 +267,7 @@ static void odm_HWAntDiv(struct odm_dm_struct *dm_odm) void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm) { struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - if ((dm_odm->SupportICType != ODM_RTL8188E) || (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV))) + if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV)) return; if (!dm_odm->bLinked) { if (dm_fat_tbl->bBecomeLinked) { diff --git a/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c b/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c index 1bc3b49cd67f..5f6f0ae5196e 100644 --- a/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c +++ b/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c @@ -34,14 +34,6 @@ void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_A, Addr | maskforPhySet); } -void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data) -{ - u32 content = 0x1001; /* RF_Content: radiob_txt */ - u32 maskforPhySet = (u32)(content & 0xE000); - - odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_B, Addr | maskforPhySet); -} - void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data) { ODM_Write1Byte(pDM_Odm, Addr, Data); diff --git a/drivers/staging/r8188eu/hal/odm_interface.c b/drivers/staging/r8188eu/hal/odm_interface.c index 5a01495d74bc..7ddba39a0f4b 100644 --- a/drivers/staging/r8188eu/hal/odm_interface.c +++ b/drivers/staging/r8188eu/hal/odm_interface.c @@ -10,12 +10,6 @@ u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) return rtw_read8(Adapter, RegAddr); } -u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return rtw_read16(Adapter, RegAddr); -} - u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) { struct adapter *Adapter = pDM_Odm->Adapter; @@ -77,64 +71,12 @@ u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath, u32 } /* ODM Memory relative API. */ -void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length) -{ - *pPtr = vzalloc(length); -} - -/* length could be ignored, used to detect memory leakage. */ -void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length) -{ - vfree(pPtr); -} - s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length) { return !memcmp(pBuf1, pBuf2, length); } -/* ODM MISC relative API. */ -void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type) -{ -} - -void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type) -{ -} - -/* Work item relative API. FOr MP driver only~! */ -void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem, - RT_WORKITEM_CALL_BACK RtWorkItemCallback, - void *pContext, const char *szID) -{ -} - -void ODM_StartWorkItem(void *pRtWorkItem) -{ -} - -void ODM_StopWorkItem(void *pRtWorkItem) -{ -} - -void ODM_FreeWorkItem(void *pRtWorkItem) -{ -} - -void ODM_ScheduleWorkItem(void *pRtWorkItem) -{ -} - -void ODM_IsWorkItemScheduled(void *pRtWorkItem) -{ -} - /* ODM Timer relative API. */ -void ODM_StallExecution(u32 usDelay) -{ - udelay(usDelay); -} - void ODM_delay_ms(u32 ms) { mdelay(ms); @@ -149,30 +91,3 @@ void ODM_sleep_ms(u32 ms) { msleep(ms); } - -void ODM_sleep_us(u32 us) -{ - rtw_usleep_os(us); -} - -void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u32 msDelay) -{ - _set_timer(pTimer, msDelay); /* ms */ -} - -void ODM_CancelTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer) -{ - _cancel_timer_ex(pTimer); -} - -void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer) -{ -} - -/* ODM FW relative API. */ -u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum, - u32 *pElementID, u32 *pCmdLen, - u8 **pCmbBuffer, u8 *CmdStartSeq) -{ - return true; -} diff --git a/drivers/staging/r8188eu/hal/rtl8188e_cmd.c b/drivers/staging/r8188eu/hal/rtl8188e_cmd.c index 7d50d64cf34d..e44bcde92cc3 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_cmd.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_cmd.c @@ -53,19 +53,14 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p u8 cmd_idx, ext_cmd_len; u32 h2c_cmd = 0; u32 h2c_cmd_ex = 0; - s32 ret = _FAIL; if (!adapt->bFWReady) { DBG_88E("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n"); - return ret; + return _FAIL; } - if (!pCmdBuffer) - goto exit; - if (CmdLen > RTL88E_MAX_CMD_LEN) - goto exit; - if (adapt->bSurpriseRemoved) - goto exit; + if (!pCmdBuffer || CmdLen > RTL88E_MAX_CMD_LEN || adapt->bSurpriseRemoved) + return _FAIL; /* pay attention to if race condition happened in H2C cmd setting. */ do { @@ -73,7 +68,7 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p if (!_is_fw_read_cmd_down(adapt, h2c_box_num)) { DBG_88E(" fw read cmd failed...\n"); - goto exit; + return _FAIL; } *(u8 *)(&h2c_cmd) = ElementID; @@ -102,26 +97,7 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p } while ((!bcmd_down) && (retry_cnts--)); - ret = _SUCCESS; - -exit: - - return ret; -} - -u8 rtl8188e_set_rssi_cmd(struct adapter *adapt, u8 *param) -{ - u8 res = _SUCCESS; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - - if (haldata->fw_ractrl) { - ; - } else { - DBG_88E("==>%s fw dont support RA\n", __func__); - res = _FAIL; - } - - return res; + return _SUCCESS; } u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask) @@ -241,14 +217,13 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength) struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; - u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &pwlanhdr->frame_ctl; *(fctrl) = 0; - memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); + eth_broadcast_addr(pwlanhdr->addr1); memcpy(pwlanhdr->addr2, myid(&adapt->eeprompriv), ETH_ALEN); memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); @@ -561,7 +536,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) pattrib->pktlen = pattrib->last_txcmdsz; memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); - rtw_hal_mgnt_xmit(adapt, pmgntframe); + rtl8188eu_mgnt_xmit(adapt, pmgntframe); DBG_88E("%s: Set RSVD page location to Fw\n", __func__); FillH2CCmd_88E(adapt, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc); @@ -608,7 +583,7 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) haldata->RegFwHwTxQCtrl &= (~BIT(6)); /* Clear beacon valid check bit. */ - rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL); + SetHwReg8188EU(adapt, HW_VAR_BCN_VALID, NULL); DLBcnCount = 0; poll = 0; do { @@ -619,7 +594,7 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) yield(); /* mdelay(10); */ /* check rsvd page download OK. */ - rtw_hal_get_hwreg(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid)); + GetHwReg8188EU(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid)); poll++; } while (!bcn_valid && (poll % 10) != 0 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped); } while (!bcn_valid && DLBcnCount <= 100 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped); @@ -653,7 +628,7 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) /* Update RSVD page location H2C to Fw. */ if (bcn_valid) { - rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL); + SetHwReg8188EU(adapt, HW_VAR_BCN_VALID, NULL); DBG_88E("Set RSVD page location to Fw.\n"); } @@ -667,7 +642,6 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state) { -#ifdef CONFIG_88EU_P2P struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); struct wifidirect_info *pwdinfo = &adapt->wdinfo; struct P2P_PS_Offload_t *p2p_ps_offload = &haldata->p2p_ps_offload; @@ -732,6 +706,4 @@ void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state) } FillH2CCmd_88E(adapt, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload); -#endif - } diff --git a/drivers/staging/r8188eu/hal/rtl8188e_dm.c b/drivers/staging/r8188eu/hal/rtl8188e_dm.c index 78552303c990..5d76f6ea91c4 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_dm.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_dm.c @@ -8,10 +8,6 @@ #include "../include/drv_types.h" #include "../include/rtl8188e_hal.h" -static void dm_CheckStatistics(struct adapter *Adapter) -{ -} - /* Initialize GPIO setting registers */ static void dm_InitGPIOSetting(struct adapter *Adapter) { @@ -31,40 +27,14 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter) struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &hal_data->dmpriv; struct odm_dm_struct *dm_odm = &hal_data->odmpriv; - u8 cut_ver, fab_ver; /* Init Value */ memset(dm_odm, 0, sizeof(*dm_odm)); dm_odm->Adapter = Adapter; - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PLATFORM, ODM_CE); - - if (Adapter->interface_type == RTW_GSPI) - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO); - else - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, Adapter->interface_type);/* RTL871X_HCI_TYPE */ - - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8188E); - - fab_ver = ODM_TSMC; - cut_ver = ODM_CUT_A; - - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_FAB_VER, fab_ver); - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_CUT_VER, cut_ver); - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(hal_data->VersionID)); - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PATCH_ID, hal_data->CustomerID); - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec); - - if (hal_data->rf_type == RF_1T1R) - ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R); - else if (hal_data->rf_type == RF_2T2R) - ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R); - else if (hal_data->rf_type == RF_1T2R) - ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R); - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType); pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | @@ -96,11 +66,6 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter) if (hal_data->AntDivCfg) pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; - if (Adapter->registrypriv.mp_mode == 1) { - pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | - ODM_RF_TX_PWR_TRACK; - } - ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_TX_UNI, &Adapter->xmitpriv.tx_bytes); @@ -111,24 +76,20 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter) ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_BW, &hal_data->CurrentChannelBW); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_CHNL, &hal_data->CurrentChannel); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_NET_CLOSED, &Adapter->net_closed); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_MP_MODE, &Adapter->registrypriv.mp_mode); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SCAN, &pmlmepriv->bScanInProcess); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_POWER_SAVING, &pwrctrlpriv->bpower_saving); ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType); for (i = 0; i < NUM_STA; i++) - ODM_CmnInfoPtrArrayHook(dm_odm, ODM_CMNINFO_STA_STATUS, i, NULL); + dm_odm->pODM_StaInfo[i] = NULL; } void rtl8188e_InitHalDm(struct adapter *Adapter) { struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &hal_data->dmpriv; struct odm_dm_struct *dm_odm = &hal_data->odmpriv; dm_InitGPIOSetting(Adapter); - pdmpriv->DM_Type = DM_Type_ByDriver; - pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; Update_ODM_ComInfo_88E(Adapter); ODM_DMInit(dm_odm); Adapter->fix_rate = 0xFF; @@ -136,49 +97,25 @@ void rtl8188e_InitHalDm(struct adapter *Adapter) void rtl8188e_HalDmWatchDog(struct adapter *Adapter) { - bool fw_cur_in_ps = false; - bool fw_ps_awake = true; - u8 hw_init_completed = false; + u8 hw_init_completed = Adapter->hw_init_completed; struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - - - hw_init_completed = Adapter->hw_init_completed; + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + u8 bLinked = false; if (!hw_init_completed) return; - fw_cur_in_ps = Adapter->pwrctrlpriv.bFwCurrentInPSMode; - rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&fw_ps_awake)); - - /* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */ - /* modifed by thomas. 2011.06.11. */ - if (Adapter->wdinfo.p2p_ps_mode) - fw_ps_awake = false; - - if (hw_init_completed && ((!fw_cur_in_ps) && fw_ps_awake)) { - /* Calculate Tx/Rx statistics. */ - dm_CheckStatistics(Adapter); - - + if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) || + (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))) { + if (Adapter->stapriv.asoc_sta_count > 2) + bLinked = true; + } else {/* Station mode */ + if (check_fwstate(pmlmepriv, _FW_LINKED)) + bLinked = true; } - /* ODM */ - if (hw_init_completed) { - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - u8 bLinked = false; - - if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))) { - if (Adapter->stapriv.asoc_sta_count > 2) - bLinked = true; - } else {/* Station mode */ - if (check_fwstate(pmlmepriv, _FW_LINKED)) - bLinked = true; - } - - ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked); - ODM_DMWatchdog(&hal_data->odmpriv); - } + ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked); + ODM_DMWatchdog(&hal_data->odmpriv); } void rtl8188e_init_dm_priv(struct adapter *Adapter) @@ -190,10 +127,6 @@ void rtl8188e_init_dm_priv(struct adapter *Adapter) Init_ODM_ComInfo_88E(Adapter); } -void rtl8188e_deinit_dm_priv(struct adapter *Adapter) -{ -} - /* Add new function to reset the state of antenna diversity before link. */ /* Compare RSSI for deciding antenna */ void AntDivCompare8188E(struct adapter *Adapter, struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src) diff --git a/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c index 14758361960c..8c00f2dd67da 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c @@ -306,7 +306,7 @@ static s32 iol_ioconfig(struct adapter *padapter, u8 iocfg_bndy) return rst; } -static int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt) +int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt) { struct pkt_attrib *pattrib = &xmit_frame->attrib; u8 i; @@ -336,38 +336,6 @@ exit: return ret; } -void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter, int data_len) -{ - u32 fifo_data, reg_140; - u32 addr, rstatus, loop = 0; - u16 data_cnts = (data_len / 8) + 1; - u8 *pbuf = vzalloc(data_len + 10); - DBG_88E("###### %s ######\n", __func__); - - rtw_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); - if (pbuf) { - for (addr = 0; addr < data_cnts; addr++) { - rtw_write32(Adapter, 0x140, addr); - rtw_usleep_os(2); - loop = 0; - do { - rstatus = (reg_140 = rtw_read32(Adapter, REG_PKTBUF_DBG_CTRL) & BIT(24)); - if (rstatus) { - fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_L); - memcpy(pbuf + (addr * 8), &fifo_data, 4); - - fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_H); - memcpy(pbuf + (addr * 8 + 4), &fifo_data, 4); - } - rtw_usleep_os(2); - } while (!rstatus && (loop++ < 10)); - } - rtw_IOL_cmd_buf_dump(Adapter, data_len, pbuf); - vfree(pbuf); - } - DBG_88E("###### %s ######\n", __func__); -} - static void _FWDownloadEnable(struct adapter *padapter, bool enable) { u8 tmp; @@ -669,12 +637,10 @@ void rtl8188e_InitializeFirmwareVars(struct adapter *padapter) pHalData->LastHMEBoxNum = 0; } -static void rtl8188e_free_hal_data(struct adapter *padapter) +void rtl8188e_free_hal_data(struct adapter *padapter) { - kfree(padapter->HalData); padapter->HalData = NULL; - } /* */ @@ -707,11 +673,7 @@ hal_EfusePgPacketWriteData( struct pgpkt *pTargetPkt, bool bPseudoTest); -static void -hal_EfusePowerSwitch_RTL8188E( - struct adapter *pAdapter, - u8 bWrite, - u8 PwrState) +void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 bWrite, u8 PwrState) { u8 tempval; u16 tmpV16; @@ -757,15 +719,6 @@ hal_EfusePowerSwitch_RTL8188E( } } -static void -rtl8188e_EfusePowerSwitch( - struct adapter *pAdapter, - u8 bWrite, - u8 PwrState) -{ - hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState); -} - static void Hal_EfuseReadEFuse88E(struct adapter *Adapter, u16 _offset, u16 _size_byte, @@ -892,7 +845,7 @@ static void Hal_EfuseReadEFuse88E(struct adapter *Adapter, pbuf[i] = efuseTbl[_offset + i]; /* 5. Calculate Efuse utilization. */ - rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); + SetHwReg8188EU(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); exit: kfree(efuseTbl); @@ -904,7 +857,7 @@ static void ReadEFuseByIC(struct adapter *Adapter, u8 efuseType, u16 _offset, u1 if (!bPseudoTest) { int ret = _FAIL; if (rtw_IOL_applied(Adapter)) { - rtw_hal_power_on(Adapter); + rtl8188eu_InitPowerOn(Adapter); iol_mode_enable(Adapter, 1); ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf); @@ -925,9 +878,9 @@ static void ReadEFuse_Pseudo(struct adapter *Adapter, u8 efuseType, u16 _offset, Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); } -static void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType, - u16 _offset, u16 _size_byte, u8 *pbuf, - bool bPseudoTest) +void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType, + u16 _offset, u16 _size_byte, u8 *pbuf, + bool bPseudoTest) { if (bPseudoTest) ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); @@ -1060,7 +1013,7 @@ static void Hal_EFUSEGetEfuseDefinition_Pseudo88E(struct adapter *pAdapter, u8 e } } -static void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest) +void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest) { if (bPseudoTest) Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut); @@ -1143,31 +1096,28 @@ static u16 hal_EfuseGetCurrentSize_8188e(struct adapter *pAdapter, bool bPseudoT { int bContinual = true; u16 efuse_addr = 0; - u8 hoffset = 0, hworden = 0; + u8 hworden = 0; u8 efuse_data, word_cnts = 0; if (bPseudoTest) efuse_addr = (u16)(fakeEfuseUsedBytes); else - rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); + GetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); while (bContinual && efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) && AVAILABLE_EFUSE_ADDR(efuse_addr)) { if (efuse_data != 0xFF) { if ((efuse_data & 0x1F) == 0x0F) { /* extended header */ - hoffset = efuse_data; efuse_addr++; efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest); if ((efuse_data & 0x0F) == 0x0F) { efuse_addr++; continue; } else { - hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); hworden = efuse_data & 0x0F; } } else { - hoffset = (efuse_data >> 4) & 0x0F; hworden = efuse_data & 0x0F; } word_cnts = Efuse_CalculateWordCnts(hworden); @@ -1181,7 +1131,7 @@ static u16 hal_EfuseGetCurrentSize_8188e(struct adapter *pAdapter, bool bPseudoT if (bPseudoTest) fakeEfuseUsedBytes = efuse_addr; else - rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); + SetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); return efuse_addr; } @@ -1194,7 +1144,7 @@ static u16 Hal_EfuseGetCurrentSize_Pseudo(struct adapter *pAdapter, bool bPseudo return ret; } -static u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest) +u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest) { u16 ret = 0; @@ -1218,7 +1168,7 @@ static int hal_EfusePgPacketRead_8188e(struct adapter *pAdapter, u8 offset, u8 * u8 max_section = 0; u8 tmp_header = 0; - EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest); + rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest); if (!data) return false; @@ -1307,7 +1257,7 @@ static int Hal_EfusePgPacketRead_Pseudo(struct adapter *pAdapter, u8 offset, u8 return ret; } -static int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) +int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) { int ret; @@ -1326,17 +1276,17 @@ static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, u8 efuseType, st memset((void *)originaldata, 0xff, 8); - if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) { + if (rtl8188e_Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) { /* check if data exist */ - badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pFixPkt->word_en, originaldata, bPseudoTest); + badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pFixPkt->word_en, originaldata, bPseudoTest); if (badworden != 0xf) { /* write fail */ - PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); + PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); if (!PgWriteSuccess) return false; else - efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); + efuse_addr = rtl8188e_EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest); } else { efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1; } @@ -1354,7 +1304,7 @@ static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuse u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0; u8 repeatcnt = 0; - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); + rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); while (efuse_addr < efuse_max_available_len) { pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; @@ -1451,17 +1401,16 @@ static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuse static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest) { u16 efuse_addr = *pAddr; - u8 badworden = 0; + u8 badworden; u32 PgWriteSuccess = 0; - badworden = 0x0f; - badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); + badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); if (badworden == 0x0F) { /* write ok */ return true; } else { /* reorganize other pg packet */ - PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); + PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); if (!PgWriteSuccess) return false; else @@ -1534,14 +1483,14 @@ static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0; struct pgpkt curPkt; - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest); + rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); + rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest); if (efuseType == EFUSE_WIFI) { if (bPseudoTest) { startAddr = (u16)(fakeEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN); } else { - rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); + GetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); startAddr %= EFUSE_REAL_CONTENT_LEN; } } else { @@ -1582,12 +1531,12 @@ static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr + 1, bPseudoTest)) && wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) { /* Here to write partial data */ - badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr + 1, matched_wden, pTargetPkt->data, bPseudoTest); + badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, startAddr + 1, matched_wden, pTargetPkt->data, bPseudoTest); if (badworden != 0x0F) { u32 PgWriteSuccess = 0; /* if write fail on some words, write these bad words again */ - PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); + PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); if (!PgWriteSuccess) { bRet = false; /* write fail, return */ @@ -1623,9 +1572,9 @@ hal_EfusePgCheckAvailableAddr( u16 efuse_max_available_len = 0; /* Change to check TYPE_EFUSE_MAP_LEN , because 8188E raw 256, logic map over 256. */ - EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, false); + rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, false); - if (Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) + if (rtl8188e_EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) return false; return true; } @@ -1678,7 +1627,7 @@ static int Hal_EfusePgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_e return ret; } -static int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest) +int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest) { int ret; @@ -1689,7 +1638,7 @@ static int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 return ret; } -static struct HAL_VERSION ReadChipVersion8188E(struct adapter *padapter) +void rtl8188e_read_chip_version(struct adapter *padapter) { u32 value32; struct HAL_VERSION ChipVersion; @@ -1698,49 +1647,23 @@ static struct HAL_VERSION ReadChipVersion8188E(struct adapter *padapter) pHalData = GET_HAL_DATA(padapter); value32 = rtw_read32(padapter, REG_SYS_CFG); - ChipVersion.ICType = CHIP_8188E; ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); ChipVersion.RFType = RF_TYPE_1T1R; ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */ - - /* For regulator mode. by tynli. 2011.01.14 */ - pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); - ChipVersion.ROMVer = 0; /* ROM code version. */ - pHalData->MultiFunc = RT_MULTI_FUNC_NONE; dump_chip_info(ChipVersion); pHalData->VersionID = ChipVersion; - if (IS_1T2R(ChipVersion)) { - pHalData->rf_type = RF_1T2R; - pHalData->NumTotalRFPath = 2; - } else if (IS_2T2R(ChipVersion)) { - pHalData->rf_type = RF_2T2R; - pHalData->NumTotalRFPath = 2; - } else { - pHalData->rf_type = RF_1T1R; - pHalData->NumTotalRFPath = 1; - } + pHalData->rf_type = RF_1T1R; MSG_88E("RF_Type is %x!!\n", pHalData->rf_type); - - return ChipVersion; } -static void rtl8188e_read_chip_version(struct adapter *padapter) -{ - ReadChipVersion8188E(padapter); -} - -static void rtl8188e_GetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet) -{ -} - -static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet) +void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet) { struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); struct odm_dm_struct *podmpriv = &pHalData->odmpriv; @@ -1748,13 +1671,14 @@ static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable case HAL_ODM_STA_INFO: { struct sta_info *psta = (struct sta_info *)pValue1; + if (bSet) { DBG_88E("### Set STA_(%d) info\n", psta->mac_id); - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta); + podmpriv->pODM_StaInfo[psta->mac_id] = psta; ODM_RAInfo_Init(podmpriv, psta->mac_id); } else { DBG_88E("### Clean STA_(%d) info\n", psta->mac_id); - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL); + podmpriv->pODM_StaInfo[psta->mac_id] = NULL; } } break; @@ -1769,20 +1693,7 @@ static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable } } -void rtl8188e_clone_haldata(struct adapter *dst_adapter, struct adapter *src_adapter) -{ - memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz); -} - -void rtl8188e_start_thread(struct adapter *padapter) -{ -} - -void rtl8188e_stop_thread(struct adapter *padapter) -{ -} - -static void hal_notch_filter_8188e(struct adapter *adapter, bool enable) +void hal_notch_filter_8188e(struct adapter *adapter, bool enable) { if (enable) { DBG_88E("Enable notch filter\n"); @@ -1792,54 +1703,6 @@ static void hal_notch_filter_8188e(struct adapter *adapter, bool enable) rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1)); } } -void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc) -{ - pHalFunc->free_hal_data = &rtl8188e_free_hal_data; - - pHalFunc->dm_init = &rtl8188e_init_dm_priv; - pHalFunc->dm_deinit = &rtl8188e_deinit_dm_priv; - - pHalFunc->read_chip_version = &rtl8188e_read_chip_version; - - pHalFunc->set_bwmode_handler = &PHY_SetBWMode8188E; - pHalFunc->set_channel_handler = &PHY_SwChnl8188E; - - pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog; - - pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid; - pHalFunc->run_thread = &rtl8188e_start_thread; - pHalFunc->cancel_thread = &rtl8188e_stop_thread; - - pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E; - pHalFunc->AntDivCompareHandler = &AntDivCompare8188E; - pHalFunc->read_bbreg = &rtl8188e_PHY_QueryBBReg; - pHalFunc->write_bbreg = &rtl8188e_PHY_SetBBReg; - pHalFunc->read_rfreg = &rtl8188e_PHY_QueryRFReg; - pHalFunc->write_rfreg = &rtl8188e_PHY_SetRFReg; - - /* Efuse related function */ - pHalFunc->EfusePowerSwitch = &rtl8188e_EfusePowerSwitch; - pHalFunc->ReadEFuse = &rtl8188e_ReadEFuse; - pHalFunc->EFUSEGetEfuseDefinition = &rtl8188e_EFUSE_GetEfuseDefinition; - pHalFunc->EfuseGetCurrentSize = &rtl8188e_EfuseGetCurrentSize; - pHalFunc->Efuse_PgPacketRead = &rtl8188e_Efuse_PgPacketRead; - pHalFunc->Efuse_PgPacketWrite = &rtl8188e_Efuse_PgPacketWrite; - pHalFunc->Efuse_WordEnableDataWrite = &rtl8188e_Efuse_WordEnableDataWrite; - - pHalFunc->sreset_init_value = &sreset_init_value; - pHalFunc->sreset_reset_value = &sreset_reset_value; - pHalFunc->silentreset = &rtl8188e_silentreset_for_specific_platform; - pHalFunc->sreset_xmit_status_check = &rtl8188e_sreset_xmit_status_check; - pHalFunc->sreset_linked_status_check = &rtl8188e_sreset_linked_status_check; - pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; - - pHalFunc->GetHalODMVarHandler = &rtl8188e_GetHalODMVar; - pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar; - - pHalFunc->IOL_exec_cmds_sync = &rtl8188e_IOL_exec_cmds_sync; - - pHalFunc->hal_notch_filter = &hal_notch_filter_8188e; -} u8 GetEEPROMSize8188E(struct adapter *padapter) { @@ -1926,7 +1789,7 @@ s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) void Hal_InitPGData88E(struct adapter *padapter) { - struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + struct eeprom_priv *pEEPROM = &padapter->eeprompriv; if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */ if (!is_boot_from_eeprom(padapter)) { @@ -1946,7 +1809,7 @@ Hal_EfuseParseIDCode88E( u8 *hwinfo ) { - struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + struct eeprom_priv *pEEPROM = &padapter->eeprompriv; u16 EEPROMId; /* Check 0x8129 again for making sure autoload status!! */ @@ -2093,8 +1956,8 @@ void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoL /* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */ padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false; - DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__, - padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown, padapter->pwrctrlpriv.bSupportRemoteWakeup); + DBG_88E("%s...bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__, + padapter->pwrctrlpriv.bHWPowerdown, padapter->pwrctrlpriv.bSupportRemoteWakeup); DBG_88E("### PS params => power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable); } @@ -2104,7 +1967,8 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto { struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); struct txpowerinfo24g pwrInfo24G; - u8 rfPath, ch, group; + u8 rfPath = 0; + u8 ch, group; u8 TxCount; Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail); @@ -2112,31 +1976,29 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto if (!AutoLoadFail) pHalData->bTXPowerDataReadFromEEPORM = true; - for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) { - for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { - hal_get_chnl_group_88e(ch, &group); + for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { + hal_get_chnl_group_88e(ch, &group); - pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group]; - if (ch == 14) - pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4]; - else - pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group]; + pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group]; + if (ch == 14) + pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4]; + else + pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group]; - DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch); - DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch]); - DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch]); - } - for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { - pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount]; - pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount]; - pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount]; - pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount]; - DBG_88E("======= TxCount %d =======\n", TxCount); - DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]); - DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]); - DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]); - DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]); - } + DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch); + DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch]); + DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch]); + } + for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { + pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount]; + pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount]; + pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount]; + pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount]; + DBG_88E("======= TxCount %d =======\n", TxCount); + DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]); + DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]); + DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]); + DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]); } /* 2010/10/19 MH Add Regulator recognize for CU. */ @@ -2240,7 +2102,6 @@ void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */ } else { pHalData->AntDivCfg = 0; - pHalData->TRxAntDivType = pHalData->TRxAntDivType; /* The value in the driver setting of device manager. */ } DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType); } @@ -2261,44 +2122,3 @@ void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool Aut } DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter); } - -void Hal_InitChannelPlan(struct adapter *padapter) -{ -} - -bool HalDetectPwrDownMode88E(struct adapter *Adapter) -{ - u8 tmpvalue = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; - - EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_FEATURE_OPTION_88E, (u32 *)&tmpvalue); - - /* 2010/08/25 MH INF priority > PDN Efuse value. */ - if (tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode) - pHalData->pwrdown = true; - else - pHalData->pwrdown = false; - - DBG_88E("HalDetectPwrDownMode(): PDN =%d\n", pHalData->pwrdown); - - return pHalData->pwrdown; -} /* HalDetectPwrDownMode */ - -/* This function is used only for 92C to set REG_BCN_CTRL(0x550) register. */ -/* We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate */ -/* the value of the register via atomic operation. */ -/* This prevents from race condition when setting this register. */ -/* The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. */ - -void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits) -{ - struct hal_data_8188e *pHalData; - - pHalData = GET_HAL_DATA(padapter); - - pHalData->RegBcnCtrlVal |= SetBits; - pHalData->RegBcnCtrlVal &= ~ClearBits; - - rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal); -} diff --git a/drivers/staging/r8188eu/hal/rtl8188e_mp.c b/drivers/staging/r8188eu/hal/rtl8188e_mp.c deleted file mode 100644 index fc13db705511..000000000000 --- a/drivers/staging/r8188eu/hal/rtl8188e_mp.c +++ /dev/null @@ -1,798 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#define _RTL8188E_MP_C_ - -#include "../include/drv_types.h" -#include "../include/rtw_mp.h" -#include "../include/rtl8188e_hal.h" -#include "../include/rtl8188e_dm.h" - -s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - struct odm_dm_struct *pDM_Odm = &pHalData->odmpriv; - - if (!netif_running(padapter->pnetdev)) - return _FAIL; - - if (!check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE)) - return _FAIL; - - if (enable) - pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; - else - pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false; - - return _SUCCESS; -} - -void Hal_GetPowerTracking(struct adapter *padapter, u8 *enable) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - struct odm_dm_struct *pDM_Odm = &pHalData->odmpriv; - - *enable = pDM_Odm->RFCalibrateInfo.TxPowerTrackControl; -} - -/*----------------------------------------------------------------------------- - * Function: mpt_SwitchRfSetting - * - * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. - * - * Input: struct adapter * pAdapter - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. - * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. - * - *---------------------------------------------------------------------------*/ -void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter) -{ - struct mp_priv *pmp = &pAdapter->mppriv; - - /* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis. */ - pmp->MptCtx.backup0x52_RF_A = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); - pmp->MptCtx.backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xD); - PHY_SetRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xD); -} -/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ - -/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ -void Hal_MPT_CCKTxPowerAdjust(struct adapter *Adapter, bool bInCH14) -{ - u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; - u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; - u8 i; - - /* get current cck swing value and check 0xa22 & 0xa23 later to match the table. */ - CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); - - if (!bInCH14) { - /* Readback the current bb cck swing value and compare with the table to */ - /* get the current swing index */ - for (i = 0; i < CCK_TABLE_SIZE; i++) { - if (((CurrCCKSwingVal & 0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && - (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) { - CCKSwingIndex = i; - break; - } - } - - /* Write 0xa22 0xa23 */ - TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1] << 8); - - /* Write 0xa24 ~ 0xa27 */ - TempVal2 = 0; - TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3] << 8) + - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4] << 16) + - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5] << 24); - - /* Write 0xa28 0xa29 */ - TempVal3 = 0; - TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7] << 8); - } else { - for (i = 0; i < CCK_TABLE_SIZE; i++) { - if (((CurrCCKSwingVal & 0xff) == (u32)CCKSwingTable_Ch14[i][0]) && - (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)CCKSwingTable_Ch14[i][1])) { - CCKSwingIndex = i; - break; - } - } - - /* Write 0xa22 0xa23 */ - TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + - (CCKSwingTable_Ch14[CCKSwingIndex][1] << 8); - - /* Write 0xa24 ~ 0xa27 */ - TempVal2 = 0; - TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + - (CCKSwingTable_Ch14[CCKSwingIndex][3] << 8) + - (CCKSwingTable_Ch14[CCKSwingIndex][4] << 16) + - (CCKSwingTable_Ch14[CCKSwingIndex][5] << 24); - - /* Write 0xa28 0xa29 */ - TempVal3 = 0; - TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + - (CCKSwingTable_Ch14[CCKSwingIndex][7] << 8); - } - - write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); - write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); - write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); -} - -void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx; - struct odm_dm_struct *pDM_Odm = &pHalData->odmpriv; - s32 TempCCk; - u8 CCK_index, CCK_index_old = 0; - u8 Action = 0; /* 0: no action, 1: even->odd, 2:odd->even */ - s32 i = 0; - - if (!IS_92C_SERIAL(pHalData->VersionID)) - return; - if (beven && !pMptCtx->bMptIndexEven) { - /* odd->even */ - Action = 2; - pMptCtx->bMptIndexEven = true; - } else if (!beven && pMptCtx->bMptIndexEven) { - /* even->odd */ - Action = 1; - pMptCtx->bMptIndexEven = false; - } - - if (Action != 0) { - /* Query CCK default setting From 0xa24 */ - TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK; - for (i = 0; i < CCK_TABLE_SIZE; i++) { - if (pDM_Odm->RFCalibrateInfo.bCCKinCH14) { - if (!memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4)) { - CCK_index_old = (u8)i; - break; - } - } else { - if (!memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4)) { - CCK_index_old = (u8)i; - break; - } - } - } - - if (Action == 1) - CCK_index = CCK_index_old - 1; - else - CCK_index = CCK_index_old + 1; - - /* Adjust CCK according to gain index */ - if (!pDM_Odm->RFCalibrateInfo.bCCKinCH14) { - rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]); - rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]); - rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]); - rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]); - rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]); - rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]); - rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]); - rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]); - } else { - rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]); - rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]); - rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]); - rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]); - rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]); - rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]); - rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]); - rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]); - } - } -} -/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ - -/* - * SetChannel - * Description - * Use H2C command to change channel, - * not only modify rf register, but also other setting need to be done. - */ -void Hal_SetChannel(struct adapter *pAdapter) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - struct mp_priv *pmp = &pAdapter->mppriv; - struct odm_dm_struct *pDM_Odm = &pHalData->odmpriv; - u8 eRFPath; - u8 channel = pmp->channel; - - /* set RF channel register */ - for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) - _write_rfreg(pAdapter, eRFPath, ODM_CHANNEL, 0x3FF, channel); - Hal_mpt_SwitchRfSetting(pAdapter); - - SelectChannel(pAdapter, channel); - - if (pHalData->CurrentChannel == 14 && !pDM_Odm->RFCalibrateInfo.bCCKinCH14) { - pDM_Odm->RFCalibrateInfo.bCCKinCH14 = true; - Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14); - } else if (pHalData->CurrentChannel != 14 && pDM_Odm->RFCalibrateInfo.bCCKinCH14) { - pDM_Odm->RFCalibrateInfo.bCCKinCH14 = false; - Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14); - } -} - -/* - * Notice - * Switch bandwitdth may change center frequency(channel) - */ -void Hal_SetBandwidth(struct adapter *pAdapter) -{ - struct mp_priv *pmp = &pAdapter->mppriv; - - SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); - Hal_mpt_SwitchRfSetting(pAdapter); -} - -void Hal_SetCCKTxPower(struct adapter *pAdapter, u8 *TxPower) -{ - u32 tmpval = 0; - - /* rf-A cck tx power */ - write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]); - tmpval = (TxPower[RF_PATH_A] << 16) | (TxPower[RF_PATH_A] << 8) | TxPower[RF_PATH_A]; - write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); - - /* rf-B cck tx power */ - write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]); - tmpval = (TxPower[RF_PATH_B] << 16) | (TxPower[RF_PATH_B] << 8) | TxPower[RF_PATH_B]; - write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); -} - -void Hal_SetOFDMTxPower(struct adapter *pAdapter, u8 *TxPower) -{ - u32 TxAGC = 0; - u8 tmpval = 0; - - /* HT Tx-rf(A) */ - tmpval = TxPower[RF_PATH_A]; - TxAGC = (tmpval << 24) | (tmpval << 16) | (tmpval << 8) | tmpval; - - write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); - - /* HT Tx-rf(B) */ - tmpval = TxPower[RF_PATH_B]; - TxAGC = (tmpval << 24) | (tmpval << 16) | (tmpval << 8) | tmpval; - - write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); -} - -void Hal_SetAntennaPathPower(struct adapter *pAdapter) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - u8 TxPowerLevel[RF_PATH_MAX]; - u8 rfPath; - - TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx; - TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b; - - switch (pAdapter->mppriv.antenna_tx) { - case ANTENNA_A: - default: - rfPath = RF_PATH_A; - break; - case ANTENNA_B: - rfPath = RF_PATH_B; - break; - case ANTENNA_C: - rfPath = RF_PATH_C; - break; - } - - switch (pHalData->rf_chip) { - case RF_8225: - case RF_8256: - case RF_6052: - Hal_SetCCKTxPower(pAdapter, TxPowerLevel); - if (pAdapter->mppriv.rateidx < MPT_RATE_6M) /* CCK rate */ - Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath] % 2 == 0); - Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); - break; - default: - break; - } -} - -void Hal_SetTxPower(struct adapter *pAdapter) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - u8 TxPower = pAdapter->mppriv.txpoweridx; - u8 TxPowerLevel[RF_PATH_MAX]; - u8 rf, rfPath; - - for (rf = 0; rf < RF_PATH_MAX; rf++) - TxPowerLevel[rf] = TxPower; - - switch (pAdapter->mppriv.antenna_tx) { - case ANTENNA_A: - default: - rfPath = RF_PATH_A; - break; - case ANTENNA_B: - rfPath = RF_PATH_B; - break; - case ANTENNA_C: - rfPath = RF_PATH_C; - break; - } - - switch (pHalData->rf_chip) { - /* 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!! */ - /* We should call normal driver API later!! */ - case RF_8225: - case RF_8256: - case RF_6052: - Hal_SetCCKTxPower(pAdapter, TxPowerLevel); - if (pAdapter->mppriv.rateidx < MPT_RATE_6M) /* CCK rate */ - Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath] % 2 == 0); - Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); - break; - default: - break; - } -} - -void Hal_SetDataRate(struct adapter *pAdapter) -{ - Hal_mpt_SwitchRfSetting(pAdapter); -} - -void Hal_SetAntenna(struct adapter *pAdapter) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - - struct ant_sel_ofdm *p_ofdm_tx; /* OFDM Tx register */ - struct ant_sel_cck *p_cck_txrx; - u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; - u8 chgTx = 0, chgRx = 0; - u32 r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; - - p_ofdm_tx = (struct ant_sel_ofdm *)&r_ant_select_ofdm_val; - p_cck_txrx = (struct ant_sel_cck *)&r_ant_select_cck_val; - - p_ofdm_tx->r_ant_ht1 = 0x1; - p_ofdm_tx->r_ant_ht2 = 0x2; /* Second TX RF path is A */ - p_ofdm_tx->r_ant_non_ht = 0x3; /* 0x1+0x2=0x3 */ - - switch (pAdapter->mppriv.antenna_tx) { - case ANTENNA_A: - p_ofdm_tx->r_tx_antenna = 0x1; - r_ofdm_tx_en_val = 0x1; - p_ofdm_tx->r_ant_l = 0x1; - p_ofdm_tx->r_ant_ht_s1 = 0x1; - p_ofdm_tx->r_ant_non_ht_s1 = 0x1; - p_cck_txrx->r_ccktx_enable = 0x8; - chgTx = 1; - - /* From SD3 Willis suggestion !!! Set RF A=TX and B as standby */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); - r_ofdm_tx_en_val = 0x3; - - /* Power save */ - - /* We need to close RFB by SW control */ - if (pHalData->rf_type == RF_2T2R) { - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 1); - PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT(10), 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(1), 1); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(17), 0); - } - break; - case ANTENNA_B: - p_ofdm_tx->r_tx_antenna = 0x2; - r_ofdm_tx_en_val = 0x2; - p_ofdm_tx->r_ant_l = 0x2; - p_ofdm_tx->r_ant_ht_s1 = 0x2; - p_ofdm_tx->r_ant_non_ht_s1 = 0x2; - p_cck_txrx->r_ccktx_enable = 0x4; - chgTx = 1; - /* From SD3 Willis suggestion !!! Set RF A as standby */ - PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); - PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); - - /* Power save */ - /* cosa r_ant_select_ofdm_val = 0x22222222; */ - - /* 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table. */ - /* 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control */ - if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) { - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 1); - PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT(10), 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(1), 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(17), 1); - } - break; - case ANTENNA_AB: /* For 8192S */ - p_ofdm_tx->r_tx_antenna = 0x3; - r_ofdm_tx_en_val = 0x3; - p_ofdm_tx->r_ant_l = 0x3; - p_ofdm_tx->r_ant_ht_s1 = 0x3; - p_ofdm_tx->r_ant_non_ht_s1 = 0x3; - p_cck_txrx->r_ccktx_enable = 0xC; - chgTx = 1; - - /* From SD3 Willis suggestion !!! Set RF B as standby */ - PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); - PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); - - /* Disable Power save */ - /* cosa r_ant_select_ofdm_val = 0x3321333; */ - /* 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control */ - if (pHalData->rf_type == RF_2T2R) { - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(1), 1); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(17), 1); - } - break; - default: - break; - } - - /* r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D */ - /* r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D */ - /* r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */ - switch (pAdapter->mppriv.antenna_rx) { - case ANTENNA_A: - r_rx_antenna_ofdm = 0x1; /* A */ - p_cck_txrx->r_cckrx_enable = 0x0; /* default: A */ - p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A */ - chgRx = 1; - break; - case ANTENNA_B: - r_rx_antenna_ofdm = 0x2; /* B */ - p_cck_txrx->r_cckrx_enable = 0x1; /* default: B */ - p_cck_txrx->r_cckrx_enable_2 = 0x1; /* option: B */ - chgRx = 1; - break; - case ANTENNA_AB: - r_rx_antenna_ofdm = 0x3; /* AB */ - p_cck_txrx->r_cckrx_enable = 0x0; /* default:A */ - p_cck_txrx->r_cckrx_enable_2 = 0x1; /* option:B */ - chgRx = 1; - break; - default: - break; - } - - if (chgTx && chgRx) { - switch (pHalData->rf_chip) { - case RF_8225: - case RF_8256: - case RF_6052: - /* r_ant_sel_cck_val = r_ant_select_cck_val; */ - PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /* OFDM Tx */ - PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /* OFDM Tx */ - PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /* OFDM Rx */ - PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /* OFDM Rx */ - PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val); /* CCK TxRx */ - - break; - default: - break; - } - } -} - -s32 Hal_SetThermalMeter(struct adapter *pAdapter, u8 target_ther) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - - if (!netif_running(pAdapter->pnetdev)) - return _FAIL; - - if (!check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE)) - return _FAIL; - - target_ther &= 0xff; - if (target_ther < 0x07) - target_ther = 0x07; - else if (target_ther > 0x1d) - target_ther = 0x1d; - - pHalData->EEPROMThermalMeter = target_ther; - - return _SUCCESS; -} - -void Hal_TriggerRFThermalMeter(struct adapter *pAdapter) -{ - _write_rfreg(pAdapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03); -} - -u8 Hal_ReadRFThermalMeter(struct adapter *pAdapter) -{ - u32 ThermalValue = 0; - - ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER_88E, 0xfc00); - return (u8)ThermalValue; -} - -void Hal_GetThermalMeter(struct adapter *pAdapter, u8 *value) -{ - Hal_TriggerRFThermalMeter(pAdapter); - msleep(1000); - *value = Hal_ReadRFThermalMeter(pAdapter); -} - -void Hal_SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart) -{ - pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; - if (bStart) { - /* Start Single Carrier. */ - /* 1. if OFDM block on? */ - if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) - write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);/* set OFDM block on */ - - /* 2. set CCK test mode off, set to CCK normal mode */ - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); - /* 3. turn on scramble setting */ - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); - /* 4. Turn On Single Carrier Tx and turn off the other test modes. */ - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - /* for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); - } else { - /* Stop Single Carrier. */ - /* Turn off all test modes. */ - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - msleep(10); - - /* BB Reset */ - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); - - /* Stop for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); - } -} - -void Hal_SetSingleToneTx(struct adapter *pAdapter, u8 bStart) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - bool is92C = IS_92C_SERIAL(pHalData->VersionID); - - u8 rfPath; - u32 reg58 = 0x0; - switch (pAdapter->mppriv.antenna_tx) { - case ANTENNA_A: - default: - rfPath = RF_PATH_A; - break; - case ANTENNA_B: - rfPath = RF_PATH_B; - break; - case ANTENNA_C: - rfPath = RF_PATH_C; - break; - } - - pAdapter->mppriv.MptCtx.bSingleTone = bStart; - if (bStart) { - /* Start Single Tone. */ - /* <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu) */ - if (IS_HARDWARE_TYPE_8188E(pAdapter)) { - reg58 = PHY_QueryRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask); - reg58 &= 0xFFFFFFF0; - reg58 += 2; - PHY_SetRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, reg58); - } - PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); - PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); - - if (is92C) { - _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT(19), 0x01); - rtw_usleep_os(100); - if (rfPath == RF_PATH_A) - write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); /* PAD all on. */ - else if (rfPath == RF_PATH_B) - write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); /* PAD all on. */ - write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); /* PAD all on. */ - rtw_usleep_os(100); - } else { - write_rfreg(pAdapter, rfPath, 0x21, 0xd4000); - rtw_usleep_os(100); - write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); /* PAD all on. */ - rtw_usleep_os(100); - } - - /* for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); - - } else { - /* Stop Single Tone. */ - /* <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu) */ - /* <20120326, Kordan> Only in single tone mode. (asked by Edlu) */ - if (IS_HARDWARE_TYPE_8188E(pAdapter)) { - reg58 = PHY_QueryRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask); - reg58 &= 0xFFFFFFF0; - PHY_SetRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, reg58); - } - write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); - write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); - if (is92C) { - _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT(19), 0x00); - rtw_usleep_os(100); - write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); /* PAD all on. */ - write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); /* PAD all on. */ - rtw_usleep_os(100); - } else { - write_rfreg(pAdapter, rfPath, 0x21, 0x54000); - rtw_usleep_os(100); - write_rfreg(pAdapter, rfPath, 0x00, 0x30000); /* PAD all on. */ - rtw_usleep_os(100); - } - - /* Stop for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); - } -} - -void Hal_SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart) -{ - pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; - if (bStart) { - /* Start Carrier Suppression. */ - if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) { - /* 1. if CCK block on? */ - if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) - write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */ - - /* Turn Off All Test Mode */ - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /* transmit mode */ - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /* turn off scramble setting */ - - /* Set CCK Tx Test Rate */ - write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /* Set FTxRate to 1Mbps */ - } - - /* for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); - } else { - /* Stop Carrier Suppression. */ - if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) { - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /* normal mode */ - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /* turn on scramble setting */ - - /* BB Reset */ - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); - } - - /* Stop for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); - } -} - -void Hal_SetCCKContinuousTx(struct adapter *pAdapter, u8 bStart) -{ - u32 cckrate; - - if (bStart) { - /* 1. if CCK block on? */ - if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) - write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */ - - /* Turn Off All Test Mode */ - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - /* Set CCK Tx Test Rate */ - cckrate = pAdapter->mppriv.rateidx; - write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /* transmit mode */ - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /* turn on scramble setting */ - - /* for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); - } else { - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /* normal mode */ - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /* turn on scramble setting */ - - /* BB Reset */ - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); - - /* Stop for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); - } - - pAdapter->mppriv.MptCtx.bCckContTx = bStart; - pAdapter->mppriv.MptCtx.bOfdmContTx = false; -} /* mpt_StartCckContTx */ - -void Hal_SetOFDMContinuousTx(struct adapter *pAdapter, u8 bStart) -{ - if (bStart) { - /* 1. if OFDM block on? */ - if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) - write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);/* set OFDM block on */ - - /* 2. set CCK test mode off, set to CCK normal mode */ - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); - - /* 3. turn on scramble setting */ - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); - /* 4. Turn On Continue Tx and turn off the other test modes. */ - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - - /* for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); - - } else { - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - /* Delay 10 ms */ - msleep(10); - /* BB Reset */ - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); - - /* Stop for dynamic set Power index. */ - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); - } - - pAdapter->mppriv.MptCtx.bCckContTx = false; - pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; -} /* mpt_StartOfdmContTx */ - -void Hal_SetContinuousTx(struct adapter *pAdapter, u8 bStart) -{ - pAdapter->mppriv.MptCtx.bStartContTx = bStart; - if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) - Hal_SetCCKContinuousTx(pAdapter, bStart); - else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) && - (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15)) - Hal_SetOFDMContinuousTx(pAdapter, bStart); -} diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c index 30a9dca8f453..bb0cda0c16a0 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c @@ -532,7 +532,7 @@ void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMa static int phy_BB8188E_Config_ParaFile(struct adapter *Adapter) { - struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); + struct eeprom_priv *pEEPROM = &Adapter->eeprompriv; struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); int rtStatus = _SUCCESS; @@ -609,166 +609,6 @@ int PHY_RFConfig8188E(struct adapter *Adapter) return rtStatus; } -/*----------------------------------------------------------------------------- - * Function: PHY_ConfigRFWithParaFile() - * - * Overview: This function read RF parameters from general file format, and do RF 3-wire - * - * Input: struct adapter *Adapter - * ps8 pFileName - * enum rf_radio_path eRFPath - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - * Note: Delay may be required for RF configuration - *---------------------------------------------------------------------------*/ -int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *Adapter, u8 *pFileName, enum rf_radio_path eRFPath) -{ - return _SUCCESS; -} - -void -rtl8192c_PHY_GetHWRegOriginalValue( - struct adapter *Adapter - ) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - - /* read rx initial gain */ - pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0); - - /* read framesync */ - pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0); - pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord); -} - -/* */ -/* Description: */ -/* Map dBm into Tx power index according to */ -/* current HW model, for example, RF and PA, and */ -/* current wireless mode. */ -/* By Bruce, 2008-01-29. */ -/* */ -static u8 phy_DbmToTxPwrIdx(struct adapter *Adapter, enum wireless_mode WirelessMode, int PowerInDbm) -{ - u8 TxPwrIdx = 0; - int Offset = 0; - - /* */ - /* Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to */ - /* 3dbm, and OFDM HT equals to 0dbm respectively. */ - /* Note: */ - /* The mapping may be different by different NICs. Do not use this formula for what needs accurate result. */ - /* By Bruce, 2008-01-29. */ - /* */ - switch (WirelessMode) { - case WIRELESS_MODE_B: - Offset = -7; - break; - - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - default: - Offset = -8; - break; - } - - if ((PowerInDbm - Offset) > 0) - TxPwrIdx = (u8)((PowerInDbm - Offset) * 2); - else - TxPwrIdx = 0; - - /* Tx Power Index is too large. */ - if (TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S) - TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S; - - return TxPwrIdx; -} - -/* */ -/* Description: */ -/* Map Tx power index into dBm according to */ -/* current HW model, for example, RF and PA, and */ -/* current wireless mode. */ -/* By Bruce, 2008-01-29. */ -/* */ -static int phy_TxPwrIdxToDbm(struct adapter *Adapter, enum wireless_mode WirelessMode, u8 TxPwrIdx) -{ - int Offset = 0; - int PwrOutDbm = 0; - - /* */ - /* Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. */ - /* Note: */ - /* The mapping may be different by different NICs. Do not use this formula for what needs accurate result. */ - /* By Bruce, 2008-01-29. */ - /* */ - switch (WirelessMode) { - case WIRELESS_MODE_B: - Offset = -7; - break; - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - default: - Offset = -8; - break; - } - - PwrOutDbm = TxPwrIdx / 2 + Offset; /* Discard the decimal part. */ - - return PwrOutDbm; -} - -/*----------------------------------------------------------------------------- - * Function: GetTxPowerLevel8190() - * - * Overview: This function is export to "common" moudule - * - * Input: struct adapter *Adapter - * psByte Power Level - * - * Output: NONE - * - * Return: NONE - * - *---------------------------------------------------------------------------*/ -void PHY_GetTxPowerLevel8188E(struct adapter *Adapter, u32 *powerlevel) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u8 TxPwrLevel = 0; - int TxPwrDbm; - - /* */ - /* Because the Tx power indexes are different, we report the maximum of them to */ - /* meet the CCX TPC request. By Bruce, 2008-01-31. */ - /* */ - - /* CCK */ - TxPwrLevel = pHalData->CurrentCckTxPwrIdx; - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel); - - /* Legacy OFDM */ - TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff; - - /* Compare with Legacy OFDM Tx power. */ - if (phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm) - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel); - - /* HT OFDM */ - TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx; - - /* Compare with HT OFDM Tx power. */ - if (phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm) - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel); - - *powerlevel = TxPwrDbm; -} - static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8 *cckPowerLevel, u8 *ofdmPowerLevel, u8 *BW20PowerLevel, u8 *BW40PowerLevel) @@ -892,51 +732,6 @@ PHY_SetTxPowerLevel8188E( rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0], channel); } -/* */ -/* Description: */ -/* Update transmit power level of all channel supported. */ -/* */ -/* TODO: */ -/* A mode. */ -/* By Bruce, 2008-02-04. */ -/* */ -bool -PHY_UpdateTxPowerDbm8188E( - struct adapter *Adapter, - int powerInDbm - ) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u8 idx; - u8 rf_path; - - /* TODO: A mode Tx power. */ - u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm); - u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm); - - if (OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0) - OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff; - else - OfdmTxPwrIdx = 0; - - for (idx = 0; idx < 14; idx++) { - for (rf_path = 0; rf_path < 2; rf_path++) { - pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx; - pHalData->TxPwrLevelHT40_1S[rf_path][idx] = - pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx; - } - } - return true; -} - -void -PHY_ScanOperationBackup8188E( - struct adapter *Adapter, - u8 Operation - ) -{ -} - /*----------------------------------------------------------------------------- * Function: PHY_SetBWModeCallback8192C() * @@ -1068,7 +863,7 @@ void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width Bandwidth static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel) { - u8 eRFPath; + u8 eRFPath = 0; u32 param1, param2; struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); @@ -1081,10 +876,8 @@ static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel) /* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel */ param1 = RF_CHNLBW; param2 = channel; - for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) { - pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); - PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); - } + pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); + PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); } void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel) diff --git a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c index ad0782259654..946a1b97d96f 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c @@ -29,49 +29,6 @@ #include "../include/drv_types.h" #include "../include/rtl8188e_hal.h" -/*---------------------------Define Local Constant---------------------------*/ -/* Define local structure for debug!!!!! */ -struct rf_shadow { - /* Shadow register value */ - u32 Value; - /* Compare or not flag */ - u8 Compare; - /* Record If it had ever modified unpredicted */ - u8 ErrorOrNot; - /* Recorver Flag */ - u8 Recorver; - /* */ - u8 Driver_Write; -}; - -/*---------------------------Define Local Constant---------------------------*/ - -/*------------------------Define global variable-----------------------------*/ - -/*------------------------Define local variable------------------------------*/ - -/*----------------------------------------------------------------------------- - * Function: RF_ChangeTxPath - * - * Overview: For RL6052, we must change some RF settign for 1T or 2T. - * - * Input: u16 DataRate 0x80-8f, 0x90-9f - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 09/25/2008 MHC Create Version 0. - * Firmwaer support the utility later. - * - *---------------------------------------------------------------------------*/ -void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate) -{ -/* We do not support gain table change inACUT now !!!! Delete later !!! */ -} /* RF_ChangeTxPath */ - /*----------------------------------------------------------------------------- * Function: PHY_RF6052SetBandwidth() * @@ -128,7 +85,6 @@ rtl8188e_PHY_RF6052SetCckTxPower( u8 *pPowerlevel) { struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value; bool TurboScanOff = false; @@ -155,34 +111,19 @@ rtl8188e_PHY_RF6052SetCckTxPower( } } } else { - /* Driver dynamic Tx power shall not affect Tx power. - * It shall be determined by power training mechanism. -i * Currently, we cannot fully disable driver dynamic - * tx power mechanism because it is referenced by BT - * coexist mechanism. - * In the future, two mechanism shall be separated from - * each other and maintained independently. */ - if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) { - TxAGC[RF_PATH_A] = 0x10101010; - TxAGC[RF_PATH_B] = 0x10101010; - } else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) { - TxAGC[RF_PATH_A] = 0x00000000; - TxAGC[RF_PATH_B] = 0x00000000; - } else { - for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { - TxAGC[idx1] = - pPowerlevel[idx1] | (pPowerlevel[idx1] << 8) | - (pPowerlevel[idx1] << 16) | (pPowerlevel[idx1] << 24); - } - if (pHalData->EEPROMRegulatory == 0) { - tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + - (pHalData->MCSTxPowerLevelOriginalOffset[0][7] << 8); - TxAGC[RF_PATH_A] += tmpval; - - tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + - (pHalData->MCSTxPowerLevelOriginalOffset[0][15] << 24); - TxAGC[RF_PATH_B] += tmpval; - } + for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { + TxAGC[idx1] = + pPowerlevel[idx1] | (pPowerlevel[idx1] << 8) | + (pPowerlevel[idx1] << 16) | (pPowerlevel[idx1] << 24); + } + if (pHalData->EEPROMRegulatory == 0) { + tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + + (pHalData->MCSTxPowerLevelOriginalOffset[0][7] << 8); + TxAGC[RF_PATH_A] += tmpval; + + tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + + (pHalData->MCSTxPowerLevelOriginalOffset[0][15] << 24); + TxAGC[RF_PATH_B] += tmpval; } } for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { @@ -227,7 +168,7 @@ static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM, { struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); u32 powerBase0, powerBase1; - u8 i, powerlevel[2]; + u8 i; for (i = 0; i < 2; i++) { powerBase0 = pPowerLevelOFDM[i]; @@ -235,23 +176,21 @@ static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM, powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) | (powerBase0 << 8) | powerBase0; *(OfdmBase + i) = powerBase0; } - for (i = 0; i < pHalData->NumTotalRFPath; i++) { - /* Check HT20 to HT40 diff */ - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - powerlevel[i] = pPowerLevelBW20[i]; - else - powerlevel[i] = pPowerLevelBW40[i]; - powerBase1 = powerlevel[i]; - powerBase1 = (powerBase1 << 24) | (powerBase1 << 16) | (powerBase1 << 8) | powerBase1; - *(MCSBase + i) = powerBase1; - } + + /* Check HT20 to HT40 diff */ + if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + powerBase1 = pPowerLevelBW20[0]; + else + powerBase1 = pPowerLevelBW40[0]; + powerBase1 = (powerBase1 << 24) | (powerBase1 << 16) | (powerBase1 << 8) | powerBase1; + *MCSBase = powerBase1; } + static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel, u8 index, u32 *powerBase0, u32 *powerBase1, u32 *pOutWriteVal) { struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit; s8 pwr_diff = 0; u32 writeVal, customer_limit, rf; @@ -327,19 +266,7 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel, ((index < 2) ? powerBase0[rf] : powerBase1[rf]); break; } -/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */ -/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */ -/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */ - /* 92d do not need this */ - if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - writeVal = 0x14141414; - else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - writeVal = 0x00000000; - - /* 20100628 Joseph: High power mode for BT-Coexist mechanism. */ - /* This mechanism is only applied when Driver-Highpower-Mechanism is OFF. */ - if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) - writeVal = writeVal - 0x06060606; + *(pOutWriteVal + rf) = writeVal; } } @@ -458,70 +385,41 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter) struct bb_reg_def *pPhyReg; struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); u32 u4RegValue = 0; - u8 eRFPath; + u8 eRFPath = 0; int rtStatus = _SUCCESS; - /* 3----------------------------------------------------------------- */ - /* 3 <2> Initialize RF */ - /* 3----------------------------------------------------------------- */ - for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) { - pPhyReg = &pHalData->PHYRegDef[eRFPath]; - - /*----Store original RFENV control type----*/ - switch (eRFPath) { - case RF_PATH_A: - case RF_PATH_C: - u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); - break; - case RF_PATH_B: - case RF_PATH_D: - u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16); - break; - } - /*----Set RF_ENV enable----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); - udelay(1);/* PlatformStallExecution(1); */ - - /*----Set RF_ENV output high----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); - udelay(1);/* PlatformStallExecution(1); */ - - /* Set bit number of Address and Data for RF register */ - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */ - udelay(1);/* PlatformStallExecution(1); */ - - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */ - udelay(1);/* PlatformStallExecution(1); */ - - /*----Initialize RF fom connfiguration file----*/ - switch (eRFPath) { - case RF_PATH_A: - if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath)) - rtStatus = _FAIL; - break; - case RF_PATH_B: - if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath)) - rtStatus = _FAIL; - break; - case RF_PATH_C: - break; - case RF_PATH_D: - break; - } - /*----Restore RFENV control type----*/; - switch (eRFPath) { - case RF_PATH_A: - case RF_PATH_C: - PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); - break; - case RF_PATH_B: - case RF_PATH_D: - PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); - break; - } - if (rtStatus != _SUCCESS) - goto phy_RF6052_Config_ParaFile_Fail; - } + /* Initialize RF */ + + pPhyReg = &pHalData->PHYRegDef[eRFPath]; + + /*----Store original RFENV control type----*/ + u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); + + /*----Set RF_ENV enable----*/ + PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); + udelay(1);/* PlatformStallExecution(1); */ + + /*----Set RF_ENV output high----*/ + PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); + udelay(1);/* PlatformStallExecution(1); */ + + /* Set bit number of Address and Data for RF register */ + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */ + udelay(1);/* PlatformStallExecution(1); */ + + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */ + udelay(1);/* PlatformStallExecution(1); */ + + /*----Initialize RF fom connfiguration file----*/ + if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath)) + rtStatus = _FAIL; + + /*----Restore RFENV control type----*/; + PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); + + if (rtStatus != _SUCCESS) + goto phy_RF6052_Config_ParaFile_Fail; + return rtStatus; phy_RF6052_Config_ParaFile_Fail: @@ -530,19 +428,9 @@ phy_RF6052_Config_ParaFile_Fail: int PHY_RF6052_Config8188E(struct adapter *Adapter) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); int rtStatus = _SUCCESS; /* */ - /* Initialize general global value */ - /* */ - /* TODO: Extend RF_PATH_C and RF_PATH_D in the future */ - if (pHalData->rf_type == RF_1T1R) - pHalData->NumTotalRFPath = 1; - else - pHalData->NumTotalRFPath = 2; - - /* */ /* Config BB and RF */ /* */ rtStatus = phy_RF6052_Config_ParaFile(Adapter); diff --git a/drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c b/drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c index 244286789b6d..053d9549873d 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c @@ -127,7 +127,7 @@ void update_recvframe_phyinfo_88e(struct recv_frame *precvframe, struct phy_stat struct adapter *padapter = precvframe->adapter; struct rx_pkt_attrib *pattrib = &precvframe->attrib; struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - struct odm_phy_status_info *pPHYInfo = (struct odm_phy_status_info *)(&pattrib->phy_info); + struct phy_info *pPHYInfo = &pattrib->phy_info; u8 *wlanhdr; struct odm_per_pkt_info pkt_info; u8 *sa = NULL; diff --git a/drivers/staging/r8188eu/hal/rtl8188e_sreset.c b/drivers/staging/r8188eu/hal/rtl8188e_sreset.c index 16fa249e35d3..7b3ac6e306ce 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_sreset.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_sreset.c @@ -6,43 +6,16 @@ #include "../include/rtl8188e_sreset.h" #include "../include/rtl8188e_hal.h" -void rtl8188e_silentreset_for_specific_platform(struct adapter *padapter) -{ -} - void rtl8188e_sreset_xmit_status_check(struct adapter *padapter) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - struct sreset_priv *psrtpriv = &pHalData->srestpriv; - - unsigned long current_time; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - unsigned int diff_time; u32 txdma_status; txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS); if (txdma_status != 0x00) { DBG_88E("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status); rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status); - rtl8188e_silentreset_for_specific_platform(padapter); } /* total xmit irp = 4 */ - current_time = jiffies; - if (0 == pxmitpriv->free_xmitbuf_cnt) { - diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time); - - if (diff_time > 2000) { - if (psrtpriv->last_tx_complete_time == 0) { - psrtpriv->last_tx_complete_time = current_time; - } else { - diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time); - if (diff_time > 4000) { - DBG_88E("%s tx hang\n", __func__); - rtl8188e_silentreset_for_specific_platform(padapter); - } - } - } - } } void rtl8188e_sreset_linked_status_check(struct adapter *padapter) diff --git a/drivers/staging/r8188eu/hal/rtl8188eu_recv.c b/drivers/staging/r8188eu/hal/rtl8188eu_recv.c index 2da7bde80cc0..8031ac9f9d43 100644 --- a/drivers/staging/r8188eu/hal/rtl8188eu_recv.c +++ b/drivers/staging/r8188eu/hal/rtl8188eu_recv.c @@ -12,7 +12,7 @@ #include "../include/rtl8188e_hal.h" -void rtl8188eu_init_recvbuf(struct adapter *padapter, struct recv_buf *precvbuf) +void rtl8188eu_init_recvbuf(struct recv_buf *precvbuf) { precvbuf->transfer_len = 0; @@ -39,7 +39,7 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter) (unsigned long)padapter); /* init recv_buf */ - _rtw_init_queue(&precvpriv->free_recv_buf_queue); + rtw_init_queue(&precvpriv->free_recv_buf_queue); precvpriv->pallocated_recv_buf = kzalloc(NR_RECVBUFF * sizeof(struct recv_buf) + 4, GFP_KERNEL); diff --git a/drivers/staging/r8188eu/hal/rtl8188eu_xmit.c b/drivers/staging/r8188eu/hal/rtl8188eu_xmit.c index 17be67ac5fae..b7feb4d8c8aa 100644 --- a/drivers/staging/r8188eu/hal/rtl8188eu_xmit.c +++ b/drivers/staging/r8188eu/hal/rtl8188eu_xmit.c @@ -19,15 +19,6 @@ s32 rtl8188eu_init_xmit_priv(struct adapter *adapt) return _SUCCESS; } -static u8 urb_zero_packet_chk(struct adapter *adapt, int sz) -{ - u8 set_tx_desc_offset; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - set_tx_desc_offset = (((sz + TXDESC_SIZE) % haldata->UsbBulkOutSize) == 0) ? 1 : 0; - - return set_tx_desc_offset; -} - static void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc) { u16 *usptr = (u16 *)ptxdesc; @@ -168,13 +159,6 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - if (adapt->registrypriv.mp_mode == 0) { - if ((!bagg_pkt) && (urb_zero_packet_chk(adapt, sz) == 0)) { - ptxdesc = (struct tx_desc *)(pmem + PACKET_OFFSET_SZ); - pull = 1; - } - } - memset(ptxdesc, 0, sizeof(struct tx_desc)); /* 4 offset 0 */ @@ -188,13 +172,6 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag if (is_multicast_ether_addr(pattrib->ra)) ptxdesc->txdw0 |= cpu_to_le32(BMC); - if (adapt->registrypriv.mp_mode == 0) { - if (!bagg_pkt) { - if ((pull) && (pxmitframe->pkt_offset > 0)) - pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1; - } - } - /* pkt_offset, unit:8 bytes padding */ if (pxmitframe->pkt_offset > 0) ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000); @@ -289,9 +266,6 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); } else if ((pxmitframe->frame_tag & 0x0f) == TXAGG_FRAMETAG) { DBG_88E("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); - } else if (((pxmitframe->frame_tag & 0x0f) == MP_FRAMETAG) && - (adapt->registrypriv.mp_mode == 1)) { - fill_txdesc_for_mp(adapt, ptxdesc); } else { DBG_88E("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); @@ -437,30 +411,26 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp } /* 3 1. pick up first frame */ - do { - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); - if (!pxmitframe) { - /* no more xmit frame, release xmit buffer */ - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - return false; - } + rtw_free_xmitframe(pxmitpriv, pxmitframe); - pxmitframe->pxmitbuf = pxmitbuf; - pxmitframe->buf_addr = pxmitbuf->pbuf; - pxmitbuf->priv_data = pxmitframe; + pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); + if (!pxmitframe) { + /* no more xmit frame, release xmit buffer */ + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + return false; + } - pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */ - pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */ + pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->pbuf; + pxmitbuf->priv_data = pxmitframe; - rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe); + pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */ + pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */ - /* always return ndis_packet after rtw_xmitframe_coalesce */ - rtw_os_xmit_complete(adapt, pxmitframe); + rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe); - break; - } while (1); + /* always return ndis_packet after rtw_xmitframe_coalesce */ + rtw_os_xmit_complete(adapt, pxmitframe); /* 3 2. aggregate same priority and same DA(AP or STA) frames */ pfirstframe = pxmitframe; diff --git a/drivers/staging/r8188eu/hal/usb_halinit.c b/drivers/staging/r8188eu/hal/usb_halinit.c index 5cdabf43d4fd..ef1ae95d7db0 100644 --- a/drivers/staging/r8188eu/hal/usb_halinit.c +++ b/drivers/staging/r8188eu/hal/usb_halinit.c @@ -60,7 +60,7 @@ static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPip return result; } -static void rtl8188eu_interface_configure(struct adapter *adapt) +void rtl8188eu_interface_configure(struct adapter *adapt) { struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt); @@ -85,7 +85,7 @@ static void rtl8188eu_interface_configure(struct adapter *adapt) pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); } -static u32 rtl8188eu_InitPowerOn(struct adapter *adapt) +u32 rtl8188eu_InitPowerOn(struct adapter *adapt) { u16 value16; /* HW Power on sequence */ @@ -119,18 +119,15 @@ static void _InitInterrupt(struct adapter *Adapter) { u32 imr, imr_ex; u8 usb_opt; - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); /* HISR write one to clear */ rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF); /* HIMR - */ imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E; rtw_write32(Adapter, REG_HIMR_88E, imr); - haldata->IntrMask[0] = imr; imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E; rtw_write32(Adapter, REG_HIMRE_88E, imr_ex); - haldata->IntrMask[1] = imr_ex; /* REG_USB_SPECIAL_OPTION - BIT(4) */ /* 0; Use interrupt endpoint to upload interrupt pkt */ @@ -403,22 +400,6 @@ static void _InitEDCA(struct adapter *Adapter) rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); } -static void _InitBeaconMaxError(struct adapter *Adapter, bool InfraMode) -{ -} - -static void _InitHWLed(struct adapter *Adapter) -{ - struct led_priv *pledpriv = &Adapter->ledpriv; - - if (pledpriv->LedStrategy != HW_LED) - return; - -/* HW led control */ -/* to do .... */ -/* must consider cases of antenna diversity/ commbo card/solo card/mini card */ -} - static void _InitRDGSetting(struct adapter *Adapter) { rtw_write8(Adapter, REG_RD_CTRL, 0xFF); @@ -426,12 +407,6 @@ static void _InitRDGSetting(struct adapter *Adapter) rtw_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05); } -static void _InitRxSetting(struct adapter *Adapter) -{ - rtw_write32(Adapter, REG_MACID, 0x87654321); - rtw_write32(Adapter, 0x0700, 0x87654321); -} - static void _InitRetryFunction(struct adapter *Adapter) { u8 value8; @@ -546,26 +521,6 @@ usb_AggSettingRxUpdate( /* TODO: */ break; } - - switch (PBP_128) { - case PBP_128: - haldata->HwRxPageSize = 128; - break; - case PBP_64: - haldata->HwRxPageSize = 64; - break; - case PBP_256: - haldata->HwRxPageSize = 256; - break; - case PBP_512: - haldata->HwRxPageSize = 512; - break; - case PBP_1024: - haldata->HwRxPageSize = 1024; - break; - default: - break; - } } /* usb_AggSettingRxUpdate */ static void InitUsbAggregationSetting(struct adapter *Adapter) @@ -601,8 +556,6 @@ static void _InitBeaconParameters(struct adapter *Adapter) /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */ rtw_write16(Adapter, REG_BCNTCFG, 0x660F); - haldata->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL); - haldata->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); haldata->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL + 2); haldata->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT + 2); haldata->RegCR_1 = rtw_read8(Adapter, REG_CR + 1); @@ -646,40 +599,7 @@ static void _InitAntenna_Selection(struct adapter *Adapter) DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B"); } -/*----------------------------------------------------------------------------- - * Function: HwSuspendModeEnable92Cu() - * - * Overview: HW suspend mode switch. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 08/23/2010 MHC HW suspend mode switch test.. - *---------------------------------------------------------------------------*/ -enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt) -{ - u8 val8; - enum rt_rf_power_state rfpowerstate = rf_off; - - if (adapt->pwrctrlpriv.bHWPowerdown) { - val8 = rtw_read8(adapt, REG_HSISR); - DBG_88E("pwrdown, 0x5c(BIT(7))=%02x\n", val8); - rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on; - } else { /* rf on/off */ - rtw_write8(adapt, REG_MAC_PINMUX_CFG, rtw_read8(adapt, REG_MAC_PINMUX_CFG) & ~(BIT(3))); - val8 = rtw_read8(adapt, REG_GPIO_IO_SEL); - DBG_88E("GPIO_IN=%02x\n", val8); - rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off; - } - return rfpowerstate; -} /* HalDetectPwrDownMode */ - -static u32 rtl8188eu_hal_init(struct adapter *Adapter) +u32 rtl8188eu_hal_init(struct adapter *Adapter) { u8 value8 = 0; u16 value16; @@ -742,22 +662,16 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter) _InitTxBufferBoundary(Adapter, 0); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); - if (Adapter->registrypriv.mp_mode == 1) { - _InitRxSetting(Adapter); + status = rtl8188e_FirmwareDownload(Adapter); + + if (status != _SUCCESS) { + DBG_88E("%s: Download Firmware failed!!\n", __func__); Adapter->bFWReady = false; haldata->fw_ractrl = false; + return status; } else { - status = rtl8188e_FirmwareDownload(Adapter); - - if (status != _SUCCESS) { - DBG_88E("%s: Download Firmware failed!!\n", __func__); - Adapter->bFWReady = false; - haldata->fw_ractrl = false; - return status; - } else { - Adapter->bFWReady = true; - haldata->fw_ractrl = false; - } + Adapter->bFWReady = true; + haldata->fw_ractrl = false; } rtl8188e_InitializeFirmwareVars(Adapter); @@ -819,7 +733,6 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter) InitUsbAggregationSetting(Adapter); _InitOperationMode(Adapter);/* todo */ _InitBeaconParameters(Adapter); - _InitBeaconMaxError(Adapter, true); /* */ /* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */ @@ -847,8 +760,6 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter) rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ - _InitHWLed(Adapter); - /* Keep RfRegChnlVal for later use. */ haldata->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask); haldata->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask); @@ -887,48 +798,43 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter) HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); rtl8188e_InitHalDm(Adapter); - if (Adapter->registrypriv.mp_mode == 1) { - Adapter->mppriv.channel = haldata->CurrentChannel; - MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel); - } else { - /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */ - /* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */ - /* call initstruct adapter. May cause some problem?? */ - /* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */ - /* in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */ - /* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */ - /* Added by tynli. 2010.03.30. */ - pwrctrlpriv->rf_pwrstate = rf_on; - - /* enable Tx report. */ - rtw_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F); - - /* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */ - rtw_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01);/* Pretx_en, for WEP/TKIP SEC */ - - /* tynli_test_tx_report. */ - rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); - - /* enable tx DMA to drop the redundate data of packet */ - rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); - - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); - /* 2010/08/26 MH Merge from 8192CE. */ - if (pwrctrlpriv->rf_pwrstate == rf_on) { - if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) { - PHY_IQCalibrate_8188E(Adapter, true); - } else { - PHY_IQCalibrate_8188E(Adapter, false); - haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true; - } + /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */ + /* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */ + /* call initstruct adapter. May cause some problem?? */ + /* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */ + /* in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */ + /* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */ + /* Added by tynli. 2010.03.30. */ + pwrctrlpriv->rf_pwrstate = rf_on; + + /* enable Tx report. */ + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); + /* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */ + rtw_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01);/* Pretx_en, for WEP/TKIP SEC */ - ODM_TXPowerTrackingCheck(&haldata->odmpriv); + /* tynli_test_tx_report. */ + rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); - PHY_LCCalibrate_8188E(Adapter); + /* enable tx DMA to drop the redundate data of packet */ + rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); + /* 2010/08/26 MH Merge from 8192CE. */ + if (pwrctrlpriv->rf_pwrstate == rf_on) { + if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) { + PHY_IQCalibrate_8188E(Adapter, true); + } else { + PHY_IQCalibrate_8188E(Adapter, false); + haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true; } + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); + + ODM_TXPowerTrackingCheck(&haldata->odmpriv); + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); + PHY_LCCalibrate_8188E(Adapter); } /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */ @@ -1013,17 +919,8 @@ static void CardDisableRTL8188EU(struct adapter *Adapter) haldata->bMacPwrCtrlOn = false; Adapter->bFWReady = false; } -static void rtl8192cu_hw_power_down(struct adapter *adapt) -{ - /* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */ - /* Then enable power down control bit of register 0x04 BIT(4) and BIT(15) as 1. */ - /* Enable register area 0x0-0xc. */ - rtw_write8(adapt, REG_RSV_CTRL, 0x0); - rtw_write16(adapt, REG_APS_FSMCO, 0x8812); -} - -static u32 rtl8188eu_hal_deinit(struct adapter *Adapter) +u32 rtl8188eu_hal_deinit(struct adapter *Adapter) { DBG_88E("==> %s\n", __func__); @@ -1034,29 +931,20 @@ static u32 rtl8188eu_hal_deinit(struct adapter *Adapter) DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive); if (Adapter->pwrctrlpriv.bkeepfwalive) { _ps_close_RF(Adapter); - if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown)) - rtl8192cu_hw_power_down(Adapter); } else { if (Adapter->hw_init_completed) { CardDisableRTL8188EU(Adapter); - - if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown)) - rtl8192cu_hw_power_down(Adapter); } } return _SUCCESS; } -static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter) +unsigned int rtl8188eu_inirp_init(struct adapter *Adapter) { u8 i; struct recv_buf *precvbuf; uint status; - struct intf_hdl *pintfhdl = &Adapter->iopriv.intf; struct recv_priv *precvpriv = &Adapter->recvpriv; - u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); - - _read_port = pintfhdl->io_ops._read_port; status = _SUCCESS; @@ -1065,7 +953,7 @@ static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter) /* issue Rx irp to receive data */ precvbuf = (struct recv_buf *)precvpriv->precv_buf; for (i = 0; i < NR_RECVBUFF; i++) { - if (!_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf)) { + if (!rtw_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf)) { status = _FAIL; goto exit; } @@ -1078,13 +966,6 @@ exit: return status; } -static unsigned int rtl8188eu_inirp_deinit(struct adapter *Adapter) -{ - rtw_read_port_cancel(Adapter); - - return _SUCCESS; -} - /* */ /* */ /* EEPROM/EFUSE Content Parsing */ @@ -1096,7 +977,6 @@ static void _ReadLEDSetting(struct adapter *Adapter, u8 *PROMContent, bool Autol struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); pledpriv->bRegUseLed = true; - pledpriv->LedStrategy = SW_LED_MODE1; haldata->bLedOpenDrain = true;/* Support Open-drain arrangement for controlling the LED. */ } @@ -1129,7 +1009,7 @@ static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool { u16 i; u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02}; - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt); + struct eeprom_priv *eeprom = &adapt->eeprompriv; if (AutoLoadFail) { for (i = 0; i < 6; i++) @@ -1140,16 +1020,12 @@ static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool } } -static void Hal_CustomizeByCustomerID_8188EU(struct adapter *adapt) -{ -} - static void readAdapterInfo_8188EU( struct adapter *adapt ) { - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt); + struct eeprom_priv *eeprom = &adapt->eeprompriv; /* parse the eeprom/efuse content */ Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data); @@ -1166,12 +1042,6 @@ readAdapterInfo_8188EU( Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - /* */ - /* The following part initialize some vars by PG info. */ - /* */ - Hal_InitChannelPlan(adapt); - Hal_CustomizeByCustomerID_8188EU(adapt); - _ReadLEDSetting(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); } @@ -1179,7 +1049,7 @@ static void _ReadPROMContent( struct adapter *Adapter ) { - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter); + struct eeprom_priv *eeprom = &Adapter->eeprompriv; u8 eeValue; /* check system boot selection */ @@ -1203,19 +1073,13 @@ static void _ReadRFType(struct adapter *Adapter) static int _ReadAdapterInfo8188EU(struct adapter *Adapter) { - u32 start = jiffies; - - MSG_88E("====> %s\n", __func__); - _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */ _ReadPROMContent(Adapter); - MSG_88E("<==== %s in %d ms\n", __func__, rtw_get_passing_time_ms(start)); - return _SUCCESS; } -static void ReadAdapterInfo8188EU(struct adapter *Adapter) +void ReadAdapterInfo8188EU(struct adapter *Adapter) { /* Read EEPROM size before call any EEPROM function */ Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter); @@ -1223,11 +1087,6 @@ static void ReadAdapterInfo8188EU(struct adapter *Adapter) _ReadAdapterInfo8188EU(Adapter); } -#define GPIO_DEBUG_PORT_NUM 0 -static void rtl8192cu_trigger_gpio_0(struct adapter *adapt) -{ -} - static void ResumeTxBeacon(struct adapter *adapt) { struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); @@ -1349,7 +1208,7 @@ static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val) rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg) & (~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); } -static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) +void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) { struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &haldata->dmpriv; @@ -1532,7 +1391,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) } if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) - RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48; + RetryLimit = 48; else /* Ad-hoc Mode */ RetryLimit = 0x7; } else if (type == 1) { @@ -1610,7 +1469,6 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) break; case HW_VAR_DM_FUNC_SET: if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) { - pdmpriv->DMFlag = pdmpriv->InitDMFlag; podmpriv->SupportAbility = pdmpriv->InitODMFlag; } else { podmpriv->SupportAbility |= *((u32 *)val); @@ -1757,15 +1615,13 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold); } break; - case HW_VAR_SET_RPWM: - break; case HW_VAR_H2C_FW_PWRMODE: { u8 psmode = (*(u8 *)val); /* Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */ /* saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */ - if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(haldata->VersionID))) + if (psmode != PS_MODE_ACTIVE) ODM_RF_Saving(podmpriv, true); rtl8188e_set_FwPwrMode_cmd(Adapter, psmode); } @@ -1776,14 +1632,12 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus); } break; -#ifdef CONFIG_88EU_P2P case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: { u8 p2p_ps_state = (*(u8 *)val); rtl8188e_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state); } break; -#endif case HW_VAR_INITIAL_GAIN: { struct rtw_dig *pDigTable = &podmpriv->DM_DigTable; @@ -1797,9 +1651,6 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) } } break; - case HW_VAR_TRIGGER_GPIO_0: - rtl8192cu_trigger_gpio_0(Adapter); - break; case HW_VAR_RPT_TIMER_SETTING: { u16 min_rpt_time = (*(u16 *)val); @@ -1850,8 +1701,6 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) } } break; - case HW_VAR_CHECK_TXBUF: - break; case HW_VAR_APFM_ON_MAC: haldata->bMacPwrCtrlOn = *val; DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn); @@ -1876,7 +1725,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) } -static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) +void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) { struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); struct odm_dm_struct *podmpriv = &haldata->odmpriv; @@ -1934,16 +1783,8 @@ static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) } -/* */ -/* Description: */ -/* Query setting of specified variable. */ -/* */ -static u8 -GetHalDefVar8188EUsb( - struct adapter *Adapter, - enum hal_def_variable eVariable, - void *pValue - ) +/* Query setting of specified variable. */ +u8 GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue) { struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); u8 bResult = _SUCCESS; @@ -2027,11 +1868,8 @@ GetHalDefVar8188EUsb( return bResult; } -/* */ -/* Description: */ -/* Change default setting of specified variable. */ -/* */ -static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue) +/* Change default setting of specified variable. */ +u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue) { struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); u8 bResult = _SUCCESS; @@ -2079,7 +1917,7 @@ static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eV return bResult; } -static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level) +void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level) { u8 init_rate = 0; u8 networkType, raid; @@ -2162,7 +2000,7 @@ static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_l psta->init_rate = init_rate; } -static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt) +void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt) { u32 value32; struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; @@ -2196,7 +2034,7 @@ static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt) rtw_write8(adapt, bcn_ctrl_reg, rtw_read8(adapt, bcn_ctrl_reg) | BIT(1)); } -static void rtl8188eu_init_default_value(struct adapter *adapt) +void rtl8188eu_init_default_value(struct adapter *adapt) { struct hal_data_8188e *haldata; struct pwrctrl_priv *pwrctrlpriv; @@ -2220,52 +2058,10 @@ static void rtl8188eu_init_default_value(struct adapter *adapt) haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; } -static u8 rtl8188eu_ps_func(struct adapter *Adapter, enum hal_intf_ps_func efunc_id, u8 *val) -{ - u8 bResult = true; - return bResult; -} - -void rtl8188eu_set_hal_ops(struct adapter *adapt) +void rtl8188eu_alloc_haldata(struct adapter *adapt) { - struct hal_ops *halfunc = &adapt->HalFunc; - adapt->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL); if (!adapt->HalData) DBG_88E("cant not alloc memory for HAL DATA\n"); adapt->hal_data_sz = sizeof(struct hal_data_8188e); - - halfunc->hal_power_on = rtl8188eu_InitPowerOn; - halfunc->hal_init = &rtl8188eu_hal_init; - halfunc->hal_deinit = &rtl8188eu_hal_deinit; - - halfunc->inirp_init = &rtl8188eu_inirp_init; - halfunc->inirp_deinit = &rtl8188eu_inirp_deinit; - - halfunc->init_xmit_priv = &rtl8188eu_init_xmit_priv; - - halfunc->init_recv_priv = &rtl8188eu_init_recv_priv; - halfunc->free_recv_priv = &rtl8188eu_free_recv_priv; - halfunc->InitSwLeds = &rtl8188eu_InitSwLeds; - halfunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds; - - halfunc->init_default_value = &rtl8188eu_init_default_value; - halfunc->intf_chip_configure = &rtl8188eu_interface_configure; - halfunc->read_adapter_info = &ReadAdapterInfo8188EU; - - halfunc->SetHwRegHandler = &SetHwReg8188EU; - halfunc->GetHwRegHandler = &GetHwReg8188EU; - halfunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb; - halfunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb; - - halfunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb; - halfunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb; - - halfunc->hal_xmit = &rtl8188eu_hal_xmit; - halfunc->mgnt_xmit = &rtl8188eu_mgnt_xmit; - - halfunc->interface_ps_func = &rtl8188eu_ps_func; - - rtl8188e_set_hal_ops(halfunc); - } diff --git a/drivers/staging/r8188eu/hal/usb_ops_linux.c b/drivers/staging/r8188eu/hal/usb_ops_linux.c index 0cf69033c529..e4a9350376bf 100644 --- a/drivers/staging/r8188eu/hal/usb_ops_linux.c +++ b/drivers/staging/r8188eu/hal/usb_ops_linux.c @@ -8,159 +8,179 @@ #include "../include/recv_osdep.h" #include "../include/rtl8188e_hal.h" -static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u16 value, void *pdata, u16 len, u8 requesttype) +static int usb_read(struct intf_hdl *intf, u16 value, void *data, u8 size) { - struct adapter *adapt = pintfhdl->padapter; - struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt); + struct adapter *adapt = intf->padapter; + struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt); struct usb_device *udev = dvobjpriv->pusbdev; - unsigned int pipe; - int status = 0; - u8 *pIo_buf; - int vendorreq_times = 0; - - if ((adapt->bSurpriseRemoved) || (adapt->pwrctrlpriv.pnp_bstop_trx)) { - status = -EPERM; - goto exit; + int status; + u8 io_buf[4]; + + if (adapt->bSurpriseRemoved || adapt->pwrctrlpriv.pnp_bstop_trx) + return -EPERM; + + status = usb_control_msg_recv(udev, 0, REALTEK_USB_VENQT_CMD_REQ, + REALTEK_USB_VENQT_READ, value, + REALTEK_USB_VENQT_CMD_IDX, io_buf, + size, RTW_USB_CONTROL_MSG_TIMEOUT, + GFP_KERNEL); + + if (status == -ESHUTDOWN || + status == -ENODEV || + status == -ENOENT) { + /* + * device or controller has been disabled due to + * some problem that could not be worked around, + * device or bus doesn’t exist, endpoint does not + * exist or is not enabled. + */ + adapt->bSurpriseRemoved = true; + return status; } - if (len > MAX_VENDOR_REQ_CMD_SIZE) { - DBG_88E("[%s] Buffer len error ,vendor request failed\n", __func__); - status = -EINVAL; - goto exit; + if (status < 0) { + if (rtw_inc_and_chk_continual_urb_error(dvobjpriv)) + adapt->bSurpriseRemoved = true; + + return status; } - _enter_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL); + rtw_reset_continual_urb_error(dvobjpriv); + memcpy(data, io_buf, size); - /* Acquire IO memory for vendorreq */ - pIo_buf = dvobjpriv->usb_vendor_req_buf; + return status; +} - if (!pIo_buf) { - DBG_88E("[%s] pIo_buf == NULL\n", __func__); - status = -ENOMEM; - goto release_mutex; +static int usb_write(struct intf_hdl *intf, u16 value, void *data, u8 size) +{ + struct adapter *adapt = intf->padapter; + struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt); + struct usb_device *udev = dvobjpriv->pusbdev; + int status; + u8 io_buf[VENDOR_CMD_MAX_DATA_LEN]; + + if (adapt->bSurpriseRemoved || adapt->pwrctrlpriv.pnp_bstop_trx) + return -EPERM; + + memcpy(io_buf, data, size); + status = usb_control_msg_send(udev, 0, REALTEK_USB_VENQT_CMD_REQ, + REALTEK_USB_VENQT_WRITE, value, + REALTEK_USB_VENQT_CMD_IDX, io_buf, + size, RTW_USB_CONTROL_MSG_TIMEOUT, + GFP_KERNEL); + + if (status == -ESHUTDOWN || + status == -ENODEV || + status == -ENOENT) { + /* + * device or controller has been disabled due to + * some problem that could not be worked around, + * device or bus doesn’t exist, endpoint does not + * exist or is not enabled. + */ + adapt->bSurpriseRemoved = true; + return status; } - if (requesttype == REALTEK_USB_VENQT_READ) - pipe = usb_rcvctrlpipe(udev, 0);/* read_in */ - else - pipe = usb_sndctrlpipe(udev, 0);/* write_out */ - - while (++vendorreq_times <= MAX_USBCTRL_VENDORREQ_TIMES) { - if (requesttype == REALTEK_USB_VENQT_READ) - memset(pIo_buf, 0, len); - else - memcpy(pIo_buf, pdata, len); - - status = usb_control_msg(udev, pipe, REALTEK_USB_VENQT_CMD_REQ, - requesttype, value, REALTEK_USB_VENQT_CMD_IDX, - pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT); - - if (status == len) { /* Success this control transfer. */ - rtw_reset_continual_urb_error(dvobjpriv); - if (requesttype == REALTEK_USB_VENQT_READ) - memcpy(pdata, pIo_buf, len); - } else { /* error cases */ - DBG_88E("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n", - value, (requesttype == REALTEK_USB_VENQT_READ) ? "read" : "write", - len, status, *(u32 *)pdata, vendorreq_times); - - if (status < 0) { - if (status == (-ESHUTDOWN) || status == -ENODEV) { - adapt->bSurpriseRemoved = true; - } else { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - haldata->srestpriv.wifi_error_status = USB_VEN_REQ_CMD_FAIL; - } - } else { /* status != len && status >= 0 */ - if (status > 0) { - if (requesttype == REALTEK_USB_VENQT_READ) { - /* For Control read transfer, we have to copy the read data from pIo_buf to pdata. */ - memcpy(pdata, pIo_buf, len); - } - } - } + if (status < 0) { + if (rtw_inc_and_chk_continual_urb_error(dvobjpriv)) + adapt->bSurpriseRemoved = true; - if (rtw_inc_and_chk_continual_urb_error(dvobjpriv)) { - adapt->bSurpriseRemoved = true; - break; - } + return status; + } - } + rtw_reset_continual_urb_error(dvobjpriv); - /* firmware download is checksumed, don't retry */ - if ((value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len) - break; - } -release_mutex: - _exit_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL); -exit: return status; } -static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) +u8 rtw_read8(struct adapter *adapter, u32 addr) { - u16 wvalue = (u16)(addr & 0x0000ffff); + struct io_priv *io_priv = &adapter->iopriv; + struct intf_hdl *intf = &io_priv->intf; + u16 value = addr & 0xffff; u8 data; - usbctrl_vendorreq(pintfhdl, wvalue, &data, 1, REALTEK_USB_VENQT_READ); + usb_read(intf, value, &data, 1); return data; } -static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) +u16 rtw_read16(struct adapter *adapter, u32 addr) { - u16 wvalue = (u16)(addr & 0x0000ffff); - __le32 data; + struct io_priv *io_priv = &adapter->iopriv; + struct intf_hdl *intf = &io_priv->intf; + u16 value = addr & 0xffff; + __le16 data; - usbctrl_vendorreq(pintfhdl, wvalue, &data, 2, REALTEK_USB_VENQT_READ); + usb_read(intf, value, &data, 2); - return (u16)(le32_to_cpu(data) & 0xffff); + return le16_to_cpu(data); } -static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) +u32 rtw_read32(struct adapter *adapter, u32 addr) { - u16 wvalue = (u16)(addr & 0x0000ffff); + struct io_priv *io_priv = &adapter->iopriv; + struct intf_hdl *intf = &io_priv->intf; + u16 value = addr & 0xffff; __le32 data; - usbctrl_vendorreq(pintfhdl, wvalue, &data, 4, REALTEK_USB_VENQT_READ); + usb_read(intf, value, &data, 4); return le32_to_cpu(data); } -static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) +int rtw_write8(struct adapter *adapter, u32 addr, u8 val) { - u16 wvalue = (u16)(addr & 0x0000ffff); + struct io_priv *io_priv = &adapter->iopriv; + struct intf_hdl *intf = &io_priv->intf; + u16 value = addr & 0xffff; + int ret; - return usbctrl_vendorreq(pintfhdl, wvalue, &val, 1, REALTEK_USB_VENQT_WRITE); + ret = usb_write(intf, value, &val, 1); + + return RTW_STATUS_CODE(ret); } -static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) +int rtw_write16(struct adapter *adapter, u32 addr, u16 val) { - u16 wvalue = (u16)(addr & 0x0000ffff); - __le32 data = cpu_to_le32(val & 0x0000ffff); + struct io_priv *io_priv = &adapter->iopriv; + struct intf_hdl *intf = &io_priv->intf; + u16 value = addr & 0xffff; + __le16 data = cpu_to_le16(val); + int ret; + + ret = usb_write(intf, value, &data, 2); - return usbctrl_vendorreq(pintfhdl, wvalue, &data, 2, REALTEK_USB_VENQT_WRITE); + return RTW_STATUS_CODE(ret); } -static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) +int rtw_write32(struct adapter *adapter, u32 addr, u32 val) { - u16 wvalue = (u16)(addr & 0x0000ffff); + struct io_priv *io_priv = &adapter->iopriv; + struct intf_hdl *intf = &io_priv->intf; + u16 value = addr & 0xffff; __le32 data = cpu_to_le32(val); + int ret; - return usbctrl_vendorreq(pintfhdl, wvalue, &data, 4, REALTEK_USB_VENQT_WRITE); + ret = usb_write(intf, value, &data, 4); + + return RTW_STATUS_CODE(ret); } -static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata) +int rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *data) { - u16 wvalue = (u16)(addr & 0x0000ffff); - u8 buf[VENDOR_CMD_MAX_DATA_LEN] = {0}; + struct io_priv *io_priv = &adapter->iopriv; + struct intf_hdl *intf = &io_priv->intf; + u16 value = addr & 0xffff; + int ret; if (length > VENDOR_CMD_MAX_DATA_LEN) - return -EINVAL; + return _FAIL; - memcpy(buf, pdata, length); + ret = usb_write(intf, value, data, length); - return usbctrl_vendorreq(pintfhdl, wvalue, buf, (length & 0xffff), REALTEK_USB_VENQT_WRITE); + return RTW_STATUS_CODE(ret); } static void interrupt_handler_8188eu(struct adapter *adapt, u16 pkt_len, u8 *pbuf) @@ -415,10 +435,6 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) break; case -EPROTO: case -EOVERFLOW: - { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - haldata->srestpriv.wifi_error_status = USB_READ_PORT_FAIL; - } precvbuf->reuse = true; rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); break; @@ -431,11 +447,10 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) } } -static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) +u32 rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *rmem) { struct urb *purb = NULL; struct recv_buf *precvbuf = (struct recv_buf *)rmem; - struct adapter *adapter = pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); struct recv_priv *precvpriv = &adapter->recvpriv; struct usb_device *pusbd = pdvobj->pusbdev; @@ -458,7 +473,7 @@ static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) precvbuf->reuse = true; } - rtl8188eu_init_recvbuf(adapter, precvbuf); + rtl8188eu_init_recvbuf(precvbuf); /* re-assign for linux based on skb */ if (!precvbuf->reuse || !precvbuf->pskb) { @@ -533,30 +548,3 @@ void rtl8188eu_xmit_tasklet(unsigned long priv) break; } } - -void rtl8188eu_set_intf_ops(struct _io_ops *pops) -{ - - memset((u8 *)pops, 0, sizeof(struct _io_ops)); - pops->_read8 = &usb_read8; - pops->_read16 = &usb_read16; - pops->_read32 = &usb_read32; - pops->_read_mem = &usb_read_mem; - pops->_read_port = &usb_read_port; - pops->_write8 = &usb_write8; - pops->_write16 = &usb_write16; - pops->_write32 = &usb_write32; - pops->_writeN = &usb_writeN; - pops->_write_mem = &usb_write_mem; - pops->_write_port = &usb_write_port; - pops->_read_port_cancel = &usb_read_port_cancel; - pops->_write_port_cancel = &usb_write_port_cancel; - -} - -void rtl8188eu_set_hw_type(struct adapter *adapt) -{ - adapt->chip_type = RTL8188E; - adapt->HardwareType = HARDWARE_TYPE_RTL8188EU; - DBG_88E("CHIP TYPE: RTL8188E\n"); -} |