diff options
Diffstat (limited to 'drivers/staging/rtl8188eu/hal/odm_rtl8188e.c')
| -rw-r--r-- | drivers/staging/rtl8188eu/hal/odm_rtl8188e.c | 82 |
1 files changed, 43 insertions, 39 deletions
diff --git a/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c b/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c index 251bd8aba3b1..a55a0d8b9fb7 100644 --- a/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c +++ b/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c @@ -154,35 +154,37 @@ void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant) struct adapter *adapter = dm_odm->Adapter; u32 default_ant, optional_ant; - if (dm_fat_tbl->RxIdleAnt != ant) { - if (ant == MAIN_ANT) { - default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; - optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; - } else { - default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; - optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; - } + if (dm_fat_tbl->RxIdleAnt == ant) + return; - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(5) | BIT(4) | BIT(3), default_ant); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(8) | BIT(7) | BIT(6), optional_ant); - phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N, - BIT(14) | BIT(13) | BIT(12), default_ant); - phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N, - BIT(6) | BIT(7), default_ant); - } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(5) | BIT(4) | BIT(3), default_ant); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(8) | BIT(7) | BIT(6), optional_ant); - } + if (ant == MAIN_ANT) { + default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? + MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; + optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? + AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; + } else { + default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? + AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; + optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? + MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; + } + + if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, + BIT(5) | BIT(4) | BIT(3), default_ant); + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, + BIT(8) | BIT(7) | BIT(6), optional_ant); + phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N, + BIT(14) | BIT(13) | BIT(12), default_ant); + phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N, + BIT(6) | BIT(7), default_ant); + } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, + BIT(5) | BIT(4) | BIT(3), default_ant); + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, + BIT(8) | BIT(7) | BIT(6), optional_ant); } + dm_fat_tbl->RxIdleAnt = ant; } @@ -303,6 +305,7 @@ void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm) if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV)) return; + if (!dm_odm->bLinked) { ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n")); @@ -318,19 +321,20 @@ void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm) dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; } return; - } else { - if (!dm_fat_tbl->bBecomeLinked) { - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("Need to Turn on HW AntDiv\n")); - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 1); - phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, - BIT(15), 1); - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, - BIT(21), 1); - dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; - } } + + if (!dm_fat_tbl->bBecomeLinked) { + ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("Need to Turn on HW AntDiv\n")); + phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 1); + phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, + BIT(15), 1); + if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) + phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, + BIT(21), 1); + dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; + } + if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) rtl88eu_dm_hw_ant_div(dm_odm); |