diff options
Diffstat (limited to 'drivers/staging/rtl8188eu/hal')
23 files changed, 0 insertions, 9876 deletions
diff --git a/drivers/staging/rtl8188eu/hal/bb_cfg.c b/drivers/staging/rtl8188eu/hal/bb_cfg.c deleted file mode 100644 index 51882858fcf0..000000000000 --- a/drivers/staging/rtl8188eu/hal/bb_cfg.c +++ /dev/null @@ -1,681 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include "odm_precomp.h" - -#include <phy.h> - -/* AGC_TAB_1T.TXT */ - -static u32 array_agc_tab_1t_8188e[] = { - 0xC78, 0xFB000001, - 0xC78, 0xFB010001, - 0xC78, 0xFB020001, - 0xC78, 0xFB030001, - 0xC78, 0xFB040001, - 0xC78, 0xFB050001, - 0xC78, 0xFA060001, - 0xC78, 0xF9070001, - 0xC78, 0xF8080001, - 0xC78, 0xF7090001, - 0xC78, 0xF60A0001, - 0xC78, 0xF50B0001, - 0xC78, 0xF40C0001, - 0xC78, 0xF30D0001, - 0xC78, 0xF20E0001, - 0xC78, 0xF10F0001, - 0xC78, 0xF0100001, - 0xC78, 0xEF110001, - 0xC78, 0xEE120001, - 0xC78, 0xED130001, - 0xC78, 0xEC140001, - 0xC78, 0xEB150001, - 0xC78, 0xEA160001, - 0xC78, 0xE9170001, - 0xC78, 0xE8180001, - 0xC78, 0xE7190001, - 0xC78, 0xE61A0001, - 0xC78, 0xE51B0001, - 0xC78, 0xE41C0001, - 0xC78, 0xE31D0001, - 0xC78, 0xE21E0001, - 0xC78, 0xE11F0001, - 0xC78, 0x8A200001, - 0xC78, 0x89210001, - 0xC78, 0x88220001, - 0xC78, 0x87230001, - 0xC78, 0x86240001, - 0xC78, 0x85250001, - 0xC78, 0x84260001, - 0xC78, 0x83270001, - 0xC78, 0x82280001, - 0xC78, 0x6B290001, - 0xC78, 0x6A2A0001, - 0xC78, 0x692B0001, - 0xC78, 0x682C0001, - 0xC78, 0x672D0001, - 0xC78, 0x662E0001, - 0xC78, 0x652F0001, - 0xC78, 0x64300001, - 0xC78, 0x63310001, - 0xC78, 0x62320001, - 0xC78, 0x61330001, - 0xC78, 0x46340001, - 0xC78, 0x45350001, - 0xC78, 0x44360001, - 0xC78, 0x43370001, - 0xC78, 0x42380001, - 0xC78, 0x41390001, - 0xC78, 0x403A0001, - 0xC78, 0x403B0001, - 0xC78, 0x403C0001, - 0xC78, 0x403D0001, - 0xC78, 0x403E0001, - 0xC78, 0x403F0001, - 0xC78, 0xFB400001, - 0xC78, 0xFB410001, - 0xC78, 0xFB420001, - 0xC78, 0xFB430001, - 0xC78, 0xFB440001, - 0xC78, 0xFB450001, - 0xC78, 0xFB460001, - 0xC78, 0xFB470001, - 0xC78, 0xFB480001, - 0xC78, 0xFA490001, - 0xC78, 0xF94A0001, - 0xC78, 0xF84B0001, - 0xC78, 0xF74C0001, - 0xC78, 0xF64D0001, - 0xC78, 0xF54E0001, - 0xC78, 0xF44F0001, - 0xC78, 0xF3500001, - 0xC78, 0xF2510001, - 0xC78, 0xF1520001, - 0xC78, 0xF0530001, - 0xC78, 0xEF540001, - 0xC78, 0xEE550001, - 0xC78, 0xED560001, - 0xC78, 0xEC570001, - 0xC78, 0xEB580001, - 0xC78, 0xEA590001, - 0xC78, 0xE95A0001, - 0xC78, 0xE85B0001, - 0xC78, 0xE75C0001, - 0xC78, 0xE65D0001, - 0xC78, 0xE55E0001, - 0xC78, 0xE45F0001, - 0xC78, 0xE3600001, - 0xC78, 0xE2610001, - 0xC78, 0xC3620001, - 0xC78, 0xC2630001, - 0xC78, 0xC1640001, - 0xC78, 0x8B650001, - 0xC78, 0x8A660001, - 0xC78, 0x89670001, - 0xC78, 0x88680001, - 0xC78, 0x87690001, - 0xC78, 0x866A0001, - 0xC78, 0x856B0001, - 0xC78, 0x846C0001, - 0xC78, 0x676D0001, - 0xC78, 0x666E0001, - 0xC78, 0x656F0001, - 0xC78, 0x64700001, - 0xC78, 0x63710001, - 0xC78, 0x62720001, - 0xC78, 0x61730001, - 0xC78, 0x60740001, - 0xC78, 0x46750001, - 0xC78, 0x45760001, - 0xC78, 0x44770001, - 0xC78, 0x43780001, - 0xC78, 0x42790001, - 0xC78, 0x417A0001, - 0xC78, 0x407B0001, - 0xC78, 0x407C0001, - 0xC78, 0x407D0001, - 0xC78, 0x407E0001, - 0xC78, 0x407F0001, -}; - -static bool set_baseband_agc_config(struct adapter *adapt) -{ - u32 i; - const u32 arraylen = ARRAY_SIZE(array_agc_tab_1t_8188e); - u32 *array = array_agc_tab_1t_8188e; - - for (i = 0; i < arraylen; i += 2) { - u32 v1 = array[i]; - u32 v2 = array[i + 1]; - - if (v1 < 0xCDCDCDCD) { - phy_set_bb_reg(adapt, v1, bMaskDWord, v2); - udelay(1); - } - } - return true; -} - -/* PHY_REG_1T.TXT */ - -static u32 array_phy_reg_1t_8188e[] = { - 0x800, 0x80040000, - 0x804, 0x00000003, - 0x808, 0x0000FC00, - 0x80C, 0x0000000A, - 0x810, 0x10001331, - 0x814, 0x020C3D10, - 0x818, 0x02200385, - 0x81C, 0x00000000, - 0x820, 0x01000100, - 0x824, 0x00390204, - 0x828, 0x00000000, - 0x82C, 0x00000000, - 0x830, 0x00000000, - 0x834, 0x00000000, - 0x838, 0x00000000, - 0x83C, 0x00000000, - 0x840, 0x00010000, - 0x844, 0x00000000, - 0x848, 0x00000000, - 0x84C, 0x00000000, - 0x850, 0x00000000, - 0x854, 0x00000000, - 0x858, 0x569A11A9, - 0x85C, 0x01000014, - 0x860, 0x66F60110, - 0x864, 0x061F0649, - 0x868, 0x00000000, - 0x86C, 0x27272700, - 0x870, 0x07000760, - 0x874, 0x25004000, - 0x878, 0x00000808, - 0x87C, 0x00000000, - 0x880, 0xB0000C1C, - 0x884, 0x00000001, - 0x888, 0x00000000, - 0x88C, 0xCCC000C0, - 0x890, 0x00000800, - 0x894, 0xFFFFFFFE, - 0x898, 0x40302010, - 0x89C, 0x00706050, - 0x900, 0x00000000, - 0x904, 0x00000023, - 0x908, 0x00000000, - 0x90C, 0x81121111, - 0x910, 0x00000002, - 0x914, 0x00000201, - 0xA00, 0x00D047C8, - 0xA04, 0x80FF000C, - 0xA08, 0x8C838300, - 0xA0C, 0x2E7F120F, - 0xA10, 0x9500BB78, - 0xA14, 0x1114D028, - 0xA18, 0x00881117, - 0xA1C, 0x89140F00, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, - 0xA2C, 0x00D30000, - 0xA70, 0x101FBF00, - 0xA74, 0x00000007, - 0xA78, 0x00000900, - 0xA7C, 0x225B0606, - 0xA80, 0x218075B1, - 0xB2C, 0x80000000, - 0xC00, 0x48071D40, - 0xC04, 0x03A05611, - 0xC08, 0x000000E4, - 0xC0C, 0x6C6C6C6C, - 0xC10, 0x08800000, - 0xC14, 0x40000100, - 0xC18, 0x08800000, - 0xC1C, 0x40000100, - 0xC20, 0x00000000, - 0xC24, 0x00000000, - 0xC28, 0x00000000, - 0xC2C, 0x00000000, - 0xC30, 0x69E9AC47, - 0xC34, 0x469652AF, - 0xC38, 0x49795994, - 0xC3C, 0x0A97971C, - 0xC40, 0x1F7C403F, - 0xC44, 0x000100B7, - 0xC48, 0xEC020107, - 0xC4C, 0x007F037F, - 0xC50, 0x69553420, - 0xC54, 0x43BC0094, - 0xC58, 0x00013169, - 0xC5C, 0x00250492, - 0xC60, 0x00000000, - 0xC64, 0x7112848B, - 0xC68, 0x47C00BFF, - 0xC6C, 0x00000036, - 0xC70, 0x2C7F000D, - 0xC74, 0x020610DB, - 0xC78, 0x0000001F, - 0xC7C, 0x00B91612, - 0xC80, 0x390000E4, - 0xC84, 0x20F60000, - 0xC88, 0x40000100, - 0xC8C, 0x20200000, - 0xC90, 0x00091521, - 0xC94, 0x00000000, - 0xC98, 0x00121820, - 0xC9C, 0x00007F7F, - 0xCA0, 0x00000000, - 0xCA4, 0x000300A0, - 0xCA8, 0x00000000, - 0xCAC, 0x00000000, - 0xCB0, 0x00000000, - 0xCB4, 0x00000000, - 0xCB8, 0x00000000, - 0xCBC, 0x28000000, - 0xCC0, 0x00000000, - 0xCC4, 0x00000000, - 0xCC8, 0x00000000, - 0xCCC, 0x00000000, - 0xCD0, 0x00000000, - 0xCD4, 0x00000000, - 0xCD8, 0x64B22427, - 0xCDC, 0x00766932, - 0xCE0, 0x00222222, - 0xCE4, 0x00000000, - 0xCE8, 0x37644302, - 0xCEC, 0x2F97D40C, - 0xD00, 0x00000740, - 0xD04, 0x00020401, - 0xD08, 0x0000907F, - 0xD0C, 0x20010201, - 0xD10, 0xA0633333, - 0xD14, 0x3333BC43, - 0xD18, 0x7A8F5B6F, - 0xD2C, 0xCC979975, - 0xD30, 0x00000000, - 0xD34, 0x80608000, - 0xD38, 0x00000000, - 0xD3C, 0x00127353, - 0xD40, 0x00000000, - 0xD44, 0x00000000, - 0xD48, 0x00000000, - 0xD4C, 0x00000000, - 0xD50, 0x6437140A, - 0xD54, 0x00000000, - 0xD58, 0x00000282, - 0xD5C, 0x30032064, - 0xD60, 0x4653DE68, - 0xD64, 0x04518A3C, - 0xD68, 0x00002101, - 0xD6C, 0x2A201C16, - 0xD70, 0x1812362E, - 0xD74, 0x322C2220, - 0xD78, 0x000E3C24, - 0xE00, 0x2D2D2D2D, - 0xE04, 0x2D2D2D2D, - 0xE08, 0x0390272D, - 0xE10, 0x2D2D2D2D, - 0xE14, 0x2D2D2D2D, - 0xE18, 0x2D2D2D2D, - 0xE1C, 0x2D2D2D2D, - 0xE28, 0x00000000, - 0xE30, 0x1000DC1F, - 0xE34, 0x10008C1F, - 0xE38, 0x02140102, - 0xE3C, 0x681604C2, - 0xE40, 0x01007C00, - 0xE44, 0x01004800, - 0xE48, 0xFB000000, - 0xE4C, 0x000028D1, - 0xE50, 0x1000DC1F, - 0xE54, 0x10008C1F, - 0xE58, 0x02140102, - 0xE5C, 0x28160D05, - 0xE60, 0x00000008, - 0xE68, 0x001B25A4, - 0xE6C, 0x00C00014, - 0xE70, 0x00C00014, - 0xE74, 0x01000014, - 0xE78, 0x01000014, - 0xE7C, 0x01000014, - 0xE80, 0x01000014, - 0xE84, 0x00C00014, - 0xE88, 0x01000014, - 0xE8C, 0x00C00014, - 0xED0, 0x00C00014, - 0xED4, 0x00C00014, - 0xED8, 0x00C00014, - 0xEDC, 0x00000014, - 0xEE0, 0x00000014, - 0xEEC, 0x01C00014, - 0xF14, 0x00000003, - 0xF4C, 0x00000000, - 0xF00, 0x00000300, -}; - -static void rtl_bb_delay(struct adapter *adapt, u32 addr, u32 data) -{ - if (addr == 0xfe) { - msleep(50); - } else if (addr == 0xfd) { - mdelay(5); - } else if (addr == 0xfc) { - mdelay(1); - } else if (addr == 0xfb) { - udelay(50); - } else if (addr == 0xfa) { - udelay(5); - } else if (addr == 0xf9) { - udelay(1); - } else { - phy_set_bb_reg(adapt, addr, bMaskDWord, data); - /* Add 1us delay between BB/RF register setting. */ - udelay(1); - } -} - -static bool set_baseband_phy_config(struct adapter *adapt) -{ - u32 i; - const u32 arraylen = ARRAY_SIZE(array_phy_reg_1t_8188e); - u32 *array = array_phy_reg_1t_8188e; - - for (i = 0; i < arraylen; i += 2) { - u32 v1 = array[i]; - u32 v2 = array[i + 1]; - - if (v1 < 0xCDCDCDCD) - rtl_bb_delay(adapt, v1, v2); - } - return true; -} - -/* PHY_REG_PG.TXT */ - -static u32 array_phy_reg_pg_8188e[] = { - 0xE00, 0xFFFFFFFF, 0x06070809, - 0xE04, 0xFFFFFFFF, 0x02020405, - 0xE08, 0x0000FF00, 0x00000006, - 0x86C, 0xFFFFFF00, 0x00020400, - 0xE10, 0xFFFFFFFF, 0x08090A0B, - 0xE14, 0xFFFFFFFF, 0x01030607, - 0xE18, 0xFFFFFFFF, 0x08090A0B, - 0xE1C, 0xFFFFFFFF, 0x01030607, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x02020202, - 0xE04, 0xFFFFFFFF, 0x00020202, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x04040404, - 0xE14, 0xFFFFFFFF, 0x00020404, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x02020202, - 0xE04, 0xFFFFFFFF, 0x00020202, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x04040404, - 0xE14, 0xFFFFFFFF, 0x00020404, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x02020202, - 0xE04, 0xFFFFFFFF, 0x00020202, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x04040404, - 0xE14, 0xFFFFFFFF, 0x00020404, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - -}; - -static void store_pwrindex_offset(struct adapter *adapter, - u32 regaddr, u32 bitmask, u32 data) -{ - struct hal_data_8188e *hal_data = adapter->HalData; - u32 * const power_level_offset = - hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt]; - - if (regaddr == rTxAGC_A_Rate18_06) - power_level_offset[0] = data; - if (regaddr == rTxAGC_A_Rate54_24) - power_level_offset[1] = data; - if (regaddr == rTxAGC_A_CCK1_Mcs32) - power_level_offset[6] = data; - if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00) - power_level_offset[7] = data; - if (regaddr == rTxAGC_A_Mcs03_Mcs00) - power_level_offset[2] = data; - if (regaddr == rTxAGC_A_Mcs07_Mcs04) - power_level_offset[3] = data; - if (regaddr == rTxAGC_A_Mcs11_Mcs08) - power_level_offset[4] = data; - if (regaddr == rTxAGC_A_Mcs15_Mcs12) { - power_level_offset[5] = data; - hal_data->pwrGroupCnt++; - } - if (regaddr == rTxAGC_B_Rate18_06) - power_level_offset[8] = data; - if (regaddr == rTxAGC_B_Rate54_24) - power_level_offset[9] = data; - if (regaddr == rTxAGC_B_CCK1_55_Mcs32) - power_level_offset[14] = data; - if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) - power_level_offset[15] = data; - if (regaddr == rTxAGC_B_Mcs03_Mcs00) - power_level_offset[10] = data; - if (regaddr == rTxAGC_B_Mcs07_Mcs04) - power_level_offset[11] = data; - if (regaddr == rTxAGC_B_Mcs11_Mcs08) - power_level_offset[12] = data; - if (regaddr == rTxAGC_B_Mcs15_Mcs12) - power_level_offset[13] = data; -} - -static void rtl_addr_delay(struct adapter *adapt, - u32 addr, u32 bit_mask, u32 data) -{ - switch (addr) { - case 0xfe: - msleep(50); - break; - case 0xfd: - mdelay(5); - break; - case 0xfc: - mdelay(1); - break; - case 0xfb: - udelay(50); - break; - case 0xfa: - udelay(5); - break; - case 0xf9: - udelay(1); - break; - default: - store_pwrindex_offset(adapt, addr, bit_mask, data); - } -} - -static bool config_bb_with_pgheader(struct adapter *adapt) -{ - u32 i; - const u32 arraylen = ARRAY_SIZE(array_phy_reg_pg_8188e); - u32 *array = array_phy_reg_pg_8188e; - - for (i = 0; i < arraylen; i += 3) { - u32 v1 = array[i]; - u32 v2 = array[i + 1]; - u32 v3 = array[i + 2]; - - if (v1 < 0xCDCDCDCD) - rtl_addr_delay(adapt, v1, v2, v3); - } - return true; -} - -static void rtl88e_phy_init_bb_rf_register_definition(struct adapter *adapter) -{ - struct bb_reg_def *reg[4]; - - reg[RF_PATH_A] = &adapter->HalData->PHYRegDef[RF_PATH_A]; - reg[RF_PATH_B] = &adapter->HalData->PHYRegDef[RF_PATH_B]; - - reg[RF_PATH_A]->rfintfs = rFPGA0_XAB_RFInterfaceSW; - reg[RF_PATH_B]->rfintfs = rFPGA0_XAB_RFInterfaceSW; - - reg[RF_PATH_A]->rfintfi = rFPGA0_XAB_RFInterfaceRB; - reg[RF_PATH_B]->rfintfi = rFPGA0_XAB_RFInterfaceRB; - - reg[RF_PATH_A]->rfintfo = rFPGA0_XA_RFInterfaceOE; - reg[RF_PATH_B]->rfintfo = rFPGA0_XB_RFInterfaceOE; - - reg[RF_PATH_A]->rfintfe = rFPGA0_XA_RFInterfaceOE; - reg[RF_PATH_B]->rfintfe = rFPGA0_XB_RFInterfaceOE; - - reg[RF_PATH_A]->rf3wireOffset = rFPGA0_XA_LSSIParameter; - reg[RF_PATH_B]->rf3wireOffset = rFPGA0_XB_LSSIParameter; - - reg[RF_PATH_A]->rfLSSI_Select = rFPGA0_XAB_RFParameter; - reg[RF_PATH_B]->rfLSSI_Select = rFPGA0_XAB_RFParameter; - - reg[RF_PATH_A]->rfTxGainStage = rFPGA0_TxGainStage; - reg[RF_PATH_B]->rfTxGainStage = rFPGA0_TxGainStage; - - reg[RF_PATH_A]->rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; - reg[RF_PATH_B]->rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; - - reg[RF_PATH_A]->rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; - reg[RF_PATH_B]->rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; - - reg[RF_PATH_A]->rfSwitchControl = rFPGA0_XAB_SwitchControl; - reg[RF_PATH_B]->rfSwitchControl = rFPGA0_XAB_SwitchControl; - - reg[RF_PATH_A]->rfAGCControl1 = rOFDM0_XAAGCCore1; - reg[RF_PATH_B]->rfAGCControl1 = rOFDM0_XBAGCCore1; - - reg[RF_PATH_A]->rfAGCControl2 = rOFDM0_XAAGCCore2; - reg[RF_PATH_B]->rfAGCControl2 = rOFDM0_XBAGCCore2; - - reg[RF_PATH_A]->rfRxIQImbalance = rOFDM0_XARxIQImbalance; - reg[RF_PATH_B]->rfRxIQImbalance = rOFDM0_XBRxIQImbalance; - - reg[RF_PATH_A]->rfRxAFE = rOFDM0_XARxAFE; - reg[RF_PATH_B]->rfRxAFE = rOFDM0_XBRxAFE; - - reg[RF_PATH_A]->rfTxIQImbalance = rOFDM0_XATxIQImbalance; - reg[RF_PATH_B]->rfTxIQImbalance = rOFDM0_XBTxIQImbalance; - - reg[RF_PATH_A]->rfTxAFE = rOFDM0_XATxAFE; - reg[RF_PATH_B]->rfTxAFE = rOFDM0_XBTxAFE; - - reg[RF_PATH_A]->rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; - reg[RF_PATH_B]->rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; - - reg[RF_PATH_A]->rfLSSIReadBackPi = TransceiverA_HSPI_Readback; - reg[RF_PATH_B]->rfLSSIReadBackPi = TransceiverB_HSPI_Readback; -} - -static bool config_parafile(struct adapter *adapt) -{ - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt); - - set_baseband_phy_config(adapt); - - /* If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */ - if (!eeprom->bautoload_fail_flag) { - adapt->HalData->pwrGroupCnt = 0; - config_bb_with_pgheader(adapt); - } - set_baseband_agc_config(adapt); - return true; -} - -bool rtl88eu_phy_bb_config(struct adapter *adapt) -{ - bool rtstatus; - u32 regval; - u8 crystal_cap; - - rtl88e_phy_init_bb_rf_register_definition(adapt); - - /* Enable BB and RF */ - regval = usb_read16(adapt, REG_SYS_FUNC_EN); - usb_write16(adapt, REG_SYS_FUNC_EN, - (u16)(regval | BIT(13) | BIT(0) | BIT(1))); - - usb_write8(adapt, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB); - - usb_write8(adapt, REG_SYS_FUNC_EN, FEN_USBA | - FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); - - /* Config BB and AGC */ - rtstatus = config_parafile(adapt); - - /* write 0x24[16:11] = 0x24[22:17] = crystal_cap */ - crystal_cap = adapt->HalData->CrystalCap & 0x3F; - phy_set_bb_reg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, - (crystal_cap | (crystal_cap << 6))); - - return rtstatus; -} diff --git a/drivers/staging/rtl8188eu/hal/fw.c b/drivers/staging/rtl8188eu/hal/fw.c deleted file mode 100644 index 3d1d29e9f8e0..000000000000 --- a/drivers/staging/rtl8188eu/hal/fw.c +++ /dev/null @@ -1,202 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2009-2013 Realtek Corporation. - * - * Contact Information: - * wlanfae <wlanfae@realtek.com> - * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, - * Hsinchu 300, Taiwan. - * - * Larry Finger <Larry.Finger@lwfinger.net> - * - *****************************************************************************/ - -#include "fw.h" -#include "drv_types.h" -#include "usb_ops_linux.h" -#include "rtl8188e_spec.h" -#include "rtl8188e_hal.h" - -#include <linux/firmware.h> -#include <linux/slab.h> - -static void _rtl88e_enable_fw_download(struct adapter *adapt, bool enable) -{ - u8 tmp; - - if (enable) { - tmp = usb_read8(adapt, REG_MCUFWDL); - usb_write8(adapt, REG_MCUFWDL, tmp | 0x01); - - tmp = usb_read8(adapt, REG_MCUFWDL + 2); - usb_write8(adapt, REG_MCUFWDL + 2, tmp & 0xf7); - } else { - tmp = usb_read8(adapt, REG_MCUFWDL); - usb_write8(adapt, REG_MCUFWDL, tmp & 0xfe); - - usb_write8(adapt, REG_MCUFWDL + 1, 0x00); - } -} - -static void _rtl88e_fw_block_write(struct adapter *adapt, - const u8 *buffer, u32 size) -{ - u32 blk_sz = sizeof(u32); - const u8 *byte_buffer; - const u32 *dword_buffer = (u32 *)buffer; - u32 i, write_address, blk_cnt, remain; - - blk_cnt = size / blk_sz; - remain = size % blk_sz; - - write_address = FW_8192C_START_ADDRESS; - - for (i = 0; i < blk_cnt; i++, write_address += blk_sz) - usb_write32(adapt, write_address, dword_buffer[i]); - - byte_buffer = buffer + blk_cnt * blk_sz; - for (i = 0; i < remain; i++, write_address++) - usb_write8(adapt, write_address, byte_buffer[i]); -} - -static void _rtl88e_fw_page_write(struct adapter *adapt, - u32 page, const u8 *buffer, u32 size) -{ - u8 value8; - u8 u8page = (u8)(page & 0x07); - - value8 = (usb_read8(adapt, REG_MCUFWDL + 2) & 0xF8) | u8page; - - usb_write8(adapt, (REG_MCUFWDL + 2), value8); - _rtl88e_fw_block_write(adapt, buffer, size); -} - -static void _rtl88e_write_fw(struct adapter *adapt, u8 *buffer, u32 size) -{ - u8 *buf_ptr = buffer; - u32 page_no, remain; - u32 page, offset; - - page_no = size / FW_8192C_PAGE_SIZE; - remain = size % FW_8192C_PAGE_SIZE; - - for (page = 0; page < page_no; page++) { - offset = page * FW_8192C_PAGE_SIZE; - _rtl88e_fw_page_write(adapt, page, (buf_ptr + offset), - FW_8192C_PAGE_SIZE); - } - - if (remain) { - offset = page_no * FW_8192C_PAGE_SIZE; - page = page_no; - _rtl88e_fw_page_write(adapt, page, (buf_ptr + offset), remain); - } -} - -static void rtl88e_firmware_selfreset(struct adapter *adapt) -{ - u8 u1b_tmp; - - u1b_tmp = usb_read8(adapt, REG_SYS_FUNC_EN + 1); - usb_write8(adapt, REG_SYS_FUNC_EN + 1, (u1b_tmp & (~BIT(2)))); - usb_write8(adapt, REG_SYS_FUNC_EN + 1, (u1b_tmp | BIT(2))); -} - -static int _rtl88e_fw_free_to_go(struct adapter *adapt) -{ - int err = -EIO; - u32 counter = 0; - u32 value32; - - do { - value32 = usb_read32(adapt, REG_MCUFWDL); - if (value32 & FWDL_CHKSUM_RPT) - break; - } while (counter++ < POLLING_READY_TIMEOUT_COUNT); - - if (counter >= POLLING_READY_TIMEOUT_COUNT) - goto exit; - - value32 = usb_read32(adapt, REG_MCUFWDL); - value32 |= MCUFWDL_RDY; - value32 &= ~WINTINI_RDY; - usb_write32(adapt, REG_MCUFWDL, value32); - - rtl88e_firmware_selfreset(adapt); - counter = 0; - - do { - value32 = usb_read32(adapt, REG_MCUFWDL); - if (value32 & WINTINI_RDY) { - err = 0; - goto exit; - } - - udelay(FW_8192C_POLLING_DELAY); - - } while (counter++ < POLLING_READY_TIMEOUT_COUNT); - -exit: - return err; -} - -int rtl88eu_download_fw(struct adapter *adapt) -{ - struct dvobj_priv *dvobj = adapter_to_dvobj(adapt); - struct device *device = dvobj_to_dev(dvobj); - const struct firmware *fw; - static const char fw_name[] = "rtlwifi/rtl8188eufw.bin"; - struct rtl92c_firmware_header *pfwheader = NULL; - u8 *download_data, *fw_data; - size_t download_size; - unsigned int trailing_zeros_length; - - if (request_firmware(&fw, fw_name, device)) { - dev_err(device, "Firmware %s not available\n", fw_name); - return -ENOENT; - } - - if (fw->size > FW_8188E_SIZE) { - dev_err(device, "Firmware size exceed 0x%X. Check it.\n", - FW_8188E_SIZE); - release_firmware(fw); - return -1; - } - - trailing_zeros_length = (4 - fw->size % 4) % 4; - - fw_data = kmalloc(fw->size + trailing_zeros_length, GFP_KERNEL); - if (!fw_data) { - release_firmware(fw); - return -ENOMEM; - } - - memcpy(fw_data, fw->data, fw->size); - memset(fw_data + fw->size, 0, trailing_zeros_length); - - pfwheader = (struct rtl92c_firmware_header *)fw_data; - - if (IS_FW_HEADER_EXIST(pfwheader)) { - download_data = fw_data + 32; - download_size = fw->size + trailing_zeros_length - 32; - } else { - download_data = fw_data; - download_size = fw->size + trailing_zeros_length; - } - - release_firmware(fw); - - if (usb_read8(adapt, REG_MCUFWDL) & RAM_DL_SEL) { - usb_write8(adapt, REG_MCUFWDL, 0); - rtl88e_firmware_selfreset(adapt); - } - _rtl88e_enable_fw_download(adapt, true); - usb_write8(adapt, REG_MCUFWDL, - usb_read8(adapt, REG_MCUFWDL) | FWDL_CHKSUM_RPT); - _rtl88e_write_fw(adapt, download_data, download_size); - _rtl88e_enable_fw_download(adapt, false); - - kfree(fw_data); - return _rtl88e_fw_free_to_go(adapt); -} diff --git a/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c b/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c deleted file mode 100644 index 74fff76af16d..000000000000 --- a/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c +++ /dev/null @@ -1,646 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) Realtek Semiconductor Corp. All rights reserved. - */ - -#include "odm_precomp.h" - -/* Rate adaptive parameters */ - -static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE + 1] = { - {5, 4, 3, 2, 0, 3}, /* 92 , idx = 0 */ - {6, 5, 4, 3, 0, 4}, /* 86 , idx = 1 */ - {6, 5, 4, 2, 0, 4}, /* 81 , idx = 2 */ - {8, 7, 6, 4, 0, 6}, /* 75 , idx = 3 */ - {10, 9, 8, 6, 0, 8}, /* 71 , idx = 4 */ - {10, 9, 8, 4, 0, 8}, /* 66 , idx = 5 */ - {10, 9, 8, 2, 0, 8}, /* 62 , idx = 6 */ - {10, 9, 8, 0, 0, 8}, /* 59 , idx = 7 */ - {18, 17, 16, 8, 0, 16}, /* 53 , idx = 8 */ - {26, 25, 24, 16, 0, 24}, /* 50 , idx = 9 */ - {34, 33, 32, 24, 0, 32}, /* 47 , idx = 0x0a */ - {34, 31, 28, 20, 0, 32}, /* 43 , idx = 0x0b */ - {34, 31, 27, 18, 0, 32}, /* 40 , idx = 0x0c */ - {34, 31, 26, 16, 0, 32}, /* 37 , idx = 0x0d */ - {34, 30, 22, 16, 0, 32}, /* 32 , idx = 0x0e */ - {34, 30, 24, 16, 0, 32}, /* 26 , idx = 0x0f */ - {49, 46, 40, 16, 0, 48}, /* 20 , idx = 0x10 */ - {49, 45, 32, 0, 0, 48}, /* 17 , idx = 0x11 */ - {49, 45, 22, 18, 0, 48}, /* 15 , idx = 0x12 */ - {49, 40, 24, 16, 0, 48}, /* 12 , idx = 0x13 */ - {49, 32, 18, 12, 0, 48}, /* 9 , idx = 0x14 */ - {49, 22, 18, 14, 0, 48}, /* 6 , idx = 0x15 */ - {49, 16, 16, 0, 0, 48} - }; /* 3, idx = 0x16 */ - -static u8 PT_PENALTY[RETRYSIZE + 1] = {34, 31, 30, 24, 0, 32}; - -/* wilson modify */ -static u8 RETRY_PENALTY_IDX[2][RATESIZE] = { - {4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */ - 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d, - 5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f}, /* 0329 R01 */ - {0x0a, 0x0a, 0x0b, 0x0c, 0x0a, - 0x0a, 0x0b, 0x0c, 0x0d, 0x10, 0x13, 0x14, /* SS<TH */ - 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x11, 0x13, 0x15, - 9, 9, 9, 9, 0x0c, 0x0e, 0x11, 0x13} - }; - -static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = { - 0x0c, 0x0d, 0x0d, 0x0f, 0x0d, 0x0e, - 0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */ - 0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15, - 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15}; - -static u8 RSSI_THRESHOLD[RATESIZE] = { - 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0x24, 0x26, 0x2a, - 0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a, - 0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c}; - -static u16 N_THRESHOLD_HIGH[RATESIZE] = { - 4, 4, 8, 16, - 24, 36, 48, 72, 96, 144, 192, 216, - 60, 80, 100, 160, 240, 400, 560, 640, - 300, 320, 480, 720, 1000, 1200, 1600, 2000}; -static u16 N_THRESHOLD_LOW[RATESIZE] = { - 2, 2, 4, 8, - 12, 18, 24, 36, 48, 72, 96, 108, - 30, 40, 50, 80, 120, 200, 280, 320, - 150, 160, 240, 360, 500, 600, 800, 1000}; - -static u8 DROPING_NECESSARY[RATESIZE] = { - 1, 1, 1, 1, - 1, 2, 3, 4, 5, 6, 7, 8, - 1, 2, 3, 4, 5, 6, 7, 8, - 5, 6, 7, 8, 9, 10, 11, 12}; - -static u8 PendingForRateUpFail[5] = {2, 10, 24, 40, 60}; -static u16 DynamicTxRPTTiming[6] = { - 0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12, 0x927c}; /* 200ms-1200ms */ - -/* End Rate adaptive parameters */ - -static void odm_SetTxRPTTiming_8188E(struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo, u8 extend) -{ - u8 idx = 0; - - for (idx = 0; idx < 5; idx++) - if (DynamicTxRPTTiming[idx] == pRaInfo->RptTime) - break; - - if (extend == 0) { /* back to default timing */ - idx = 0; /* 200ms */ - } else if (extend == 1) {/* increase the timing */ - idx += 1; - if (idx > 5) - idx = 5; - } else if (extend == 2) {/* decrease the timing */ - if (idx != 0) - idx -= 1; - } - pRaInfo->RptTime = DynamicTxRPTTiming[idx]; -} - -static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo) -{ - u8 RateID, LowestRate, HighestRate; - u8 i; - - if (!pRaInfo) - return -1; - - RateID = pRaInfo->PreRate; - LowestRate = pRaInfo->LowestRate; - HighestRate = pRaInfo->HighestRate; - - if (RateID > HighestRate) { - RateID = HighestRate; - } else if (pRaInfo->RateSGI) { - pRaInfo->RateSGI = 0; - } else if (RateID > LowestRate) { - if (RateID > 0) { - for (i = RateID - 1; i > LowestRate; i--) { - if (pRaInfo->RAUseRate & BIT(i)) { - RateID = i; - goto RateDownFinish; - } - } - } - } else if (RateID <= LowestRate) { - RateID = LowestRate; - } -RateDownFinish: - if (pRaInfo->RAWaitingCounter == 1) { - pRaInfo->RAWaitingCounter += 1; - pRaInfo->RAPendingCounter += 1; - } else if (pRaInfo->RAWaitingCounter == 0) { - ; - } else { - pRaInfo->RAWaitingCounter = 0; - pRaInfo->RAPendingCounter = 0; - } - - if (pRaInfo->RAPendingCounter >= 4) - pRaInfo->RAPendingCounter = 4; - - pRaInfo->DecisionRate = RateID; - odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 2); - return 0; -} - -static int odm_RateUp_8188E(struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo) -{ - u8 RateID, HighestRate; - u8 i; - - if (!pRaInfo) - return -1; - - RateID = pRaInfo->PreRate; - HighestRate = pRaInfo->HighestRate; - if (pRaInfo->RAWaitingCounter == 1) { - pRaInfo->RAWaitingCounter = 0; - pRaInfo->RAPendingCounter = 0; - } else if (pRaInfo->RAWaitingCounter > 1) { - pRaInfo->PreRssiStaRA = pRaInfo->RssiStaRA; - goto RateUpfinish; - } - odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 0); - - if (RateID < HighestRate) { - for (i = RateID + 1; i <= HighestRate; i++) { - if (pRaInfo->RAUseRate & BIT(i)) { - RateID = i; - goto RateUpfinish; - } - } - } else if (RateID == HighestRate) { - if (pRaInfo->SGIEnable && (pRaInfo->RateSGI != 1)) - pRaInfo->RateSGI = 1; - else if ((pRaInfo->SGIEnable) != 1) - pRaInfo->RateSGI = 0; - } else { - RateID = HighestRate; - } -RateUpfinish: - if (pRaInfo->RAWaitingCounter == - (4 + PendingForRateUpFail[pRaInfo->RAPendingCounter])) - pRaInfo->RAWaitingCounter = 0; - else - pRaInfo->RAWaitingCounter++; - - pRaInfo->DecisionRate = RateID; - return 0; -} - -static void odm_ResetRaCounter_8188E(struct odm_ra_info *pRaInfo) -{ - u8 RateID; - - RateID = pRaInfo->DecisionRate; - pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID] + - N_THRESHOLD_LOW[RateID]) >> 1; - pRaInfo->NscDown = (N_THRESHOLD_HIGH[RateID] + - N_THRESHOLD_LOW[RateID]) >> 1; -} - -static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo) -{ - u8 RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0, i = 0; - /* u32 pool_retry; */ - static u8 DynamicTxRPTTimingCounter; - - if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) { /* STA used and data packet exits */ - if ((pRaInfo->RssiStaRA < (pRaInfo->PreRssiStaRA - 3)) || - (pRaInfo->RssiStaRA > (pRaInfo->PreRssiStaRA + 3))) { - pRaInfo->RAWaitingCounter = 0; - pRaInfo->RAPendingCounter = 0; - } - /* Start RA decision */ - if (pRaInfo->PreRate > pRaInfo->HighestRate) - RateID = pRaInfo->HighestRate; - else - RateID = pRaInfo->PreRate; - if (pRaInfo->RssiStaRA > RSSI_THRESHOLD[RateID]) - RtyPtID = 0; - else - RtyPtID = 1; - PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; /* TODO by page */ - - for (i = 0 ; i <= 4 ; i++) - pRaInfo->NscDown += pRaInfo->RTY[i] * RETRY_PENALTY[PenaltyID1][i]; - - if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])) - pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]; - else - pRaInfo->NscDown = 0; - - /* rate up */ - PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID]; - - for (i = 0 ; i <= 4 ; i++) - pRaInfo->NscUp += pRaInfo->RTY[i] * RETRY_PENALTY[PenaltyID2][i]; - - if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])) - pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]; - else - pRaInfo->NscUp = 0; - - if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) || - (pRaInfo->DROP > DROPING_NECESSARY[RateID])) - odm_RateDown_8188E(dm_odm, pRaInfo); - else if (pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID]) - odm_RateUp_8188E(dm_odm, pRaInfo); - - if (pRaInfo->DecisionRate > pRaInfo->HighestRate) - pRaInfo->DecisionRate = pRaInfo->HighestRate; - - if ((pRaInfo->DecisionRate) == (pRaInfo->PreRate)) - DynamicTxRPTTimingCounter += 1; - else - DynamicTxRPTTimingCounter = 0; - - if (DynamicTxRPTTimingCounter >= 4) { - odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 1); - DynamicTxRPTTimingCounter = 0; - } - - pRaInfo->PreRate = pRaInfo->DecisionRate; /* YJ, add, 120120 */ - - odm_ResetRaCounter_8188E(pRaInfo); - } -} - -static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo) -{ /* Wilson 2011/10/26 */ - struct adapter *adapt = dm_odm->Adapter; - u32 MaskFromReg; - s8 i; - - switch (pRaInfo->RateID) { - case RATR_INX_WIRELESS_NGB: - pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff015; - break; - case RATR_INX_WIRELESS_NG: - pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff010; - break; - case RATR_INX_WIRELESS_NB: - pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff005; - break; - case RATR_INX_WIRELESS_N: - pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff000; - break; - case RATR_INX_WIRELESS_GB: - pRaInfo->RAUseRate = pRaInfo->RateMask & 0x00000ff5; - break; - case RATR_INX_WIRELESS_G: - pRaInfo->RAUseRate = pRaInfo->RateMask & 0x00000ff0; - break; - case RATR_INX_WIRELESS_B: - pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0000000d; - break; - case 12: - MaskFromReg = usb_read32(adapt, REG_ARFR0); - pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg; - break; - case 13: - MaskFromReg = usb_read32(adapt, REG_ARFR1); - pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg; - break; - case 14: - MaskFromReg = usb_read32(adapt, REG_ARFR2); - pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg; - break; - case 15: - MaskFromReg = usb_read32(adapt, REG_ARFR3); - pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg; - break; - default: - pRaInfo->RAUseRate = (pRaInfo->RateMask); - break; - } - /* Highest rate */ - if (pRaInfo->RAUseRate) { - for (i = RATESIZE; i >= 0; i--) { - if (pRaInfo->RAUseRate & BIT(i)) { - pRaInfo->HighestRate = i; - break; - } - } - } else { - pRaInfo->HighestRate = 0; - } - /* Lowest rate */ - if (pRaInfo->RAUseRate) { - for (i = 0; i < RATESIZE; i++) { - if ((pRaInfo->RAUseRate) & BIT(i)) { - pRaInfo->LowestRate = i; - break; - } - } - } else { - pRaInfo->LowestRate = 0; - } - - if (pRaInfo->HighestRate > 0x13) - pRaInfo->PTModeSS = 3; - else if (pRaInfo->HighestRate > 0x0b) - pRaInfo->PTModeSS = 2; - else if (pRaInfo->HighestRate > 0x03) - pRaInfo->PTModeSS = 1; - else - pRaInfo->PTModeSS = 0; - - if (pRaInfo->DecisionRate > pRaInfo->HighestRate) - pRaInfo->DecisionRate = pRaInfo->HighestRate; - - return 0; -} - -static void odm_PTTryState_8188E(struct odm_ra_info *pRaInfo) -{ - pRaInfo->PTTryState = 0; - switch (pRaInfo->PTModeSS) { - case 3: - if (pRaInfo->DecisionRate >= 0x19) - pRaInfo->PTTryState = 1; - break; - case 2: - if (pRaInfo->DecisionRate >= 0x11) - pRaInfo->PTTryState = 1; - break; - case 1: - if (pRaInfo->DecisionRate >= 0x0a) - pRaInfo->PTTryState = 1; - break; - case 0: - if (pRaInfo->DecisionRate >= 0x03) - pRaInfo->PTTryState = 1; - break; - default: - pRaInfo->PTTryState = 0; - break; - } - - if (pRaInfo->RssiStaRA < 48) { - pRaInfo->PTStage = 0; - } else if (pRaInfo->PTTryState == 1) { - if ((pRaInfo->PTStopCount >= 10) || - (pRaInfo->PTPreRssi > pRaInfo->RssiStaRA + 5) || - (pRaInfo->PTPreRssi < pRaInfo->RssiStaRA - 5) || - (pRaInfo->DecisionRate != pRaInfo->PTPreRate)) { - if (pRaInfo->PTStage == 0) - pRaInfo->PTStage = 1; - else if (pRaInfo->PTStage == 1) - pRaInfo->PTStage = 3; - else - pRaInfo->PTStage = 5; - - pRaInfo->PTPreRssi = pRaInfo->RssiStaRA; - pRaInfo->PTStopCount = 0; - } else { - pRaInfo->RAstage = 0; - pRaInfo->PTStopCount++; - } - } else { - pRaInfo->PTStage = 0; - pRaInfo->RAstage = 0; - } - pRaInfo->PTPreRate = pRaInfo->DecisionRate; -} - -static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo) -{ - u8 j; - u8 temp_stage; - u32 numsc; - u32 num_total; - u8 stage_id; - - numsc = 0; - num_total = pRaInfo->TOTAL * PT_PENALTY[5]; - for (j = 0; j <= 4; j++) { - numsc += pRaInfo->RTY[j] * PT_PENALTY[j]; - if (numsc > num_total) - break; - } - - j >>= 1; - temp_stage = (pRaInfo->PTStage + 1) >> 1; - if (temp_stage > j) - stage_id = temp_stage - j; - else - stage_id = 0; - - pRaInfo->PTSmoothFactor = (pRaInfo->PTSmoothFactor >> 1) + - (pRaInfo->PTSmoothFactor >> 2) + - stage_id * 16 + 2; - if (pRaInfo->PTSmoothFactor > 192) - pRaInfo->PTSmoothFactor = 192; - stage_id = pRaInfo->PTSmoothFactor >> 6; - temp_stage = stage_id * 2; - if (temp_stage != 0) - temp_stage -= 1; - if (pRaInfo->DROP > 3) - temp_stage = 0; - pRaInfo->PTStage = temp_stage; -} - -static void odm_RATxRPTTimerSetting(struct odm_dm_struct *dm_odm, - u16 minRptTime) -{ - if (dm_odm->CurrminRptTime != minRptTime) { - rtw_rpt_timer_cfg_cmd(dm_odm->Adapter, minRptTime); - dm_odm->CurrminRptTime = minRptTime; - } -} - -int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid) -{ - struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid]; - u8 WirelessMode = 0xFF; /* invalid value */ - u8 max_rate_idx = 0x13; /* MCS7 */ - - if (dm_odm->pWirelessMode) - WirelessMode = *dm_odm->pWirelessMode; - - if (WirelessMode != 0xFF) { - if (WirelessMode & ODM_WM_N24G) - max_rate_idx = 0x13; - else if (WirelessMode & ODM_WM_G) - max_rate_idx = 0x0b; - else if (WirelessMode & ODM_WM_B) - max_rate_idx = 0x03; - } - - pRaInfo->DecisionRate = max_rate_idx; - pRaInfo->PreRate = max_rate_idx; - pRaInfo->HighestRate = max_rate_idx; - pRaInfo->LowestRate = 0; - pRaInfo->RateID = 0; - pRaInfo->RateMask = 0xffffffff; - pRaInfo->RssiStaRA = 0; - pRaInfo->PreRssiStaRA = 0; - pRaInfo->SGIEnable = 0; - pRaInfo->RAUseRate = 0xffffffff; - pRaInfo->NscDown = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2; - pRaInfo->NscUp = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2; - pRaInfo->RateSGI = 0; - pRaInfo->Active = 1; /* Active is not used at present. by page, 110819 */ - pRaInfo->RptTime = 0x927c; - pRaInfo->DROP = 0; - pRaInfo->RTY[0] = 0; - pRaInfo->RTY[1] = 0; - pRaInfo->RTY[2] = 0; - pRaInfo->RTY[3] = 0; - pRaInfo->RTY[4] = 0; - pRaInfo->TOTAL = 0; - pRaInfo->RAWaitingCounter = 0; - pRaInfo->RAPendingCounter = 0; - pRaInfo->PTActive = 1; /* Active when this STA is use */ - pRaInfo->PTTryState = 0; - pRaInfo->PTStage = 5; /* Need to fill into HW_PWR_STATUS */ - pRaInfo->PTSmoothFactor = 192; - pRaInfo->PTStopCount = 0; - pRaInfo->PTPreRate = 0; - pRaInfo->PTPreRssi = 0; - pRaInfo->PTModeSS = 0; - pRaInfo->RAstage = 0; - return 0; -} - -int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm) -{ - u8 macid = 0; - - dm_odm->CurrminRptTime = 0; - - for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) - ODM_RAInfo_Init(dm_odm, macid); - - return 0; -} - -u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid) -{ - if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) - return 0; - return dm_odm->RAInfo[macid].RateSGI; -} - -u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid) -{ - u8 DecisionRate = 0; - - if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) - return 0; - DecisionRate = dm_odm->RAInfo[macid].DecisionRate; - return DecisionRate; -} - -u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid) -{ - u8 PTStage = 5; - - if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) - return 0; - PTStage = dm_odm->RAInfo[macid].PTStage; - return PTStage; -} - -void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 RateID, u32 RateMask, u8 SGIEnable) -{ - struct odm_ra_info *pRaInfo = NULL; - - if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) - return; - - pRaInfo = &dm_odm->RAInfo[macid]; - pRaInfo->RateID = RateID; - pRaInfo->RateMask = RateMask; - pRaInfo->SGIEnable = SGIEnable; - odm_ARFBRefresh_8188E(dm_odm, pRaInfo); -} - -void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi) -{ - struct odm_ra_info *pRaInfo = NULL; - - if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) - return; - - pRaInfo = &dm_odm->RAInfo[macid]; - pRaInfo->RssiStaRA = Rssi; -} - -void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime) -{ - struct adapter *adapt = dm_odm->Adapter; - - usb_write16(adapt, REG_TX_RPT_TIME, minRptTime); -} - -void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1) -{ - struct odm_ra_info *pRAInfo = NULL; - u8 MacId = 0; - u8 *pBuffer = NULL; - u32 valid = 0, ItemNum = 0; - u16 minRptTime = 0x927c; - - ItemNum = TxRPT_Len >> 3; - pBuffer = TxRPT_Buf; - - do { - if (MacId >= ASSOCIATE_ENTRY_NUM) - valid = 0; - else if (MacId >= 32) - valid = (1 << (MacId - 32)) & macid_entry1; - else - valid = (1 << MacId) & macid_entry0; - - pRAInfo = &dm_odm->RAInfo[MacId]; - if (valid) { - pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer); - pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer); - pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer); - pRAInfo->RTY[3] = (u16)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer); - pRAInfo->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer); - pRAInfo->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(pBuffer); - pRAInfo->TOTAL = pRAInfo->RTY[0] + pRAInfo->RTY[1] + - pRAInfo->RTY[2] + pRAInfo->RTY[3] + - pRAInfo->RTY[4] + pRAInfo->DROP; - if (pRAInfo->TOTAL != 0) { - if (pRAInfo->PTActive) { - if (pRAInfo->RAstage < 5) - odm_RateDecision_8188E(dm_odm, pRAInfo); - else if (pRAInfo->RAstage == 5) /* Power training try state */ - odm_PTTryState_8188E(pRAInfo); - else /* RAstage == 6 */ - odm_PTDecision_8188E(pRAInfo); - - /* Stage_RA counter */ - if (pRAInfo->RAstage <= 5) - pRAInfo->RAstage++; - else - pRAInfo->RAstage = 0; - } else { - odm_RateDecision_8188E(dm_odm, pRAInfo); - } - } - } - - if (minRptTime > pRAInfo->RptTime) - minRptTime = pRAInfo->RptTime; - - pBuffer += TX_RPT2_ITEM_SIZE; - MacId++; - } while (MacId < ItemNum); - - odm_RATxRPTTimerSetting(dm_odm, minRptTime); -} diff --git a/drivers/staging/rtl8188eu/hal/hal_com.c b/drivers/staging/rtl8188eu/hal/hal_com.c deleted file mode 100644 index ebe19e076ff2..000000000000 --- a/drivers/staging/rtl8188eu/hal/hal_com.c +++ /dev/null @@ -1,285 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#include <osdep_service.h> -#include <drv_types.h> - -#include <hal_intf.h> -#include <hal_com.h> -#include <rtl8188e_hal.h> - -#define _HAL_INIT_C_ - -void dump_chip_info(struct HAL_VERSION chip_vers) -{ - uint cnt = 0; - char buf[128]; - - cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_"); - cnt += sprintf((buf + cnt), "%s_", chip_vers.ChipType == NORMAL_CHIP ? - "Normal_Chip" : "Test_Chip"); - cnt += sprintf((buf + cnt), "%s_", chip_vers.VendorType == CHIP_VENDOR_TSMC ? - "TSMC" : "UMC"); - if (chip_vers.CUTVersion == A_CUT_VERSION) - cnt += sprintf((buf + cnt), "A_CUT_"); - else if (chip_vers.CUTVersion == B_CUT_VERSION) - cnt += sprintf((buf + cnt), "B_CUT_"); - else if (chip_vers.CUTVersion == C_CUT_VERSION) - cnt += sprintf((buf + cnt), "C_CUT_"); - else if (chip_vers.CUTVersion == D_CUT_VERSION) - cnt += sprintf((buf + cnt), "D_CUT_"); - else if (chip_vers.CUTVersion == E_CUT_VERSION) - cnt += sprintf((buf + cnt), "E_CUT_"); - else - cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_", - chip_vers.CUTVersion); - cnt += sprintf((buf + cnt), "1T1R_"); - cnt += sprintf((buf + cnt), "RomVer(0)\n"); - - pr_info("%s", buf); -} - -#define CHAN_PLAN_HW 0x80 - -/* return the final channel plan decision */ -u8 hal_com_get_channel_plan(u8 hw_channel_plan, u8 sw_channel_plan, - u8 def_channel_plan, bool load_fail) -{ - u8 sw_cfg; - u8 chnlplan; - - sw_cfg = true; - if (!load_fail) { - if (!rtw_is_channel_plan_valid(sw_channel_plan)) - sw_cfg = false; - if (hw_channel_plan & CHAN_PLAN_HW) - sw_cfg = false; - } - - if (sw_cfg) - chnlplan = sw_channel_plan; - else - chnlplan = hw_channel_plan & (~CHAN_PLAN_HW); - - if (!rtw_is_channel_plan_valid(chnlplan)) - chnlplan = def_channel_plan; - - return chnlplan; -} - -u8 MRateToHwRate(u8 rate) -{ - u8 ret = DESC_RATE1M; - - switch (rate) { - /* CCK and OFDM non-HT rates */ - case IEEE80211_CCK_RATE_1MB: - ret = DESC_RATE1M; - break; - case IEEE80211_CCK_RATE_2MB: - ret = DESC_RATE2M; - break; - case IEEE80211_CCK_RATE_5MB: - ret = DESC_RATE5_5M; - break; - case IEEE80211_CCK_RATE_11MB: - ret = DESC_RATE11M; - break; - case IEEE80211_OFDM_RATE_6MB: - ret = DESC_RATE6M; - break; - case IEEE80211_OFDM_RATE_9MB: - ret = DESC_RATE9M; - break; - case IEEE80211_OFDM_RATE_12MB: - ret = DESC_RATE12M; - break; - case IEEE80211_OFDM_RATE_18MB: - ret = DESC_RATE18M; - break; - case IEEE80211_OFDM_RATE_24MB: - ret = DESC_RATE24M; - break; - case IEEE80211_OFDM_RATE_36MB: - ret = DESC_RATE36M; - break; - case IEEE80211_OFDM_RATE_48MB: - ret = DESC_RATE48M; - break; - case IEEE80211_OFDM_RATE_54MB: - ret = DESC_RATE54M; - break; - default: - break; - } - return ret; -} - -void hal_set_brate_cfg(u8 *brates, u16 *rate_cfg) -{ - u8 i, is_brate, brate; - - for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { - is_brate = brates[i] & IEEE80211_BASIC_RATE_MASK; - brate = brates[i] & 0x7f; - - if (is_brate) { - switch (brate) { - case IEEE80211_CCK_RATE_1MB: - *rate_cfg |= RATE_1M; - break; - case IEEE80211_CCK_RATE_2MB: - *rate_cfg |= RATE_2M; - break; - case IEEE80211_CCK_RATE_5MB: - *rate_cfg |= RATE_5_5M; - break; - case IEEE80211_CCK_RATE_11MB: - *rate_cfg |= RATE_11M; - break; - case IEEE80211_OFDM_RATE_6MB: - *rate_cfg |= RATE_6M; - break; - case IEEE80211_OFDM_RATE_9MB: - *rate_cfg |= RATE_9M; - break; - case IEEE80211_OFDM_RATE_12MB: - *rate_cfg |= RATE_12M; - break; - case IEEE80211_OFDM_RATE_18MB: - *rate_cfg |= RATE_18M; - break; - case IEEE80211_OFDM_RATE_24MB: - *rate_cfg |= RATE_24M; - break; - case IEEE80211_OFDM_RATE_36MB: - *rate_cfg |= RATE_36M; - break; - case IEEE80211_OFDM_RATE_48MB: - *rate_cfg |= RATE_48M; - break; - case IEEE80211_OFDM_RATE_54MB: - *rate_cfg |= RATE_54M; - break; - } - } - } -} - -static void one_out_pipe(struct adapter *adapter) -{ - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapter); - - pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ - pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */ - pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];/* BE */ - pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */ - - pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ - pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ - pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ - pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ -} - -static void two_out_pipe(struct adapter *adapter, bool wifi_cfg) -{ - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapter); - - if (wifi_cfg) { - /* - * WMM - * BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA - * 0, 1, 0, 1, 0, 0, 0, 0, 0 - * 0:H, 1:L - */ - pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];/* VO */ - pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */ - pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */ - pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */ - - pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ - pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ - pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ - pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ - } else { - /* - * typical setting - * BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA - * 1, 1, 0, 0, 0, 0, 0, 0, 0 - * 0:H, 1:L - */ - pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ - pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */ - pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */ - pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */ - - pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ - pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ - pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ - pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ - } -} - -static void three_out_pipe(struct adapter *adapter, bool wifi_cfg) -{ - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapter); - - if (wifi_cfg) { - /* - * for WMM - * BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA - * 1, 2, 1, 0, 0, 0, 0, 0, 0 - * 0:H, 1:N, 2:L - */ - pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ - pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */ - pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */ - pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */ - - pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ - pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ - pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ - pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ - } else { - /* - * typical setting - * BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA - * 2, 2, 1, 0, 0, 0, 0, 0, 0 - * 0:H, 1:N, 2:L - */ - pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ - pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */ - pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */ - pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];/* BK */ - - pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ - pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ - pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ - pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ - } -} - -bool hal_mapping_out_pipe(struct adapter *adapter, u8 numoutpipe) -{ - struct registry_priv *pregistrypriv = &adapter->registrypriv; - bool wifi_cfg = (pregistrypriv->wifi_spec) ? true : false; - bool result = true; - - switch (numoutpipe) { - case 1: - one_out_pipe(adapter); - break; - case 2: - two_out_pipe(adapter, wifi_cfg); - break; - case 3: - three_out_pipe(adapter, wifi_cfg); - break; - default: - result = false; - } - return result; -} diff --git a/drivers/staging/rtl8188eu/hal/hal_intf.c b/drivers/staging/rtl8188eu/hal/hal_intf.c deleted file mode 100644 index f09620c54e69..000000000000 --- a/drivers/staging/rtl8188eu/hal/hal_intf.c +++ /dev/null @@ -1,60 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#define _HAL_INTF_C_ -#include <hal_intf.h> - -uint rtw_hal_init(struct adapter *adapt) -{ - uint status = _SUCCESS; - - adapt->hw_init_completed = false; - - status = rtl8188eu_hal_init(adapt); - - if (status == _SUCCESS) { - adapt->hw_init_completed = true; - - if (adapt->registrypriv.notch_filter == 1) - rtw_hal_notch_filter(adapt, 1); - } else { - adapt->hw_init_completed = false; - } - - return status; -} - -uint rtw_hal_deinit(struct adapter *adapt) -{ - uint status = _SUCCESS; - - status = rtl8188eu_hal_deinit(adapt); - - if (status == _SUCCESS) - adapt->hw_init_completed = false; - - return status; -} - -void rtw_hal_update_ra_mask(struct adapter *adapt, u32 mac_id, u8 rssi_level) -{ - struct mlme_priv *pmlmepriv = &adapt->mlmepriv; - - if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { -#ifdef CONFIG_88EU_AP_MODE - struct sta_info *psta = NULL; - struct sta_priv *pstapriv = &adapt->stapriv; - - if (mac_id - 1 > 0) - psta = pstapriv->sta_aid[mac_id - 2]; - if (psta) - add_RATid(adapt, psta, 0);/* todo: based on rssi_level*/ -#endif - } else { - UpdateHalRAMask8188EUsb(adapt, mac_id, rssi_level); - } -} diff --git a/drivers/staging/rtl8188eu/hal/mac_cfg.c b/drivers/staging/rtl8188eu/hal/mac_cfg.c deleted file mode 100644 index 370aa5cc55a7..000000000000 --- a/drivers/staging/rtl8188eu/hal/mac_cfg.c +++ /dev/null @@ -1,120 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include "odm_precomp.h" -#include "phy.h" - -/* MAC_REG.TXT */ - -static u32 array_MAC_REG_8188E[] = { - 0x026, 0x00000041, - 0x027, 0x00000035, - 0x428, 0x0000000A, - 0x429, 0x00000010, - 0x430, 0x00000000, - 0x431, 0x00000001, - 0x432, 0x00000002, - 0x433, 0x00000004, - 0x434, 0x00000005, - 0x435, 0x00000006, - 0x436, 0x00000007, - 0x437, 0x00000008, - 0x438, 0x00000000, - 0x439, 0x00000000, - 0x43A, 0x00000001, - 0x43B, 0x00000002, - 0x43C, 0x00000004, - 0x43D, 0x00000005, - 0x43E, 0x00000006, - 0x43F, 0x00000007, - 0x440, 0x0000005D, - 0x441, 0x00000001, - 0x442, 0x00000000, - 0x444, 0x00000015, - 0x445, 0x000000F0, - 0x446, 0x0000000F, - 0x447, 0x00000000, - 0x458, 0x00000041, - 0x459, 0x000000A8, - 0x45A, 0x00000072, - 0x45B, 0x000000B9, - 0x460, 0x00000066, - 0x461, 0x00000066, - 0x480, 0x00000008, - 0x4C8, 0x000000FF, - 0x4C9, 0x00000008, - 0x4CC, 0x000000FF, - 0x4CD, 0x000000FF, - 0x4CE, 0x00000001, - 0x4D3, 0x00000001, - 0x500, 0x00000026, - 0x501, 0x000000A2, - 0x502, 0x0000002F, - 0x503, 0x00000000, - 0x504, 0x00000028, - 0x505, 0x000000A3, - 0x506, 0x0000005E, - 0x507, 0x00000000, - 0x508, 0x0000002B, - 0x509, 0x000000A4, - 0x50A, 0x0000005E, - 0x50B, 0x00000000, - 0x50C, 0x0000004F, - 0x50D, 0x000000A4, - 0x50E, 0x00000000, - 0x50F, 0x00000000, - 0x512, 0x0000001C, - 0x514, 0x0000000A, - 0x516, 0x0000000A, - 0x525, 0x0000004F, - 0x550, 0x00000010, - 0x551, 0x00000010, - 0x559, 0x00000002, - 0x55D, 0x000000FF, - 0x605, 0x00000030, - 0x608, 0x0000000E, - 0x609, 0x0000002A, - 0x620, 0x000000FF, - 0x621, 0x000000FF, - 0x622, 0x000000FF, - 0x623, 0x000000FF, - 0x624, 0x000000FF, - 0x625, 0x000000FF, - 0x626, 0x000000FF, - 0x627, 0x000000FF, - 0x652, 0x00000020, - 0x63C, 0x0000000A, - 0x63D, 0x0000000A, - 0x63E, 0x0000000E, - 0x63F, 0x0000000E, - 0x640, 0x00000040, - 0x66E, 0x00000005, - 0x700, 0x00000021, - 0x701, 0x00000043, - 0x702, 0x00000065, - 0x703, 0x00000087, - 0x708, 0x00000021, - 0x709, 0x00000043, - 0x70A, 0x00000065, - 0x70B, 0x00000087, -}; - -bool rtl88eu_phy_mac_config(struct adapter *adapt) -{ - u32 i; - u32 arraylength; - u32 *ptrarray; - - arraylength = ARRAY_SIZE(array_MAC_REG_8188E); - ptrarray = array_MAC_REG_8188E; - - for (i = 0; i < arraylength; i += 2) - usb_write8(adapt, ptrarray[i], (u8)ptrarray[i + 1]); - - usb_write8(adapt, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); - return true; -} diff --git a/drivers/staging/rtl8188eu/hal/odm.c b/drivers/staging/rtl8188eu/hal/odm.c deleted file mode 100644 index ffc5394d5bb9..000000000000 --- a/drivers/staging/rtl8188eu/hal/odm.c +++ /dev/null @@ -1,966 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include <linux/etherdevice.h> - -#include "odm_precomp.h" -#include "phy.h" - -/* avoid to warn in FreeBSD ==> To DO modify */ -static u32 EDCAParam[HT_IOT_PEER_MAX][3] = { - /* UL DL */ - {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 0:unknown AP */ - {0xa44f, 0x5ea44f, 0x5e431c}, /* 1:realtek AP */ - {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 2:unknown AP => realtek_92SE */ - {0x5ea32b, 0x5ea42b, 0x5e4322}, /* 3:broadcom AP */ - {0x5ea422, 0x00a44f, 0x00a44f}, /* 4:ralink AP */ - {0x5ea322, 0x00a630, 0x00a44f}, /* 5:atheros AP */ - {0x5e4322, 0x5e4322, 0x5e4322},/* 6:cisco AP */ - {0x5ea44f, 0x00a44f, 0x5ea42b}, /* 8:marvell AP */ - {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 10:unknown AP=> 92U AP */ - {0x5ea42b, 0xa630, 0x5e431c}, /* 11:airgocap AP */ -}; - -/* Global var */ -u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { - 0x7f8001fe, /* 0, +6.0dB */ - 0x788001e2, /* 1, +5.5dB */ - 0x71c001c7, /* 2, +5.0dB */ - 0x6b8001ae, /* 3, +4.5dB */ - 0x65400195, /* 4, +4.0dB */ - 0x5fc0017f, /* 5, +3.5dB */ - 0x5a400169, /* 6, +3.0dB */ - 0x55400155, /* 7, +2.5dB */ - 0x50800142, /* 8, +2.0dB */ - 0x4c000130, /* 9, +1.5dB */ - 0x47c0011f, /* 10, +1.0dB */ - 0x43c0010f, /* 11, +0.5dB */ - 0x40000100, /* 12, +0dB */ - 0x3c8000f2, /* 13, -0.5dB */ - 0x390000e4, /* 14, -1.0dB */ - 0x35c000d7, /* 15, -1.5dB */ - 0x32c000cb, /* 16, -2.0dB */ - 0x300000c0, /* 17, -2.5dB */ - 0x2d4000b5, /* 18, -3.0dB */ - 0x2ac000ab, /* 19, -3.5dB */ - 0x288000a2, /* 20, -4.0dB */ - 0x26000098, /* 21, -4.5dB */ - 0x24000090, /* 22, -5.0dB */ - 0x22000088, /* 23, -5.5dB */ - 0x20000080, /* 24, -6.0dB */ - 0x1e400079, /* 25, -6.5dB */ - 0x1c800072, /* 26, -7.0dB */ - 0x1b00006c, /* 27. -7.5dB */ - 0x19800066, /* 28, -8.0dB */ - 0x18000060, /* 29, -8.5dB */ - 0x16c0005b, /* 30, -9.0dB */ - 0x15800056, /* 31, -9.5dB */ - 0x14400051, /* 32, -10.0dB */ - 0x1300004c, /* 33, -10.5dB */ - 0x12000048, /* 34, -11.0dB */ - 0x11000044, /* 35, -11.5dB */ - 0x10000040, /* 36, -12.0dB */ - 0x0f00003c,/* 37, -12.5dB */ - 0x0e400039,/* 38, -13.0dB */ - 0x0d800036,/* 39, -13.5dB */ - 0x0cc00033,/* 40, -14.0dB */ - 0x0c000030,/* 41, -14.5dB */ - 0x0b40002d,/* 42, -15.0dB */ -}; - -u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { - {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ - {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ - {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ - {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */ - {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ - {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */ - {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */ - {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */ - {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ - {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */ - {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ - {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */ - {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */ - {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */ - {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ - {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */ - {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ - {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */ - {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ - {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */ - {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */ - {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */ - {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */ - {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */ - {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */ - {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */ - {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */ - {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */ - {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */ - {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */ - {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */ - {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */ - {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ -}; - -u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { - {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ - {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ - {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ - {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */ - {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ - {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */ - {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ - {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ - {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ - {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */ - {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ - {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */ - {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */ - {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ - {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ - {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */ - {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ - {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */ - {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ - {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */ - {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */ - {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */ - {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */ - {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */ - {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */ - {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */ - {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */ - {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */ - {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */ - {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */ - {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */ - {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */ - {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */ -}; - -#define RxDefaultAnt1 0x65a9 -#define RxDefaultAnt2 0x569a - -/* 3 Export Interface */ - -/* 2011/09/21 MH Add to describe different team necessary resource allocate?? */ -void ODM_DMInit(struct odm_dm_struct *pDM_Odm) -{ - /* 2012.05.03 Luke: For all IC series */ - odm_CommonInfoSelfInit(pDM_Odm); - odm_DIGInit(pDM_Odm); - odm_RateAdaptiveMaskInit(pDM_Odm); - - odm_DynamicTxPowerInit(pDM_Odm); - odm_TXPowerTrackingInit(pDM_Odm); - ODM_EdcaTurboInit(pDM_Odm); - ODM_RAInfo_Init_all(pDM_Odm); - if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) - odm_InitHybridAntDiv(pDM_Odm); -} - -/* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ -/* You can not add any dummy function here, be care, you can only use DM structure */ -/* to perform any new ODM_DM. */ -void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) -{ - /* 2012.05.03 Luke: For all IC series */ - odm_CommonInfoSelfUpdate(pDM_Odm); - odm_FalseAlarmCounterStatistics(pDM_Odm); - odm_RSSIMonitorCheck(pDM_Odm); - - /* Fix Leave LPS issue */ - odm_DIG(pDM_Odm); - odm_CCKPacketDetectionThresh(pDM_Odm); - - if (*pDM_Odm->pbPowerSaving) - return; - - odm_RefreshRateAdaptiveMask(pDM_Odm); - - if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) - odm_HwAntDiv(pDM_Odm); - - ODM_TXPowerTrackingCheck(pDM_Odm); - odm_EdcaTurboCheck(pDM_Odm); -} - -void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue) -{ - if (CmnInfo == ODM_CMNINFO_STA_STATUS) - pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue; -} - -void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *adapter = pDM_Odm->Adapter; - - pDM_Odm->bCckHighPower = (bool)phy_query_bb_reg(adapter, 0x824, BIT(9)); - pDM_Odm->RFPathRxEnable = (u8)phy_query_bb_reg(adapter, 0xc04, 0x0F); -} - -void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) -{ - u8 EntryCnt = 0; - u8 i; - struct sta_info *pEntry; - - if (*pDM_Odm->pBandWidth == ODM_BW40M) { - if (*pDM_Odm->pSecChOffset == 1) - pDM_Odm->ControlChannel = *pDM_Odm->pChannel - 2; - else if (*pDM_Odm->pSecChOffset == 2) - pDM_Odm->ControlChannel = *pDM_Odm->pChannel + 2; - } else { - pDM_Odm->ControlChannel = *pDM_Odm->pChannel; - } - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - pEntry = pDM_Odm->pODM_StaInfo[i]; - if (IS_STA_VALID(pEntry)) - EntryCnt++; - } - if (EntryCnt == 1) - pDM_Odm->bOneEntryOnly = true; - else - pDM_Odm->bOneEntryOnly = false; -} - -void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) -{ - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - struct adapter *adapter = pDM_Odm->Adapter; - - if (pDM_DigTable->CurIGValue != CurrentIGI) { - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI); - pDM_DigTable->CurIGValue = CurrentIGI; - } -} - -void odm_DIGInit(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *adapter = pDM_Odm->Adapter; - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - - pDM_DigTable->CurIGValue = (u8)phy_query_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N); - pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; - pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; - pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW; - pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH; - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; - pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; - pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; - pDM_DigTable->PreCCK_CCAThres = 0xFF; - pDM_DigTable->CurCCK_CCAThres = 0x83; - pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; - pDM_DigTable->LargeFAHit = 0; - pDM_DigTable->Recover_cnt = 0; - pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; - pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; - pDM_DigTable->bMediaConnect_0 = false; - pDM_DigTable->bMediaConnect_1 = false; - - /* To Initialize pDM_Odm->bDMInitialGainEnable == false to avoid DIG error */ - pDM_Odm->bDMInitialGainEnable = true; -} - -void odm_DIG(struct odm_dm_struct *pDM_Odm) -{ - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - u8 DIG_Dynamic_MIN; - u8 DIG_MaxOfMin; - bool FirstConnect, FirstDisConnect; - u8 dm_dig_max, dm_dig_min; - u8 CurrentIGI = pDM_DigTable->CurIGValue; - - if ((!(pDM_Odm->SupportAbility & ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) - return; - - if (*pDM_Odm->pbScanInProcess) - return; - - /* add by Neil Chen to avoid PSD is processing */ - if (!pDM_Odm->bDMInitialGainEnable) - return; - - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); - - /* 1 Boundary Decision */ - dm_dig_max = DM_DIG_MAX_NIC; - dm_dig_min = DM_DIG_MIN_NIC; - DIG_MaxOfMin = DM_DIG_MAX_AP; - - if (pDM_Odm->bLinked) { - /* 2 Modify DIG upper bound */ - if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; - /* 2 Modify DIG lower bound */ - if (pDM_Odm->bOneEntryOnly) { - if (pDM_Odm->RSSI_Min < dm_dig_min) - DIG_Dynamic_MIN = dm_dig_min; - else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) - DIG_Dynamic_MIN = DIG_MaxOfMin; - else - DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; - } else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) { - /* 1 Lower Bound for 88E AntDiv */ - if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - DIG_Dynamic_MIN = (u8)pDM_DigTable->AntDiv_RSSI_max; - } else { - DIG_Dynamic_MIN = dm_dig_min; - } - } else { - pDM_DigTable->rx_gain_range_max = dm_dig_max; - DIG_Dynamic_MIN = dm_dig_min; - } - - /* 1 Modify DIG lower bound, deal with abnormally large false alarm */ - if (pFalseAlmCnt->Cnt_all > 10000) { - if (pDM_DigTable->LargeFAHit != 3) - pDM_DigTable->LargeFAHit++; - if (pDM_DigTable->ForbiddenIGI < CurrentIGI) { - pDM_DigTable->ForbiddenIGI = CurrentIGI; - pDM_DigTable->LargeFAHit = 1; - } - - if (pDM_DigTable->LargeFAHit >= 3) { - if ((pDM_DigTable->ForbiddenIGI + 1) > pDM_DigTable->rx_gain_range_max) - pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; - else - pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); - pDM_DigTable->Recover_cnt = 3600; /* 3600=2hr */ - } - - } else { - /* Recovery mechanism for IGI lower bound */ - if (pDM_DigTable->Recover_cnt != 0) { - pDM_DigTable->Recover_cnt--; - } else { - if (pDM_DigTable->LargeFAHit < 3) { - if ((pDM_DigTable->ForbiddenIGI - 1) < DIG_Dynamic_MIN) { /* DM_DIG_MIN) */ - pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ - pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ - } else { - pDM_DigTable->ForbiddenIGI--; - pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); - } - } else { - pDM_DigTable->LargeFAHit = 0; - } - } - } - - /* 1 Adjust initial gain by false alarm */ - if (pDM_Odm->bLinked) { - if (FirstConnect) { - CurrentIGI = pDM_Odm->RSSI_Min; - } else { - if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ - else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ - } - } else { - if (FirstDisConnect) { - CurrentIGI = pDM_DigTable->rx_gain_range_min; - } else { - /* 2012.03.30 LukeLee: enable DIG before link but with very high thresholds */ - if (pFalseAlmCnt->Cnt_all > 10000) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ - else if (pFalseAlmCnt->Cnt_all > 8000) - CurrentIGI = CurrentIGI + 1;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ - else if (pFalseAlmCnt->Cnt_all < 500) - CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ - } - } - /* 1 Check initial gain by upper/lower bound */ - if (CurrentIGI > pDM_DigTable->rx_gain_range_max) - CurrentIGI = pDM_DigTable->rx_gain_range_max; - if (CurrentIGI < pDM_DigTable->rx_gain_range_min) - CurrentIGI = pDM_DigTable->rx_gain_range_min; - - /* 2 High power RSSI threshold */ - ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */ - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; -} - -/* 3============================================================ */ -/* 3 FASLE ALARM CHECK */ -/* 3============================================================ */ - -void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *adapter = pDM_Odm->Adapter; - u32 ret_value; - struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt; - - if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) - return; - - /* hold ofdm counter */ - phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */ - phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */ - - ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); - FalseAlmCnt->Cnt_Fast_Fsync = (ret_value & 0xffff); - FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000) >> 16; - ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); - FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff); - FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000) >> 16; - ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); - FalseAlmCnt->Cnt_Rate_Illegal = (ret_value & 0xffff); - FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000) >> 16; - ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); - FalseAlmCnt->Cnt_Mcs_fail = (ret_value & 0xffff); - - FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; - - ret_value = phy_query_bb_reg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_BW_LSC = (ret_value & 0xffff); - FalseAlmCnt->Cnt_BW_USC = (ret_value & 0xffff0000) >> 16; - - /* hold cck counter */ - phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(12), 1); - phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(14), 1); - - ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); - FalseAlmCnt->Cnt_Cck_fail = ret_value; - ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); - FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8; - - ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_CCK_CCA = ((ret_value & 0xFF) << 8) | ((ret_value & 0xFF00) >> 8); - - FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + - FalseAlmCnt->Cnt_SB_Search_fail + - FalseAlmCnt->Cnt_Parity_Fail + - FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + - FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Cck_fail); - - FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; -} - -/* 3============================================================ */ -/* 3 CCK Packet Detect Threshold */ -/* 3============================================================ */ - -void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) -{ - u8 CurCCK_CCAThres; - struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt; - - if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD | ODM_BB_FA_CNT))) - return; - if (pDM_Odm->ExtLNA) - return; - if (pDM_Odm->bLinked) { - if (pDM_Odm->RSSI_Min > 25) { - CurCCK_CCAThres = 0xcd; - } else if (pDM_Odm->RSSI_Min > 10) { - CurCCK_CCAThres = 0x83; - } else { - if (FalseAlmCnt->Cnt_Cck_fail > 1000) - CurCCK_CCAThres = 0x83; - else - CurCCK_CCAThres = 0x40; - } - } else { - if (FalseAlmCnt->Cnt_Cck_fail > 1000) - CurCCK_CCAThres = 0x83; - else - CurCCK_CCAThres = 0x40; - } - ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); -} - -void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres) -{ - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - struct adapter *adapt = pDM_Odm->Adapter; - - if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */ - usb_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres); - pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; - pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; -} - -void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) -{ - struct adapter *adapter = pDM_Odm->Adapter; - struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; - u8 Rssi_Up_bound = 30; - u8 Rssi_Low_bound = 25; - - if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */ - Rssi_Up_bound = 50; - Rssi_Low_bound = 45; - } - if (pDM_PSTable->initialize == 0) { - pDM_PSTable->Reg874 = (phy_query_bb_reg(adapter, 0x874, bMaskDWord) & 0x1CC000) >> 14; - pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord) & BIT(3)) >> 3; - pDM_PSTable->Reg85C = (phy_query_bb_reg(adapter, 0x85c, bMaskDWord) & 0xFF000000) >> 24; - pDM_PSTable->RegA74 = (phy_query_bb_reg(adapter, 0xa74, bMaskDWord) & 0xF000) >> 12; - pDM_PSTable->initialize = 1; - } - - if (!bForceInNormal) { - if (pDM_Odm->RSSI_Min != 0xFF) { - if (pDM_PSTable->PreRFState == RF_Normal) { - if (pDM_Odm->RSSI_Min >= Rssi_Up_bound) - pDM_PSTable->CurRFState = RF_Save; - else - pDM_PSTable->CurRFState = RF_Normal; - } else { - if (pDM_Odm->RSSI_Min <= Rssi_Low_bound) - pDM_PSTable->CurRFState = RF_Normal; - else - pDM_PSTable->CurRFState = RF_Save; - } - } else { - pDM_PSTable->CurRFState = RF_MAX; - } - } else { - pDM_PSTable->CurRFState = RF_Normal; - } - - if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) { - if (pDM_PSTable->CurRFState == RF_Save) { - phy_set_bb_reg(adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ - phy_set_bb_reg(adapter, 0xc70, BIT(3), 0); /* RegC70[3]=1'b0 */ - phy_set_bb_reg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ - phy_set_bb_reg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ - phy_set_bb_reg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ - phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0); /* Reg818[28]=1'b0 */ - phy_set_bb_reg(adapter, 0x818, BIT(28), 0x1); /* Reg818[28]=1'b1 */ - } else { - phy_set_bb_reg(adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874); - phy_set_bb_reg(adapter, 0xc70, BIT(3), pDM_PSTable->RegC70); - phy_set_bb_reg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); - phy_set_bb_reg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74); - phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0); - } - pDM_PSTable->PreRFState = pDM_PSTable->CurRFState; - } -} - -/* 3============================================================ */ -/* 3 RATR MASK */ -/* 3============================================================ */ -/* 3============================================================ */ -/* 3 Rate Adaptive */ -/* 3============================================================ */ - -void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm) -{ - struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive; - - pOdmRA->Type = DM_Type_ByDriver; - if (pOdmRA->Type == DM_Type_ByDriver) - pDM_Odm->bUseRAMask = true; - else - pDM_Odm->bUseRAMask = false; - - pOdmRA->RATRState = DM_RATR_STA_INIT; - pOdmRA->HighRSSIThresh = 50; - pOdmRA->LowRSSIThresh = 20; -} - -u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level) -{ - struct sta_info *pEntry; - u32 rate_bitmap = 0x0fffffff; - u8 WirelessMode; - - pEntry = pDM_Odm->pODM_StaInfo[macid]; - if (!IS_STA_VALID(pEntry)) - return ra_mask; - - WirelessMode = pEntry->wireless_mode; - - switch (WirelessMode) { - case ODM_WM_B: - if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */ - rate_bitmap = 0x0000000d; - else - rate_bitmap = 0x0000000f; - break; - case (ODM_WM_A | ODM_WM_G): - if (rssi_level == DM_RATR_STA_HIGH) - rate_bitmap = 0x00000f00; - else - rate_bitmap = 0x00000ff0; - break; - case (ODM_WM_B | ODM_WM_G): - if (rssi_level == DM_RATR_STA_HIGH) - rate_bitmap = 0x00000f00; - else if (rssi_level == DM_RATR_STA_MIDDLE) - rate_bitmap = 0x00000ff0; - else - rate_bitmap = 0x00000ff5; - break; - case (ODM_WM_B | ODM_WM_G | ODM_WM_N24G): - case (ODM_WM_A | ODM_WM_B | ODM_WM_G | ODM_WM_N24G): - if (rssi_level == DM_RATR_STA_HIGH) { - rate_bitmap = 0x000f0000; - } else if (rssi_level == DM_RATR_STA_MIDDLE) { - rate_bitmap = 0x000ff000; - } else { - if (*pDM_Odm->pBandWidth == ODM_BW40M) - rate_bitmap = 0x000ff015; - else - rate_bitmap = 0x000ff005; - } - break; - default: - /* case WIRELESS_11_24N: */ - /* case WIRELESS_11_5N: */ - rate_bitmap = 0x0fffffff; - break; - } - - return rate_bitmap; -} - -/* Update rate table mask according to rssi */ -void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) - return; - /* */ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - /* */ - odm_RefreshRateAdaptiveMaskCE(pDM_Odm); -} - -void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm) -{ - u8 i; - struct adapter *pAdapter = pDM_Odm->Adapter; - - if (pAdapter->bDriverStopped) - return; - - if (!pDM_Odm->bUseRAMask) - return; - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i]; - - if (IS_STA_VALID(pstat)) { - if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) - rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level); - } - } -} - -/* Return Value: bool */ -/* - true: RATRState is changed. */ -bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState) -{ - struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive; - const u8 GoUpGap = 5; - u8 HighRSSIThreshForRA = pRA->HighRSSIThresh; - u8 LowRSSIThreshForRA = pRA->LowRSSIThresh; - u8 RATRState; - struct device *dev = dvobj_to_dev(adapter_to_dvobj(pDM_Odm->Adapter)); - - /* Threshold Adjustment: */ - /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */ - /* Here GoUpGap is added to solve the boundary's level alternation issue. */ - switch (*pRATRState) { - case DM_RATR_STA_INIT: - case DM_RATR_STA_HIGH: - break; - case DM_RATR_STA_MIDDLE: - HighRSSIThreshForRA += GoUpGap; - break; - case DM_RATR_STA_LOW: - HighRSSIThreshForRA += GoUpGap; - LowRSSIThreshForRA += GoUpGap; - break; - default: - dev_err(dev, "%s(): wrong rssi level setting %d!\n", __func__, *pRATRState); - break; - } - - /* Decide RATRState by RSSI. */ - if (HighRSSIThreshForRA < RSSI) - RATRState = DM_RATR_STA_HIGH; - else if (LowRSSIThreshForRA < RSSI) - RATRState = DM_RATR_STA_MIDDLE; - else - RATRState = DM_RATR_STA_LOW; - - if (*pRATRState != RATRState || bForceUpdate) { - *pRATRState = RATRState; - return true; - } - return false; -} - -/* 3============================================================ */ -/* 3 Dynamic Tx Power */ -/* 3============================================================ */ - -void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv; - - pdmpriv->bDynamicTxPowerEnable = false; - pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -} - -/* 3============================================================ */ -/* 3 RSSI Monitor */ -/* 3============================================================ */ - -void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) - return; - - /* */ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - /* */ - odm_RSSIMonitorCheckCE(pDM_Odm); -} /* odm_RSSIMonitorCheck */ - -static void FindMinimumRSSI(struct adapter *pAdapter) -{ - struct dm_priv *pdmpriv = &pAdapter->HalData->dmpriv; - - /* 1 1.Unconditionally set RSSI */ - pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; -} - -void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv; - int i; - int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; - u8 sta_cnt = 0; - u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */ - struct sta_info *psta; - - if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) - return; - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - psta = pDM_Odm->pODM_StaInfo[i]; - if (IS_STA_VALID(psta) && - (psta->state & WIFI_ASOC_STATE) && - !is_broadcast_ether_addr(psta->hwaddr) && - memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) { - if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB << 16)); - } - } - - for (i = 0; i < sta_cnt; i++) { - if (PWDB_rssi[i] != 0) { - ODM_RA_SetRSSI_8188E(&Adapter->HalData->odmpriv, - PWDB_rssi[i] & 0xFF, - (PWDB_rssi[i] >> 16) & 0xFF); - } - } - - if (tmpEntryMaxPWDB != 0) /* If associated entry is found */ - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; - else - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; - - if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */ - pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; - else - pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; - - FindMinimumRSSI(Adapter); - Adapter->HalData->odmpriv.RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM; -} - -/* 3============================================================ */ -/* 3 Tx Power Tracking */ -/* 3============================================================ */ - -void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm) -{ - pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; - pDM_Odm->RFCalibrateInfo.TXPowercount = 0; - if (*pDM_Odm->mp_mode != 1) - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; - - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; -} - -void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm) -{ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - struct adapter *Adapter = pDM_Odm->Adapter; - - if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) - return; - - if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */ - phy_set_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03); - - pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; - return; - } - - rtl88eu_dm_txpower_tracking_callback_thermalmeter(Adapter); - pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; -} - -/* 3============================================================ */ -/* 3 SW Antenna Diversity */ -/* 3============================================================ */ - -void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - return; - - rtl88eu_dm_antenna_div_init(pDM_Odm); -} - -void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - return; - - rtl88eu_dm_antenna_diversity(pDM_Odm); -} - -/* EDCA Turbo */ -void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; - pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false; - Adapter->recvpriv.bIsAnyNonBEPkts = false; -} /* ODM_InitEdcaTurbo */ - -void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) -{ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) - return; - - odm_EdcaTurboCheckCE(pDM_Odm); -} /* odm_CheckEdcaTurbo */ - -void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - u32 trafficIndex; - u32 edca_param; - u64 cur_tx_bytes = 0; - u64 cur_rx_bytes = 0; - u8 bbtchange = false; - struct xmit_priv *pxmitpriv = &Adapter->xmitpriv; - struct recv_priv *precvpriv = &Adapter->recvpriv; - struct registry_priv *pregpriv = &Adapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - - if (pregpriv->wifi_spec == 1) /* (pmlmeinfo->HT_enable == 0)) */ - goto dm_CheckEdcaTurbo_EXIT; - - if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX) - goto dm_CheckEdcaTurbo_EXIT; - - /* Check if the status needs to be changed. */ - if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) { - cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; - cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; - - /* traffic, TX or RX */ - if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK) || - (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) { - if (cur_tx_bytes > (cur_rx_bytes << 2)) { - /* Uplink TP is present. */ - trafficIndex = UP_LINK; - } else { - /* Balance TP is present. */ - trafficIndex = DOWN_LINK; - } - } else { - if (cur_rx_bytes > (cur_tx_bytes << 2)) { - /* Downlink TP is present. */ - trafficIndex = DOWN_LINK; - } else { - /* Balance TP is present. */ - trafficIndex = UP_LINK; - } - } - - if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) { - if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) - edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; - else - edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex]; - - usb_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); - - pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; - } - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = true; - } else { - /* Turn Off EDCA turbo here. */ - /* Restore original EDCA according to the declaration of AP. */ - if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) { - usb_write32(Adapter, REG_EDCA_BE_PARAM, - Adapter->HalData->AcParam_BE); - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; - } - } - -dm_CheckEdcaTurbo_EXIT: - /* Set variables for next time. */ - precvpriv->bIsAnyNonBEPkts = false; - pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; - precvpriv->last_rx_bytes = precvpriv->rx_bytes; -} diff --git a/drivers/staging/rtl8188eu/hal/odm_hwconfig.c b/drivers/staging/rtl8188eu/hal/odm_hwconfig.c deleted file mode 100644 index 684b6cec0f09..000000000000 --- a/drivers/staging/rtl8188eu/hal/odm_hwconfig.c +++ /dev/null @@ -1,397 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include "odm_precomp.h" - -#define READ_AND_CONFIG READ_AND_CONFIG_MP - -#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm)) -#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm)) - -static u8 odm_query_rxpwrpercentage(s8 antpower) -{ - if ((antpower <= -100) || (antpower >= 20)) - return 0; - else if (antpower >= 0) - return 100; - else - return 100 + antpower; -} - -/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */ -/* IF other SW team do not support the feature, remove this section.?? */ -static s32 odm_signal_scale_mapping(struct odm_dm_struct *dm_odm, s32 currsig) -{ - s32 retsig = 0; - - if (currsig >= 51 && currsig <= 100) - retsig = 100; - else if (currsig >= 41 && currsig <= 50) - retsig = 80 + ((currsig - 40) * 2); - else if (currsig >= 31 && currsig <= 40) - retsig = 66 + (currsig - 30); - else if (currsig >= 21 && currsig <= 30) - retsig = 54 + (currsig - 20); - else if (currsig >= 10 && currsig <= 20) - retsig = 42 + (((currsig - 10) * 2) / 3); - else if (currsig >= 5 && currsig <= 9) - retsig = 22 + (((currsig - 5) * 3) / 2); - else if (currsig >= 1 && currsig <= 4) - retsig = 6 + (((currsig - 1) * 3) / 2); - else - retsig = currsig; - - return retsig; -} - -static u8 odm_evm_db_to_percentage(s8 value) -{ - /* -33dB~0dB to 0%~99% */ - s8 ret_val = clamp(-value, 0, 33) * 3; - - if (ret_val == 99) - ret_val = 100; - - return ret_val; -} - -static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, - u8 *pPhyStatus, - struct odm_per_pkt_info *pPktinfo) -{ - struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table; - u8 i, max_spatial_stream; - s8 rx_pwr[4], rx_pwr_all = 0; - u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT; - u8 RSSI, total_rssi = 0; - bool is_cck_rate; - u8 rf_rx_num = 0; - u8 cck_highpwr = 0; - u8 LNA_idx, VGA_idx; - - struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus; - - is_cck_rate = pPktinfo->Rate >= DESC92C_RATE1M && - pPktinfo->Rate <= DESC92C_RATE11M; - - pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1; - pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1; - - if (is_cck_rate) { - u8 cck_agc_rpt; - - dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++; - /* (1)Hardware does not provide RSSI for CCK */ - /* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */ - - cck_highpwr = dm_odm->bCckHighPower; - - cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a; - - /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */ - /* The RSSI formula should be modified according to the gain table */ - /* In 88E, cck_highpwr is always set to 1 */ - LNA_idx = (cck_agc_rpt & 0xE0) >> 5; - VGA_idx = cck_agc_rpt & 0x1F; - switch (LNA_idx) { - case 7: - if (VGA_idx <= 27) - rx_pwr_all = -100 + 2 * (27 - VGA_idx); /* VGA_idx = 27~2 */ - else - rx_pwr_all = -100; - break; - case 6: - rx_pwr_all = -48 + 2 * (2 - VGA_idx); /* VGA_idx = 2~0 */ - break; - case 5: - rx_pwr_all = -42 + 2 * (7 - VGA_idx); /* VGA_idx = 7~5 */ - break; - case 4: - rx_pwr_all = -36 + 2 * (7 - VGA_idx); /* VGA_idx = 7~4 */ - break; - case 3: - rx_pwr_all = -24 + 2 * (7 - VGA_idx); /* VGA_idx = 7~0 */ - break; - case 2: - if (cck_highpwr) - rx_pwr_all = -12 + 2 * (5 - VGA_idx); /* VGA_idx = 5~0 */ - else - rx_pwr_all = -6 + 2 * (5 - VGA_idx); - break; - case 1: - rx_pwr_all = 8 - 2 * VGA_idx; - break; - case 0: - rx_pwr_all = 14 - 2 * VGA_idx; - break; - default: - break; - } - rx_pwr_all += 6; - PWDB_ALL = odm_query_rxpwrpercentage(rx_pwr_all); - if (!cck_highpwr) { - if (PWDB_ALL >= 80) - PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80; - else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) - PWDB_ALL += 3; - if (PWDB_ALL > 100) - PWDB_ALL = 100; - } - - pPhyInfo->RxPWDBAll = PWDB_ALL; - pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; - pPhyInfo->RecvSignalPower = rx_pwr_all; - /* (3) Get Signal Quality (EVM) */ - if (pPktinfo->bPacketMatchBSSID) { - u8 SQ, SQ_rpt; - - if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) { - SQ = 100; - } else { - SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all; - - if (SQ_rpt > 64) - SQ = 0; - else if (SQ_rpt < 20) - SQ = 100; - else - SQ = ((64 - SQ_rpt) * 100) / 44; - } - pPhyInfo->SignalQuality = SQ; - pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ; - pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1; - } - } else { /* is OFDM rate */ - dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++; - - /* (1)Get RSSI for HT rate */ - - for (i = RF_PATH_A; i < RF_PATH_MAX; i++) { - /* 2008/01/30 MH we will judge RF RX path now. */ - if (dm_odm->RFPathRxEnable & BIT(i)) - rf_rx_num++; - - rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F) * 2) - 110; - - pPhyInfo->RxPwr[i] = rx_pwr[i]; - - /* Translate DBM to percentage. */ - RSSI = odm_query_rxpwrpercentage(rx_pwr[i]); - total_rssi += RSSI; - - /* Modification for ext-LNA board */ - if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) { - if ((pPhyStaRpt->path_agc[i].trsw) == 1) - RSSI = (RSSI > 94) ? 100 : (RSSI + 6); - else - RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16); - - if ((RSSI <= 34) && (RSSI >= 4)) - RSSI -= 4; - } - - pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI; - - /* Get Rx snr value in DB */ - pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2); - dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2); - } - /* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */ - rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110; - - PWDB_ALL = odm_query_rxpwrpercentage(rx_pwr_all); - PWDB_ALL_BT = PWDB_ALL; - - pPhyInfo->RxPWDBAll = PWDB_ALL; - pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; - pPhyInfo->RxPower = rx_pwr_all; - pPhyInfo->RecvSignalPower = rx_pwr_all; - - /* (3)EVM of HT rate */ - if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15) - max_spatial_stream = 2; /* both spatial stream make sense */ - else - max_spatial_stream = 1; /* only spatial stream 1 makes sense */ - - for (i = 0; i < max_spatial_stream; i++) { - /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */ - /* fill most significant bit to "zero" when doing shifting operation which may change a negative */ - /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */ - EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */ - - if (pPktinfo->bPacketMatchBSSID) { - if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */ - pPhyInfo->SignalQuality = (u8)(EVM & 0xff); - pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff); - } - } - } - /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */ - /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */ - if (is_cck_rate) { - pPhyInfo->SignalStrength = (u8)(odm_signal_scale_mapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */ - } else { - if (rf_rx_num != 0) - pPhyInfo->SignalStrength = (u8)(odm_signal_scale_mapping(dm_odm, total_rssi /= rf_rx_num)); - } - - /* For 92C/92D HW (Hybrid) Antenna Diversity */ - pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel; - /* For 88E HW Antenna Diversity */ - dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel; - dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b; - dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2; -} - -static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, - struct odm_per_pkt_info *pPktinfo) -{ - s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK; - s32 UndecoratedSmoothedOFDM, RSSI_Ave; - bool is_cck_rate; - u8 RSSI_max, RSSI_min, i; - u32 OFDM_pkt = 0; - u32 Weighting = 0; - struct sta_info *pEntry; - u8 antsel_tr_mux; - struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable; - - if (pPktinfo->StationID == 0xFF) - return; - pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID]; - if (!IS_STA_VALID(pEntry)) - return; - if ((!pPktinfo->bPacketMatchBSSID)) - return; - - is_cck_rate = pPktinfo->Rate >= DESC92C_RATE1M && - pPktinfo->Rate <= DESC92C_RATE11M; - - /* Smart Antenna Debug Message------------------ */ - - if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) { - if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) { - if (pPktinfo->bPacketToSelf) { - antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) | - (pDM_FatTable->antsel_rx_keep_1 << 1) | - pDM_FatTable->antsel_rx_keep_0; - pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll; - pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; - } - } - } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) { - if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { - antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) | - (pDM_FatTable->antsel_rx_keep_1 << 1) | pDM_FatTable->antsel_rx_keep_0; - rtl88eu_dm_ant_sel_statistics(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll); - } - } - /* Smart Antenna Debug Message------------------ */ - - UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK; - UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM; - UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; - - if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { - if (!is_cck_rate) { /* ofdm rate */ - if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_B] == 0) { - RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A]; - } else { - if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]) { - RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A]; - RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]; - } else { - RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]; - RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A]; - } - if ((RSSI_max - RSSI_min) < 3) - RSSI_Ave = RSSI_max; - else if ((RSSI_max - RSSI_min) < 6) - RSSI_Ave = RSSI_max - 1; - else if ((RSSI_max - RSSI_min) < 10) - RSSI_Ave = RSSI_max - 2; - else - RSSI_Ave = RSSI_max - 3; - } - - /* 1 Process OFDM RSSI */ - if (UndecoratedSmoothedOFDM <= 0) { /* initialize */ - UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll; - } else { - if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) { - UndecoratedSmoothedOFDM = - (((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor - 1)) + - (RSSI_Ave)) / (Rx_Smooth_Factor); - UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1; - } else { - UndecoratedSmoothedOFDM = - (((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor - 1)) + - (RSSI_Ave)) / (Rx_Smooth_Factor); - } - } - - pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap << 1) | BIT(0); - - } else { - RSSI_Ave = pPhyInfo->RxPWDBAll; - - /* 1 Process CCK RSSI */ - if (UndecoratedSmoothedCCK <= 0) { /* initialize */ - UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll; - } else { - if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) { - UndecoratedSmoothedCCK = - ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor - 1)) + - pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor; - UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; - } else { - UndecoratedSmoothedCCK = - ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor - 1)) + - pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor; - } - } - pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap << 1; - } - /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */ - if (pEntry->rssi_stat.ValidBit >= 64) - pEntry->rssi_stat.ValidBit = 64; - else - pEntry->rssi_stat.ValidBit++; - - for (i = 0; i < pEntry->rssi_stat.ValidBit; i++) - OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap >> i) & BIT(0); - - if (pEntry->rssi_stat.ValidBit == 64) { - Weighting = min_t(u32, OFDM_pkt << 4, 64); - UndecoratedSmoothedPWDB = (Weighting * UndecoratedSmoothedOFDM + (64 - Weighting) * UndecoratedSmoothedCCK) >> 6; - } else { - if (pEntry->rssi_stat.ValidBit != 0) - UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM + - (pEntry->rssi_stat.ValidBit - OFDM_pkt) * - UndecoratedSmoothedCCK) / pEntry->rssi_stat.ValidBit; - else - UndecoratedSmoothedPWDB = 0; - } - pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; - pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM; - pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; - } -} - -/* Endianness before calling this API */ -void odm_phy_status_query(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *phy_info, - u8 *phy_status, struct odm_per_pkt_info *pkt_info) -{ - odm_RxPhyStatus92CSeries_Parsing(dm_odm, phy_info, phy_status, pkt_info); - if (dm_odm->RSSI_test) - ;/* Select the packets to do RSSI checking for antenna switching. */ - else - odm_Process_RSSIForDM(dm_odm, phy_info, pkt_info); -} diff --git a/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c b/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c deleted file mode 100644 index e29cd35a5811..000000000000 --- a/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c +++ /dev/null @@ -1,335 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include "odm_precomp.h" -#include "phy.h" - -static void dm_rx_hw_antena_div_init(struct odm_dm_struct *dm_odm) -{ - struct adapter *adapter = dm_odm->Adapter; - u32 value32; - - if (*dm_odm->mp_mode == 1) { - dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); - return; - } - - /* MAC Setting */ - value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); - phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, - value32 | (BIT(23) | BIT(25))); - /* Pin Settings */ - phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 1); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); - /* OFDM Settings */ - phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, - 0x000000a0); - /* CCK Settings */ - phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); - phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); - rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT); - phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201); -} - -static void dm_trx_hw_antenna_div_init(struct odm_dm_struct *dm_odm) -{ - struct adapter *adapter = dm_odm->Adapter; - u32 value32; - - if (*dm_odm->mp_mode == 1) { - dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(5) | BIT(4) | BIT(3), 0); - return; - } - - /* MAC Setting */ - value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); - phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, - value32 | (BIT(23) | BIT(25))); - /* Pin Settings */ - phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 0); - phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); - /* OFDM Settings */ - phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, - 0x000000a0); - /* CCK Settings */ - phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); - phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); - /* Tx Settings */ - phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 0); - rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT); - - /* antenna mapping table */ - if (!dm_odm->bIsMPChip) { /* testchip */ - phy_set_bb_reg(adapter, ODM_REG_RX_DEFAULT_A_11N, - BIT(10) | BIT(9) | BIT(8), 1); - phy_set_bb_reg(adapter, ODM_REG_RX_DEFAULT_A_11N, - BIT(13) | BIT(12) | BIT(11), 2); - } else { /* MPchip */ - phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, - 0x0201); - } -} - -static void dm_fast_training_init(struct odm_dm_struct *dm_odm) -{ - struct adapter *adapter = dm_odm->Adapter; - u32 value32, i; - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - - if (*dm_odm->mp_mode == 1) - return; - - for (i = 0; i < 6; i++) { - dm_fat_tbl->Bssid[i] = 0; - dm_fat_tbl->antSumRSSI[i] = 0; - dm_fat_tbl->antRSSIcnt[i] = 0; - dm_fat_tbl->antAveRSSI[i] = 0; - } - dm_fat_tbl->TrainIdx = 0; - dm_fat_tbl->FAT_State = FAT_NORMAL_STATE; - - /* MAC Setting */ - value32 = phy_query_bb_reg(adapter, 0x4c, bMaskDWord); - phy_set_bb_reg(adapter, 0x4c, bMaskDWord, - value32 | (BIT(23) | BIT(25))); - value32 = phy_query_bb_reg(adapter, 0x7B4, bMaskDWord); - phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, - value32 | (BIT(16) | BIT(17))); - - /* Match MAC ADDR */ - phy_set_bb_reg(adapter, 0x7b4, 0xFFFF, 0); - phy_set_bb_reg(adapter, 0x7b0, bMaskDWord, 0); - - phy_set_bb_reg(adapter, 0x870, BIT(9) | BIT(8), 0); - phy_set_bb_reg(adapter, 0x864, BIT(10), 0); - phy_set_bb_reg(adapter, 0xb2c, BIT(22), 0); - phy_set_bb_reg(adapter, 0xb2c, BIT(31), 1); - phy_set_bb_reg(adapter, 0xca4, bMaskDWord, 0x000000a0); - - /* antenna mapping table */ - if (!dm_odm->bIsMPChip) { /* testchip */ - phy_set_bb_reg(adapter, 0x858, BIT(10) | BIT(9) | BIT(8), 1); - phy_set_bb_reg(adapter, 0x858, BIT(13) | BIT(12) | BIT(11), 2); - } else { /* MPchip */ - phy_set_bb_reg(adapter, 0x914, bMaskByte0, 1); - phy_set_bb_reg(adapter, 0x914, bMaskByte1, 2); - } - - /* Default Ant Setting when no fast training */ - phy_set_bb_reg(adapter, 0x80c, BIT(21), 1); - phy_set_bb_reg(adapter, 0x864, BIT(5) | BIT(4) | BIT(3), 0); - phy_set_bb_reg(adapter, 0x864, BIT(8) | BIT(7) | BIT(6), 1); - - /* Enter Traing state */ - phy_set_bb_reg(adapter, 0x864, BIT(2) | BIT(1) | BIT(0), 1); - phy_set_bb_reg(adapter, 0xc50, BIT(7), 1); -} - -void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm) -{ - if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) - dm_rx_hw_antena_div_init(dm_odm); - else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - dm_trx_hw_antenna_div_init(dm_odm); - else if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) - dm_fast_training_init(dm_odm); -} - -void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - struct adapter *adapter = dm_odm->Adapter; - u32 default_ant, optional_ant; - - if (dm_fat_tbl->RxIdleAnt == ant) - return; - - if (ant == MAIN_ANT) { - default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; - optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; - } else { - default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; - optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; - } - - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(5) | BIT(4) | BIT(3), default_ant); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(8) | BIT(7) | BIT(6), optional_ant); - phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N, - BIT(14) | BIT(13) | BIT(12), default_ant); - phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N, - BIT(6) | BIT(7), default_ant); - } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(5) | BIT(4) | BIT(3), default_ant); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(8) | BIT(7) | BIT(6), optional_ant); - } - - dm_fat_tbl->RxIdleAnt = ant; -} - -static void update_tx_ant_88eu(struct odm_dm_struct *dm_odm, u8 ant, u32 mac_id) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - u8 target_ant; - - if (ant == MAIN_ANT) - target_ant = MAIN_ANT_CG_TRX; - else - target_ant = AUX_ANT_CG_TRX; - dm_fat_tbl->antsel_a[mac_id] = target_ant & BIT(0); - dm_fat_tbl->antsel_b[mac_id] = (target_ant & BIT(1)) >> 1; - dm_fat_tbl->antsel_c[mac_id] = (target_ant & BIT(2)) >> 2; -} - -void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm, - u8 *desc, u8 mac_id) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - - if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || - (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)) { - SET_TX_DESC_ANTSEL_A_88E(desc, dm_fat_tbl->antsel_a[mac_id]); - SET_TX_DESC_ANTSEL_B_88E(desc, dm_fat_tbl->antsel_b[mac_id]); - SET_TX_DESC_ANTSEL_C_88E(desc, dm_fat_tbl->antsel_c[mac_id]); - } -} - -void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct *dm_odm, - u8 antsel_tr_mux, u32 mac_id, u8 rx_pwdb_all) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { - if (antsel_tr_mux == MAIN_ANT_CG_TRX) { - dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all; - dm_fat_tbl->MainAnt_Cnt[mac_id]++; - } else { - dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all; - dm_fat_tbl->AuxAnt_Cnt[mac_id]++; - } - } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { - if (antsel_tr_mux == MAIN_ANT_CGCS_RX) { - dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all; - dm_fat_tbl->MainAnt_Cnt[mac_id]++; - } else { - dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all; - dm_fat_tbl->AuxAnt_Cnt[mac_id]++; - } - } -} - -static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct *dm_odm) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - struct rtw_dig *dig_table = &dm_odm->DM_DigTable; - struct sta_info *entry; - u32 i, min_rssi = 0xFF, ant_div_max_rssi = 0, max_rssi = 0; - u32 local_min_rssi, local_max_rssi; - u32 main_rssi, aux_rssi; - u8 RxIdleAnt = 0, target_ant = 7; - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - entry = dm_odm->pODM_StaInfo[i]; - if (IS_STA_VALID(entry)) { - /* 2 Calculate RSSI per Antenna */ - main_rssi = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ? - (dm_fat_tbl->MainAnt_Sum[i] / - dm_fat_tbl->MainAnt_Cnt[i]) : 0; - aux_rssi = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ? - (dm_fat_tbl->AuxAnt_Sum[i] / - dm_fat_tbl->AuxAnt_Cnt[i]) : 0; - target_ant = (main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT; - /* 2 Select max_rssi for DIG */ - local_max_rssi = max(main_rssi, aux_rssi); - if ((local_max_rssi > ant_div_max_rssi) && - (local_max_rssi < 40)) - ant_div_max_rssi = local_max_rssi; - if (local_max_rssi > max_rssi) - max_rssi = local_max_rssi; - - /* 2 Select RX Idle Antenna */ - if ((dm_fat_tbl->RxIdleAnt == MAIN_ANT) && - (main_rssi == 0)) - main_rssi = aux_rssi; - else if ((dm_fat_tbl->RxIdleAnt == AUX_ANT) && - (aux_rssi == 0)) - aux_rssi = main_rssi; - - local_min_rssi = min(main_rssi, aux_rssi); - if (local_min_rssi < min_rssi) { - min_rssi = local_min_rssi; - RxIdleAnt = target_ant; - } - /* 2 Select TRX Antenna */ - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - update_tx_ant_88eu(dm_odm, target_ant, i); - } - dm_fat_tbl->MainAnt_Sum[i] = 0; - dm_fat_tbl->AuxAnt_Sum[i] = 0; - dm_fat_tbl->MainAnt_Cnt[i] = 0; - dm_fat_tbl->AuxAnt_Cnt[i] = 0; - } - - /* 2 Set RX Idle Antenna */ - rtl88eu_dm_update_rx_idle_ant(dm_odm, RxIdleAnt); - - dig_table->AntDiv_RSSI_max = ant_div_max_rssi; - dig_table->RSSI_max = max_rssi; -} - -void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - struct adapter *adapter = dm_odm->Adapter; - - if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV)) - return; - - if (!dm_odm->bLinked) { - if (dm_fat_tbl->bBecomeLinked) { - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); - phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, - BIT(15), 0); - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, - BIT(21), 0); - dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; - } - return; - } - - if (!dm_fat_tbl->bBecomeLinked) { - phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 1); - phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, - BIT(15), 1); - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, - BIT(21), 1); - dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; - } - - if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || - (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) - rtl88eu_dm_hw_ant_div(dm_odm); -} diff --git a/drivers/staging/rtl8188eu/hal/phy.c b/drivers/staging/rtl8188eu/hal/phy.c deleted file mode 100644 index 256f87b9d630..000000000000 --- a/drivers/staging/rtl8188eu/hal/phy.c +++ /dev/null @@ -1,1276 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#define _RTL8188E_PHYCFG_C_ - -#include <osdep_service.h> -#include <drv_types.h> -#include <rtl8188e_hal.h> -#include <rf.h> -#include <phy.h> - -#define MAX_PRECMD_CNT 16 -#define MAX_RFDEPENDCMD_CNT 16 -#define MAX_POSTCMD_CNT 16 - -#define MAX_DOZE_WAITING_TIMES_9x 64 - -static u32 cal_bit_shift(u32 bitmask) -{ - u32 i; - - for (i = 0; i <= 31; i++) { - if (((bitmask >> i) & 0x1) == 1) - break; - } - return i; -} - -u32 phy_query_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask) -{ - u32 original_value, bit_shift; - - original_value = usb_read32(adapt, regaddr); - bit_shift = cal_bit_shift(bitmask); - return (original_value & bitmask) >> bit_shift; -} - -void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask, u32 data) -{ - u32 original_value, bit_shift; - - if (bitmask != bMaskDWord) { /* if not "double word" write */ - original_value = usb_read32(adapt, regaddr); - bit_shift = cal_bit_shift(bitmask); - data = (original_value & (~bitmask)) | (data << bit_shift); - } - - usb_write32(adapt, regaddr, data); -} - -static u32 rf_serial_read(struct adapter *adapt, enum rf_radio_path rfpath, u32 offset) -{ - u32 ret = 0; - struct bb_reg_def *phyreg = &adapt->HalData->PHYRegDef[rfpath]; - u32 tmplong, tmplong2; - u8 rfpi_enable = 0; - - offset &= 0xff; - - tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord); - if (rfpath == RF_PATH_A) - tmplong2 = tmplong; - else - tmplong2 = phy_query_bb_reg(adapt, phyreg->rfHSSIPara2, - bMaskDWord); - - tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | - (offset << 23) | bLSSIReadEdge; - - phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord, - tmplong & (~bLSSIReadEdge)); - udelay(10); - - phy_set_bb_reg(adapt, phyreg->rfHSSIPara2, bMaskDWord, tmplong2); - udelay(100); - - udelay(10); - - if (rfpath == RF_PATH_A) - rfpi_enable = (u8)phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter1, BIT(8)); - else if (rfpath == RF_PATH_B) - rfpi_enable = (u8)phy_query_bb_reg(adapt, rFPGA0_XB_HSSIParameter1, BIT(8)); - - if (rfpi_enable) - ret = phy_query_bb_reg(adapt, phyreg->rfLSSIReadBackPi, - bLSSIReadBackData); - else - ret = phy_query_bb_reg(adapt, phyreg->rfLSSIReadBack, - bLSSIReadBackData); - return ret; -} - -static void rf_serial_write(struct adapter *adapt, - enum rf_radio_path rfpath, u32 offset, - u32 data) -{ - u32 data_and_addr = 0; - struct bb_reg_def *phyreg = &adapt->HalData->PHYRegDef[rfpath]; - - offset &= 0xff; - data_and_addr = ((offset << 20) | (data & 0x000fffff)) & 0x0fffffff; - phy_set_bb_reg(adapt, phyreg->rf3wireOffset, bMaskDWord, data_and_addr); -} - -u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rf_path, - u32 reg_addr, u32 bit_mask) -{ - u32 original_value, bit_shift; - - original_value = rf_serial_read(adapt, rf_path, reg_addr); - bit_shift = cal_bit_shift(bit_mask); - return (original_value & bit_mask) >> bit_shift; -} - -void phy_set_rf_reg(struct adapter *adapt, enum rf_radio_path rf_path, - u32 reg_addr, u32 bit_mask, u32 data) -{ - u32 original_value, bit_shift; - - /* RF data is 12 bits only */ - if (bit_mask != bRFRegOffsetMask) { - original_value = rf_serial_read(adapt, rf_path, reg_addr); - bit_shift = cal_bit_shift(bit_mask); - data = (original_value & (~bit_mask)) | (data << bit_shift); - } - - rf_serial_write(adapt, rf_path, reg_addr, data); -} - -static void get_tx_power_index(struct adapter *adapt, u8 channel, u8 *cck_pwr, - u8 *ofdm_pwr, u8 *bw20_pwr, u8 *bw40_pwr) -{ - struct hal_data_8188e *hal_data = adapt->HalData; - u8 index = (channel - 1); - u8 TxCount = 0, path_nums; - - path_nums = 1; - - for (TxCount = 0; TxCount < path_nums; TxCount++) { - if (TxCount == RF_PATH_A) { - cck_pwr[TxCount] = hal_data->Index24G_CCK_Base[TxCount][index]; - ofdm_pwr[TxCount] = hal_data->Index24G_BW40_Base[RF_PATH_A][index] + - hal_data->OFDM_24G_Diff[TxCount][RF_PATH_A]; - - bw20_pwr[TxCount] = hal_data->Index24G_BW40_Base[RF_PATH_A][index] + - hal_data->BW20_24G_Diff[TxCount][RF_PATH_A]; - bw40_pwr[TxCount] = hal_data->Index24G_BW40_Base[TxCount][index]; - } else if (TxCount == RF_PATH_B) { - cck_pwr[TxCount] = hal_data->Index24G_CCK_Base[TxCount][index]; - ofdm_pwr[TxCount] = hal_data->Index24G_BW40_Base[RF_PATH_A][index] + - hal_data->BW20_24G_Diff[RF_PATH_A][index] + - hal_data->BW20_24G_Diff[TxCount][index]; - - bw20_pwr[TxCount] = hal_data->Index24G_BW40_Base[RF_PATH_A][index] + - hal_data->BW20_24G_Diff[TxCount][RF_PATH_A] + - hal_data->BW20_24G_Diff[TxCount][index]; - bw40_pwr[TxCount] = hal_data->Index24G_BW40_Base[TxCount][index]; - } - } -} - -void phy_set_tx_power_level(struct adapter *adapt, u8 channel) -{ - u8 cck_pwr[MAX_TX_COUNT] = {0}; - u8 ofdm_pwr[MAX_TX_COUNT] = {0};/* [0]:RF-A, [1]:RF-B */ - u8 bw20_pwr[MAX_TX_COUNT] = {0}; - u8 bw40_pwr[MAX_TX_COUNT] = {0}; - - get_tx_power_index(adapt, channel, &cck_pwr[0], &ofdm_pwr[0], - &bw20_pwr[0], &bw40_pwr[0]); - - rtl88eu_phy_rf6052_set_cck_txpower(adapt, &cck_pwr[0]); - rtl88eu_phy_rf6052_set_ofdm_txpower(adapt, &ofdm_pwr[0], &bw20_pwr[0], - &bw40_pwr[0], channel); -} - -static void phy_set_bw_mode_callback(struct adapter *adapt) -{ - struct hal_data_8188e *hal_data = adapt->HalData; - u8 reg_bw_opmode; - u8 reg_prsr_rsc; - - if (adapt->bDriverStopped) - return; - - /* Set MAC register */ - - reg_bw_opmode = usb_read8(adapt, REG_BWOPMODE); - reg_prsr_rsc = usb_read8(adapt, REG_RRSR + 2); - - switch (hal_data->CurrentChannelBW) { - case HT_CHANNEL_WIDTH_20: - reg_bw_opmode |= BW_OPMODE_20MHZ; - usb_write8(adapt, REG_BWOPMODE, reg_bw_opmode); - break; - case HT_CHANNEL_WIDTH_40: - reg_bw_opmode &= ~BW_OPMODE_20MHZ; - usb_write8(adapt, REG_BWOPMODE, reg_bw_opmode); - reg_prsr_rsc = (reg_prsr_rsc & 0x90) | - (hal_data->nCur40MhzPrimeSC << 5); - usb_write8(adapt, REG_RRSR + 2, reg_prsr_rsc); - break; - default: - break; - } - - /* Set PHY related register */ - switch (hal_data->CurrentChannelBW) { - case HT_CHANNEL_WIDTH_20: - phy_set_bb_reg(adapt, rFPGA0_RFMOD, bRFMOD, 0x0); - phy_set_bb_reg(adapt, rFPGA1_RFMOD, bRFMOD, 0x0); - break; - case HT_CHANNEL_WIDTH_40: - phy_set_bb_reg(adapt, rFPGA0_RFMOD, bRFMOD, 0x1); - phy_set_bb_reg(adapt, rFPGA1_RFMOD, bRFMOD, 0x1); - /* Set Control channel to upper or lower. - * These settings are required only for 40MHz - */ - phy_set_bb_reg(adapt, rCCK0_System, bCCKSideBand, - (hal_data->nCur40MhzPrimeSC >> 1)); - phy_set_bb_reg(adapt, rOFDM1_LSTF, 0xC00, - hal_data->nCur40MhzPrimeSC); - phy_set_bb_reg(adapt, 0x818, (BIT(26) | BIT(27)), - (hal_data->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); - break; - default: - break; - } - - /* Set RF related register */ - rtl88eu_phy_rf6052_set_bandwidth(adapt, hal_data->CurrentChannelBW); -} - -void rtw_hal_set_bwmode(struct adapter *adapt, enum ht_channel_width bandwidth, - unsigned char offset) -{ - struct hal_data_8188e *hal_data = adapt->HalData; - enum ht_channel_width tmp_bw = hal_data->CurrentChannelBW; - - hal_data->CurrentChannelBW = bandwidth; - hal_data->nCur40MhzPrimeSC = offset; - - if ((!adapt->bDriverStopped) && (!adapt->bSurpriseRemoved)) - phy_set_bw_mode_callback(adapt); - else - hal_data->CurrentChannelBW = tmp_bw; -} - -static void phy_sw_chnl_callback(struct adapter *adapt, u8 channel) -{ - u32 param1, param2; - struct hal_data_8188e *hal_data = adapt->HalData; - - phy_set_tx_power_level(adapt, channel); - - param1 = RF_CHNLBW; - param2 = channel; - hal_data->RfRegChnlVal[0] = (hal_data->RfRegChnlVal[0] & - 0xfffffc00) | param2; - phy_set_rf_reg(adapt, 0, param1, - bRFRegOffsetMask, hal_data->RfRegChnlVal[0]); -} - -void rtw_hal_set_chan(struct adapter *adapt, u8 channel) -{ - struct hal_data_8188e *hal_data = adapt->HalData; - u8 tmpchannel = hal_data->CurrentChannel; - - if (channel == 0) - channel = 1; - - hal_data->CurrentChannel = channel; - - if ((!adapt->bDriverStopped) && (!adapt->bSurpriseRemoved)) - phy_sw_chnl_callback(adapt, channel); - else - hal_data->CurrentChannel = tmpchannel; -} - -#define ODM_TXPWRTRACK_MAX_IDX_88E 6 - -void rtl88eu_dm_txpower_track_adjust(struct odm_dm_struct *dm_odm, u8 type, - u8 *direction, u32 *out_write_val) -{ - u8 pwr_value = 0; - /* Tx power tracking BB swing table. */ - if (type == 0) { /* For OFDM adjust */ - if (dm_odm->BbSwingIdxOfdm <= dm_odm->BbSwingIdxOfdmBase) { - *direction = 1; - pwr_value = dm_odm->BbSwingIdxOfdmBase - - dm_odm->BbSwingIdxOfdm; - } else { - *direction = 2; - pwr_value = dm_odm->BbSwingIdxOfdm - - dm_odm->BbSwingIdxOfdmBase; - } - } else if (type == 1) { /* For CCK adjust. */ - if (dm_odm->BbSwingIdxCck <= dm_odm->BbSwingIdxCckBase) { - *direction = 1; - pwr_value = dm_odm->BbSwingIdxCckBase - - dm_odm->BbSwingIdxCck; - } else { - *direction = 2; - pwr_value = dm_odm->BbSwingIdxCck - - dm_odm->BbSwingIdxCckBase; - } - } - - if (pwr_value >= ODM_TXPWRTRACK_MAX_IDX_88E && *direction == 1) - pwr_value = ODM_TXPWRTRACK_MAX_IDX_88E; - - *out_write_val = pwr_value | (pwr_value << 8) | (pwr_value << 16) | - (pwr_value << 24); -} - -static void dm_txpwr_track_setpwr(struct odm_dm_struct *dm_odm) -{ - if (dm_odm->BbSwingFlagOfdm || dm_odm->BbSwingFlagCck) { - phy_set_tx_power_level(dm_odm->Adapter, *dm_odm->pChannel); - dm_odm->BbSwingFlagOfdm = false; - dm_odm->BbSwingFlagCck = false; - } -} - -void rtl88eu_dm_txpower_tracking_callback_thermalmeter(struct adapter *adapt) -{ - struct hal_data_8188e *hal_data = adapt->HalData; - u8 thermal_val = 0, delta, delta_lck, delta_iqk, offset; - u8 thermal_avg_count = 0; - u32 thermal_avg = 0; - s32 ele_d, temp_cck; - s8 ofdm_index[2], cck_index = 0; - s8 ofdm_index_old[2] = {0, 0}, cck_index_old = 0; - u32 i = 0, j = 0; - - u8 ofdm_min_index = 6; /* OFDM BB Swing should be less than +3.0dB */ - s8 ofdm_index_mapping[2][index_mapping_NUM_88E] = { - /* 2.4G, decrease power */ - {0, 0, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 10, 11}, - /* 2.4G, increase power */ - {0, 0, -1, -2, -3, -4, -4, -4, -4, -5, -7, -8, -9, -9, -10}, - }; - u8 thermal_mapping[2][index_mapping_NUM_88E] = { - /* 2.4G, decrease power */ - {0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 27}, - /* 2.4G, increase power */ - {0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 25, 25, 25}, - }; - struct odm_dm_struct *dm_odm = &hal_data->odmpriv; - - dm_txpwr_track_setpwr(dm_odm); - - dm_odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; - - dm_odm->RFCalibrateInfo.RegA24 = 0x090e1317; - - thermal_val = (u8)rtw_hal_read_rfreg(adapt, RF_PATH_A, - RF_T_METER_88E, 0xfc00); - - if (thermal_val) { - /* Query OFDM path A default setting */ - ele_d = phy_query_bb_reg(adapt, rOFDM0_XATxIQImbalance, bMaskDWord) & bMaskOFDM_D; - for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { - if (ele_d == (OFDMSwingTable[i] & bMaskOFDM_D)) { - ofdm_index_old[0] = (u8)i; - dm_odm->BbSwingIdxOfdmBase = (u8)i; - break; - } - } - - /* Query CCK default setting From 0xa24 */ - temp_cck = dm_odm->RFCalibrateInfo.RegA24; - - for (i = 0; i < CCK_TABLE_SIZE; i++) { - if ((dm_odm->RFCalibrateInfo.bCCKinCH14 && - memcmp(&temp_cck, &CCKSwingTable_Ch14[i][2], 4)) || - memcmp(&temp_cck, &CCKSwingTable_Ch1_Ch13[i][2], 4)) { - cck_index_old = (u8)i; - dm_odm->BbSwingIdxCckBase = (u8)i; - break; - } - } - - if (!dm_odm->RFCalibrateInfo.ThermalValue) { - dm_odm->RFCalibrateInfo.ThermalValue = hal_data->EEPROMThermalMeter; - dm_odm->RFCalibrateInfo.ThermalValue_LCK = thermal_val; - dm_odm->RFCalibrateInfo.ThermalValue_IQK = thermal_val; - - dm_odm->RFCalibrateInfo.OFDM_index[0] = ofdm_index_old[0]; - dm_odm->RFCalibrateInfo.CCK_index = cck_index_old; - } - - /* calculate average thermal meter */ - dm_odm->RFCalibrateInfo.ThermalValue_AVG[dm_odm->RFCalibrateInfo.ThermalValue_AVG_index] = thermal_val; - dm_odm->RFCalibrateInfo.ThermalValue_AVG_index++; - if (dm_odm->RFCalibrateInfo.ThermalValue_AVG_index == AVG_THERMAL_NUM_88E) - dm_odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; - - for (i = 0; i < AVG_THERMAL_NUM_88E; i++) { - if (dm_odm->RFCalibrateInfo.ThermalValue_AVG[i]) { - thermal_avg += dm_odm->RFCalibrateInfo.ThermalValue_AVG[i]; - thermal_avg_count++; - } - } - - if (thermal_avg_count) - thermal_val = (u8)(thermal_avg / thermal_avg_count); - - if (dm_odm->RFCalibrateInfo.bDoneTxpower && - !dm_odm->RFCalibrateInfo.bReloadtxpowerindex) { - delta = abs(thermal_val - dm_odm->RFCalibrateInfo.ThermalValue); - } else { - delta = abs(thermal_val - hal_data->EEPROMThermalMeter); - if (dm_odm->RFCalibrateInfo.bReloadtxpowerindex) { - dm_odm->RFCalibrateInfo.bReloadtxpowerindex = false; - dm_odm->RFCalibrateInfo.bDoneTxpower = false; - } - } - - delta_lck = abs(dm_odm->RFCalibrateInfo.ThermalValue_LCK - thermal_val); - delta_iqk = abs(dm_odm->RFCalibrateInfo.ThermalValue_IQK - thermal_val); - - /* Delta temperature is equal to or larger than 20 centigrade.*/ - if ((delta_lck >= 8)) { - dm_odm->RFCalibrateInfo.ThermalValue_LCK = thermal_val; - rtl88eu_phy_lc_calibrate(adapt); - } - - if (delta > 0 && dm_odm->RFCalibrateInfo.TxPowerTrackControl) { - delta = abs(hal_data->EEPROMThermalMeter - thermal_val); - - /* calculate new OFDM / CCK offset */ - if (thermal_val > hal_data->EEPROMThermalMeter) - j = 1; - else - j = 0; - for (offset = 0; offset < index_mapping_NUM_88E; offset++) { - if (delta < thermal_mapping[j][offset]) { - if (offset != 0) - offset--; - break; - } - } - if (offset >= index_mapping_NUM_88E) - offset = index_mapping_NUM_88E - 1; - - /* Updating ofdm_index values with new OFDM / CCK offset */ - ofdm_index[0] = dm_odm->RFCalibrateInfo.OFDM_index[0] + ofdm_index_mapping[j][offset]; - if (ofdm_index[0] > OFDM_TABLE_SIZE_92D - 1) - ofdm_index[0] = OFDM_TABLE_SIZE_92D - 1; - else if (ofdm_index[0] < ofdm_min_index) - ofdm_index[0] = ofdm_min_index; - - cck_index = dm_odm->RFCalibrateInfo.CCK_index + ofdm_index_mapping[j][offset]; - if (cck_index > CCK_TABLE_SIZE - 1) - cck_index = CCK_TABLE_SIZE - 1; - else if (cck_index < 0) - cck_index = 0; - - /* 2 temporarily remove bNOPG */ - /* Config by SwingTable */ - if (dm_odm->RFCalibrateInfo.TxPowerTrackControl) { - dm_odm->RFCalibrateInfo.bDoneTxpower = true; - - /* Revse TX power table. */ - dm_odm->BbSwingIdxOfdm = (u8)ofdm_index[0]; - dm_odm->BbSwingIdxCck = (u8)cck_index; - - if (dm_odm->BbSwingIdxOfdmCurrent != dm_odm->BbSwingIdxOfdm) { - dm_odm->BbSwingIdxOfdmCurrent = dm_odm->BbSwingIdxOfdm; - dm_odm->BbSwingFlagOfdm = true; - } - - if (dm_odm->BbSwingIdxCckCurrent != dm_odm->BbSwingIdxCck) { - dm_odm->BbSwingIdxCckCurrent = dm_odm->BbSwingIdxCck; - dm_odm->BbSwingFlagCck = true; - } - } - } - - /* Delta temperature is equal to or larger than 20 centigrade.*/ - if (delta_iqk >= 8) { - dm_odm->RFCalibrateInfo.ThermalValue_IQK = thermal_val; - rtl88eu_phy_iq_calibrate(adapt, false); - } - /* update thermal meter value */ - if (dm_odm->RFCalibrateInfo.TxPowerTrackControl) - dm_odm->RFCalibrateInfo.ThermalValue = thermal_val; - } - dm_odm->RFCalibrateInfo.TXPowercount = 0; -} - -#define MAX_TOLERANCE 5 - -static u8 phy_path_a_iqk(struct adapter *adapt, bool config_pathb) -{ - u32 reg_eac, reg_e94, reg_e9c; - u8 result = 0x00; - - /* 1 Tx IQK */ - /* path-A IQK setting */ - phy_set_bb_reg(adapt, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); - phy_set_bb_reg(adapt, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); - phy_set_bb_reg(adapt, rTx_IQK_PI_A, bMaskDWord, 0x8214032a); - phy_set_bb_reg(adapt, rRx_IQK_PI_A, bMaskDWord, 0x28160000); - - /* LO calibration setting */ - phy_set_bb_reg(adapt, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); - - /* One shot, path A LOK & IQK */ - phy_set_bb_reg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - phy_set_bb_reg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - mdelay(IQK_DELAY_TIME_88E); - - reg_eac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); - reg_e94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); - reg_e9c = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord); - - if (!(reg_eac & BIT(28)) && - (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && - (((reg_e9c & 0x03FF0000) >> 16) != 0x42)) - result |= 0x01; - return result; -} - -static u8 phy_path_a_rx_iqk(struct adapter *adapt, bool configPathB) -{ - u32 reg_eac, reg_e94, reg_e9c, reg_ea4, u4tmp; - u8 result = 0x00; - - /* 1 Get TXIMR setting */ - /* modify RXIQK mode table */ - phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); - phy_set_rf_reg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0); - phy_set_rf_reg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); - phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f); - phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B); - - /* PA,PAD off */ - phy_set_rf_reg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980); - phy_set_rf_reg(adapt, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000); - - phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); - - /* IQK setting */ - phy_set_bb_reg(adapt, rTx_IQK, bMaskDWord, 0x01007c00); - phy_set_bb_reg(adapt, rRx_IQK, bMaskDWord, 0x81004800); - - /* path-A IQK setting */ - phy_set_bb_reg(adapt, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); - phy_set_bb_reg(adapt, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); - phy_set_bb_reg(adapt, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); - phy_set_bb_reg(adapt, rRx_IQK_PI_A, bMaskDWord, 0x28160000); - - /* LO calibration setting */ - phy_set_bb_reg(adapt, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); - - /* One shot, path A LOK & IQK */ - phy_set_bb_reg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - phy_set_bb_reg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - /* delay x ms */ - mdelay(IQK_DELAY_TIME_88E); - - /* Check failed */ - reg_eac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); - reg_e94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); - reg_e9c = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord); - - if (!(reg_eac & BIT(28)) && - (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && - (((reg_e9c & 0x03FF0000) >> 16) != 0x42)) - result |= 0x01; - else /* if Tx not OK, ignore Rx */ - return result; - - u4tmp = 0x80007C00 | (reg_e94 & 0x3FF0000) | ((reg_e9c & 0x3FF0000) >> 16); - phy_set_bb_reg(adapt, rTx_IQK, bMaskDWord, u4tmp); - - /* 1 RX IQK */ - /* modify RXIQK mode table */ - phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); - phy_set_rf_reg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0); - phy_set_rf_reg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); - phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f); - phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa); - phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); - - /* IQK setting */ - phy_set_bb_reg(adapt, rRx_IQK, bMaskDWord, 0x01004800); - - /* path-A IQK setting */ - phy_set_bb_reg(adapt, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); - phy_set_bb_reg(adapt, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); - phy_set_bb_reg(adapt, rTx_IQK_PI_A, bMaskDWord, 0x82160c05); - phy_set_bb_reg(adapt, rRx_IQK_PI_A, bMaskDWord, 0x28160c1f); - - /* LO calibration setting */ - phy_set_bb_reg(adapt, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); - - phy_set_bb_reg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - phy_set_bb_reg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - mdelay(IQK_DELAY_TIME_88E); - - /* Check failed */ - reg_eac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); - reg_e94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); - reg_e9c = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord); - reg_ea4 = phy_query_bb_reg(adapt, rRx_Power_Before_IQK_A_2, bMaskDWord); - - /* reload RF 0xdf */ - phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); - phy_set_rf_reg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180); - - if (!(reg_eac & BIT(27)) && /* if Tx is OK, check whether Rx is OK */ - (((reg_ea4 & 0x03FF0000) >> 16) != 0x132) && - (((reg_eac & 0x03FF0000) >> 16) != 0x36)) - result |= 0x02; - - return result; -} - -static u8 phy_path_b_iqk(struct adapter *adapt) -{ - u32 regeac, regeb4, regebc, regec4, regecc; - u8 result = 0x00; - - /* One shot, path B LOK & IQK */ - phy_set_bb_reg(adapt, rIQK_AGC_Cont, bMaskDWord, 0x00000002); - phy_set_bb_reg(adapt, rIQK_AGC_Cont, bMaskDWord, 0x00000000); - - mdelay(IQK_DELAY_TIME_88E); - - regeac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); - regeb4 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_B, bMaskDWord); - regebc = phy_query_bb_reg(adapt, rTx_Power_After_IQK_B, bMaskDWord); - regec4 = phy_query_bb_reg(adapt, rRx_Power_Before_IQK_B_2, bMaskDWord); - regecc = phy_query_bb_reg(adapt, rRx_Power_After_IQK_B_2, bMaskDWord); - - if (!(regeac & BIT(31)) && - (((regeb4 & 0x03FF0000) >> 16) != 0x142) && - (((regebc & 0x03FF0000) >> 16) != 0x42)) - result |= 0x01; - else - return result; - - if (!(regeac & BIT(30)) && - (((regec4 & 0x03FF0000) >> 16) != 0x132) && - (((regecc & 0x03FF0000) >> 16) != 0x36)) - result |= 0x02; - - return result; -} - -static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], - u8 final_candidate, bool txonly) -{ - u32 oldval_0, x, tx0_a, reg; - s32 y, tx0_c; - - if (final_candidate == 0xFF) { - return; - } else if (iqkok) { - oldval_0 = (phy_query_bb_reg(adapt, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - x = result[final_candidate][0]; - if ((x & 0x00000200) != 0) - x = x | 0xFFFFFC00; - - tx0_a = (x * oldval_0) >> 8; - phy_set_bb_reg(adapt, rOFDM0_XATxIQImbalance, 0x3FF, tx0_a); - phy_set_bb_reg(adapt, rOFDM0_ECCAThreshold, BIT(31), - ((x * oldval_0 >> 7) & 0x1)); - - y = result[final_candidate][1]; - if ((y & 0x00000200) != 0) - y = y | 0xFFFFFC00; - - tx0_c = (y * oldval_0) >> 8; - phy_set_bb_reg(adapt, rOFDM0_XCTxAFE, 0xF0000000, - ((tx0_c & 0x3C0) >> 6)); - phy_set_bb_reg(adapt, rOFDM0_XATxIQImbalance, 0x003F0000, - (tx0_c & 0x3F)); - phy_set_bb_reg(adapt, rOFDM0_ECCAThreshold, BIT(29), - ((y * oldval_0 >> 7) & 0x1)); - - if (txonly) - return; - - reg = result[final_candidate][2]; - phy_set_bb_reg(adapt, rOFDM0_XARxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][3] & 0x3F; - phy_set_bb_reg(adapt, rOFDM0_XARxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][3] >> 6) & 0xF; - phy_set_bb_reg(adapt, rOFDM0_RxIQExtAnta, 0xF0000000, reg); - } -} - -static void pathb_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], - u8 final_candidate, bool txonly) -{ - u32 oldval_1, x, tx1_a, reg; - s32 y, tx1_c; - - if (final_candidate == 0xFF) { - return; - } else if (iqkok) { - oldval_1 = (phy_query_bb_reg(adapt, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - x = result[final_candidate][4]; - if ((x & 0x00000200) != 0) - x = x | 0xFFFFFC00; - tx1_a = (x * oldval_1) >> 8; - phy_set_bb_reg(adapt, rOFDM0_XBTxIQImbalance, 0x3FF, tx1_a); - - phy_set_bb_reg(adapt, rOFDM0_ECCAThreshold, BIT(27), - ((x * oldval_1 >> 7) & 0x1)); - - y = result[final_candidate][5]; - if ((y & 0x00000200) != 0) - y = y | 0xFFFFFC00; - - tx1_c = (y * oldval_1) >> 8; - - phy_set_bb_reg(adapt, rOFDM0_XDTxAFE, 0xF0000000, - ((tx1_c & 0x3C0) >> 6)); - phy_set_bb_reg(adapt, rOFDM0_XBTxIQImbalance, 0x003F0000, - (tx1_c & 0x3F)); - phy_set_bb_reg(adapt, rOFDM0_ECCAThreshold, BIT(25), - ((y * oldval_1 >> 7) & 0x1)); - - if (txonly) - return; - - reg = result[final_candidate][6]; - phy_set_bb_reg(adapt, rOFDM0_XBRxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][7] & 0x3F; - phy_set_bb_reg(adapt, rOFDM0_XBRxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][7] >> 6) & 0xF; - phy_set_bb_reg(adapt, rOFDM0_AGCRSSITable, 0x0000F000, reg); - } -} - -static void save_adda_registers(struct adapter *adapt, const u32 *addareg, - u32 *backup, u32 register_num) -{ - u32 i; - - for (i = 0; i < register_num; i++) - backup[i] = phy_query_bb_reg(adapt, addareg[i], bMaskDWord); -} - -static void save_mac_registers(struct adapter *adapt, const u32 *mac_reg, - u32 *backup) -{ - u32 i; - - for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) - backup[i] = usb_read8(adapt, mac_reg[i]); - - backup[i] = usb_read32(adapt, mac_reg[i]); -} - -static void reload_adda_reg(struct adapter *adapt, const u32 *adda_reg, - u32 *backup, u32 regiester_num) -{ - u32 i; - - for (i = 0; i < regiester_num; i++) - phy_set_bb_reg(adapt, adda_reg[i], bMaskDWord, backup[i]); -} - -static void reload_mac_registers(struct adapter *adapt, const u32 *mac_reg, - u32 *backup) -{ - u32 i; - - for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) - usb_write8(adapt, mac_reg[i], (u8)backup[i]); - - usb_write32(adapt, mac_reg[i], backup[i]); -} - -static void path_adda_on(struct adapter *adapt, const u32 *adda_reg, - bool is_path_a_on, bool is2t) -{ - u32 path_on; - u32 i; - - if (!is2t) { - path_on = 0x0bdb25a0; - phy_set_bb_reg(adapt, adda_reg[0], bMaskDWord, 0x0b1b25a0); - } else { - path_on = is_path_a_on ? 0x04db25a4 : 0x0b1b25a4; - phy_set_bb_reg(adapt, adda_reg[0], bMaskDWord, path_on); - } - - for (i = 1; i < IQK_ADDA_REG_NUM; i++) - phy_set_bb_reg(adapt, adda_reg[i], bMaskDWord, path_on); -} - -static void mac_setting_calibration(struct adapter *adapt, const u32 *mac_reg, - u32 *backup) -{ - u32 i = 0; - - usb_write8(adapt, mac_reg[i], 0x3F); - - for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) - usb_write8(adapt, mac_reg[i], (u8)(backup[i] & (~BIT(3)))); - - usb_write8(adapt, mac_reg[i], (u8)(backup[i] & (~BIT(5)))); -} - -static void path_a_standby(struct adapter *adapt) -{ - phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x0); - phy_set_bb_reg(adapt, 0x840, bMaskDWord, 0x00010000); - phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); -} - -static void pi_mode_switch(struct adapter *adapt, bool pi_mode) -{ - u32 mode; - - mode = pi_mode ? 0x01000100 : 0x01000000; - phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); - phy_set_bb_reg(adapt, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); -} - -static bool simularity_compare(struct adapter *adapt, s32 resulta[][8], - u8 c1, u8 c2) -{ - u32 i, j, diff, sim_bitmap = 0, bound; - u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */ - bool result = true; - s32 tmp1 = 0, tmp2 = 0; - - bound = 4; - - for (i = 0; i < bound; i++) { - if ((i == 1) || (i == 3) || (i == 5) || (i == 7)) { - if ((resulta[c1][i] & 0x00000200) != 0) - tmp1 = resulta[c1][i] | 0xFFFFFC00; - else - tmp1 = resulta[c1][i]; - - if ((resulta[c2][i] & 0x00000200) != 0) - tmp2 = resulta[c2][i] | 0xFFFFFC00; - else - tmp2 = resulta[c2][i]; - } else { - tmp1 = resulta[c1][i]; - tmp2 = resulta[c2][i]; - } - - diff = abs(tmp1 - tmp2); - - if (diff > MAX_TOLERANCE) { - if ((i == 2 || i == 6) && !sim_bitmap) { - if (resulta[c1][i] + resulta[c1][i + 1] == 0) - final_candidate[(i / 4)] = c2; - else if (resulta[c2][i] + resulta[c2][i + 1] == 0) - final_candidate[(i / 4)] = c1; - else - sim_bitmap = sim_bitmap | (1 << i); - } else { - sim_bitmap = sim_bitmap | (1 << i); - } - } - } - - if (sim_bitmap == 0) { - for (i = 0; i < (bound / 4); i++) { - if (final_candidate[i] != 0xFF) { - for (j = i * 4; j < (i + 1) * 4 - 2; j++) - resulta[3][j] = resulta[final_candidate[i]][j]; - result = false; - } - } - return result; - } - - if (!(sim_bitmap & 0x03)) { /* path A TX OK */ - for (i = 0; i < 2; i++) - resulta[3][i] = resulta[c1][i]; - } - if (!(sim_bitmap & 0x0c)) { /* path A RX OK */ - for (i = 2; i < 4; i++) - resulta[3][i] = resulta[c1][i]; - } - - if (!(sim_bitmap & 0x30)) { /* path B TX OK */ - for (i = 4; i < 6; i++) - resulta[3][i] = resulta[c1][i]; - } - - if (!(sim_bitmap & 0xc0)) { /* path B RX OK */ - for (i = 6; i < 8; i++) - resulta[3][i] = resulta[c1][i]; - } - return false; -} - -static void phy_iq_calibrate(struct adapter *adapt, s32 result[][8], - u8 t, bool is2t) -{ - struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv; - u32 i; - u8 path_a_ok, path_b_ok; - static const u32 adda_reg[IQK_ADDA_REG_NUM] = { - rFPGA0_XCD_SwitchControl, rBlue_Tooth, - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN - }; - static const u32 iqk_mac_reg[IQK_MAC_REG_NUM] = { - REG_TXPAUSE, REG_BCN_CTRL, - REG_BCN_CTRL_1, REG_GPIO_MUXCFG - }; - /* since 92C & 92D have the different define in IQK_BB_REG */ - static const u32 iqk_bb_reg_92c[IQK_BB_REG_NUM] = { - rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, - rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, - rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD - }; - - u32 retry_count = 9; - - if (*dm_odm->mp_mode == 1) - retry_count = 9; - else - retry_count = 2; - - if (t == 0) { - /* Save ADDA parameters, turn Path A ADDA on */ - save_adda_registers(adapt, adda_reg, dm_odm->RFCalibrateInfo.ADDA_backup, - IQK_ADDA_REG_NUM); - save_mac_registers(adapt, iqk_mac_reg, - dm_odm->RFCalibrateInfo.IQK_MAC_backup); - save_adda_registers(adapt, iqk_bb_reg_92c, - dm_odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); - } - - path_adda_on(adapt, adda_reg, true, is2t); - if (t == 0) - dm_odm->RFCalibrateInfo.bRfPiEnable = (u8)phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter1, - BIT(8)); - - if (!dm_odm->RFCalibrateInfo.bRfPiEnable) { - /* Switch BB to PI mode to do IQ Calibration. */ - pi_mode_switch(adapt, true); - } - - /* BB setting */ - phy_set_bb_reg(adapt, rFPGA0_RFMOD, BIT(24), 0x00); - phy_set_bb_reg(adapt, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); - phy_set_bb_reg(adapt, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); - phy_set_bb_reg(adapt, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); - - phy_set_bb_reg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0x01); - phy_set_bb_reg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0x01); - phy_set_bb_reg(adapt, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00); - phy_set_bb_reg(adapt, rFPGA0_XB_RFInterfaceOE, BIT(10), 0x00); - - if (is2t) { - phy_set_bb_reg(adapt, rFPGA0_XA_LSSIParameter, bMaskDWord, - 0x00010000); - phy_set_bb_reg(adapt, rFPGA0_XB_LSSIParameter, bMaskDWord, - 0x00010000); - } - - /* MAC settings */ - mac_setting_calibration(adapt, iqk_mac_reg, - dm_odm->RFCalibrateInfo.IQK_MAC_backup); - - /* Page B init */ - /* AP or IQK */ - phy_set_bb_reg(adapt, rConfig_AntA, bMaskDWord, 0x0f600000); - - if (is2t) - phy_set_bb_reg(adapt, rConfig_AntB, bMaskDWord, 0x0f600000); - - /* IQ calibration setting */ - phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); - phy_set_bb_reg(adapt, rTx_IQK, bMaskDWord, 0x01007c00); - phy_set_bb_reg(adapt, rRx_IQK, bMaskDWord, 0x81004800); - - for (i = 0; i < retry_count; i++) { - path_a_ok = phy_path_a_iqk(adapt, is2t); - if (path_a_ok == 0x01) { - result[t][0] = (phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, - bMaskDWord) & 0x3FF0000) >> 16; - result[t][1] = (phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, - bMaskDWord) & 0x3FF0000) >> 16; - break; - } - } - - for (i = 0; i < retry_count; i++) { - path_a_ok = phy_path_a_rx_iqk(adapt, is2t); - if (path_a_ok == 0x03) { - result[t][2] = (phy_query_bb_reg(adapt, rRx_Power_Before_IQK_A_2, - bMaskDWord) & 0x3FF0000) >> 16; - result[t][3] = (phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, - bMaskDWord) & 0x3FF0000) >> 16; - break; - } - } - - if (is2t) { - path_a_standby(adapt); - - /* Turn Path B ADDA on */ - path_adda_on(adapt, adda_reg, false, is2t); - - for (i = 0; i < retry_count; i++) { - path_b_ok = phy_path_b_iqk(adapt); - if (path_b_ok == 0x03) { - result[t][4] = (phy_query_bb_reg(adapt, rTx_Power_Before_IQK_B, - bMaskDWord) & 0x3FF0000) >> 16; - result[t][5] = (phy_query_bb_reg(adapt, rTx_Power_After_IQK_B, - bMaskDWord) & 0x3FF0000) >> 16; - result[t][6] = (phy_query_bb_reg(adapt, rRx_Power_Before_IQK_B_2, - bMaskDWord) & 0x3FF0000) >> 16; - result[t][7] = (phy_query_bb_reg(adapt, rRx_Power_After_IQK_B_2, - bMaskDWord) & 0x3FF0000) >> 16; - break; - } else if (i == (retry_count - 1) && path_b_ok == 0x01) { /* Tx IQK OK */ - result[t][4] = (phy_query_bb_reg(adapt, rTx_Power_Before_IQK_B, - bMaskDWord) & 0x3FF0000) >> 16; - result[t][5] = (phy_query_bb_reg(adapt, rTx_Power_After_IQK_B, - bMaskDWord) & 0x3FF0000) >> 16; - } - } - } - - /* Back to BB mode, load original value */ - phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0); - - if (t != 0) { - if (!dm_odm->RFCalibrateInfo.bRfPiEnable) { - /* Switch back BB to SI mode after - * finish IQ Calibration. - */ - pi_mode_switch(adapt, false); - } - - /* Reload ADDA power saving parameters */ - reload_adda_reg(adapt, adda_reg, dm_odm->RFCalibrateInfo.ADDA_backup, - IQK_ADDA_REG_NUM); - - /* Reload MAC parameters */ - reload_mac_registers(adapt, iqk_mac_reg, - dm_odm->RFCalibrateInfo.IQK_MAC_backup); - - reload_adda_reg(adapt, iqk_bb_reg_92c, dm_odm->RFCalibrateInfo.IQK_BB_backup, - IQK_BB_REG_NUM); - - /* Restore RX initial gain */ - phy_set_bb_reg(adapt, rFPGA0_XA_LSSIParameter, - bMaskDWord, 0x00032ed3); - if (is2t) - phy_set_bb_reg(adapt, rFPGA0_XB_LSSIParameter, - bMaskDWord, 0x00032ed3); - - /* load 0xe30 IQC default value */ - phy_set_bb_reg(adapt, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - phy_set_bb_reg(adapt, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); - } -} - -static void phy_lc_calibrate(struct adapter *adapt, bool is2t) -{ - u8 tmpreg; - u32 rf_a_mode = 0, rf_b_mode = 0, lc_cal; - - /* Check continuous TX and Packet TX */ - tmpreg = usb_read8(adapt, 0xd03); - - if ((tmpreg & 0x70) != 0) - usb_write8(adapt, 0xd03, tmpreg & 0x8F); - else - usb_write8(adapt, REG_TXPAUSE, 0xFF); - - if ((tmpreg & 0x70) != 0) { - /* 1. Read original RF mode */ - /* Path-A */ - rf_a_mode = rtw_hal_read_rfreg(adapt, RF_PATH_A, RF_AC, - bMask12Bits); - - /* Path-B */ - if (is2t) - rf_b_mode = rtw_hal_read_rfreg(adapt, RF_PATH_B, RF_AC, - bMask12Bits); - - /* 2. Set RF mode = standby mode */ - /* Path-A */ - phy_set_rf_reg(adapt, RF_PATH_A, RF_AC, bMask12Bits, - (rf_a_mode & 0x8FFFF) | 0x10000); - - /* Path-B */ - if (is2t) - phy_set_rf_reg(adapt, RF_PATH_B, RF_AC, bMask12Bits, - (rf_b_mode & 0x8FFFF) | 0x10000); - } - - /* 3. Read RF reg18 */ - lc_cal = rtw_hal_read_rfreg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits); - - /* 4. Set LC calibration begin bit15 */ - phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits, - lc_cal | 0x08000); - - msleep(100); - - /* Restore original situation */ - if ((tmpreg & 0x70) != 0) { - /* Deal with continuous TX case */ - /* Path-A */ - usb_write8(adapt, 0xd03, tmpreg); - phy_set_rf_reg(adapt, RF_PATH_A, RF_AC, bMask12Bits, rf_a_mode); - - /* Path-B */ - if (is2t) - phy_set_rf_reg(adapt, RF_PATH_B, RF_AC, bMask12Bits, - rf_b_mode); - } else { - /* Deal with Packet TX case */ - usb_write8(adapt, REG_TXPAUSE, 0x00); - } -} - -void rtl88eu_phy_iq_calibrate(struct adapter *adapt, bool recovery) -{ - struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv; - s32 result[4][8]; - u8 i, final; - bool pathaok, pathbok; - s32 reg_e94, reg_e9c, reg_ea4, reg_eb4, reg_ebc, reg_ec4; - bool is12simular, is13simular, is23simular; - u32 iqk_bb_reg_92c[IQK_BB_REG_NUM] = { - rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, - rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, - rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, - rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, - rOFDM0_RxIQExtAnta}; - bool is2t; - - is2t = false; - - if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION)) - return; - - if (recovery) { - reload_adda_reg(adapt, iqk_bb_reg_92c, - dm_odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); - return; - } - - memset(result, 0, sizeof(result)); - for (i = 0; i < 8; i += 2) - result[3][i] = 0x100; - - final = 0xff; - pathaok = false; - pathbok = false; - is12simular = false; - is23simular = false; - is13simular = false; - - for (i = 0; i < 3; i++) { - phy_iq_calibrate(adapt, result, i, is2t); - - if (i == 1) { - is12simular = simularity_compare(adapt, result, 0, 1); - if (is12simular) { - final = 0; - break; - } - } - - if (i == 2) { - is13simular = simularity_compare(adapt, result, 0, 2); - if (is13simular) { - final = 0; - break; - } - is23simular = simularity_compare(adapt, result, 1, 2); - if (is23simular) - final = 1; - else - final = 3; - } - } - - for (i = 0; i < 4; i++) { - reg_e94 = result[i][0]; - reg_e9c = result[i][1]; - reg_ea4 = result[i][2]; - reg_eb4 = result[i][4]; - reg_ebc = result[i][5]; - reg_ec4 = result[i][6]; - } - - if (final != 0xff) { - reg_e94 = result[final][0]; - reg_e9c = result[final][1]; - reg_ea4 = result[final][2]; - reg_eb4 = result[final][4]; - reg_ebc = result[final][5]; - dm_odm->RFCalibrateInfo.RegE94 = reg_e94; - dm_odm->RFCalibrateInfo.RegE9C = reg_e9c; - dm_odm->RFCalibrateInfo.RegEB4 = reg_eb4; - dm_odm->RFCalibrateInfo.RegEBC = reg_ebc; - reg_ec4 = result[final][6]; - pathaok = true; - pathbok = true; - } else { - dm_odm->RFCalibrateInfo.RegE94 = 0x100; - dm_odm->RFCalibrateInfo.RegEB4 = 0x100; - dm_odm->RFCalibrateInfo.RegE9C = 0x0; - dm_odm->RFCalibrateInfo.RegEBC = 0x0; - } - if (reg_e94 != 0) - patha_fill_iqk(adapt, pathaok, result, final, - (reg_ea4 == 0)); - if (is2t) { - if (reg_eb4 != 0) - pathb_fill_iqk(adapt, pathbok, result, final, - (reg_ec4 == 0)); - } - - if (final < 4) { - for (i = 0; i < IQK_Matrix_REG_NUM; i++) - dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].Value[0][i] = result[final][i]; - dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].bIQKDone = true; - } - - save_adda_registers(adapt, iqk_bb_reg_92c, - dm_odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); -} - -void rtl88eu_phy_lc_calibrate(struct adapter *adapt) -{ - u32 timeout = 2000, timecount = 0; - struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv; - - if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION)) - return; - - while (*dm_odm->pbScanInProcess && timecount < timeout) { - mdelay(50); - timecount += 50; - } - - dm_odm->RFCalibrateInfo.bLCKInProgress = true; - - phy_lc_calibrate(adapt, false); - - dm_odm->RFCalibrateInfo.bLCKInProgress = false; -} diff --git a/drivers/staging/rtl8188eu/hal/pwrseq.c b/drivers/staging/rtl8188eu/hal/pwrseq.c deleted file mode 100644 index f7890a8f4673..000000000000 --- a/drivers/staging/rtl8188eu/hal/pwrseq.c +++ /dev/null @@ -1,88 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include "pwrseq.h" -#include <rtl8188e_hal.h> - -/* drivers should parse below arrays and do the corresponding actions */ - -/* 3 Power on Array */ -struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + - RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -/* 3Radio off Array */ -struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + - RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_END -}; - -/* 3Card Disable Array */ -struct wl_pwr_cfg rtl8188E_card_disable_flow - [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + - RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + - RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_CARDDIS - RTL8188E_TRANS_END -}; - -/* 3 Card Enable Array */ -struct wl_pwr_cfg rtl8188E_card_enable_flow - [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + - RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + - RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_CARDDIS_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -/* 3Suspend Array */ -struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + - RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + - RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_SUS - RTL8188E_TRANS_END -}; - -/* 3 Resume Array */ -struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + - RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + - RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_SUS_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -/* 3HWPDN Array */ -struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + - RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + - RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_PDN - RTL8188E_TRANS_END -}; - -/* 3 Enter LPS */ -struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + - RTL8188E_TRANS_END_STEPS] = { - /* FW behavior */ - RTL8188E_TRANS_ACT_TO_LPS - RTL8188E_TRANS_END -}; - -/* 3 Leave LPS */ -struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + - RTL8188E_TRANS_END_STEPS] = { - /* FW behavior */ - RTL8188E_TRANS_LPS_TO_ACT - RTL8188E_TRANS_END -}; diff --git a/drivers/staging/rtl8188eu/hal/pwrseqcmd.c b/drivers/staging/rtl8188eu/hal/pwrseqcmd.c deleted file mode 100644 index cec2ff879f5d..000000000000 --- a/drivers/staging/rtl8188eu/hal/pwrseqcmd.c +++ /dev/null @@ -1,80 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include <pwrseqcmd.h> -#include <usb_ops_linux.h> - -/* This routine deals with the Power Configuration CMDs parsing - * for RTL8723/RTL8188E Series IC. - */ -u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, - struct wl_pwr_cfg pwrseqcmd[]) -{ - struct wl_pwr_cfg pwrcfgcmd; - u8 poll_bit = false; - u32 aryidx = 0; - u8 value = 0; - u32 offset = 0; - u32 poll_count = 0; /* polling autoload done. */ - u32 max_poll_count = 5000; - - do { - pwrcfgcmd = pwrseqcmd[aryidx]; - - /* Only Handle the command whose CUT is matched */ - if (GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) { - switch (GET_PWR_CFG_CMD(pwrcfgcmd)) { - case PWR_CMD_READ: - break; - case PWR_CMD_WRITE: - offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); - - /* Read the value from system register */ - value = usb_read8(padapter, offset); - - value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd)); - value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & - GET_PWR_CFG_MASK(pwrcfgcmd)); - - /* Write the value back to system register */ - usb_write8(padapter, offset, value); - break; - case PWR_CMD_POLLING: - poll_bit = false; - offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); - do { - value = usb_read8(padapter, offset); - value &= GET_PWR_CFG_MASK(pwrcfgcmd); - - if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & - GET_PWR_CFG_MASK(pwrcfgcmd))) - poll_bit = true; - else - udelay(10); - - if (poll_count++ > max_poll_count) - return false; - } while (!poll_bit); - break; - case PWR_CMD_DELAY: - if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US) - udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)); - else - udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd) * 1000); - break; - case PWR_CMD_END: - /* When this command is parsed, end the process */ - return true; - default: - break; - } - } - - aryidx++;/* Add Array Index */ - } while (1); - return true; -} diff --git a/drivers/staging/rtl8188eu/hal/rf.c b/drivers/staging/rtl8188eu/hal/rf.c deleted file mode 100644 index aab0f54a75fc..000000000000 --- a/drivers/staging/rtl8188eu/hal/rf.c +++ /dev/null @@ -1,289 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include <osdep_service.h> -#include <drv_types.h> -#include <phy.h> -#include <rf.h> -#include <rtl8188e_hal.h> - -void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt, - enum ht_channel_width bandwidth) -{ - struct hal_data_8188e *hal_data = adapt->HalData; - - switch (bandwidth) { - case HT_CHANNEL_WIDTH_20: - hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] & - 0xfffff3ff) | BIT(10) | BIT(11)); - phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, - hal_data->RfRegChnlVal[0]); - break; - case HT_CHANNEL_WIDTH_40: - hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] & - 0xfffff3ff) | BIT(10)); - phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, - hal_data->RfRegChnlVal[0]); - break; - default: - break; - } -} - -void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel) -{ - struct hal_data_8188e *hal_data = adapt->HalData; - struct dm_priv *pdmpriv = &hal_data->dmpriv; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value; - u8 idx1, idx2; - u8 *ptr; - u8 direction; - - if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { - tx_agc[RF_PATH_A] = 0x3f3f3f3f; - tx_agc[RF_PATH_B] = 0x3f3f3f3f; - for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { - tx_agc[idx1] = powerlevel[idx1] | - (powerlevel[idx1] << 8) | - (powerlevel[idx1] << 16) | - (powerlevel[idx1] << 24); - } - } else { - if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) { - tx_agc[RF_PATH_A] = 0x10101010; - tx_agc[RF_PATH_B] = 0x10101010; - } else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) { - tx_agc[RF_PATH_A] = 0x00000000; - tx_agc[RF_PATH_B] = 0x00000000; - } else { - for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { - tx_agc[idx1] = powerlevel[idx1] | - (powerlevel[idx1] << 8) | - (powerlevel[idx1] << 16) | - (powerlevel[idx1] << 24); - } - if (hal_data->EEPROMRegulatory == 0) { - tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][6] + - (hal_data->MCSTxPowerLevelOriginalOffset[0][7] << 8); - tx_agc[RF_PATH_A] += tmpval; - - tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][14] + - (hal_data->MCSTxPowerLevelOriginalOffset[0][15] << 24); - tx_agc[RF_PATH_B] += tmpval; - } - } - } - for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { - ptr = (u8 *)(&tx_agc[idx1]); - for (idx2 = 0; idx2 < 4; idx2++) { - if (*ptr > RF6052_MAX_TX_PWR) - *ptr = RF6052_MAX_TX_PWR; - ptr++; - } - } - rtl88eu_dm_txpower_track_adjust(&hal_data->odmpriv, 1, &direction, - &pwrtrac_value); - - if (direction == 1) { - /* Increase TX power */ - tx_agc[0] += pwrtrac_value; - tx_agc[1] += pwrtrac_value; - } else if (direction == 2) { - /* Decrease TX power */ - tx_agc[0] -= pwrtrac_value; - tx_agc[1] -= pwrtrac_value; - } - - /* rf-A cck tx power */ - tmpval = tx_agc[RF_PATH_A] & 0xff; - phy_set_bb_reg(adapt, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); - tmpval = tx_agc[RF_PATH_A] >> 8; - phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); - - /* rf-B cck tx power */ - tmpval = tx_agc[RF_PATH_B] >> 24; - phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); - tmpval = tx_agc[RF_PATH_B] & 0x00ffffff; - phy_set_bb_reg(adapt, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); -} - -/* powerbase0 for OFDM rates */ -/* powerbase1 for HT MCS rates */ -static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm, - u8 *pwr_level_bw20, u8 *pwr_level_bw40, - u8 channel, u32 *ofdmbase, u32 *mcs_base) -{ - u32 powerbase0, powerbase1; - u8 i, powerlevel[2]; - - for (i = 0; i < 2; i++) { - powerbase0 = pwr_level_ofdm[i]; - - powerbase0 = (powerbase0 << 24) | (powerbase0 << 16) | - (powerbase0 << 8) | powerbase0; - *(ofdmbase + i) = powerbase0; - } - /* Check HT20 to HT40 diff */ - if (adapt->HalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - powerlevel[0] = pwr_level_bw20[0]; - else - powerlevel[0] = pwr_level_bw40[0]; - powerbase1 = powerlevel[0]; - powerbase1 = (powerbase1 << 24) | (powerbase1 << 16) | - (powerbase1 << 8) | powerbase1; - *mcs_base = powerbase1; -} - -static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel, - u8 index, u32 *powerbase0, u32 *powerbase1, - u32 *out_val) -{ - struct hal_data_8188e *hal_data = adapt->HalData; - struct dm_priv *pdmpriv = &hal_data->dmpriv; - u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit; - s8 pwr_diff = 0; - u32 write_val, customer_limit, rf; - u8 regulatory = hal_data->EEPROMRegulatory; - - /* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */ - - for (rf = 0; rf < 2; rf++) { - u8 j = index + (rf ? 8 : 0); - - switch (regulatory) { - case 0: - chnlGroup = 0; - write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index + (rf ? 8 : 0)] + - ((index < 2) ? powerbase0[rf] : powerbase1[rf]); - break; - case 1: /* Realtek regulatory */ - /* increase power diff defined by Realtek for regulatory */ - if (hal_data->pwrGroupCnt == 1) - chnlGroup = 0; - if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup) - Hal_GetChnlGroup88E(channel, &chnlGroup); - - write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index + (rf ? 8 : 0)] + - ((index < 2) ? powerbase0[rf] : powerbase1[rf]); - break; - case 2: /* Better regulatory */ - /* don't increase any power diff */ - write_val = (index < 2) ? powerbase0[rf] : powerbase1[rf]; - break; - case 3: /* Customer defined power diff. */ - /* increase power diff defined by customer. */ - chnlGroup = 0; - - if (index < 2) - pwr_diff = hal_data->TxPwrLegacyHtDiff[rf][channel - 1]; - else if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - pwr_diff = hal_data->TxPwrHt20Diff[rf][channel - 1]; - - if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_40) - customer_pwr_limit = hal_data->PwrGroupHT40[rf][channel - 1]; - else - customer_pwr_limit = hal_data->PwrGroupHT20[rf][channel - 1]; - - if (pwr_diff >= customer_pwr_limit) - pwr_diff = 0; - else - pwr_diff = customer_pwr_limit - pwr_diff; - - for (i = 0; i < 4; i++) { - pwr_diff_limit[i] = (u8)((hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] & - (0x7f << (i * 8))) >> (i * 8)); - - if (pwr_diff_limit[i] > pwr_diff) - pwr_diff_limit[i] = pwr_diff; - } - customer_limit = (pwr_diff_limit[3] << 24) | - (pwr_diff_limit[2] << 16) | - (pwr_diff_limit[1] << 8) | - (pwr_diff_limit[0]); - write_val = customer_limit + ((index < 2) ? powerbase0[rf] : powerbase1[rf]); - break; - default: - chnlGroup = 0; - write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] + - ((index < 2) ? powerbase0[rf] : powerbase1[rf]); - break; - } -/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */ -/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */ -/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */ - /* 92d do not need this */ - if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - write_val = 0x14141414; - else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - write_val = 0x00000000; - - *(out_val + rf) = write_val; - } -} - -static void write_ofdm_pwr_reg(struct adapter *adapt, u8 index, u32 *pvalue) -{ - u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, - rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, - rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12 }; - u16 regoffset_b[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, - rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04, - rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12 }; - u8 i, rf, pwr_val[4]; - u32 write_val; - u16 regoffset; - - for (rf = 0; rf < 2; rf++) { - write_val = pvalue[rf]; - for (i = 0; i < 4; i++) { - pwr_val[i] = (u8)((write_val & (0x7f << (i * 8))) >> (i * 8)); - if (pwr_val[i] > RF6052_MAX_TX_PWR) - pwr_val[i] = RF6052_MAX_TX_PWR; - } - write_val = (pwr_val[3] << 24) | (pwr_val[2] << 16) | - (pwr_val[1] << 8) | pwr_val[0]; - - if (rf == 0) - regoffset = regoffset_a[index]; - else - regoffset = regoffset_b[index]; - - phy_set_bb_reg(adapt, regoffset, bMaskDWord, write_val); - } -} - -void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt, - u8 *pwr_level_ofdm, - u8 *pwr_level_bw20, - u8 *pwr_level_bw40, u8 channel) -{ - u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value; - u8 direction; - u8 index = 0; - - getpowerbase88e(adapt, pwr_level_ofdm, pwr_level_bw20, pwr_level_bw40, - channel, &powerbase0[0], &powerbase1[0]); - - rtl88eu_dm_txpower_track_adjust(&adapt->HalData->odmpriv, 0, - &direction, &pwrtrac_value); - - for (index = 0; index < 6; index++) { - get_rx_power_val_by_reg(adapt, channel, index, - &powerbase0[0], &powerbase1[0], - &write_val[0]); - - if (direction == 1) { - write_val[0] += pwrtrac_value; - write_val[1] += pwrtrac_value; - } else if (direction == 2) { - write_val[0] -= pwrtrac_value; - write_val[1] -= pwrtrac_value; - } - write_ofdm_pwr_reg(adapt, index, &write_val[0]); - } -} diff --git a/drivers/staging/rtl8188eu/hal/rf_cfg.c b/drivers/staging/rtl8188eu/hal/rf_cfg.c deleted file mode 100644 index d39e1bd97f85..000000000000 --- a/drivers/staging/rtl8188eu/hal/rf_cfg.c +++ /dev/null @@ -1,247 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include "odm_precomp.h" - -#include <phy.h> - -static bool check_condition(struct adapter *adapt, const u32 condition) -{ - struct odm_dm_struct *odm = &adapt->HalData->odmpriv; - u32 _board = odm->BoardType; - u32 _platform = odm->SupportPlatform; - u32 _interface = odm->SupportInterface; - u32 cond; - - if (condition == 0xCDCDCDCD) - return true; - - cond = condition & 0x000000FF; - if ((_board == cond) && cond != 0x00) - return false; - - cond = condition & 0x0000FF00; - cond >>= 8; - if ((_interface & cond) == 0 && cond != 0x07) - return false; - - cond = condition & 0x00FF0000; - cond >>= 16; - if ((_platform & cond) == 0 && cond != 0x0F) - return false; - return true; -} - -/* RadioA_1T.TXT */ - -static u32 Array_RadioA_1T_8188E[] = { - 0x000, 0x00030000, - 0x008, 0x00084000, - 0x018, 0x00000407, - 0x019, 0x00000012, - 0x01E, 0x00080009, - 0x01F, 0x00000880, - 0x02F, 0x0001A060, - 0x03F, 0x00000000, - 0x042, 0x000060C0, - 0x057, 0x000D0000, - 0x058, 0x000BE180, - 0x067, 0x00001552, - 0x083, 0x00000000, - 0x0B0, 0x000FF8FC, - 0x0B1, 0x00054400, - 0x0B2, 0x000CCC19, - 0x0B4, 0x00043003, - 0x0B6, 0x0004953E, - 0x0B7, 0x0001C718, - 0x0B8, 0x000060FF, - 0x0B9, 0x00080001, - 0x0BA, 0x00040000, - 0x0BB, 0x00000400, - 0x0BF, 0x000C0000, - 0x0C2, 0x00002400, - 0x0C3, 0x00000009, - 0x0C4, 0x00040C91, - 0x0C5, 0x00099999, - 0x0C6, 0x000000A3, - 0x0C7, 0x00088820, - 0x0C8, 0x00076C06, - 0x0C9, 0x00000000, - 0x0CA, 0x00080000, - 0x0DF, 0x00000180, - 0x0EF, 0x000001A0, - 0x051, 0x0006B27D, - 0xFF0F041F, 0xABCD, - 0x052, 0x0007E4DD, - 0xCDCDCDCD, 0xCDCD, - 0x052, 0x0007E49D, - 0xFF0F041F, 0xDEAD, - 0x053, 0x00000073, - 0x056, 0x00051FF3, - 0x035, 0x00000086, - 0x035, 0x00000186, - 0x035, 0x00000286, - 0x036, 0x00001C25, - 0x036, 0x00009C25, - 0x036, 0x00011C25, - 0x036, 0x00019C25, - 0x0B6, 0x00048538, - 0x018, 0x00000C07, - 0x05A, 0x0004BD00, - 0x019, 0x000739D0, - 0x034, 0x0000ADF3, - 0x034, 0x00009DF0, - 0x034, 0x00008DED, - 0x034, 0x00007DEA, - 0x034, 0x00006DE7, - 0x034, 0x000054EE, - 0x034, 0x000044EB, - 0x034, 0x000034E8, - 0x034, 0x0000246B, - 0x034, 0x00001468, - 0x034, 0x0000006D, - 0x000, 0x00030159, - 0x084, 0x00068200, - 0x086, 0x000000CE, - 0x087, 0x00048A00, - 0x08E, 0x00065540, - 0x08F, 0x00088000, - 0x0EF, 0x000020A0, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, - 0x000, 0x00010159, - 0x018, 0x0000F407, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01F, 0x00080003, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01E, 0x00000001, - 0x01F, 0x00080000, - 0x000, 0x00033E60, -}; - -#define READ_NEXT_PAIR(v1, v2, i) \ -do { \ - i += 2; v1 = array[i]; \ - v2 = array[i + 1]; \ -} while (0) - -#define RFREG_OFFSET_MASK 0xfffff -#define B3WIREADDREAALENGTH 0x400 -#define B3WIREDATALENGTH 0x800 -#define BRFSI_RFENV 0x10 - -static void rtl_rfreg_delay(struct adapter *adapt, enum rf_radio_path rfpath, u32 addr, u32 mask, u32 data) -{ - if (addr == 0xfe) { - mdelay(50); - } else if (addr == 0xfd) { - mdelay(5); - } else if (addr == 0xfc) { - mdelay(1); - } else if (addr == 0xfb) { - udelay(50); - } else if (addr == 0xfa) { - udelay(5); - } else if (addr == 0xf9) { - udelay(1); - } else { - phy_set_rf_reg(adapt, rfpath, addr, mask, data); - udelay(1); - } -} - -static void rtl8188e_config_rf_reg(struct adapter *adapt, u32 addr, u32 data) -{ - u32 content = 0x1000; /*RF Content: radio_a_txt*/ - u32 maskforphyset = content & 0xE000; - - rtl_rfreg_delay(adapt, RF_PATH_A, addr | maskforphyset, - RFREG_OFFSET_MASK, - data); -} - -static bool rtl88e_phy_config_rf_with_headerfile(struct adapter *adapt) -{ - u32 i; - u32 array_len = ARRAY_SIZE(Array_RadioA_1T_8188E); - u32 *array = Array_RadioA_1T_8188E; - - for (i = 0; i < array_len; i += 2) { - u32 v1 = array[i]; - u32 v2 = array[i + 1]; - - if (v1 < 0xCDCDCDCD) { - rtl8188e_config_rf_reg(adapt, v1, v2); - continue; - } else { - if (!check_condition(adapt, array[i])) { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && v2 != 0xCDEF && - v2 != 0xCDCD && i < array_len - 2) - READ_NEXT_PAIR(v1, v2, i); - i -= 2; - } else { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && v2 != 0xCDEF && - v2 != 0xCDCD && i < array_len - 2) { - rtl8188e_config_rf_reg(adapt, v1, v2); - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < array_len - 2) - READ_NEXT_PAIR(v1, v2, i); - } - } - } - return true; -} - -bool rtl88eu_phy_rf_config(struct adapter *adapt) -{ - struct hal_data_8188e *hal_data = adapt->HalData; - u32 u4val = 0; - bool rtstatus; - struct bb_reg_def *pphyreg; - - pphyreg = &hal_data->PHYRegDef[RF90_PATH_A]; - u4val = phy_query_bb_reg(adapt, pphyreg->rfintfs, BRFSI_RFENV); - - phy_set_bb_reg(adapt, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1); - udelay(1); - - phy_set_bb_reg(adapt, pphyreg->rfintfo, BRFSI_RFENV, 0x1); - udelay(1); - - phy_set_bb_reg(adapt, pphyreg->rfHSSIPara2, B3WIREADDREAALENGTH, 0x0); - udelay(1); - - phy_set_bb_reg(adapt, pphyreg->rfHSSIPara2, B3WIREDATALENGTH, 0x0); - udelay(1); - - rtstatus = rtl88e_phy_config_rf_with_headerfile(adapt); - - phy_set_bb_reg(adapt, pphyreg->rfintfs, BRFSI_RFENV, u4val); - - return rtstatus; -} diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c b/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c deleted file mode 100644 index f2969e160ac3..000000000000 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c +++ /dev/null @@ -1,591 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#define _RTL8188E_CMD_C_ - -#include <osdep_service.h> -#include <drv_types.h> -#include <recv_osdep.h> -#include <mlme_osdep.h> -#include <rtw_ioctl_set.h> - -#include <rtl8188e_hal.h> - -#define RTL88E_MAX_H2C_BOX_NUMS 4 -#define RTL88E_MAX_CMD_LEN 7 -#define RTL88E_MESSAGE_BOX_SIZE 4 -#define RTL88E_EX_MESSAGE_BOX_SIZE 4 - -static u8 _is_fw_read_cmd_down(struct adapter *adapt, u8 msgbox_num) -{ - u8 read_down = false; - int retry_cnts = 100; - - u8 valid; - - do { - valid = usb_read8(adapt, REG_HMETFR) & BIT(msgbox_num); - if (valid == 0) - read_down = true; - } while ((!read_down) && (retry_cnts--)); - - return read_down; -} - -/***************************************** -* H2C Msg format : -* 0x1DF - 0x1D0 -*| 31 - 8 | 7-5 4 - 0 | -*| h2c_msg |Class_ID CMD_ID | -* -* Extend 0x1FF - 0x1F0 -*|31 - 0 | -*|ext_msg| -******************************************/ -static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) -{ - u8 h2c_box_num; - u32 msgbox_addr; - u32 msgbox_ex_addr; - u8 cmd_idx, ext_cmd_len; - u32 h2c_cmd = 0; - u32 h2c_cmd_ex = 0; - s32 ret = _FAIL; - - if (!adapt->bFWReady) - return ret; - - if (!pCmdBuffer) - goto exit; - if (CmdLen > RTL88E_MAX_CMD_LEN) - goto exit; - if (adapt->bSurpriseRemoved) - goto exit; - - /* pay attention to if race condition happened in H2C cmd setting. */ - h2c_box_num = adapt->HalData->LastHMEBoxNum; - - if (!_is_fw_read_cmd_down(adapt, h2c_box_num)) - goto exit; - - *(u8 *)(&h2c_cmd) = ElementID; - - if (CmdLen <= 3) { - memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, CmdLen); - } else { - memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, 3); - ext_cmd_len = CmdLen - 3; - memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer + 3, ext_cmd_len); - - /* Write Ext command */ - msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE); - for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++) - usb_write8(adapt, msgbox_ex_addr + cmd_idx, *((u8 *)(&h2c_cmd_ex) + cmd_idx)); - } - /* Write command */ - msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE); - for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) - usb_write8(adapt, msgbox_addr + cmd_idx, *((u8 *)(&h2c_cmd) + cmd_idx)); - - adapt->HalData->LastHMEBoxNum = - (h2c_box_num + 1) % RTL88E_MAX_H2C_BOX_NUMS; - - ret = _SUCCESS; - -exit: - return ret; -} - -/* bitmap[0:27] = tx_rate_bitmap */ -/* bitmap[28:31]= Rate Adaptive id */ -/* arg[0:4] = macid */ -/* arg[5] = Short GI */ -void rtw_hal_add_ra_tid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level) -{ - struct odm_dm_struct *odmpriv = &pAdapter->HalData->odmpriv; - u8 macid, init_rate, raid, shortGIrate = false; - - macid = arg & 0x1f; - - raid = (bitmap >> 28) & 0x0f; - bitmap &= 0x0fffffff; - - if (rssi_level != DM_RATR_STA_INIT) - bitmap = ODM_Get_Rate_Bitmap(odmpriv, macid, bitmap, rssi_level); - - bitmap |= ((raid << 28) & 0xf0000000); - - init_rate = get_highest_rate_idx(bitmap & 0x0fffffff) & 0x3f; - - shortGIrate = (arg & BIT(5)) ? true : false; - - if (shortGIrate) - init_rate |= BIT(6); - - raid = (bitmap >> 28) & 0x0f; - - bitmap &= 0x0fffffff; - - ODM_RA_UpdateRateInfo_8188E(odmpriv, macid, raid, bitmap, shortGIrate); -} - -void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode) -{ - struct setpwrmode_parm H2CSetPwrMode; - struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv; - u8 RLBM = 0; /* 0:Min, 1:Max, 2:User define */ - - switch (Mode) { - case PS_MODE_ACTIVE: - H2CSetPwrMode.Mode = 0; - break; - case PS_MODE_MIN: - H2CSetPwrMode.Mode = 1; - break; - case PS_MODE_MAX: - RLBM = 1; - H2CSetPwrMode.Mode = 1; - break; - case PS_MODE_DTIM: - RLBM = 2; - H2CSetPwrMode.Mode = 1; - break; - case PS_MODE_UAPSD_WMM: - H2CSetPwrMode.Mode = 2; - break; - default: - H2CSetPwrMode.Mode = 0; - break; - } - - H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps << 4) & 0xf0) | (RLBM & 0x0f)); - - H2CSetPwrMode.AwakeInterval = 1; - - H2CSetPwrMode.bAllQueueUAPSD = adapt->registrypriv.uapsd_enable; - - if (Mode > 0) - H2CSetPwrMode.PwrState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ - else - H2CSetPwrMode.PwrState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ - - FillH2CCmd_88E(adapt, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); -} - -void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt) -{ - u16 mst_rpt = le16_to_cpu(mstatus_rpt); - - FillH2CCmd_88E(adapt, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt); -} - -static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength) -{ - struct ieee80211_hdr *pwlanhdr; - __le16 *fctrl; - u32 rate_len, pktlen; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; - u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - - pwlanhdr = (struct ieee80211_hdr *)pframe; - - fctrl = &pwlanhdr->frame_control; - *(fctrl) = 0; - - ether_addr_copy(pwlanhdr->addr1, bc_addr); - ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv)); - ether_addr_copy(pwlanhdr->addr3, cur_network->MacAddress); - - SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); - SetFrameSubType(pframe, IEEE80211_STYPE_BEACON); - - pframe += sizeof(struct ieee80211_hdr_3addr); - pktlen = sizeof(struct ieee80211_hdr_3addr); - - /* timestamp will be inserted by hardware */ - pframe += 8; - pktlen += 8; - - /* beacon interval: 2 bytes */ - memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->ies)), 2); - - pframe += 2; - pktlen += 2; - - /* capability info: 2 bytes */ - memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->ies)), 2); - - pframe += 2; - pktlen += 2; - - if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { - pktlen += cur_network->ie_length - sizeof(struct ndis_802_11_fixed_ie); - memcpy(pframe, cur_network->ies + sizeof(struct ndis_802_11_fixed_ie), pktlen); - - goto _ConstructBeacon; - } - - /* below for ad-hoc mode */ - - /* SSID */ - pframe = rtw_set_ie(pframe, WLAN_EID_SSID, cur_network->ssid.ssid_length, cur_network->ssid.ssid, &pktlen); - - /* supported rates... */ - rate_len = rtw_get_rateset_len(cur_network->SupportedRates); - pframe = rtw_set_ie(pframe, WLAN_EID_SUPP_RATES, min_t(u32, rate_len, 8), cur_network->SupportedRates, &pktlen); - - /* DS parameter set */ - pframe = rtw_set_ie(pframe, WLAN_EID_DS_PARAMS, 1, (unsigned char *)&cur_network->Configuration.DSConfig, &pktlen); - - if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { - u32 ATIMWindow; - /* IBSS Parameter Set... */ - ATIMWindow = 0; - pframe = rtw_set_ie(pframe, WLAN_EID_IBSS_PARAMS, 2, (unsigned char *)(&ATIMWindow), &pktlen); - } - - /* todo: ERP IE */ - - /* EXTERNDED SUPPORTED RATE */ - if (rate_len > 8) - pframe = rtw_set_ie(pframe, WLAN_EID_EXT_SUPP_RATES, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); - - /* todo:HT for adhoc */ - -_ConstructBeacon: - - if ((pktlen + TXDESC_SIZE) > 512) - return; - - *pLength = pktlen; -} - -static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength) -{ - struct ieee80211_hdr *pwlanhdr; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - __le16 *fctrl; - struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; - - pwlanhdr = (struct ieee80211_hdr *)pframe; - - /* Frame control. */ - fctrl = &pwlanhdr->frame_control; - *(fctrl) = 0; - SetPwrMgt(fctrl); - SetFrameSubType(pframe, IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL); - - /* AID. */ - SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); - - /* BSSID. */ - ether_addr_copy(pwlanhdr->addr1, pnetwork->MacAddress); - - /* TA. */ - ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv)); - - *pLength = 16; -} - -static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe, - u32 *pLength, - u8 *StaAddr, - u8 bQoS, - u8 AC, - u8 bEosp, - u8 bForcePowerSave) -{ - struct ieee80211_hdr *pwlanhdr; - __le16 *fctrl; - u32 pktlen; - struct mlme_priv *pmlmepriv = &adapt->mlmepriv; - struct wlan_network *cur_network = &pmlmepriv->cur_network; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; - - pwlanhdr = (struct ieee80211_hdr *)pframe; - - fctrl = &pwlanhdr->frame_control; - *(fctrl) = 0; - if (bForcePowerSave) - SetPwrMgt(fctrl); - - switch (cur_network->network.InfrastructureMode) { - case Ndis802_11Infrastructure: - SetToDs(fctrl); - ether_addr_copy(pwlanhdr->addr1, pnetwork->MacAddress); - ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv)); - ether_addr_copy(pwlanhdr->addr3, StaAddr); - break; - case Ndis802_11APMode: - SetFrDs(fctrl); - ether_addr_copy(pwlanhdr->addr1, StaAddr); - ether_addr_copy(pwlanhdr->addr2, pnetwork->MacAddress); - ether_addr_copy(pwlanhdr->addr3, myid(&adapt->eeprompriv)); - break; - case Ndis802_11IBSS: - default: - ether_addr_copy(pwlanhdr->addr1, StaAddr); - ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv)); - ether_addr_copy(pwlanhdr->addr3, pnetwork->MacAddress); - break; - } - - SetSeqNum(pwlanhdr, 0); - - if (bQoS) { - struct ieee80211_qos_hdr *pwlanqoshdr; - - SetFrameSubType(pframe, IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_NULLFUNC); - - pwlanqoshdr = (struct ieee80211_qos_hdr *)pframe; - SetPriority(&pwlanqoshdr->qos_ctrl, AC); - SetEOSP(&pwlanqoshdr->qos_ctrl, bEosp); - - pktlen = sizeof(struct ieee80211_qos_hdr); - } else { - SetFrameSubType(pframe, IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC); - - pktlen = sizeof(struct ieee80211_hdr_3addr); - } - - *pLength = pktlen; -} - -static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u8 *StaAddr, bool bHideSSID) -{ - struct ieee80211_hdr *pwlanhdr; - __le16 *fctrl; - u8 *mac, *bssid; - u32 pktlen; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; - - pwlanhdr = (struct ieee80211_hdr *)pframe; - - mac = myid(&adapt->eeprompriv); - bssid = cur_network->MacAddress; - - fctrl = &pwlanhdr->frame_control; - *(fctrl) = 0; - ether_addr_copy(pwlanhdr->addr1, StaAddr); - ether_addr_copy(pwlanhdr->addr2, mac); - ether_addr_copy(pwlanhdr->addr3, bssid); - - SetSeqNum(pwlanhdr, 0); - SetFrameSubType(fctrl, IEEE80211_STYPE_PROBE_RESP); - - pktlen = sizeof(struct ieee80211_hdr_3addr); - pframe += pktlen; - - if (cur_network->ie_length > MAX_IE_SZ) - return; - - memcpy(pframe, cur_network->ies, cur_network->ie_length); - pframe += cur_network->ie_length; - pktlen += cur_network->ie_length; - - *pLength = pktlen; -} - -/* */ -/* Description: Fill the reserved packets that FW will use to RSVD page. */ -/* Now we just send 4 types packet to rsvd page. */ -/* (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. */ -/* Input: */ -/* bDLFinished - false: At the first time we will send all the packets as a large packet to Hw, */ -/* so we need to set the packet length to total length. */ -/* true: At the second time, we should send the first packet (default:beacon) */ -/* to Hw again and set the length in descriptor to the real beacon length. */ -/* 2009.10.15 by tynli. */ -static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) -{ - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct xmit_priv *pxmitpriv; - struct mlme_ext_priv *pmlmeext; - struct mlme_ext_info *pmlmeinfo; - u32 BeaconLength = 0, ProbeRspLength = 0, PSPollLength; - u32 NullDataLength, QosNullLength; - u8 *ReservedPagePacket; - u8 PageNum, PageNeed, TxDescLen; - u16 BufIndex; - u32 TotalPacketLen; - struct rsvdpage_loc RsvdPageLoc; - struct wlan_bssid_ex *pnetwork; - - ReservedPagePacket = kzalloc(1000, GFP_KERNEL); - if (!ReservedPagePacket) - return; - - pxmitpriv = &adapt->xmitpriv; - pmlmeext = &adapt->mlmeextpriv; - pmlmeinfo = &pmlmeext->mlmext_info; - pnetwork = &pmlmeinfo->network; - - TxDescLen = TXDESC_SIZE; - PageNum = 0; - - /* 3 (1) beacon * 2 pages */ - BufIndex = TXDESC_OFFSET; - ConstructBeacon(adapt, &ReservedPagePacket[BufIndex], &BeaconLength); - - /* When we count the first page size, we need to reserve description size for the RSVD */ - /* packet, it will be filled in front of the packet in TXPKTBUF. */ - PageNeed = (u8)PageNum_128(TxDescLen + BeaconLength); - /* To reserved 2 pages for beacon buffer. 2010.06.24. */ - if (PageNeed == 1) - PageNeed += 1; - PageNum += PageNeed; - - BufIndex += PageNeed * 128; - - /* 3 (2) ps-poll *1 page */ - RsvdPageLoc.LocPsPoll = PageNum; - ConstructPSPoll(adapt, &ReservedPagePacket[BufIndex], &PSPollLength); - rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], PSPollLength, true, false); - - PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength); - PageNum += PageNeed; - - BufIndex += PageNeed * 128; - - /* 3 (3) null data * 1 page */ - RsvdPageLoc.LocNullData = PageNum; - ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex], &NullDataLength, pnetwork->MacAddress, false, 0, 0, false); - rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], NullDataLength, false, false); - - PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength); - PageNum += PageNeed; - - BufIndex += PageNeed * 128; - - /* 3 (4) probe response * 1page */ - RsvdPageLoc.LocProbeRsp = PageNum; - ConstructProbeRsp(adapt, &ReservedPagePacket[BufIndex], &ProbeRspLength, pnetwork->MacAddress, false); - rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], ProbeRspLength, false, false); - - PageNeed = (u8)PageNum_128(TxDescLen + ProbeRspLength); - PageNum += PageNeed; - - BufIndex += PageNeed * 128; - - /* 3 (5) Qos null data */ - RsvdPageLoc.LocQosNull = PageNum; - ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex], - &QosNullLength, pnetwork->MacAddress, true, 0, 0, false); - rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], QosNullLength, false, false); - - PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength); - PageNum += PageNeed; - - TotalPacketLen = BufIndex + QosNullLength; - pmgntframe = alloc_mgtxmitframe(pxmitpriv); - if (!pmgntframe) - goto exit; - - /* update attribute */ - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(adapt, pattrib); - pattrib->qsel = 0x10; - pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET; - pattrib->pktlen = pattrib->last_txcmdsz; - memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); - - rtw_hal_mgnt_xmit(adapt, pmgntframe); - - FillH2CCmd_88E(adapt, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc); - -exit: - kfree(ReservedPagePacket); -} - -void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) -{ - struct hal_data_8188e *haldata = adapt->HalData; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - bool bSendBeacon = false; - bool bcn_valid = false; - u8 DLBcnCount = 0; - u32 poll = 0; - - if (mstatus == 1) { - /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */ - /* Suggested by filen. Added by tynli. */ - usb_write16(adapt, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid)); - /* Do not set TSF again here or vWiFi beacon DMA INT will not work. */ - - /* Set REG_CR bit 8. DMA beacon by SW. */ - haldata->RegCR_1 |= BIT(0); - usb_write8(adapt, REG_CR + 1, haldata->RegCR_1); - - /* Disable Hw protection for a time which revserd for Hw sending beacon. */ - /* Fix download reserved page packet fail that access collision with the protection time. */ - /* 2010.05.11. Added by tynli. */ - usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) & (~BIT(3))); - usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) | BIT(4)); - - if (haldata->RegFwHwTxQCtrl & BIT(6)) - bSendBeacon = true; - - /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */ - usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl & (~BIT(6)))); - haldata->RegFwHwTxQCtrl &= (~BIT(6)); - - /* Clear beacon valid check bit. */ - rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL); - DLBcnCount = 0; - poll = 0; - do { - /* download rsvd page. */ - SetFwRsvdPagePkt(adapt, false); - DLBcnCount++; - do { - yield(); - /* mdelay(10); */ - /* check rsvd page download OK. */ - rtw_hal_get_hwreg(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid)); - poll++; - } while (!bcn_valid && (poll % 10) != 0 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped); - } while (!bcn_valid && DLBcnCount <= 100 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped); - - /* */ - /* We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower) */ - /* because we need to free the Tx BCN Desc which is used by the first reserved page packet. */ - /* At run time, we cannot get the Tx Desc until it is released in TxHandleInterrupt() so we will return */ - /* the beacon TCB in the following code. 2011.11.23. by tynli. */ - /* */ - - /* Enable Bcn */ - usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) | BIT(3)); - usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) & (~BIT(4))); - - /* To make sure that if there exists an adapter which would like to send beacon. */ - /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */ - /* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ - /* the beacon cannot be sent by HW. */ - /* 2010.06.23. Added by tynli. */ - if (bSendBeacon) { - usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl | BIT(6))); - haldata->RegFwHwTxQCtrl |= BIT(6); - } - - /* Update RSVD page location H2C to Fw. */ - if (bcn_valid) - rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL); - - /* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */ - /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */ - haldata->RegCR_1 &= (~BIT(0)); - usb_write8(adapt, REG_CR + 1, haldata->RegCR_1); - } -} diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_dm.c b/drivers/staging/rtl8188eu/hal/rtl8188e_dm.c deleted file mode 100644 index 10e88f976163..000000000000 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_dm.c +++ /dev/null @@ -1,217 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -/* */ -/* Description: */ -/* */ -/* This file is for 92CE/92CU dynamic mechanism only */ -/* */ -/* */ -/* */ -#define _RTL8188E_DM_C_ - -#include <osdep_service.h> -#include <drv_types.h> - -#include <rtl8188e_hal.h> - -/* Initialize GPIO setting registers */ -static void dm_InitGPIOSetting(struct adapter *Adapter) -{ - u8 tmp1byte; - - tmp1byte = usb_read8(Adapter, REG_GPIO_MUXCFG); - tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); - - usb_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); -} - -static void Init_ODM_ComInfo_88E(struct adapter *Adapter) -{ - struct hal_data_8188e *hal_data = Adapter->HalData; - struct dm_priv *pdmpriv = &hal_data->dmpriv; - struct odm_dm_struct *dm_odm = &hal_data->odmpriv; - - /* Init Value */ - memset(dm_odm, 0, sizeof(*dm_odm)); - - dm_odm->Adapter = Adapter; - dm_odm->SupportPlatform = ODM_CE; - dm_odm->SupportICType = ODM_RTL8188E; - dm_odm->CutVersion = ODM_CUT_A; - dm_odm->bIsMPChip = hal_data->VersionID.ChipType == NORMAL_CHIP; - dm_odm->PatchID = hal_data->CustomerID; - dm_odm->bWIFITest = Adapter->registrypriv.wifi_spec; - - dm_odm->AntDivType = hal_data->TRxAntDivType; - - /* Tx power tracking BB swing table. - * The base index = - * 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB - */ - dm_odm->BbSwingIdxOfdm = 12; /* Set default value as index 12. */ - dm_odm->BbSwingIdxOfdmCurrent = 12; - dm_odm->BbSwingFlagOfdm = false; - - pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | - ODM_RF_TX_PWR_TRACK; - - dm_odm->SupportAbility = pdmpriv->InitODMFlag; -} - -static void Update_ODM_ComInfo_88E(struct adapter *Adapter) -{ - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; - struct hal_data_8188e *hal_data = Adapter->HalData; - struct odm_dm_struct *dm_odm = &hal_data->odmpriv; - struct dm_priv *pdmpriv = &hal_data->dmpriv; - int i; - - pdmpriv->InitODMFlag = ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_DYNAMIC_TXPWR | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - ODM_BB_PWR_SAVE | - ODM_MAC_EDCA_TURBO | - ODM_RF_CALIBRATION | - ODM_RF_TX_PWR_TRACK; - if (hal_data->AntDivCfg) - pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; - - if (Adapter->registrypriv.mp_mode == 1) { - pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | - ODM_RF_TX_PWR_TRACK; - } - - dm_odm->SupportAbility = pdmpriv->InitODMFlag; - - dm_odm->pNumTxBytesUnicast = &Adapter->xmitpriv.tx_bytes; - dm_odm->pNumRxBytesUnicast = &Adapter->recvpriv.rx_bytes; - dm_odm->pWirelessMode = &pmlmeext->cur_wireless_mode; - dm_odm->pSecChOffset = &hal_data->nCur40MhzPrimeSC; - dm_odm->pSecurity = (u8 *)&Adapter->securitypriv.dot11PrivacyAlgrthm; - dm_odm->pBandWidth = (u8 *)&hal_data->CurrentChannelBW; - dm_odm->pChannel = &hal_data->CurrentChannel; - dm_odm->pbNet_closed = (bool *)&Adapter->net_closed; - dm_odm->mp_mode = &Adapter->registrypriv.mp_mode; - dm_odm->pbScanInProcess = (bool *)&pmlmepriv->bScanInProcess; - dm_odm->pbPowerSaving = (bool *)&pwrctrlpriv->bpower_saving; - dm_odm->AntDivType = hal_data->TRxAntDivType; - - /* Tx power tracking BB swing table. - * The base index = - * 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB - */ - dm_odm->BbSwingIdxOfdm = 12; /* Set default value as index 12. */ - dm_odm->BbSwingIdxOfdmCurrent = 12; - dm_odm->BbSwingFlagOfdm = false; - - for (i = 0; i < NUM_STA; i++) - ODM_CmnInfoPtrArrayHook(dm_odm, ODM_CMNINFO_STA_STATUS, i, - NULL); -} - -void rtl8188e_InitHalDm(struct adapter *Adapter) -{ - struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv; - struct odm_dm_struct *dm_odm = &Adapter->HalData->odmpriv; - - dm_InitGPIOSetting(Adapter); - pdmpriv->DM_Type = DM_Type_ByDriver; - pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; - Update_ODM_ComInfo_88E(Adapter); - ODM_DMInit(dm_odm); -} - -void rtw_hal_dm_watchdog(struct adapter *Adapter) -{ - u8 hw_init_completed = false; - struct mlme_priv *pmlmepriv = NULL; - u8 bLinked = false; - - hw_init_completed = Adapter->hw_init_completed; - - if (!hw_init_completed) - goto skip_dm; - - /* ODM */ - pmlmepriv = &Adapter->mlmepriv; - - if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | - WIFI_ADHOC_MASTER_STATE))) { - if (Adapter->stapriv.asoc_sta_count > 2) - bLinked = true; - } else {/* Station mode */ - if (check_fwstate(pmlmepriv, _FW_LINKED)) - bLinked = true; - } - - Adapter->HalData->odmpriv.bLinked = bLinked; - ODM_DMWatchdog(&Adapter->HalData->odmpriv); -skip_dm: - /* Check GPIO to determine current RF on/off and Pbc status. */ - /* Check Hardware Radio ON/OFF or not */ - return; -} - -void rtw_hal_dm_init(struct adapter *Adapter) -{ - struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv; - - memset(pdmpriv, 0, sizeof(struct dm_priv)); - Init_ODM_ComInfo_88E(Adapter); -} - -/* Add new function to reset the state of antenna diversity before link. */ -/* Compare RSSI for deciding antenna */ -void rtw_hal_antdiv_rssi_compared(struct adapter *Adapter, - struct wlan_bssid_ex *dst, - struct wlan_bssid_ex *src) -{ - if (Adapter->HalData->AntDivCfg != 0) { - /* select optimum_antenna for before linked => For antenna - * diversity - */ - if (dst->Rssi >= src->Rssi) {/* keep org parameter */ - src->Rssi = dst->Rssi; - src->PhyInfo.Optimum_antenna = - dst->PhyInfo.Optimum_antenna; - } - } -} - -/* Add new function to reset the state of antenna diversity before link. */ -bool rtw_hal_antdiv_before_linked(struct adapter *Adapter) -{ - struct odm_dm_struct *dm_odm = &Adapter->HalData->odmpriv; - struct sw_ant_switch *dm_swat_tbl = &dm_odm->DM_SWAT_Table; - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - - /* Condition that does not need to use antenna diversity. */ - if (Adapter->HalData->AntDivCfg == 0) - return false; - - if (check_fwstate(pmlmepriv, _FW_LINKED)) - return false; - - if (dm_swat_tbl->SWAS_NoLink_State != 0) { - dm_swat_tbl->SWAS_NoLink_State = 0; - return false; - } - - /* switch channel */ - dm_swat_tbl->SWAS_NoLink_State = 1; - dm_swat_tbl->CurAntenna = (dm_swat_tbl->CurAntenna == Antenna_A) ? - Antenna_B : Antenna_A; - - rtw_antenna_select_cmd(Adapter, dm_swat_tbl->CurAntenna, false); - return true; -} diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c deleted file mode 100644 index d1086699f952..000000000000 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c +++ /dev/null @@ -1,523 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#define _HAL_INIT_C_ - -#include <linux/firmware.h> -#include <linux/vmalloc.h> -#include <drv_types.h> -#include <rtw_efuse.h> -#include <phy.h> -#include <rtl8188e_hal.h> - -#include <rtw_iol.h> - -void iol_mode_enable(struct adapter *padapter, u8 enable) -{ - u8 reg_0xf0 = 0; - - if (enable) { - /* Enable initial offload */ - reg_0xf0 = usb_read8(padapter, REG_SYS_CFG); - usb_write8(padapter, REG_SYS_CFG, reg_0xf0 | SW_OFFLOAD_EN); - - if (!padapter->bFWReady) - _8051Reset88E(padapter); - } else { - /* disable initial offload */ - reg_0xf0 = usb_read8(padapter, REG_SYS_CFG); - usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN); - } -} - -s32 iol_execute(struct adapter *padapter, u8 control) -{ - s32 status = _FAIL; - u8 reg_0x88 = 0; - unsigned long start = 0; - - control = control & 0x0f; - reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0); - usb_write8(padapter, REG_HMEBOX_E0, reg_0x88 | control); - - start = jiffies; - while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control && - jiffies_to_msecs(jiffies - start) < 1000) { - udelay(5); - } - - reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0); - status = (reg_0x88 & control) ? _FAIL : _SUCCESS; - if (reg_0x88 & control << 4) - status = _FAIL; - return status; -} - -static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) -{ - s32 rst = _SUCCESS; - - iol_mode_enable(padapter, 1); - usb_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy); - rst = iol_execute(padapter, CMD_INIT_LLT); - iol_mode_enable(padapter, 0); - return rst; -} - -s32 rtl8188e_iol_efuse_patch(struct adapter *padapter) -{ - s32 result = _SUCCESS; - - if (rtw_iol_applied(padapter)) { - iol_mode_enable(padapter, 1); - result = iol_execute(padapter, CMD_READ_EFUSE_MAP); - if (result == _SUCCESS) - result = iol_execute(padapter, CMD_EFUSE_PATCH); - - iol_mode_enable(padapter, 0); - } - return result; -} - -#define MAX_REG_BOLCK_SIZE 196 - -void _8051Reset88E(struct adapter *padapter) -{ - u8 u1bTmp; - - u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN + 1); - usb_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp & (~BIT(2))); - usb_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp | (BIT(2))); -} - -void rtl8188e_InitializeFirmwareVars(struct adapter *padapter) -{ - /* Init Fw LPS related. */ - padapter->pwrctrlpriv.bFwCurrentInPSMode = false; - - /* Init H2C counter. by tynli. 2009.12.09. */ - padapter->HalData->LastHMEBoxNum = 0; -} - -void rtw_hal_free_data(struct adapter *padapter) -{ - kfree(padapter->HalData); - padapter->HalData = NULL; -} - -void rtw_hal_read_chip_version(struct adapter *padapter) -{ - u32 value32; - struct HAL_VERSION ChipVersion; - struct hal_data_8188e *pHalData = padapter->HalData; - - value32 = usb_read32(padapter, REG_SYS_CFG); - ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); - ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); - ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */ - - dump_chip_info(ChipVersion); - - pHalData->VersionID = ChipVersion; -} - -void rtw_hal_set_odm_var(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet) -{ - struct odm_dm_struct *podmpriv = &Adapter->HalData->odmpriv; - - switch (eVariable) { - case HAL_ODM_STA_INFO: - { - struct sta_info *psta = pValue1; - - if (bSet) { - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta); - ODM_RAInfo_Init(podmpriv, psta->mac_id); - } else { - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL); - } - } - break; - case HAL_ODM_P2P_STATE: - podmpriv->bWIFI_Direct = bSet; - break; - case HAL_ODM_WIFI_DISPLAY_STATE: - podmpriv->bWIFI_Display = bSet; - break; - default: - break; - } -} - -void rtw_hal_notch_filter(struct adapter *adapter, bool enable) -{ - if (enable) - usb_write8(adapter, rOFDM0_RxDSP + 1, usb_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1)); - else - usb_write8(adapter, rOFDM0_RxDSP + 1, usb_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1)); -} - -/* */ -/* */ -/* LLT R/W/Init function */ -/* */ -/* */ -static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data) -{ - s32 status = _SUCCESS; - s32 count = 0; - u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); - u16 LLTReg = REG_LLT_INIT; - - usb_write32(padapter, LLTReg, value); - - /* polling */ - do { - value = usb_read32(padapter, LLTReg); - if (_LLT_OP_VALUE(value) == _LLT_NO_ACTIVE) - break; - - if (count > POLLING_LLT_THRESHOLD) { - status = _FAIL; - break; - } - udelay(5); - } while (count++); - - return status; -} - -s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) -{ - s32 status = _FAIL; - u32 i; - u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/* 176, 22k */ - - if (rtw_iol_applied(padapter)) { - status = iol_InitLLTTable(padapter, txpktbuf_bndy); - } else { - for (i = 0; i < (txpktbuf_bndy - 1); i++) { - status = _LLTWrite(padapter, i, i + 1); - if (status != _SUCCESS) - return status; - } - - /* end of list */ - status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF); - if (status != _SUCCESS) - return status; - - /* Make the other pages as ring buffer */ - /* This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */ - /* Otherwise used as local loopback buffer. */ - for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) { - status = _LLTWrite(padapter, i, (i + 1)); - if (status != _SUCCESS) - return status; - } - - /* Let last entry point to the start entry of ring buffer */ - status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy); - if (status != _SUCCESS) - return status; - } - - return status; -} - -void Hal_InitPGData88E(struct adapter *padapter) -{ - if (!is_boot_from_eeprom(padapter)) - EFUSE_ShadowMapUpdate(padapter); -} - -void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo) -{ - struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - u16 EEPROMId; - - /* Checl 0x8129 again for making sure autoload status!! */ - EEPROMId = le16_to_cpu(*((__le16 *)hwinfo)); - if (EEPROMId != RTL_EEPROM_ID) - pEEPROM->bautoload_fail_flag = true; - else - pEEPROM->bautoload_fail_flag = false; -} - -static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail) -{ - u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0; - - memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g)); - - if (AutoLoadFail) { - for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) { - /* 2.4G default value */ - for (group = 0; group < MAX_CHNL_GROUP_24G; group++) { - pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; - pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; - } - for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { - if (TxCount == 0) { - pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF; - pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF; - } else { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } - } - } - return; - } - - for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) { - /* 2.4G default value */ - for (group = 0; group < MAX_CHNL_GROUP_24G; group++) { - pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++]; - if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF) - pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; - } - for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) { - pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++]; - if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF) - pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; - } - for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { - if (TxCount == 0) { - pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0; - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF; - } else { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0xf0) >> 4; - if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ - pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; - } - - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF; - } else { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0x0f); - if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ - pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; - } - pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0; - eeAddr++; - } else { - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } else { - pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0xf0) >> 4; - if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ - pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0; - } - - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } else { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0x0f); - if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ - pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; - } - eeAddr++; - - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } else { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0xf0) >> 4; - if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ - pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; - } - - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } else { - pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0x0f); - if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */ - pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0; - } - eeAddr++; - } - } - } -} - -void Hal_GetChnlGroup88E(u8 chnl, u8 *group) -{ - if (chnl < 3) /* Channel 1-2 */ - *group = 0; - else if (chnl < 6) /* Channel 3-5 */ - *group = 1; - else if (chnl < 9) /* Channel 6-8 */ - *group = 2; - else if (chnl < 12) /* Channel 9-11 */ - *group = 3; - else if (chnl < 14) /* Channel 12-13 */ - *group = 4; - else if (chnl == 14) /* Channel 14 */ - *group = 5; -} - -void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) -{ - if (AutoLoadFail) { - padapter->pwrctrlpriv.bHWPowerdown = false; - padapter->pwrctrlpriv.bSupportRemoteWakeup = false; - } else { - /* hw power down mode selection , 0:rf-off / 1:power down */ - - if (padapter->registrypriv.hwpdn_mode == 2) - padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4)); - else - padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode; - - /* decide hw if support remote wakeup function */ - /* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */ - padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false; - } -} - -void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = padapter->HalData; - struct txpowerinfo24g pwrInfo24G; - u8 ch, group; - u8 TxCount; - - Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail); - - if (!AutoLoadFail) - pHalData->bTXPowerDataReadFromEEPORM = true; - - for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { - Hal_GetChnlGroup88E(ch, &group); - pHalData->Index24G_CCK_Base[0][ch] = pwrInfo24G.IndexCCK_Base[0][group]; - if (ch == 14) - pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][4]; - else - pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][group]; - } - for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { - pHalData->CCK_24G_Diff[0][TxCount] = pwrInfo24G.CCK_Diff[0][TxCount]; - pHalData->OFDM_24G_Diff[0][TxCount] = pwrInfo24G.OFDM_Diff[0][TxCount]; - pHalData->BW20_24G_Diff[0][TxCount] = pwrInfo24G.BW20_Diff[0][TxCount]; - pHalData->BW40_24G_Diff[0][TxCount] = pwrInfo24G.BW40_Diff[0][TxCount]; - } - - /* 2010/10/19 MH Add Regulator recognize for CU. */ - if (!AutoLoadFail) { - pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x7); /* bit0~2 */ - if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) - pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION & 0x7); /* bit0~2 */ - } else { - pHalData->EEPROMRegulatory = 0; - } -} - -void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = pAdapter->HalData; - - if (!AutoLoadFail) { - pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E]; - if (pHalData->CrystalCap == 0xFF) - pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E; - } else { - pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E; - } -} - -void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = pAdapter->HalData; - - if (!AutoLoadFail) - pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E] - & 0xE0) >> 5; - else - pHalData->BoardType = 0; -} - -void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = padapter->HalData; - - if (!AutoLoadFail) { - pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E]; - if (pHalData->EEPROMVersion == 0xFF) - pHalData->EEPROMVersion = EEPROM_Default_Version; - } else { - pHalData->EEPROMVersion = 1; - } -} - -void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) -{ - padapter->mlmepriv.ChannelPlan = - hal_com_get_channel_plan(hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF, - padapter->registrypriv.channel_plan, - RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail); - -} - -void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = padapter->HalData; - - if (!AutoLoadFail) { - pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E]; - } else { - pHalData->EEPROMCustomerID = 0; - pHalData->EEPROMSubCustomerID = 0; - } -} - -void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = pAdapter->HalData; - struct registry_priv *registry_par = &pAdapter->registrypriv; - - if (!AutoLoadFail) { - /* Antenna Diversity setting. */ - if (registry_par->antdiv_cfg == 2) { /* 2:By EFUSE */ - pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x18) >> 3; - if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) - pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION & 0x18) >> 3; - } else { - pHalData->AntDivCfg = registry_par->antdiv_cfg; /* 0:OFF , 1:ON, 2:By EFUSE */ - } - - if (registry_par->antdiv_type == 0) { - /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */ - pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E]; - if (pHalData->TRxAntDivType == 0xFF) - pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /* For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */ - } else { - pHalData->TRxAntDivType = registry_par->antdiv_type; - } - - if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV) - pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */ - } else { - pHalData->AntDivCfg = 0; - } -} - -void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail) -{ - struct hal_data_8188e *pHalData = Adapter->HalData; - - /* ThermalMeter from EEPROM */ - if (!AutoloadFail) - pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E]; - else - pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; - - if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) { - pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; - } -} diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rxdesc.c b/drivers/staging/rtl8188eu/hal/rtl8188e_rxdesc.c deleted file mode 100644 index 05dbd3f08328..000000000000 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_rxdesc.c +++ /dev/null @@ -1,193 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#define _RTL8188E_REDESC_C_ - -#include <osdep_service.h> -#include <drv_types.h> -#include <rtl8188e_hal.h> - -static void process_rssi(struct adapter *padapter, struct recv_frame *prframe) -{ - struct rx_pkt_attrib *pattrib = &prframe->attrib; - struct signal_stat *signal_stat = &padapter->recvpriv.signal_strength_data; - - if (signal_stat->update_req) { - signal_stat->total_num = 0; - signal_stat->total_val = 0; - signal_stat->update_req = 0; - } - - signal_stat->total_num++; - signal_stat->total_val += pattrib->phy_info.SignalStrength; - signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; -} /* Process_UI_RSSI_8192C */ - -static void process_link_qual(struct adapter *padapter, - struct recv_frame *prframe) -{ - struct rx_pkt_attrib *pattrib; - struct signal_stat *signal_stat; - - if (!prframe || !padapter) - return; - - pattrib = &prframe->attrib; - signal_stat = &padapter->recvpriv.signal_qual_data; - - if (signal_stat->update_req) { - signal_stat->total_num = 0; - signal_stat->total_val = 0; - signal_stat->update_req = 0; - } - - signal_stat->total_num++; - signal_stat->total_val += pattrib->phy_info.SignalQuality; - signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; -} - -void rtl8188e_process_phy_info(struct adapter *padapter, - struct recv_frame *precvframe) -{ - /* Check RSSI */ - process_rssi(padapter, precvframe); - /* Check EVM */ - process_link_qual(padapter, precvframe); -} - -void update_recvframe_attrib_88e(struct recv_frame *precvframe, - struct recv_stat *prxstat) -{ - struct rx_pkt_attrib *pattrib; - struct recv_stat report; - - report.rxdw0 = prxstat->rxdw0; - report.rxdw1 = prxstat->rxdw1; - report.rxdw2 = prxstat->rxdw2; - report.rxdw3 = prxstat->rxdw3; - report.rxdw4 = prxstat->rxdw4; - report.rxdw5 = prxstat->rxdw5; - - pattrib = &precvframe->attrib; - memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); - - pattrib->crc_err = (u8)((le32_to_cpu(report.rxdw0) >> 14) & 0x1);/* u8)prxreport->crc32; */ - - /* update rx report to recv_frame attribute */ - pattrib->pkt_rpt_type = (u8)((le32_to_cpu(report.rxdw3) >> 14) & 0x3);/* prxreport->rpt_sel; */ - - if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */ - pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */ - pattrib->drvinfo_sz = (u8)((le32_to_cpu(report.rxdw0) >> 16) & 0xf) * 8;/* u8)(prxreport->drvinfosize << 3); */ - - pattrib->physt = (u8)((le32_to_cpu(report.rxdw0) >> 26) & 0x1);/* u8)prxreport->physt; */ - - pattrib->bdecrypted = (le32_to_cpu(report.rxdw0) & BIT(27)) ? 0 : 1;/* u8)(prxreport->swdec ? 0 : 1); */ - pattrib->encrypt = (u8)((le32_to_cpu(report.rxdw0) >> 20) & 0x7);/* u8)prxreport->security; */ - - pattrib->qos = (u8)((le32_to_cpu(report.rxdw0) >> 23) & 0x1);/* u8)prxreport->qos; */ - pattrib->priority = (u8)((le32_to_cpu(report.rxdw1) >> 8) & 0xf);/* u8)prxreport->tid; */ - - pattrib->amsdu = (u8)((le32_to_cpu(report.rxdw1) >> 13) & 0x1);/* u8)prxreport->amsdu; */ - - pattrib->seq_num = (u16)(le32_to_cpu(report.rxdw2) & 0x00000fff);/* u16)prxreport->seq; */ - pattrib->frag_num = (u8)((le32_to_cpu(report.rxdw2) >> 12) & 0xf);/* u8)prxreport->frag; */ - pattrib->mfrag = (u8)((le32_to_cpu(report.rxdw1) >> 27) & 0x1);/* u8)prxreport->mf; */ - pattrib->mdata = (u8)((le32_to_cpu(report.rxdw1) >> 26) & 0x1);/* u8)prxreport->md; */ - - pattrib->mcs_rate = (u8)(le32_to_cpu(report.rxdw3) & 0x3f);/* u8)prxreport->rxmcs; */ - pattrib->rxht = (u8)((le32_to_cpu(report.rxdw3) >> 6) & 0x1);/* u8)prxreport->rxht; */ - - pattrib->icv_err = (u8)((le32_to_cpu(report.rxdw0) >> 15) & 0x1);/* u8)prxreport->icverr; */ - pattrib->shift_sz = (u8)((le32_to_cpu(report.rxdw0) >> 24) & 0x3); - } else if (pattrib->pkt_rpt_type == TX_REPORT1) { /* CCX */ - pattrib->pkt_len = TX_RPT1_PKT_LEN; - pattrib->drvinfo_sz = 0; - } else if (pattrib->pkt_rpt_type == TX_REPORT2) { /* TX RPT */ - pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x3FF);/* Rx length[9:0] */ - pattrib->drvinfo_sz = 0; - - /* */ - /* Get TX report MAC ID valid. */ - /* */ - pattrib->MacIDValidEntry[0] = le32_to_cpu(report.rxdw4); - pattrib->MacIDValidEntry[1] = le32_to_cpu(report.rxdw5); - - } else if (pattrib->pkt_rpt_type == HIS_REPORT) { /* USB HISR RPT */ - pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */ - } -} - -/* - * Notice: - * Before calling this function, - * precvframe->rx_data should be ready! - */ -void update_recvframe_phyinfo_88e(struct recv_frame *precvframe, - struct phy_stat *pphy_status) -{ - struct adapter *padapter = precvframe->adapter; - struct rx_pkt_attrib *pattrib = &precvframe->attrib; - struct odm_phy_status_info *pPHYInfo = (struct odm_phy_status_info *)(&pattrib->phy_info); - u8 *wlanhdr; - struct ieee80211_hdr *hdr = - (struct ieee80211_hdr *)precvframe->pkt->data; - struct odm_per_pkt_info pkt_info; - u8 *sa = NULL; - struct sta_priv *pstapriv; - struct sta_info *psta; - - pkt_info.bPacketMatchBSSID = false; - pkt_info.bPacketToSelf = false; - pkt_info.bPacketBeacon = false; - - wlanhdr = precvframe->pkt->data; - - pkt_info.bPacketMatchBSSID = (!ieee80211_is_ctl(hdr->frame_control) && - !pattrib->icv_err && !pattrib->crc_err && - !memcmp(get_hdr_bssid(wlanhdr), - get_bssid(&padapter->mlmepriv), ETH_ALEN)); - - pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && - (!memcmp(ieee80211_get_DA(hdr), - myid(&padapter->eeprompriv), ETH_ALEN)); - - pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && - (GetFrameSubType(wlanhdr) == IEEE80211_STYPE_BEACON); - - if (pkt_info.bPacketBeacon) { - if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) - sa = padapter->mlmepriv.cur_network.network.MacAddress; - /* to do Ad-hoc */ - } else { - sa = ieee80211_get_SA(hdr); - } - - pstapriv = &padapter->stapriv; - pkt_info.StationID = 0xFF; - psta = rtw_get_stainfo(pstapriv, sa); - if (psta) - pkt_info.StationID = psta->mac_id; - pkt_info.Rate = pattrib->mcs_rate; - - odm_phy_status_query(&padapter->HalData->odmpriv, pPHYInfo, - (u8 *)pphy_status, &(pkt_info)); - - precvframe->psta = NULL; - if (pkt_info.bPacketMatchBSSID && - (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE))) { - if (psta) { - precvframe->psta = psta; - rtl8188e_process_phy_info(padapter, precvframe); - } - } else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) { - if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) { - if (psta) - precvframe->psta = psta; - } - rtl8188e_process_phy_info(padapter, precvframe); - } -} diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_xmit.c b/drivers/staging/rtl8188eu/hal/rtl8188e_xmit.c deleted file mode 100644 index efa8960a7eb5..000000000000 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_xmit.c +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#define _RTL8188E_XMIT_C_ - -#include <osdep_service.h> -#include <drv_types.h> -#include <rtl8188e_hal.h> - -void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf) -{ - struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf; - - if (txrpt_ccx->int_ccx) { - if (txrpt_ccx->pkt_ok) - rtw_ack_tx_done(&adapter->xmitpriv, - RTW_SCTX_DONE_SUCCESS); - else - rtw_ack_tx_done(&adapter->xmitpriv, - RTW_SCTX_DONE_CCX_PKT_FAIL); - } -} diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c b/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c deleted file mode 100644 index 25ce6db3beae..000000000000 --- a/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c +++ /dev/null @@ -1,55 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#include <osdep_service.h> -#include <drv_types.h> -#include <rtl8188e_hal.h> -#include <usb_ops_linux.h> - -void sw_led_on(struct adapter *padapter, struct LED_871x *pLed) -{ - u8 led_cfg; - - if (padapter->bSurpriseRemoved || padapter->bDriverStopped) - return; - led_cfg = usb_read8(padapter, REG_LEDCFG2); - usb_write8(padapter, REG_LEDCFG2, (led_cfg & 0xf0) | BIT(5) | BIT(6)); - pLed->led_on = true; -} - -void sw_led_off(struct adapter *padapter, struct LED_871x *pLed) -{ - u8 led_cfg; - - if (padapter->bSurpriseRemoved || padapter->bDriverStopped) - goto exit; - - led_cfg = usb_read8(padapter, REG_LEDCFG2);/* 0x4E */ - - /* Open-drain arrangement for controlling the LED) */ - led_cfg &= 0x90; /* Set to software control. */ - usb_write8(padapter, REG_LEDCFG2, (led_cfg | BIT(3))); - led_cfg = usb_read8(padapter, REG_MAC_PINMUX_CFG); - led_cfg &= 0xFE; - usb_write8(padapter, REG_MAC_PINMUX_CFG, led_cfg); -exit: - pLed->led_on = false; -} - -void rtw_hal_sw_led_init(struct adapter *padapter) -{ - struct led_priv *pledpriv = &padapter->ledpriv; - - InitLed871x(padapter, &pledpriv->sw_led); -} - -void rtw_hal_sw_led_deinit(struct adapter *padapter) -{ - struct led_priv *ledpriv = &padapter->ledpriv; - - DeInitLed871x(&ledpriv->sw_led); -} diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_recv.c b/drivers/staging/rtl8188eu/hal/rtl8188eu_recv.c deleted file mode 100644 index aa69fc3880b3..000000000000 --- a/drivers/staging/rtl8188eu/hal/rtl8188eu_recv.c +++ /dev/null @@ -1,83 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#define _RTL8188EU_RECV_C_ -#include <linux/kmemleak.h> -#include <osdep_service.h> -#include <drv_types.h> -#include <recv_osdep.h> -#include <mlme_osdep.h> - -#include <usb_ops_linux.h> -#include <wifi.h> - -#include <rtl8188e_hal.h> - -int rtw_hal_init_recv_priv(struct adapter *padapter) -{ - struct recv_priv *precvpriv = &padapter->recvpriv; - int i, res = _SUCCESS; - struct recv_buf *precvbuf; - - tasklet_setup(&precvpriv->recv_tasklet, rtl8188eu_recv_tasklet); - - /* init recv_buf */ - _rtw_init_queue(&precvpriv->free_recv_buf_queue); - - precvpriv->precv_buf = - kcalloc(NR_RECVBUFF, sizeof(struct recv_buf), GFP_KERNEL); - if (!precvpriv->precv_buf) { - res = _FAIL; - goto exit; - } - precvbuf = precvpriv->precv_buf; - - for (i = 0; i < NR_RECVBUFF; i++) { - res = rtw_os_recvbuf_resource_alloc(precvbuf); - if (res == _FAIL) - break; - precvbuf->adapter = padapter; - precvbuf++; - } - skb_queue_head_init(&precvpriv->rx_skb_queue); - { - int i; - struct sk_buff *pskb = NULL; - - skb_queue_head_init(&precvpriv->free_recv_skb_queue); - - for (i = 0; i < NR_PREALLOC_RECV_SKB; i++) { - pskb = __netdev_alloc_skb(padapter->pnetdev, - MAX_RECVBUF_SZ, GFP_KERNEL); - if (pskb) { - kmemleak_not_leak(pskb); - skb_queue_tail(&precvpriv->free_recv_skb_queue, - pskb); - } - pskb = NULL; - } - } -exit: - return res; -} - -void rtw_hal_free_recv_priv(struct adapter *padapter) -{ - int i; - struct recv_buf *precvbuf; - struct recv_priv *precvpriv = &padapter->recvpriv; - - precvbuf = precvpriv->precv_buf; - - for (i = 0; i < NR_RECVBUFF; i++) { - usb_free_urb(precvbuf->purb); - precvbuf++; - } - - kfree(precvpriv->precv_buf); - skb_queue_purge(&precvpriv->rx_skb_queue); - skb_queue_purge(&precvpriv->free_recv_skb_queue); -} diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c b/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c deleted file mode 100644 index 1fa558e0de38..000000000000 --- a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c +++ /dev/null @@ -1,638 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#define _RTL8188E_XMIT_C_ -#include <osdep_service.h> -#include <drv_types.h> -#include <mon.h> -#include <wifi.h> -#include <osdep_intf.h> -#include <usb_ops_linux.h> -#include <rtl8188e_hal.h> - -s32 rtw_hal_init_xmit_priv(struct adapter *adapt) -{ - struct xmit_priv *pxmitpriv = &adapt->xmitpriv; - - tasklet_setup(&pxmitpriv->xmit_tasklet, rtl8188eu_xmit_tasklet); - return _SUCCESS; -} - -static u8 urb_zero_packet_chk(struct adapter *adapt, int sz) -{ - return !((sz + TXDESC_SIZE) % adapt->HalData->UsbBulkOutSize); -} - -static void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc) -{ - u16 *usptr = (u16 *)ptxdesc; - u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */ - u32 index; - u16 checksum = 0; - - /* Clear first */ - ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); - - for (index = 0; index < count; index++) - checksum = checksum ^ le16_to_cpu(*(__le16 *)(usptr + index)); - ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff & checksum); -} - -/* - * In normal chip, we should send some packet to Hw which will be used by Fw - * in FW LPS mode. The function is to fill the Tx descriptor of this packets, - * then Fw can tell Hw to send these packet derectly. - */ -void rtl8188e_fill_fake_txdesc(struct adapter *adapt, u8 *desc, u32 BufferLen, u8 ispspoll, u8 is_btqosnull) -{ - struct tx_desc *ptxdesc; - - /* Clear all status */ - ptxdesc = (struct tx_desc *)desc; - memset(desc, 0, TXDESC_SIZE); - - /* offset 0 */ - ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */ - - ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); /* 32 bytes for TX Desc */ - - ptxdesc->txdw0 |= cpu_to_le32(BufferLen & 0x0000ffff); /* Buffer size + command header */ - - /* offset 4 */ - ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT << QSEL_SHT) & 0x00001f00); /* Fixed queue of Mgnt queue */ - - /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */ - if (ispspoll) { - ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR); - } else { - ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); /* Hw set sequence number */ - ptxdesc->txdw3 |= cpu_to_le32((8 << 28)); /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */ - } - - if (is_btqosnull) - ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /* BT NULL */ - - /* offset 16 */ - ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */ - - /* USB interface drop packet if the checksum of descriptor isn't correct. */ - /* Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */ - rtl8188eu_cal_txdesc_chksum(ptxdesc); -} - -static void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc) -{ - if ((pattrib->encrypt > 0) && !pattrib->bswenc) { - switch (pattrib->encrypt) { - /* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */ - case _WEP40_: - case _WEP104_: - ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000); - ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; - case _TKIP_: - case _TKIP_WTMIC_: - ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000); - ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; - case _AES_: - ptxdesc->txdw1 |= cpu_to_le32((0x03 << SEC_TYPE_SHT) & 0x00c00000); - ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; - case _NO_PRIVACY_: - default: - break; - } - } -} - -static void fill_txdesc_vcs(struct pkt_attrib *pattrib, __le32 *pdw) -{ - switch (pattrib->vcs_mode) { - case RTS_CTS: - *pdw |= cpu_to_le32(RTS_EN); - break; - case CTS_TO_SELF: - *pdw |= cpu_to_le32(CTS_2_SELF); - break; - case NONE_VCS: - default: - break; - } - if (pattrib->vcs_mode) { - *pdw |= cpu_to_le32(HW_RTS_EN); - /* Set RTS BW */ - if (pattrib->ht_en) { - *pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(27)) : 0; - - if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) - *pdw |= cpu_to_le32((0x01 << 28) & 0x30000000); - else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) - *pdw |= cpu_to_le32((0x02 << 28) & 0x30000000); - else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) - *pdw |= 0; - else - *pdw |= cpu_to_le32((0x03 << 28) & 0x30000000); - } - } -} - -static void fill_txdesc_phy(struct pkt_attrib *pattrib, __le32 *pdw) -{ - if (pattrib->ht_en) { - *pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(25)) : 0; - - if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) - *pdw |= cpu_to_le32((0x01 << DATA_SC_SHT) & 0x003f0000); - else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) - *pdw |= cpu_to_le32((0x02 << DATA_SC_SHT) & 0x003f0000); - else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) - *pdw |= 0; - else - *pdw |= cpu_to_le32((0x03 << DATA_SC_SHT) & 0x003f0000); - } -} - -static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt) -{ - int pull = 0; - uint qsel; - u8 data_rate, pwr_status, offset; - struct adapter *adapt = pxmitframe->padapter; - struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct odm_dm_struct *odmpriv = &adapt->HalData->odmpriv; - struct tx_desc *ptxdesc = (struct tx_desc *)pmem; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - - if (adapt->registrypriv.mp_mode == 0) { - if ((!bagg_pkt) && (urb_zero_packet_chk(adapt, sz) == 0)) { - ptxdesc = (struct tx_desc *)(pmem + PACKET_OFFSET_SZ); - pull = 1; - } - } - - memset(ptxdesc, 0, sizeof(struct tx_desc)); - - /* 4 offset 0 */ - ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); - ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);/* update TXPKTSIZE */ - - offset = TXDESC_SIZE + OFFSET_SZ; - - ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */ - - if (is_multicast_ether_addr(pattrib->ra)) - ptxdesc->txdw0 |= cpu_to_le32(BMC); - - if (adapt->registrypriv.mp_mode == 0) { - if (!bagg_pkt) { - if ((pull) && (pxmitframe->pkt_offset > 0)) - pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1; - } - } - - /* pkt_offset, unit:8 bytes padding */ - if (pxmitframe->pkt_offset > 0) - ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000); - - /* driver uses rate */ - ptxdesc->txdw4 |= cpu_to_le32(USERATE);/* rate control always by driver */ - - if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) { - /* offset 4 */ - ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3F); - - qsel = (uint)(pattrib->qsel & 0x0000001f); - ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); - - ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000); - - fill_txdesc_sectype(pattrib, ptxdesc); - - if (pattrib->ampdu_en) { - ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);/* AGG EN */ - ptxdesc->txdw6 = cpu_to_le32(0x6666f800); - } else { - ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */ - } - - /* offset 8 */ - - /* offset 12 */ - ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000); - - /* offset 16 , offset 20 */ - if (pattrib->qos_en) - ptxdesc->txdw4 |= cpu_to_le32(QOS);/* QoS */ - - /* offset 20 */ - if (pxmitframe->agg_num > 1) - ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << USB_TXAGG_NUM_SHT) & 0xFF000000); - - if ((pattrib->ether_type != 0x888e) && - (pattrib->ether_type != 0x0806) && - (pattrib->ether_type != 0x88b4) && - (pattrib->dhcp_pkt != 1)) { - /* Non EAP & ARP & DHCP type data packet */ - - fill_txdesc_vcs(pattrib, &ptxdesc->txdw4); - fill_txdesc_phy(pattrib, &ptxdesc->txdw4); - - ptxdesc->txdw4 |= cpu_to_le32(0x00000008);/* RTS Rate=24M */ - ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);/* DATA/RTS Rate FB LMT */ - - if (pattrib->ht_en) { - if (ODM_RA_GetShortGI_8188E(odmpriv, pattrib->mac_id)) - ptxdesc->txdw5 |= cpu_to_le32(SGI);/* SGI */ - } - data_rate = ODM_RA_GetDecisionRate_8188E(odmpriv, pattrib->mac_id); - ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F); - pwr_status = ODM_RA_GetHwPwrStatus_8188E(odmpriv, pattrib->mac_id); - ptxdesc->txdw4 |= cpu_to_le32((pwr_status & 0x7) << PWR_STATUS_SHT); - } else { - /* EAP data packet and ARP packet and DHCP. */ - /* Use the 1M data rate to send the EAP/ARP packet. */ - /* This will maybe make the handshake smooth. */ - ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */ - if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) - ptxdesc->txdw4 |= cpu_to_le32(BIT(24));/* DATA_SHORT */ - ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); - } - } else if ((pxmitframe->frame_tag & 0x0f) == MGNT_FRAMETAG) { - /* offset 4 */ - ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3f); - - qsel = (uint)(pattrib->qsel & 0x0000001f); - ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); - - ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000f0000); - - /* offset 8 */ - /* CCX-TXRPT ack for xmit mgmt frames. */ - if (pxmitframe->ack_report) - ptxdesc->txdw2 |= cpu_to_le32(BIT(19)); - - /* offset 12 */ - ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000); - - /* offset 20 */ - ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);/* retry limit enable */ - if (pattrib->retry_ctrl) - ptxdesc->txdw5 |= cpu_to_le32(0x00180000);/* retry limit = 6 */ - else - ptxdesc->txdw5 |= cpu_to_le32(0x00300000);/* retry limit = 12 */ - - ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); - } else { - /* offset 4 */ - ptxdesc->txdw1 |= cpu_to_le32((4) & 0x3f);/* CAM_ID(MAC_ID) */ - - ptxdesc->txdw1 |= cpu_to_le32((6 << RATE_ID_SHT) & 0x000f0000);/* raid */ - - /* offset 8 */ - - /* offset 12 */ - ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0fff0000); - - /* offset 20 */ - ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); - } - - /* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. */ - /* (1) The sequence number of each non-Qos frame / broadcast / multicast / */ - /* mgnt frame should be controlled by Hw because Fw will also send null data */ - /* which we cannot control when Fw LPS enable. */ - /* --> default enable non-Qos data sequense number. 2010.06.23. by tynli. */ - /* (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. */ - /* (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. */ - /* 2010.06.23. Added by tynli. */ - if (!pattrib->qos_en) { - ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); /* Hw set sequence number */ - ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); /* Hw set sequence number */ - } - - rtl88eu_dm_set_tx_ant_by_tx_info(odmpriv, pmem, pattrib->mac_id); - - rtl8188eu_cal_txdesc_chksum(ptxdesc); - return pull; -} - -/* for non-agg data frame or management frame */ -static s32 rtw_dump_xframe(struct adapter *adapt, struct xmit_frame *pxmitframe) -{ - s32 ret = _SUCCESS; - s32 inner_ret = _SUCCESS; - int t, sz, w_sz, pull = 0; - u8 *mem_addr; - u32 ff_hwaddr; - struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; - struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct xmit_priv *pxmitpriv = &adapt->xmitpriv; - - if ((pxmitframe->frame_tag == DATA_FRAMETAG) && - (pxmitframe->attrib.ether_type != 0x0806) && - (pxmitframe->attrib.ether_type != 0x888e) && - (pxmitframe->attrib.ether_type != 0x88b4) && - (pxmitframe->attrib.dhcp_pkt != 1)) - rtw_issue_addbareq_cmd(adapt, pxmitframe); - mem_addr = pxmitframe->buf_addr; - - for (t = 0; t < pattrib->nr_frags; t++) { - if (inner_ret != _SUCCESS && ret == _SUCCESS) - ret = _FAIL; - - if (t != (pattrib->nr_frags - 1)) { - sz = pxmitpriv->frag_len; - sz = sz - 4 - pattrib->icv_len; - } else { - /* no frag */ - sz = pattrib->last_txcmdsz; - } - - pull = update_txdesc(pxmitframe, mem_addr, sz, false); - - if (pull) { - mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */ - pxmitframe->buf_addr = mem_addr; - w_sz = sz + TXDESC_SIZE; - } else { - w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; - } - ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); - - inner_ret = usb_write_port(adapt, ff_hwaddr, w_sz, pxmitbuf); - - rtw_count_tx_stats(adapt, pxmitframe, sz); - - mem_addr += w_sz; - - mem_addr = (u8 *)round_up((size_t)mem_addr, 4); - } - - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - if (ret != _SUCCESS) - rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); - - return ret; -} - -static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) -{ - struct pkt_attrib *pattrib = &pxmitframe->attrib; - - u32 len; - - /* no consider fragement */ - len = pattrib->hdrlen + pattrib->iv_len + - SNAP_SIZE + sizeof(u16) + - pattrib->pktlen + - ((pattrib->bswenc) ? pattrib->icv_len : 0); - - if (pattrib->encrypt == _TKIP_) - len += 8; - - return len; -} - -bool rtl8188eu_xmitframe_complete(struct adapter *adapt, - struct xmit_priv *pxmitpriv) -{ - struct xmit_frame *pxmitframe, *n; - struct xmit_frame *pfirstframe = NULL; - struct xmit_buf *pxmitbuf; - - /* aggregate variable */ - struct hw_xmit *phwxmit; - struct sta_info *psta = NULL; - struct tx_servq *ptxservq = NULL; - - struct list_head *xmitframe_phead = NULL; - - u32 pbuf; /* next pkt address */ - u32 pbuf_tail; /* last pkt tail */ - u32 len; /* packet length, except TXDESC_SIZE and PKT_OFFSET */ - - u32 bulksize = adapt->HalData->UsbBulkOutSize; - u8 desc_cnt; - u32 bulkptr; - - /* dump frame variable */ - u32 ff_hwaddr; - - pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if (!pxmitbuf) - return false; - - /* 3 1. pick up first frame */ - pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); - if (!pxmitframe) { - /* no more xmit frame, release xmit buffer */ - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - return false; - } - - pxmitframe->pxmitbuf = pxmitbuf; - pxmitframe->buf_addr = pxmitbuf->pbuf; - pxmitbuf->priv_data = pxmitframe; - - pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */ - pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */ - - rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe); - - /* always return ndis_packet after rtw_xmitframe_coalesce */ - rtw_os_xmit_complete(adapt, pxmitframe); - - /* 3 2. aggregate same priority and same DA(AP or STA) frames */ - pfirstframe = pxmitframe; - len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE + (pfirstframe->pkt_offset * PACKET_OFFSET_SZ); - pbuf_tail = len; - pbuf = round_up(pbuf_tail, 8); - - /* check pkt amount in one bulk */ - desc_cnt = 0; - bulkptr = bulksize; - if (pbuf < bulkptr) { - desc_cnt++; - } else { - desc_cnt = 0; - bulkptr = ((pbuf / bulksize) + 1) * bulksize; /* round to next bulksize */ - } - - /* dequeue same priority packet from station tx queue */ - psta = pfirstframe->attrib.psta; - switch (pfirstframe->attrib.priority) { - case 1: - case 2: - ptxservq = &psta->sta_xmitpriv.bk_q; - phwxmit = pxmitpriv->hwxmits + 3; - break; - case 4: - case 5: - ptxservq = &psta->sta_xmitpriv.vi_q; - phwxmit = pxmitpriv->hwxmits + 1; - break; - case 6: - case 7: - ptxservq = &psta->sta_xmitpriv.vo_q; - phwxmit = pxmitpriv->hwxmits; - break; - case 0: - case 3: - default: - ptxservq = &psta->sta_xmitpriv.be_q; - phwxmit = pxmitpriv->hwxmits + 2; - break; - } - spin_lock_bh(&pxmitpriv->lock); - - xmitframe_phead = get_list_head(&ptxservq->sta_pending); - list_for_each_entry_safe(pxmitframe, n, xmitframe_phead, list) { - pxmitframe->agg_num = 0; /* not first frame of aggregation */ - pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */ - - len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); - - if (round_up(pbuf + len, 8) > MAX_XMITBUF_SZ) { - pxmitframe->agg_num = 1; - pxmitframe->pkt_offset = 1; - break; - } - list_del_init(&pxmitframe->list); - ptxservq->qcnt--; - phwxmit->accnt--; - - pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; - - rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe); - /* always return ndis_packet after rtw_xmitframe_coalesce */ - rtw_os_xmit_complete(adapt, pxmitframe); - - /* (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz */ - update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, true); - - /* don't need xmitframe any more */ - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - /* handle pointer and stop condition */ - pbuf_tail = pbuf + len; - pbuf = round_up(pbuf_tail, 8); - - pfirstframe->agg_num++; - if (pfirstframe->agg_num == MAX_TX_AGG_PACKET_NUMBER) - break; - - if (pbuf < bulkptr) { - desc_cnt++; - if (desc_cnt == adapt->HalData->UsbTxAggDescNum) - break; - } else { - desc_cnt = 0; - bulkptr = ((pbuf / bulksize) + 1) * bulksize; - } - } /* end while (aggregate same priority and same DA(AP or STA) frames) */ - - if (list_empty(&ptxservq->sta_pending.queue)) - list_del_init(&ptxservq->tx_pending); - - spin_unlock_bh(&pxmitpriv->lock); - if ((pfirstframe->attrib.ether_type != 0x0806) && - (pfirstframe->attrib.ether_type != 0x888e) && - (pfirstframe->attrib.ether_type != 0x88b4) && - (pfirstframe->attrib.dhcp_pkt != 1)) - rtw_issue_addbareq_cmd(adapt, pfirstframe); - /* 3 3. update first frame txdesc */ - if ((pbuf_tail % bulksize) == 0) { - /* remove pkt_offset */ - pbuf_tail -= PACKET_OFFSET_SZ; - pfirstframe->buf_addr += PACKET_OFFSET_SZ; - pfirstframe->pkt_offset--; - } - - update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, true); - - /* 3 4. write xmit buffer to USB FIFO */ - ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); - usb_write_port(adapt, ff_hwaddr, pbuf_tail, pxmitbuf); - - /* 3 5. update statisitc */ - pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE); - pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ); - - rtw_count_tx_stats(adapt, pfirstframe, pbuf_tail); - - rtw_free_xmitframe(pxmitpriv, pfirstframe); - - return true; -} - -/* - * Return - * true dump packet directly - * false enqueue packet - */ -bool rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe) -{ - s32 res; - struct xmit_buf *pxmitbuf = NULL; - struct xmit_priv *pxmitpriv = &adapt->xmitpriv; - struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct mlme_priv *pmlmepriv = &adapt->mlmepriv; - - spin_lock_bh(&pxmitpriv->lock); - - if (rtw_txframes_sta_ac_pending(adapt, pattrib) > 0) - goto enqueue; - - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING)) - goto enqueue; - - pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if (!pxmitbuf) - goto enqueue; - - spin_unlock_bh(&pxmitpriv->lock); - - pxmitframe->pxmitbuf = pxmitbuf; - pxmitframe->buf_addr = pxmitbuf->pbuf; - pxmitbuf->priv_data = pxmitframe; - - res = rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe); - - if (res == _SUCCESS) { - rtw_dump_xframe(adapt, pxmitframe); - } else { - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - rtw_free_xmitframe(pxmitpriv, pxmitframe); - } - - return true; - -enqueue: - res = rtw_xmitframe_enqueue(adapt, pxmitframe); - spin_unlock_bh(&pxmitpriv->lock); - - if (res != _SUCCESS) { - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - /* Trick, make the statistics correct */ - pxmitpriv->tx_pkts--; - pxmitpriv->tx_drop++; - return true; - } - - return false; -} - -s32 rtw_hal_mgnt_xmit(struct adapter *adapt, struct xmit_frame *pmgntframe) -{ - struct xmit_priv *xmitpriv = &adapt->xmitpriv; - - rtl88eu_mon_xmit_hook(adapt->pmondev, pmgntframe, xmitpriv->frag_len); - return rtw_dump_xframe(adapt, pmgntframe); -} diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c b/drivers/staging/rtl8188eu/hal/usb_halinit.c deleted file mode 100644 index 05c67e7d23ad..000000000000 --- a/drivers/staging/rtl8188eu/hal/usb_halinit.c +++ /dev/null @@ -1,1879 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#define _HCI_HAL_INIT_C_ - -#include <osdep_service.h> -#include <drv_types.h> -#include <rtw_efuse.h> -#include <fw.h> -#include <rtl8188e_hal.h> -#include <phy.h> - -#define HAL_BB_ENABLE 1 - -static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe) -{ - struct hal_data_8188e *haldata = adapt->HalData; - - switch (NumOutPipe) { - case 3: - haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ; - haldata->OutEpNumber = 3; - break; - case 2: - haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ; - haldata->OutEpNumber = 2; - break; - case 1: - haldata->OutEpQueueSel = TX_SELE_HQ; - haldata->OutEpNumber = 1; - break; - default: - break; - } -} - -static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe) -{ - bool result = false; - - _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe); - - /* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */ - if (adapt->HalData->OutEpNumber == 1) { - if (NumInPipe != 1) - return result; - } - - /* All config other than above support one Bulk IN and one Interrupt IN. */ - - result = hal_mapping_out_pipe(adapt, NumOutPipe); - - return result; -} - -void rtw_hal_chip_configure(struct adapter *adapt) -{ - struct hal_data_8188e *haldata = adapt->HalData; - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt); - - if (pdvobjpriv->ishighspeed) - haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */ - else - haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */ - - haldata->interfaceIndex = pdvobjpriv->InterfaceNumber; - - haldata->UsbTxAggMode = 1; - haldata->UsbTxAggDescNum = 0x6; /* only 4 bits */ - - haldata->UsbRxAggMode = USB_RX_AGG_DMA;/* USB_RX_AGG_DMA; */ - haldata->UsbRxAggBlockCount = 8; /* unit : 512b */ - haldata->UsbRxAggBlockTimeout = 0x6; - haldata->UsbRxAggPageCount = 48; /* uint :128 b 0x0A; 10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */ - haldata->UsbRxAggPageTimeout = 0x4; /* 6, absolute time = 34ms/(2^6) */ - - HalUsbSetQueuePipeMapping8188EUsb(adapt, pdvobjpriv->RtNumInPipes, - pdvobjpriv->RtNumOutPipes); -} - -u32 rtw_hal_power_on(struct adapter *adapt) -{ - u16 value16; - /* HW Power on sequence */ - if (adapt->HalData->bMacPwrCtrlOn) - return _SUCCESS; - - if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK, - Rtl8188E_NIC_PWR_ON_FLOW)) - return _FAIL; - - /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */ - /* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */ - usb_write16(adapt, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */ - - /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */ - value16 = usb_read16(adapt, REG_CR); - value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN - | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); - /* for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */ - - usb_write16(adapt, REG_CR, value16); - adapt->HalData->bMacPwrCtrlOn = true; - - return _SUCCESS; -} - -/* Shall USB interface init this? */ -static void _InitInterrupt(struct adapter *Adapter) -{ - u32 imr, imr_ex; - u8 usb_opt; - - /* HISR write one to clear */ - usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF); - /* HIMR - */ - imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E; - usb_write32(Adapter, REG_HIMR_88E, imr); - Adapter->HalData->IntrMask[0] = imr; - - imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E; - usb_write32(Adapter, REG_HIMRE_88E, imr_ex); - Adapter->HalData->IntrMask[1] = imr_ex; - - /* REG_USB_SPECIAL_OPTION - BIT(4) */ - /* 0; Use interrupt endpoint to upload interrupt pkt */ - /* 1; Use bulk endpoint to upload interrupt pkt, */ - usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION); - - if (!adapter_to_dvobj(Adapter)->ishighspeed) - usb_opt = usb_opt & (~INT_BULK_SEL); - else - usb_opt = usb_opt | (INT_BULK_SEL); - - usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt); -} - -static void _InitQueueReservedPage(struct adapter *Adapter) -{ - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u32 numHQ = 0; - u32 numLQ = 0; - u32 numNQ = 0; - u32 numPubQ; - u32 value32; - u8 value8; - bool bWiFiConfig = pregistrypriv->wifi_spec; - - if (bWiFiConfig) { - if (Adapter->HalData->OutEpQueueSel & TX_SELE_HQ) - numHQ = 0x29; - - if (Adapter->HalData->OutEpQueueSel & TX_SELE_LQ) - numLQ = 0x1C; - - /* NOTE: This step shall be proceed before writing REG_RQPN. */ - if (Adapter->HalData->OutEpQueueSel & TX_SELE_NQ) - numNQ = 0x1C; - value8 = (u8)_NPQ(numNQ); - usb_write8(Adapter, REG_RQPN_NPQ, value8); - - numPubQ = 0xA8 - numHQ - numLQ - numNQ; - - /* TX DMA */ - value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; - usb_write32(Adapter, REG_RQPN, value32); - } else { - usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */ - usb_write16(Adapter, REG_RQPN_NPQ, 0x0d); - usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */ - } -} - -static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy) -{ - usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); - usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); - usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy); - usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); - usb_write8(Adapter, REG_TDECTRL + 1, txpktbuf_bndy); -} - -static void _InitPageBoundary(struct adapter *Adapter) -{ - /* RX Page Boundary */ - /* */ - u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E - 1; - - usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); -} - -static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ, - u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ, - u16 hiQ) -{ - u16 value16 = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); - - value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | - _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | - _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ); - - usb_write16(Adapter, REG_TRXDMA_CTRL, value16); -} - -static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter) -{ - u16 value = 0; - - switch (Adapter->HalData->OutEpQueueSel) { - case TX_SELE_HQ: - value = QUEUE_HIGH; - break; - case TX_SELE_LQ: - value = QUEUE_LOW; - break; - case TX_SELE_NQ: - value = QUEUE_NORMAL; - break; - default: - break; - } - _InitNormalChipRegPriority(Adapter, value, value, value, value, - value, value); -} - -static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter) -{ - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; - u16 valueHi = 0; - u16 valueLow = 0; - - switch (Adapter->HalData->OutEpQueueSel) { - case (TX_SELE_HQ | TX_SELE_LQ): - valueHi = QUEUE_HIGH; - valueLow = QUEUE_LOW; - break; - case (TX_SELE_NQ | TX_SELE_LQ): - valueHi = QUEUE_NORMAL; - valueLow = QUEUE_LOW; - break; - case (TX_SELE_HQ | TX_SELE_NQ): - valueHi = QUEUE_HIGH; - valueLow = QUEUE_NORMAL; - break; - default: - break; - } - - if (!pregistrypriv->wifi_spec) { - beQ = valueLow; - bkQ = valueLow; - viQ = valueHi; - voQ = valueHi; - mgtQ = valueHi; - hiQ = valueHi; - } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */ - beQ = valueLow; - bkQ = valueHi; - viQ = valueHi; - voQ = valueLow; - mgtQ = valueHi; - hiQ = valueHi; - } - _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); -} - -static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter) -{ - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; - - if (!pregistrypriv->wifi_spec) {/* typical setting */ - beQ = QUEUE_LOW; - bkQ = QUEUE_LOW; - viQ = QUEUE_NORMAL; - voQ = QUEUE_HIGH; - mgtQ = QUEUE_HIGH; - hiQ = QUEUE_HIGH; - } else {/* for WMM */ - beQ = QUEUE_LOW; - bkQ = QUEUE_NORMAL; - viQ = QUEUE_NORMAL; - voQ = QUEUE_HIGH; - mgtQ = QUEUE_HIGH; - hiQ = QUEUE_HIGH; - } - _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); -} - -static void _InitQueuePriority(struct adapter *Adapter) -{ - switch (Adapter->HalData->OutEpNumber) { - case 1: - _InitNormalChipOneOutEpPriority(Adapter); - break; - case 2: - _InitNormalChipTwoOutEpPriority(Adapter); - break; - case 3: - _InitNormalChipThreeOutEpPriority(Adapter); - break; - default: - break; - } -} - -static void _InitNetworkType(struct adapter *Adapter) -{ - u32 value32; - - value32 = usb_read32(Adapter, REG_CR); - /* TODO: use the other function to set network type */ - value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); - - usb_write32(Adapter, REG_CR, value32); -} - -static void _InitTransferPageSize(struct adapter *Adapter) -{ - /* Tx page size is always 128. */ - - u8 value8; - - value8 = _PSRX(PBP_128) | _PSTX(PBP_128); - usb_write8(Adapter, REG_PBP, value8); -} - -static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize) -{ - usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize); -} - -static void _InitWMACSetting(struct adapter *Adapter) -{ - struct hal_data_8188e *haldata = Adapter->HalData; - - haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | - RCR_CBSSID_DATA | RCR_CBSSID_BCN | - RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | - RCR_APP_MIC | RCR_APP_PHYSTS; - - /* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */ - usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig); - - /* Accept all multicast address */ - usb_write32(Adapter, REG_MAR, 0xFFFFFFFF); - usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); -} - -static void _InitAdaptiveCtrl(struct adapter *Adapter) -{ - u16 value16; - u32 value32; - - /* Response Rate Set */ - value32 = usb_read32(Adapter, REG_RRSR); - value32 &= ~RATE_BITMAP_ALL; - value32 |= RATE_RRSR_CCK_ONLY_1M; - usb_write32(Adapter, REG_RRSR, value32); - - /* CF-END Threshold */ - - /* SIFS (used in NAV) */ - value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); - usb_write16(Adapter, REG_SPEC_SIFS, value16); - - /* Retry Limit */ - value16 = _LRL(0x30) | _SRL(0x30); - usb_write16(Adapter, REG_RL, value16); -} - -static void _InitEDCA(struct adapter *Adapter) -{ - /* Set Spec SIFS (used in NAV) */ - usb_write16(Adapter, REG_SPEC_SIFS, 0x100a); - usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a); - - /* Set SIFS for CCK */ - usb_write16(Adapter, REG_SIFS_CTX, 0x100a); - - /* Set SIFS for OFDM */ - usb_write16(Adapter, REG_SIFS_TRX, 0x100a); - - /* TXOP */ - usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); - usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); - usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); - usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); -} - -static void _InitRDGSetting(struct adapter *Adapter) -{ - usb_write8(Adapter, REG_RD_CTRL, 0xFF); - usb_write16(Adapter, REG_RD_NAV_NXT, 0x200); - usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05); -} - -static void _InitRxSetting(struct adapter *Adapter) -{ - usb_write32(Adapter, REG_MACID, 0x87654321); - usb_write32(Adapter, 0x0700, 0x87654321); -} - -static void _InitRetryFunction(struct adapter *Adapter) -{ - u8 value8; - - value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL); - value8 |= EN_AMPDU_RTY_NEW; - usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); - - /* Set ACK timeout */ - usb_write8(Adapter, REG_ACKTO, 0x40); -} - -/*----------------------------------------------------------------------------- - * Function: usb_AggSettingTxUpdate() - * - * Overview: Separate TX/RX parameters update independent for TP detection and - * dynamic TX/RX aggreagtion parameters update. - * - * Input: struct adapter * - * - * Output/Return: NONE - * - * Revised History: - * When Who Remark - * 12/10/2010 MHC Separate to smaller function. - * - *--------------------------------------------------------------------------- - */ -static void usb_AggSettingTxUpdate(struct adapter *Adapter) -{ - struct hal_data_8188e *haldata = Adapter->HalData; - u32 value32; - - if (Adapter->registrypriv.wifi_spec) - haldata->UsbTxAggMode = false; - - if (haldata->UsbTxAggMode) { - value32 = usb_read32(Adapter, REG_TDECTRL); - value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT); - value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); - - usb_write32(Adapter, REG_TDECTRL, value32); - } -} /* usb_AggSettingTxUpdate */ - -/*----------------------------------------------------------------------------- - * Function: usb_AggSettingRxUpdate() - * - * Overview: Separate TX/RX parameters update independent for TP detection and - * dynamic TX/RX aggreagtion parameters update. - * - * Input: struct adapter * - * - * Output/Return: NONE - * - * Revised History: - * When Who Remark - * 12/10/2010 MHC Separate to smaller function. - * - *--------------------------------------------------------------------------- - */ -static void usb_AggSettingRxUpdate(struct adapter *Adapter) -{ - struct hal_data_8188e *haldata = Adapter->HalData; - u8 valueDMA; - u8 valueUSB; - - valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL); - valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION); - - switch (haldata->UsbRxAggMode) { - case USB_RX_AGG_DMA: - valueDMA |= RXDMA_AGG_EN; - valueUSB &= ~USB_AGG_EN; - break; - case USB_RX_AGG_USB: - valueDMA &= ~RXDMA_AGG_EN; - valueUSB |= USB_AGG_EN; - break; - case USB_RX_AGG_MIX: - valueDMA |= RXDMA_AGG_EN; - valueUSB |= USB_AGG_EN; - break; - case USB_RX_AGG_DISABLE: - default: - valueDMA &= ~RXDMA_AGG_EN; - valueUSB &= ~USB_AGG_EN; - break; - } - - usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA); - usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB); - - switch (haldata->UsbRxAggMode) { - case USB_RX_AGG_DMA: - usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount); - usb_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, haldata->UsbRxAggPageTimeout); - break; - case USB_RX_AGG_USB: - usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount); - usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout); - break; - case USB_RX_AGG_MIX: - usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount); - usb_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */ - usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount); - usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout); - break; - case USB_RX_AGG_DISABLE: - default: - /* TODO: */ - break; - } - - switch (PBP_128) { - case PBP_128: - haldata->HwRxPageSize = 128; - break; - case PBP_64: - haldata->HwRxPageSize = 64; - break; - case PBP_256: - haldata->HwRxPageSize = 256; - break; - case PBP_512: - haldata->HwRxPageSize = 512; - break; - case PBP_1024: - haldata->HwRxPageSize = 1024; - break; - default: - break; - } -} /* usb_AggSettingRxUpdate */ - -static void InitUsbAggregationSetting(struct adapter *Adapter) -{ - /* Tx aggregation setting */ - usb_AggSettingTxUpdate(Adapter); - - /* Rx aggregation setting */ - usb_AggSettingRxUpdate(Adapter); -} - -static void _InitBeaconParameters(struct adapter *Adapter) -{ - struct hal_data_8188e *haldata = Adapter->HalData; - - usb_write16(Adapter, REG_BCN_CTRL, 0x1010); - - /* TODO: Remove these magic number */ - usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/* ms */ - usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/* 5ms */ - usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /* 2ms */ - - /* Suggested by designer timchen. Change beacon AIFS to the largest number */ - /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */ - usb_write16(Adapter, REG_BCNTCFG, 0x660F); - - haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL); - haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE); - haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL + 2); - haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT + 2); - haldata->RegCR_1 = usb_read8(Adapter, REG_CR + 1); -} - -static void _BeaconFunctionEnable(struct adapter *Adapter) -{ - usb_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1))); - - usb_write8(Adapter, REG_RD_CTRL + 1, 0x6F); -} - -/* Set CCK and OFDM Block "ON" */ -static void _BBTurnOnBlock(struct adapter *Adapter) -{ - phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); - phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); -} - -static void _InitAntenna_Selection(struct adapter *Adapter) -{ - struct hal_data_8188e *haldata = Adapter->HalData; - - if (haldata->AntDivCfg == 0) - return; - - usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0) | BIT(23)); - phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01); - - if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) - haldata->CurAntenna = Antenna_A; - else - haldata->CurAntenna = Antenna_B; -} - -enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt) -{ - u8 val8; - enum rt_rf_power_state rfpowerstate = rf_off; - - if (adapt->pwrctrlpriv.bHWPowerdown) { - val8 = usb_read8(adapt, REG_HSISR); - rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on; - } else { /* rf on/off */ - usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG) & ~(BIT(3))); - val8 = usb_read8(adapt, REG_GPIO_IO_SEL); - rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off; - } - return rfpowerstate; -} /* HalDetectPwrDownMode */ - -u32 rtl8188eu_hal_init(struct adapter *Adapter) -{ - u8 value8 = 0; - u16 value16; - u8 txpktbuf_bndy; - u32 status = _SUCCESS; - struct hal_data_8188e *haldata = Adapter->HalData; - struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - - if (Adapter->pwrctrlpriv.bkeepfwalive) { - if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) { - rtl88eu_phy_iq_calibrate(Adapter, true); - } else { - rtl88eu_phy_iq_calibrate(Adapter, false); - haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true; - } - - ODM_TXPowerTrackingCheck(&haldata->odmpriv); - rtl88eu_phy_lc_calibrate(Adapter); - - goto exit; - } - - status = rtw_hal_power_on(Adapter); - if (status == _FAIL) { - goto exit; - } - - /* Save target channel */ - haldata->CurrentChannel = 6;/* default set to 6 */ - - if (pwrctrlpriv->reg_rfoff) - pwrctrlpriv->rf_pwrstate = rf_off; - - /* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */ - /* HW GPIO pin. Before PHY_RFConfig8192C. */ - /* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */ - - if (!pregistrypriv->wifi_spec) { - txpktbuf_bndy = TX_PAGE_BOUNDARY_88E; - } else { - /* for WMM */ - txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E; - } - - _InitQueueReservedPage(Adapter); - _InitQueuePriority(Adapter); - _InitPageBoundary(Adapter); - _InitTransferPageSize(Adapter); - - _InitTxBufferBoundary(Adapter, 0); - - if (Adapter->registrypriv.mp_mode == 1) { - _InitRxSetting(Adapter); - Adapter->bFWReady = false; - } else { - status = rtl88eu_download_fw(Adapter); - - if (status) { - Adapter->bFWReady = false; - return status; - } - Adapter->bFWReady = true; - } - rtl8188e_InitializeFirmwareVars(Adapter); - - rtl88eu_phy_mac_config(Adapter); - - rtl88eu_phy_bb_config(Adapter); - - rtl88eu_phy_rf_config(Adapter); - - status = rtl8188e_iol_efuse_patch(Adapter); - if (status == _FAIL) - goto exit; - - _InitTxBufferBoundary(Adapter, txpktbuf_bndy); - - status = InitLLTTable(Adapter, txpktbuf_bndy); - if (status == _FAIL) { - goto exit; - } - - /* Get Rx PHY status in order to report RSSI and others. */ - _InitDriverInfoSize(Adapter, DRVINFO_SZ); - - _InitInterrupt(Adapter); - rtw_hal_set_hwreg(Adapter, HW_VAR_MAC_ADDR, - Adapter->eeprompriv.mac_addr); - _InitNetworkType(Adapter);/* set msr */ - _InitWMACSetting(Adapter); - _InitAdaptiveCtrl(Adapter); - _InitEDCA(Adapter); - _InitRetryFunction(Adapter); - InitUsbAggregationSetting(Adapter); - _InitBeaconParameters(Adapter); - /* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */ - /* Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */ - /* Enable MACTXEN/MACRXEN block */ - value16 = usb_read16(Adapter, REG_CR); - value16 |= (MACTXEN | MACRXEN); - usb_write8(Adapter, REG_CR, value16); - - if (haldata->bRDGEnable) - _InitRDGSetting(Adapter); - - /* Enable TX Report */ - /* Enable Tx Report Timer */ - value8 = usb_read8(Adapter, REG_TX_RPT_CTRL); - usb_write8(Adapter, REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0))); - /* Set MAX RPT MACID */ - usb_write8(Adapter, REG_TX_RPT_CTRL + 1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */ - /* Tx RPT Timer. Unit: 32us */ - usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0); - - usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0); - - usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ - usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ - - /* Keep RfRegChnlVal for later use. */ - haldata->RfRegChnlVal[0] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask); - haldata->RfRegChnlVal[1] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask); - - _BBTurnOnBlock(Adapter); - - invalidate_cam_all(Adapter); - - /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */ - phy_set_tx_power_level(Adapter, haldata->CurrentChannel); - -/* Move by Neo for USB SS to below setp */ -/* _RfPowerSave(Adapter); */ - - _InitAntenna_Selection(Adapter); - - /* */ - /* Disable BAR, suggested by Scott */ - /* 2010.04.09 add by hpfan */ - /* */ - usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); - - /* HW SEQ CTRL */ - /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */ - usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF); - - if (pregistrypriv->wifi_spec) - usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0); - - /* Nav limit , suggest by scott */ - usb_write8(Adapter, 0x652, 0x0); - - rtl8188e_InitHalDm(Adapter); - - /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */ - /* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */ - /* call initstruct adapter. May cause some problem?? */ - /* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */ - /* in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */ - /* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */ - /* Added by tynli. 2010.03.30. */ - pwrctrlpriv->rf_pwrstate = rf_on; - - /* enable Tx report. */ - usb_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F); - - /* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */ - usb_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01);/* Pretx_en, for WEP/TKIP SEC */ - - /* tynli_test_tx_report. */ - usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); - - /* enable tx DMA to drop the redundate data of packet */ - usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); - - /* 2010/08/26 MH Merge from 8192CE. */ - if (pwrctrlpriv->rf_pwrstate == rf_on) { - if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) { - rtl88eu_phy_iq_calibrate(Adapter, true); - } else { - rtl88eu_phy_iq_calibrate(Adapter, false); - haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true; - } - - ODM_TXPowerTrackingCheck(&haldata->odmpriv); - - rtl88eu_phy_lc_calibrate(Adapter); - } - -/* _InitPABias(Adapter); */ - usb_write8(Adapter, REG_USB_HRPWM, 0); - - /* ack for xmit mgmt frames. */ - usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12)); - -exit: - - return status; -} - -static void CardDisableRTL8188EU(struct adapter *Adapter) -{ - u8 val8; - - /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */ - val8 = usb_read8(Adapter, REG_TX_RPT_CTRL); - usb_write8(Adapter, REG_TX_RPT_CTRL, val8 & (~BIT(1))); - - /* stop rx */ - usb_write8(Adapter, REG_CR, 0x0); - - /* Run LPS WL RFOFF flow */ - rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK, - Rtl8188E_NIC_LPS_ENTER_FLOW); - - /* 2. 0x1F[7:0] = 0 turn off RF */ - - val8 = usb_read8(Adapter, REG_MCUFWDL); - if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */ - /* Reset MCU 0x2[10]=0. */ - val8 = usb_read8(Adapter, REG_SYS_FUNC_EN + 1); - val8 &= ~BIT(2); /* 0x2[10], FEN_CPUEN */ - usb_write8(Adapter, REG_SYS_FUNC_EN + 1, val8); - } - - /* reset MCU ready status */ - usb_write8(Adapter, REG_MCUFWDL, 0); - - /* YJ,add,111212 */ - /* Disable 32k */ - val8 = usb_read8(Adapter, REG_32K_CTRL); - usb_write8(Adapter, REG_32K_CTRL, val8 & (~BIT(0))); - - /* Card disable power action flow */ - rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK, - Rtl8188E_NIC_DISABLE_FLOW); - - /* Reset MCU IO Wrapper */ - val8 = usb_read8(Adapter, REG_RSV_CTRL + 1); - usb_write8(Adapter, REG_RSV_CTRL + 1, (val8 & (~BIT(3)))); - val8 = usb_read8(Adapter, REG_RSV_CTRL + 1); - usb_write8(Adapter, REG_RSV_CTRL + 1, val8 | BIT(3)); - - /* YJ,test add, 111207. For Power Consumption. */ - val8 = usb_read8(Adapter, GPIO_IN); - usb_write8(Adapter, GPIO_OUT, val8); - usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */ - - val8 = usb_read8(Adapter, REG_GPIO_IO_SEL); - usb_write8(Adapter, REG_GPIO_IO_SEL, (val8 << 4)); - val8 = usb_read8(Adapter, REG_GPIO_IO_SEL + 1); - usb_write8(Adapter, REG_GPIO_IO_SEL + 1, val8 | 0x0F);/* Reg0x43 */ - usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */ - Adapter->HalData->bMacPwrCtrlOn = false; - Adapter->bFWReady = false; -} - -static void rtl8192cu_hw_power_down(struct adapter *adapt) -{ - /* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */ - /* Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */ - - /* Enable register area 0x0-0xc. */ - usb_write8(adapt, REG_RSV_CTRL, 0x0); - usb_write16(adapt, REG_APS_FSMCO, 0x8812); -} - -u32 rtl8188eu_hal_deinit(struct adapter *Adapter) -{ - usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E); - usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E); - - if (Adapter->pwrctrlpriv.bkeepfwalive) { - if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown)) - rtl8192cu_hw_power_down(Adapter); - } else { - if (Adapter->hw_init_completed) { - CardDisableRTL8188EU(Adapter); - - if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown)) - rtl8192cu_hw_power_down(Adapter); - } - } - return _SUCCESS; -} - -u32 rtw_hal_inirp_init(struct adapter *Adapter) -{ - u8 i; - struct recv_buf *precvbuf; - uint status; - struct recv_priv *precvpriv = &Adapter->recvpriv; - - status = _SUCCESS; - - /* issue Rx irp to receive data */ - precvbuf = precvpriv->precv_buf; - for (i = 0; i < NR_RECVBUFF; i++) { - if (!usb_read_port(Adapter, RECV_BULK_IN_ADDR, precvbuf)) { - status = _FAIL; - goto exit; - } - - precvbuf++; - } - -exit: - return status; -} - -/* */ -/* */ -/* EEPROM/EFUSE Content Parsing */ -/* */ -/* */ -static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *haldata = adapt->HalData; - - if (!AutoLoadFail) { - /* VID, PID */ - haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]); - haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]); - - /* Customer ID, 0x00 and 0xff are reserved for Realtek. */ - haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E]; - haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; - } else { - haldata->EEPROMVID = EEPROM_Default_VID; - haldata->EEPROMPID = EEPROM_Default_PID; - - /* Customer ID, 0x00 and 0xff are reserved for Realtek. */ - haldata->EEPROMCustomerID = EEPROM_Default_CustomerID; - haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; - } -} - -static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail) -{ - u16 i; - u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02}; - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt); - - if (AutoLoadFail) { - for (i = 0; i < 6; i++) - eeprom->mac_addr[i] = sMacAddr[i]; - } else { - /* Read Permanent MAC address */ - memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN); - } -} - -static void readAdapterInfo_8188EU(struct adapter *adapt) -{ - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt); - - /* parse the eeprom/efuse content */ - Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data); - Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - - Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); -} - -static void _ReadPROMContent(struct adapter *Adapter) -{ - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter); - u8 eeValue; - - /* check system boot selection */ - eeValue = usb_read8(Adapter, REG_9346CR); - eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false; - eeprom->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true; - - Hal_InitPGData88E(Adapter); - readAdapterInfo_8188EU(Adapter); -} - -void rtw_hal_read_chip_info(struct adapter *Adapter) -{ - _ReadPROMContent(Adapter); -} - -#define GPIO_DEBUG_PORT_NUM 0 -static void rtl8192cu_trigger_gpio_0(struct adapter *adapt) -{ -} - -static void ResumeTxBeacon(struct adapter *adapt) -{ - struct hal_data_8188e *haldata = adapt->HalData; - - /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */ - /* which should be read from register to a global variable. */ - - usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) | BIT(6)); - haldata->RegFwHwTxQCtrl |= BIT(6); - usb_write8(adapt, REG_TBTT_PROHIBIT + 1, 0xff); - haldata->RegReg542 |= BIT(0); - usb_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542); -} - -static void StopTxBeacon(struct adapter *adapt) -{ - struct hal_data_8188e *haldata = adapt->HalData; - - /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */ - /* which should be read from register to a global variable. */ - - usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) & (~BIT(6))); - haldata->RegFwHwTxQCtrl &= (~BIT(6)); - usb_write8(adapt, REG_TBTT_PROHIBIT + 1, 0x64); - haldata->RegReg542 &= ~(BIT(0)); - usb_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542); - - /* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */ -} - -static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val) -{ - u8 val8; - u8 mode = *((u8 *)val); - - /* disable Port0 TSF update */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4)); - - /* set net_type */ - val8 = usb_read8(Adapter, MSR) & 0x0c; - val8 |= mode; - usb_write8(Adapter, MSR, val8); - - if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { - StopTxBeacon(Adapter); - - usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */ - } else if (mode == _HW_STATE_ADHOC_) { - ResumeTxBeacon(Adapter); - usb_write8(Adapter, REG_BCN_CTRL, 0x1a); - } else if (mode == _HW_STATE_AP_) { - ResumeTxBeacon(Adapter); - - usb_write8(Adapter, REG_BCN_CTRL, 0x12); - - /* Set RCR */ - usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */ - /* enable to rx data frame */ - usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - /* enable to rx ps-poll */ - usb_write16(Adapter, REG_RXFLTMAP1, 0x0400); - - /* Beacon Control related register for first time */ - usb_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */ - - usb_write8(Adapter, REG_ATIMWND, 0x0a); /* 10ms */ - usb_write16(Adapter, REG_BCNTCFG, 0x00); - usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); - usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ - - /* reset TSF */ - usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); - - /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */ - usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4)); - - /* enable BCN0 Function for if1 */ - /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */ - usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP | EN_BCN_FUNCTION | BIT(1))); - - /* dis BCN1 ATIM WND if if2 is station */ - usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0)); - } -} - -static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val) -{ - u8 idx = 0; - u32 reg_macid; - - reg_macid = REG_MACID; - - for (idx = 0; idx < 6; idx++) - usb_write8(Adapter, (reg_macid + idx), val[idx]); -} - -static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val) -{ - u8 idx = 0; - u32 reg_bssid; - - reg_bssid = REG_BSSID; - - for (idx = 0; idx < 6; idx++) - usb_write8(Adapter, (reg_bssid + idx), val[idx]); -} - -static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val) -{ - u32 bcn_ctrl_reg; - - bcn_ctrl_reg = REG_BCN_CTRL; - - if (*((u8 *)val)) - usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); - else - usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg) & (~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); -} - -void rtw_hal_set_hwreg(struct adapter *Adapter, u8 variable, u8 *val) -{ - struct hal_data_8188e *haldata = Adapter->HalData; - struct dm_priv *pdmpriv = &haldata->dmpriv; - struct odm_dm_struct *podmpriv = &haldata->odmpriv; - - switch (variable) { - case HW_VAR_MEDIA_STATUS: - { - u8 val8; - - val8 = usb_read8(Adapter, MSR) & 0x0c; - val8 |= *((u8 *)val); - usb_write8(Adapter, MSR, val8); - } - break; - case HW_VAR_MEDIA_STATUS1: - { - u8 val8; - - val8 = usb_read8(Adapter, MSR) & 0x03; - val8 |= *((u8 *)val) << 2; - usb_write8(Adapter, MSR, val8); - } - break; - case HW_VAR_SET_OPMODE: - hw_var_set_opmode(Adapter, variable, val); - break; - case HW_VAR_MAC_ADDR: - hw_var_set_macaddr(Adapter, variable, val); - break; - case HW_VAR_BSSID: - hw_var_set_bssid(Adapter, variable, val); - break; - case HW_VAR_BASIC_RATE: - { - u16 BrateCfg = 0; - u8 RateIndex = 0; - - /* 2007.01.16, by Emily */ - /* Select RRSR (in Legacy-OFDM and CCK) */ - /* For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */ - /* We do not use other rates. */ - hal_set_brate_cfg(val, &BrateCfg); - - /* 2011.03.30 add by Luke Lee */ - /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */ - /* because CCK 2M has poor TXEVM */ - /* CCK 5.5M & 11M ACK should be enabled for better performance */ - - BrateCfg = (BrateCfg | 0xd) & 0x15d; - haldata->BasicRateSet = BrateCfg; - - BrateCfg |= 0x01; /* default enable 1M ACK rate */ - /* Set RRSR rate table. */ - usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff); - usb_write8(Adapter, REG_RRSR + 1, (BrateCfg >> 8) & 0xff); - usb_write8(Adapter, REG_RRSR + 2, usb_read8(Adapter, REG_RRSR + 2) & 0xf0); - - /* Set RTS initial rate */ - while (BrateCfg > 0x1) { - BrateCfg >>= 1; - RateIndex++; - } - /* Ziv - Check */ - usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex); - } - break; - case HW_VAR_TXPAUSE: - usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val)); - break; - case HW_VAR_BCN_FUNC: - hw_var_set_bcn_func(Adapter, variable, val); - break; - case HW_VAR_CORRECT_TSF: - { - u64 tsf; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - - tsf = pmlmeext->TSFValue - do_div(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval * 1024)) - 1024; /* us */ - - if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) - StopTxBeacon(Adapter); - - /* disable related TSF function */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(3))); - - usb_write32(Adapter, REG_TSFTR, tsf); - usb_write32(Adapter, REG_TSFTR + 4, tsf >> 32); - - /* enable related TSF function */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(3)); - - if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) - ResumeTxBeacon(Adapter); - } - break; - case HW_VAR_CHECK_BSSID: - if (*((u8 *)val)) { - usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN); - } else { - u32 val32; - - val32 = usb_read32(Adapter, REG_RCR); - - val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); - - usb_write32(Adapter, REG_RCR, val32); - } - break; - case HW_VAR_MLME_DISCONNECT: - /* Set RCR to not to receive data frame when NO LINK state */ - /* reject all data frames */ - usb_write16(Adapter, REG_RXFLTMAP2, 0x00); - - /* reset TSF */ - usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); - - /* disable update TSF */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4)); - break; - case HW_VAR_MLME_SITESURVEY: - if (*((u8 *)val)) { /* under sitesurvey */ - /* config RCR to receive different BSSID & not to receive data frame */ - u32 v = usb_read32(Adapter, REG_RCR); - - v &= ~(RCR_CBSSID_BCN); - usb_write32(Adapter, REG_RCR, v); - /* reject all data frame */ - usb_write16(Adapter, REG_RXFLTMAP2, 0x00); - - /* disable update TSF */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4)); - } else { /* sitesurvey done */ - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - - if ((is_client_associated_to_ap(Adapter)) || - ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) { - /* enable to rx data frame */ - usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - - /* enable update TSF */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(4))); - } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { - usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - /* enable update TSF */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(4))); - } - - usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR) | RCR_CBSSID_BCN); - } - break; - case HW_VAR_MLME_JOIN: - { - u8 RetryLimit = 0x30; - u8 type = *((u8 *)val); - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - - if (type == 0) { /* prepare to join */ - /* enable to rx data frame.Accept all data frame */ - usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - - usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN); - - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) - RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48; - else /* Ad-hoc Mode */ - RetryLimit = 0x7; - } else if (type == 1) { - /* joinbss_event call back when join res < 0 */ - usb_write16(Adapter, REG_RXFLTMAP2, 0x00); - } else if (type == 2) { - /* sta add event call back */ - /* enable update TSF */ - usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(4))); - - if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) - RetryLimit = 0x7; - } - usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - } - break; - case HW_VAR_BEACON_INTERVAL: - usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val)); - break; - case HW_VAR_SLOT_TIME: - { - u8 u1bAIFS, aSifsTime; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - - usb_write8(Adapter, REG_SLOT, val[0]); - - if (pmlmeinfo->WMM_enable == 0) { - if (pmlmeext->cur_wireless_mode == WIRELESS_11B) - aSifsTime = 10; - else - aSifsTime = 16; - - u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime); - - /* <Roger_EXP> Temporary removed, 2008.06.20. */ - usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS); - usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS); - usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS); - usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS); - } - } - break; - case HW_VAR_RESP_SIFS: - /* RESP_SIFS for CCK */ - usb_write8(Adapter, REG_R2T_SIFS, val[0]); /* SIFS_T2T_CCK (0x08) */ - usb_write8(Adapter, REG_R2T_SIFS + 1, val[1]); /* SIFS_R2T_CCK(0x08) */ - /* RESP_SIFS for OFDM */ - usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */ - usb_write8(Adapter, REG_T2T_SIFS + 1, val[3]); /* SIFS_R2T_OFDM(0x0a) */ - break; - case HW_VAR_ACK_PREAMBLE: - { - u8 regTmp; - u8 bShortPreamble = *((bool *)val); - /* Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */ - regTmp = (haldata->nCur40MhzPrimeSC) << 5; - if (bShortPreamble) - regTmp |= 0x80; - - usb_write8(Adapter, REG_RRSR + 2, regTmp); - } - break; - case HW_VAR_SEC_CFG: - usb_write8(Adapter, REG_SECCFG, *((u8 *)val)); - break; - case HW_VAR_DM_FUNC_OP: - if (val[0]) - podmpriv->BK_SupportAbility = podmpriv->SupportAbility; - else - podmpriv->SupportAbility = podmpriv->BK_SupportAbility; - break; - case HW_VAR_DM_FUNC_SET: - if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) { - pdmpriv->DMFlag = pdmpriv->InitDMFlag; - podmpriv->SupportAbility = pdmpriv->InitODMFlag; - } else { - podmpriv->SupportAbility |= *((u32 *)val); - } - break; - case HW_VAR_DM_FUNC_CLR: - podmpriv->SupportAbility &= *((u32 *)val); - break; - case HW_VAR_CAM_EMPTY_ENTRY: - { - u8 ucIndex = *((u8 *)val); - u8 i; - u32 ulCommand = 0; - u32 ulContent = 0; - u32 ulEncAlgo = CAM_AES; - - for (i = 0; i < CAM_CONTENT_COUNT; i++) { - /* filled id in CAM config 2 byte */ - if (i == 0) - ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo) << 2); - else - ulContent = 0; - /* polling bit, and No Write enable, and address */ - ulCommand = CAM_CONTENT_COUNT * ucIndex + i; - ulCommand = ulCommand | CAM_POLLINIG | - CAM_WRITE; - /* write content 0 is equall to mark invalid */ - usb_write32(Adapter, WCAMI, ulContent); /* delay_ms(40); */ - usb_write32(Adapter, RWCAM, ulCommand); /* delay_ms(40); */ - } - } - break; - case HW_VAR_CAM_INVALID_ALL: - usb_write32(Adapter, RWCAM, BIT(31) | BIT(30)); - break; - case HW_VAR_CAM_WRITE: - { - u32 cmd; - u32 *cam_val = (u32 *)val; - - usb_write32(Adapter, WCAMI, cam_val[0]); - - cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1]; - usb_write32(Adapter, RWCAM, cmd); - } - break; - case HW_VAR_AC_PARAM_VO: - usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_AC_PARAM_VI: - usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_AC_PARAM_BE: - haldata->AcParam_BE = ((u32 *)(val))[0]; - usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_AC_PARAM_BK: - usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_ACM_CTRL: - { - u8 acm_ctrl = *((u8 *)val); - u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL); - - if (acm_ctrl > 1) - AcmCtrl = AcmCtrl | 0x1; - - if (acm_ctrl & BIT(3)) - AcmCtrl |= AcmHw_VoqEn; - else - AcmCtrl &= (~AcmHw_VoqEn); - - if (acm_ctrl & BIT(2)) - AcmCtrl |= AcmHw_ViqEn; - else - AcmCtrl &= (~AcmHw_ViqEn); - - if (acm_ctrl & BIT(1)) - AcmCtrl |= AcmHw_BeqEn; - else - AcmCtrl &= (~AcmHw_BeqEn); - - usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl); - } - break; - case HW_VAR_AMPDU_MIN_SPACE: - { - u8 MinSpacingToSet; - u8 SecMinSpace; - - MinSpacingToSet = *((u8 *)val); - if (MinSpacingToSet <= 7) { - switch (Adapter->securitypriv.dot11PrivacyAlgrthm) { - case _NO_PRIVACY_: - case _AES_: - SecMinSpace = 0; - break; - case _WEP40_: - case _WEP104_: - case _TKIP_: - case _TKIP_WTMIC_: - SecMinSpace = 6; - break; - default: - SecMinSpace = 7; - break; - } - if (MinSpacingToSet < SecMinSpace) - MinSpacingToSet = SecMinSpace; - usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet); - } - } - break; - case HW_VAR_AMPDU_FACTOR: - { - u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9}; - u8 FactorToSet; - u8 *pRegToSet; - u8 index = 0; - - pRegToSet = RegToSet_Normal; /* 0xb972a841; */ - FactorToSet = *((u8 *)val); - if (FactorToSet <= 3) { - FactorToSet = 1 << (FactorToSet + 2); - if (FactorToSet > 0xf) - FactorToSet = 0xf; - - for (index = 0; index < 4; index++) { - if ((pRegToSet[index] & 0xf0) > (FactorToSet << 4)) - pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet << 4); - - if ((pRegToSet[index] & 0x0f) > FactorToSet) - pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet); - - usb_write8(Adapter, (REG_AGGLEN_LMT + index), pRegToSet[index]); - } - } - } - break; - case HW_VAR_RXDMA_AGG_PG_TH: - { - u8 threshold = *((u8 *)val); - - if (threshold == 0) - threshold = haldata->UsbRxAggPageCount; - usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold); - } - break; - case HW_VAR_SET_RPWM: - break; - case HW_VAR_H2C_FW_PWRMODE: - { - u8 psmode = (*(u8 *)val); - - /* Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */ - /* saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */ - if (psmode != PS_MODE_ACTIVE) - ODM_RF_Saving(podmpriv, true); - rtl8188e_set_FwPwrMode_cmd(Adapter, psmode); - } - break; - case HW_VAR_H2C_FW_JOINBSSRPT: - { - u8 mstatus = (*(u8 *)val); - - rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus); - } - break; - case HW_VAR_INITIAL_GAIN: - { - struct rtw_dig *pDigTable = &podmpriv->DM_DigTable; - u32 rx_gain = ((u32 *)(val))[0]; - - if (rx_gain == 0xff) {/* restore rx gain */ - ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue); - } else { - pDigTable->BackupIGValue = pDigTable->CurIGValue; - ODM_Write_DIG(podmpriv, rx_gain); - } - } - break; - case HW_VAR_TRIGGER_GPIO_0: - rtl8192cu_trigger_gpio_0(Adapter); - break; - case HW_VAR_RPT_TIMER_SETTING: - { - u16 min_rpt_time = (*(u16 *)val); - - ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time); - } - break; - case HW_VAR_ANTENNA_DIVERSITY_SELECT: - { - u8 Optimum_antenna = (*(u8 *)val); - u8 Ant; - /* switch antenna to Optimum_antenna */ - if (haldata->CurAntenna != Optimum_antenna) { - Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT; - rtl88eu_dm_update_rx_idle_ant(&haldata->odmpriv, Ant); - - haldata->CurAntenna = Optimum_antenna; - } - } - break; - case HW_VAR_EFUSE_BYTES: /* To set EFUE total used bytes, added by Roger, 2008.12.22. */ - haldata->EfuseUsedBytes = *((u16 *)val); - break; - case HW_VAR_FIFO_CLEARN_UP: - { - struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv; - u8 trycnt = 100; - - /* pause tx */ - usb_write8(Adapter, REG_TXPAUSE, 0xff); - - /* keep sn */ - Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ); - - if (!pwrpriv->bkeepfwalive) { - /* RX DMA stop */ - usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM) | RW_RELEASE_EN)); - do { - if (!(usb_read32(Adapter, REG_RXPKT_NUM) & RXDMA_IDLE)) - break; - } while (--trycnt); - - /* RQPN Load 0 */ - usb_write16(Adapter, REG_RQPN_NPQ, 0x0); - usb_write32(Adapter, REG_RQPN, 0x80000000); - mdelay(10); - } - } - break; - case HW_VAR_CHECK_TXBUF: - break; - case HW_VAR_APFM_ON_MAC: - haldata->bMacPwrCtrlOn = *val; - break; - case HW_VAR_TX_RPT_MAX_MACID: - { - u8 maxMacid = *val; - - usb_write8(Adapter, REG_TX_RPT_CTRL + 1, maxMacid + 1); - } - break; - case HW_VAR_H2C_MEDIA_STATUS_RPT: - rtl8188e_set_FwMediaStatus_cmd(Adapter, (*(__le16 *)val)); - break; - case HW_VAR_BCN_VALID: - /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */ - usb_write8(Adapter, REG_TDECTRL + 2, usb_read8(Adapter, REG_TDECTRL + 2) | BIT(0)); - break; - default: - break; - } -} - -void rtw_hal_get_hwreg(struct adapter *Adapter, u8 variable, u8 *val) -{ - switch (variable) { - case HW_VAR_BASIC_RATE: - *((u16 *)(val)) = Adapter->HalData->BasicRateSet; - fallthrough; - case HW_VAR_TXPAUSE: - val[0] = usb_read8(Adapter, REG_TXPAUSE); - break; - case HW_VAR_BCN_VALID: - /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */ - val[0] = (BIT(0) & usb_read8(Adapter, REG_TDECTRL + 2)) ? true : false; - break; - case HW_VAR_FWLPS_RF_ON: - { - /* When we halt NIC, we should check if FW LPS is leave. */ - if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) { - /* If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */ - /* because Fw is unload. */ - val[0] = true; - } else { - u32 valRCR; - - valRCR = usb_read32(Adapter, REG_RCR); - valRCR &= 0x00070000; - if (valRCR) - val[0] = false; - else - val[0] = true; - } - } - break; - case HW_VAR_CURRENT_ANTENNA: - val[0] = Adapter->HalData->CurAntenna; - break; - case HW_VAR_EFUSE_BYTES: /* To get EFUE total used bytes, added by Roger, 2008.12.22. */ - *((u16 *)(val)) = Adapter->HalData->EfuseUsedBytes; - break; - case HW_VAR_APFM_ON_MAC: - *val = Adapter->HalData->bMacPwrCtrlOn; - break; - case HW_VAR_CHK_HI_QUEUE_EMPTY: - *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION) & 0x0000ff00) == 0) ? true : false; - break; - default: - break; - } -} - -/* */ -/* Description: */ -/* Query setting of specified variable. */ -/* */ -u8 rtw_hal_get_def_var(struct adapter *Adapter, enum hal_def_variable eVariable, - void *pValue) -{ - struct hal_data_8188e *haldata = Adapter->HalData; - u8 bResult = _SUCCESS; - - switch (eVariable) { - case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: - { - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct sta_priv *pstapriv = &Adapter->stapriv; - struct sta_info *psta; - - psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); - if (psta) - *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB; - } - break; - case HAL_DEF_IS_SUPPORT_ANT_DIV: - *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true; - break; - case HAL_DEF_CURRENT_ANTENNA: - *((u8 *)pValue) = haldata->CurAntenna; - break; - case HAL_DEF_DRVINFO_SZ: - *((u32 *)pValue) = DRVINFO_SZ; - break; - case HAL_DEF_MAX_RECVBUF_SZ: - *((u32 *)pValue) = MAX_RECVBUF_SZ; - break; - case HAL_DEF_RX_PACKET_OFFSET: - *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ; - break; - case HAL_DEF_DBG_DM_FUNC: - *((u32 *)pValue) = haldata->odmpriv.SupportAbility; - break; - case HAL_DEF_RA_DECISION_RATE: - { - u8 MacID = *((u8 *)pValue); - - *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&haldata->odmpriv, MacID); - } - break; - case HAL_DEF_RA_SGI: - { - u8 MacID = *((u8 *)pValue); - - *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&haldata->odmpriv, MacID); - } - break; - case HAL_DEF_PT_PWR_STATUS: - { - u8 MacID = *((u8 *)pValue); - - *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&haldata->odmpriv, MacID); - } - break; - case HW_VAR_MAX_RX_AMPDU_FACTOR: - *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K; - break; - case HW_DEF_RA_INFO_DUMP: - break; - case HAL_DEF_DBG_DUMP_RXPKT: - *((u8 *)pValue) = haldata->bDumpRxPkt; - break; - case HAL_DEF_DBG_DUMP_TXPKT: - *((u8 *)pValue) = haldata->bDumpTxPkt; - break; - default: - bResult = _FAIL; - break; - } - - return bResult; -} - -void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level) -{ - u8 init_rate = 0; - u8 networkType, raid; - u32 mask, rate_bitmap; - u8 shortGIrate = false; - int supportRateNum = 0; - struct sta_info *psta; - struct odm_dm_struct *odmpriv = &adapt->HalData->odmpriv; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; - - if (mac_id >= NUM_STA) /* CAM_SIZE */ - return; - psta = pmlmeinfo->FW_sta_info[mac_id].psta; - if (!psta) - return; - switch (mac_id) { - case 0:/* for infra mode */ - supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); - networkType = judge_network_type(adapt, cur_network->SupportedRates) & 0xf; - raid = networktype_to_raid(networkType); - mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); - mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&pmlmeinfo->HT_caps) : 0; - if (support_short_GI(adapt, &pmlmeinfo->HT_caps)) - shortGIrate = true; - break; - case 1:/* for broadcast/multicast */ - supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); - if (pmlmeext->cur_wireless_mode & WIRELESS_11B) - networkType = WIRELESS_11B; - else - networkType = WIRELESS_11G; - raid = networktype_to_raid(networkType); - mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); - break; - default: /* for each sta in IBSS */ - supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); - networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates) & 0xf; - raid = networktype_to_raid(networkType); - mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); - - /* todo: support HT in IBSS */ - break; - } - - rate_bitmap = ODM_Get_Rate_Bitmap(odmpriv, mac_id, mask, rssi_level); - - mask &= rate_bitmap; - - init_rate = get_highest_rate_idx(mask) & 0x3f; - - ODM_RA_UpdateRateInfo_8188E(odmpriv, mac_id, raid, mask, shortGIrate); - - /* set ra_id */ - psta->raid = raid; - psta->init_rate = init_rate; -} - -void beacon_timing_control(struct adapter *adapt) -{ - u32 value32; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - u32 bcn_ctrl_reg = REG_BCN_CTRL; - /* reset TSF, enable update TSF, correcting TSF On Beacon */ - - /* BCN interval */ - usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); - usb_write8(adapt, REG_ATIMWND, 0x02);/* 2ms */ - - _InitBeaconParameters(adapt); - - usb_write8(adapt, REG_SLOT, 0x09); - - value32 = usb_read32(adapt, REG_TCR); - value32 &= ~TSFRST; - usb_write32(adapt, REG_TCR, value32); - - value32 |= TSFRST; - usb_write32(adapt, REG_TCR, value32); - - /* NOTE: Fix test chip's bug (about contention windows's randomness) */ - usb_write8(adapt, REG_RXTSF_OFFSET_CCK, 0x50); - usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50); - - _BeaconFunctionEnable(adapt); - - ResumeTxBeacon(adapt); - - usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg) | BIT(1)); -} - -void rtw_hal_def_value_init(struct adapter *adapt) -{ - struct hal_data_8188e *haldata = adapt->HalData; - struct pwrctrl_priv *pwrctrlpriv; - u8 i; - - pwrctrlpriv = &adapt->pwrctrlpriv; - - /* init default value */ - if (!pwrctrlpriv->bkeepfwalive) - haldata->LastHMEBoxNum = 0; - - /* init dm default value */ - haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false; - haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */ - haldata->pwrGroupCnt = 0; - haldata->PGMaxGroup = 13; - haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0; - for (i = 0; i < HP_THERMAL_NUM; i++) - haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; -} |