diff options
Diffstat (limited to 'drivers/staging/rtl8188eu/include')
18 files changed, 7 insertions, 624 deletions
diff --git a/drivers/staging/rtl8188eu/include/drv_types.h b/drivers/staging/rtl8188eu/include/drv_types.h index 4116051a9a65..3609a44ed078 100644 --- a/drivers/staging/rtl8188eu/include/drv_types.h +++ b/drivers/staging/rtl8188eu/include/drv_types.h @@ -34,7 +34,6 @@ struct qos_priv { }; #include <rtw_mlme.h> -#include <rtw_debug.h> #include <rtw_rf.h> #include <rtw_event.h> #include <rtw_led.h> diff --git a/drivers/staging/rtl8188eu/include/hal_intf.h b/drivers/staging/rtl8188eu/include/hal_intf.h index 39df30599a5d..2e3e933781eb 100644 --- a/drivers/staging/rtl8188eu/include/hal_intf.h +++ b/drivers/staging/rtl8188eu/include/hal_intf.h @@ -117,7 +117,6 @@ enum hal_def_variable { HW_DEF_RA_INFO_DUMP, HAL_DEF_DBG_DUMP_TXPKT, HW_DEF_FA_CNT_DUMP, - HW_DEF_ODM_DBG_FLAG, }; enum hal_odm_variable { diff --git a/drivers/staging/rtl8188eu/include/ieee80211.h b/drivers/staging/rtl8188eu/include/ieee80211.h index cb6940d2aeab..da6245a77d5d 100644 --- a/drivers/staging/rtl8188eu/include/ieee80211.h +++ b/drivers/staging/rtl8188eu/include/ieee80211.h @@ -546,13 +546,6 @@ enum _PUBLIC_ACTION { ACT_PUBLIC_MAX }; -/* BACK action code */ -enum rtw_ieee80211_back_actioncode { - RTW_WLAN_ACTION_ADDBA_REQ = 0, - RTW_WLAN_ACTION_ADDBA_RESP = 1, - RTW_WLAN_ACTION_DELBA = 2, -}; - /* HT features action code */ enum rtw_ieee80211_ht_actioncode { RTW_WLAN_ACTION_NOTIFY_CH_WIDTH = 0, @@ -566,13 +559,6 @@ enum rtw_ieee80211_ht_actioncode { RTW_WLAN_ACTION_HI_INFO_EXCHG = 8, }; -/* BACK (block-ack) parties */ -enum rtw_ieee80211_back_parties { - RTW_WLAN_BACK_RECIPIENT = 0, - RTW_WLAN_BACK_INITIATOR = 1, - RTW_WLAN_BACK_TIMER = 2, -}; - #define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs) * 00:50:F2 */ diff --git a/drivers/staging/rtl8188eu/include/odm.h b/drivers/staging/rtl8188eu/include/odm.h index d814ce492424..98402cfb1168 100644 --- a/drivers/staging/rtl8188eu/include/odm.h +++ b/drivers/staging/rtl8188eu/include/odm.h @@ -691,8 +691,6 @@ struct odm_dm_struct { bool odm_ready; struct rtl8192cd_priv *fake_priv; - u64 DebugComponents; - u32 DebugLevel; /* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */ bool bCckHighPower; diff --git a/drivers/staging/rtl8188eu/include/odm_debug.h b/drivers/staging/rtl8188eu/include/odm_debug.h deleted file mode 100644 index 857c64b8d2f4..000000000000 --- a/drivers/staging/rtl8188eu/include/odm_debug.h +++ /dev/null @@ -1,96 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ - -#ifndef __ODM_DBG_H__ -#define __ODM_DBG_H__ - -/* */ -/* Define the debug levels */ -/* */ -/* 1. DBG_TRACE and DBG_LOUD are used for normal cases. */ -/* They can help SW engineer to develop or trace states changed */ -/* and also help HW enginner to trace every operation to and from HW, */ -/* e.g IO, Tx, Rx. */ -/* */ -/* 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, */ -/* which help us to debug SW or HW. */ - -/* Never used in a call to ODM_RT_TRACE()! */ -#define ODM_DBG_OFF 1 - -/* Fatal bug. */ -/* For example, Tx/Rx/IO locked up, OS hangs, memory access violation, */ -/* resource allocation failed, unexpected HW behavior, HW BUG and so on. */ -#define ODM_DBG_SERIOUS 2 - -/* Abnormal, rare, or unexpected cases. */ -/* For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. */ -#define ODM_DBG_WARNING 3 - -/* Normal case with useful information about current SW or HW state. */ -/* For example, Tx/Rx descriptor to fill, Tx/Rx descr. completed status, */ -/* SW protocol state change, dynamic mechanism state change and so on. */ -/* */ -#define ODM_DBG_LOUD 4 - -/* Normal case with detail execution flow or information. */ -#define ODM_DBG_TRACE 5 - -/* Define the tracing components */ -/* BB Functions */ -#define ODM_COMP_DIG BIT(0) -#define ODM_COMP_RA_MASK BIT(1) -#define ODM_COMP_DYNAMIC_TXPWR BIT(2) -#define ODM_COMP_FA_CNT BIT(3) -#define ODM_COMP_RSSI_MONITOR BIT(4) -#define ODM_COMP_CCK_PD BIT(5) -#define ODM_COMP_ANT_DIV BIT(6) -#define ODM_COMP_PWR_SAVE BIT(7) -#define ODM_COMP_PWR_TRA BIT(8) -#define ODM_COMP_RATE_ADAPTIVE BIT(9) -#define ODM_COMP_PATH_DIV BIT(10) -#define ODM_COMP_PSD BIT(11) -#define ODM_COMP_DYNAMIC_PRICCA BIT(12) -#define ODM_COMP_RXHP BIT(13) -/* MAC Functions */ -#define ODM_COMP_EDCA_TURBO BIT(16) -#define ODM_COMP_EARLY_MODE BIT(17) -/* RF Functions */ -#define ODM_COMP_TX_PWR_TRACK BIT(24) -#define ODM_COMP_RX_GAIN_TRACK BIT(25) -#define ODM_COMP_CALIBRATION BIT(26) -/* Common Functions */ -#define ODM_COMP_COMMON BIT(30) -#define ODM_COMP_INIT BIT(31) - -/*------------------------Export Marco Definition---------------------------*/ -#define RT_PRINTK(fmt, args...) \ - pr_info("%s(): " fmt, __func__, ## args); - -#ifndef ASSERT - #define ASSERT(expr) -#endif - -#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \ - if (((comp) & pDM_Odm->DebugComponents) && \ - (level <= pDM_Odm->DebugLevel)) { \ - pr_info("[ODM-8188E] "); \ - RT_PRINTK fmt; \ - } - -#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \ - if (!(expr)) { \ - pr_info("Assertion failed! %s at ......\n", #expr); \ - pr_info(" ......%s,%s,line=%d\n", __FILE__, \ - __func__, __LINE__); \ - RT_PRINTK fmt; \ - ASSERT(false); \ - } - -void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm); - -#endif /* __ODM_DBG_H__ */ diff --git a/drivers/staging/rtl8188eu/include/odm_precomp.h b/drivers/staging/rtl8188eu/include/odm_precomp.h index 5254d875f96b..eb2b8b613aad 100644 --- a/drivers/staging/rtl8188eu/include/odm_precomp.h +++ b/drivers/staging/rtl8188eu/include/odm_precomp.h @@ -23,7 +23,6 @@ #include "odm.h" #include "odm_hwconfig.h" -#include "odm_debug.h" #include "phydm_regdefine11n.h" #include "hal8188e_rate_adaptive.h" /* for RA,Power training */ @@ -33,8 +32,6 @@ #include "odm_rtl8188e.h" -void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm); -void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm); void odm_DIGInit(struct odm_dm_struct *pDM_Odm); void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm); void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm); @@ -42,7 +39,6 @@ void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm); void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm); void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm); void odm_SwAntDivInit_NIC(struct odm_dm_struct *pDM_Odm); -void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm); void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm); void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm); void odm_DIG(struct odm_dm_struct *pDM_Odm); diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h index 0c4c23be1dd5..2c16d3f33e1c 100644 --- a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h +++ b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h @@ -20,19 +20,6 @@ #include "rtw_sreset.h" #include "odm_precomp.h" -/* Fw Array */ -#define Rtl8188E_FwImageArray Rtl8188EFwImgArray -#define Rtl8188E_FWImgArrayLength Rtl8188EFWImgArrayLength - -#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin" -#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt" -#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt" -#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt" -#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt" -#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt" -#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt" -#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt" - /* RTL8188E Power Configuration CMDs for USB/SDIO interfaces */ #define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow #define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow @@ -208,7 +195,6 @@ struct hal_data_8188e { u8 bTXPowerDataReadFromEEPORM; u8 EEPROMThermalMeter; - u8 bAPKThermalMeterIgnore; bool EepromOrEfuse; @@ -233,21 +219,10 @@ struct hal_data_8188e { u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; - u8 LegacyHTTxPowerDiff;/* Legacy to HT rate power diff */ - /* The current Tx Power Level */ - u8 CurrentCckTxPwrIdx; - u8 CurrentOfdm24GTxPwrIdx; - u8 CurrentBW2024GTxPwrIdx; - u8 CurrentBW4024GTxPwrIdx; - /* Read/write are allow for following hardware information variables */ u8 framesync; - u32 framesyncC34; - u8 framesyncMonitor; - u8 DefaultInitialGain[4]; u8 pwrGroupCnt; u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; - u32 CCKTxPowerLevelOriginalOffset; u8 CrystalCap; @@ -280,12 +255,6 @@ struct hal_data_8188e { u8 bDumpRxPkt;/* for debug */ u8 bDumpTxPkt;/* for debug */ - u8 FwRsvdPageStartOffset; /* Reserve page start offset except - * beacon in TxQ. - */ - - /* 2010/08/09 MH Add CU power down mode. */ - bool pwrdown; /* Add for dual MAC 0--Mac0 1--Mac1 */ u32 interfaceIndex; @@ -309,7 +278,6 @@ struct hal_data_8188e { u8 UsbTxAggMode; u8 UsbTxAggDescNum; u16 HwRxPageSize; /* Hardware setting */ - u32 MaxUsbRxAggBlock; enum usb_rx_agg_mode UsbRxAggMode; u8 UsbRxAggBlockCount; /* USB Block count. Block size is diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_spec.h b/drivers/staging/rtl8188eu/include/rtl8188e_spec.h index 55cce1f6bd77..fe0871bbb95f 100644 --- a/drivers/staging/rtl8188eu/include/rtl8188e_spec.h +++ b/drivers/staging/rtl8188eu/include/rtl8188e_spec.h @@ -7,15 +7,8 @@ #ifndef __RTL8188E_SPEC_H__ #define __RTL8188E_SPEC_H__ -/* 8192C Register offset definition */ - -#define HAL_PS_TIMER_INT_DELAY 50 /* 50 microseconds */ -#define HAL_92C_NAV_UPPER_UNIT 128 /* micro-second */ - -#define MAC_ADDR_LEN 6 /* 8188E PKT_BUFF_ACCESS_CTRL value */ #define TXPKT_BUF_SELECT 0x69 -#define RXPKT_BUF_SELECT 0xA5 #define DISABLE_TRXPKT_BUF_ACCESS 0x0 /* 0x0000h ~ 0x00FFh System Configuration */ @@ -52,19 +45,7 @@ #define REG_FSISR 0x0054 #define REG_HSIMR 0x0058 #define REG_HSISR 0x005c -#define REG_GPIO_PIN_CTRL_2 0x0060 /* RTL8723 WIFI/BT/GPS - * Multi-Function GPIO Pin Control. - */ -#define REG_GPIO_IO_SEL_2 0x0062 /* RTL8723 WIFI/BT/GPS - * Multi-Function GPIO Select. - */ #define REG_BB_PAD_CTRL 0x0064 -#define REG_MULTI_FUNC_CTRL 0x0068 /* RTL8723 WIFI/BT/GPS - * Multi-Function control source. - */ -#define REG_GPIO_OUTPUT 0x006c -#define REG_AFE_XTAL_CTRL_EXT 0x0078 /* RTL8188E */ -#define REG_XCK_OUT_CTRL 0x007c /* RTL8188E */ #define REG_MCUFWDL 0x0080 #define REG_WOL_EVENT 0x0081 /* RTL8188E */ #define REG_MCUTSTCFG 0x0084 @@ -172,9 +153,6 @@ #define REG_PCIE_HCPWM 0x0363 /* PCIe CPWM */ #define REG_WATCH_DOG 0x0368 -/* RTL8723 series ------------------------------ */ -#define REG_PCIE_HISR 0x03A0 - /* spec version 11 */ /* 0x0400h ~ 0x047Fh Protocol Configuration */ #define REG_VOQ_INFORMATION 0x0400 @@ -459,34 +437,6 @@ #define GPIO_IO_SEL (REG_GPIO_PIN_CTRL + 2) #define GPIO_MOD (REG_GPIO_PIN_CTRL + 3) -/* 8723/8188E Host System Interrupt Mask Register (offset 0x58, 32 byte) */ -#define HSIMR_GPIO12_0_INT_EN BIT(0) -#define HSIMR_SPS_OCP_INT_EN BIT(5) -#define HSIMR_RON_INT_EN BIT(6) -#define HSIMR_PDN_INT_EN BIT(7) -#define HSIMR_GPIO9_INT_EN BIT(25) - -/* 8723/8188E Host System Interrupt Status Register (offset 0x5C, 32 byte) */ -#define HSISR_GPIO12_0_INT BIT(0) -#define HSISR_SPS_OCP_INT BIT(5) -#define HSISR_RON_INT_EN BIT(6) -#define HSISR_PDNINT BIT(7) -#define HSISR_GPIO9_INT BIT(25) - -/* 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) */ -/* - * Network Type - * 00: No link - * 01: Link in ad hoc network - * 10: Link in infrastructure network - * 11: AP mode - * Default: 00b. - */ -#define MSR_NOLINK 0x00 -#define MSR_ADHOC 0x01 -#define MSR_INFRA 0x02 -#define MSR_AP 0x03 - /* 88EU (MSR) Media Status Register (Offset 0x4C, 8 bits) */ #define USB_INTR_CONTENT_C2H_OFFSET 0 #define USB_INTR_CONTENT_CPWM1_OFFSET 16 @@ -505,34 +455,6 @@ #define CMD_EFUSE_PATCH_ERR BIT(6) #define CMD_IOCONFIG_ERR BIT(7) -/* 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) */ -/* 8192C Response Rate Set Register (offset 0x181, 24bits) */ -#define RRSR_1M BIT(0) -#define RRSR_2M BIT(1) -#define RRSR_5_5M BIT(2) -#define RRSR_11M BIT(3) -#define RRSR_6M BIT(4) -#define RRSR_9M BIT(5) -#define RRSR_12M BIT(6) -#define RRSR_18M BIT(7) -#define RRSR_24M BIT(8) -#define RRSR_36M BIT(9) -#define RRSR_48M BIT(10) -#define RRSR_54M BIT(11) -#define RRSR_MCS0 BIT(12) -#define RRSR_MCS1 BIT(13) -#define RRSR_MCS2 BIT(14) -#define RRSR_MCS3 BIT(15) -#define RRSR_MCS4 BIT(16) -#define RRSR_MCS5 BIT(17) -#define RRSR_MCS6 BIT(18) -#define RRSR_MCS7 BIT(19) - -/* 8192C Response Rate Set Register (offset 0x1BF, 8bits) */ -/* WOL bit information */ -#define HAL92C_WOL_PTK_UPDATE_EVENT BIT(0) -#define HAL92C_WOL_GTK_UPDATE_EVENT BIT(1) - /* 8192C BW_OPMODE bits (Offset 0x203, 8bit) */ #define BW_OPMODE_20MHZ BIT(2) #define BW_OPMODE_5G BIT(1) @@ -565,12 +487,6 @@ #define SCR_TxSecEnable 0x02 #define SCR_RxSecEnable 0x04 -/* 10. Power Save Control Registers (Offset: 0x0260 - 0x02DF) */ -#define WOW_PMEN BIT(0) /* Power management Enable. */ -#define WOW_WOMEN BIT(1) /* WoW function on or off. */ -#define WOW_MAGIC BIT(2) /* Magic packet */ -#define WOW_UWF BIT(3) /* Unicast Wakeup frame. */ - /* 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) */ /* 8188 IMR/ISR bits */ #define IMR_DISABLED_88E 0x0 @@ -648,21 +564,6 @@ So the following defines for 92C is not entire!!!!!! * 0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) * 0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) */ -/* 8192C (TXPAUSE) transmission pause (Offset 0x522, 8 bits) */ -/* Note: - * The bits of stopping AC(VO/VI/BE/BK) queue in datasheet - * RTL8192S/RTL8192C are wrong, - * the correct arragement is VO - Bit0, VI - Bit1, BE - Bit2, - * and BK - Bit3. - * 8723 and 88E may be not correct either in the earlier version. - */ -#define StopBecon BIT(6) -#define StopHigh BIT(5) -#define StopMgt BIT(4) -#define StopBK BIT(3) -#define StopBE BIT(2) -#define StopVI BIT(1) -#define StopVO BIT(0) /* 8192C (RCR) Receive Configuration Register(Offset 0x608, 32 bits) */ #define RCR_APPFCS BIT(31) /* WMAC append FCS after payload */ @@ -695,14 +596,8 @@ So the following defines for 92C is not entire!!!!!! #define RCR_FIFO_OFFSET 13 /* 0xFE00h ~ 0xFE55h USB Configuration */ -#define REG_USB_INFO 0xFE17 -#define REG_USB_SPECIAL_OPTION 0xFE55 -#define REG_USB_DMA_AGG_TO 0xFE5B -#define REG_USB_AGG_TO 0xFE5C -#define REG_USB_AGG_TH 0xFE5D - #define REG_USB_HRPWM 0xFE58 -#define REG_USB_HCPWM 0xFE57 + /* 8192C Register Bit and Content definition */ /* 0x0000h ~ 0x00FFh System Configuration */ @@ -1089,142 +984,6 @@ So the following defines for 92C is not entire!!!!!! #define SCR_TXBCUSEDK BIT(6) /* Force Tx Bcast pkt Use Default Key */ #define SCR_RXBCUSEDK BIT(7) /* Force Rx Bcast pkt Use Default Key */ -/* RTL8188E SDIO Configuration */ - -/* I/O bus domain address mapping */ -#define SDIO_LOCAL_BASE 0x10250000 -#define WLAN_IOREG_BASE 0x10260000 -#define FIRMWARE_FIFO_BASE 0x10270000 -#define TX_HIQ_BASE 0x10310000 -#define TX_MIQ_BASE 0x10320000 -#define TX_LOQ_BASE 0x10330000 -#define RX_RX0FF_BASE 0x10340000 - -/* SDIO host local register space mapping. */ -#define SDIO_LOCAL_MSK 0x0FFF -#define WLAN_IOREG_MSK 0x7FFF -#define WLAN_FIFO_MSK 0x1FFF /* Aggregation Length[12:0] */ -#define WLAN_RX0FF_MSK 0x0003 - -/* Without ref to the SDIO Device ID */ -#define SDIO_WITHOUT_REF_DEVICE_ID 0 -#define SDIO_LOCAL_DEVICE_ID 0 /* 0b[16], 000b[15:13] */ -#define WLAN_TX_HIQ_DEVICE_ID 4 /* 0b[16], 100b[15:13] */ -#define WLAN_TX_MIQ_DEVICE_ID 5 /* 0b[16], 101b[15:13] */ -#define WLAN_TX_LOQ_DEVICE_ID 6 /* 0b[16], 110b[15:13] */ -#define WLAN_RX0FF_DEVICE_ID 7 /* 0b[16], 111b[15:13] */ -#define WLAN_IOREG_DEVICE_ID 8 /* 1b[16] */ - -/* SDIO Tx Free Page Index */ -#define HI_QUEUE_IDX 0 -#define MID_QUEUE_IDX 1 -#define LOW_QUEUE_IDX 2 -#define PUBLIC_QUEUE_IDX 3 - -#define SDIO_MAX_TX_QUEUE 3 /* HIQ, MIQ and LOQ */ -#define SDIO_MAX_RX_QUEUE 1 - -/* SDIO Tx Control */ -#define SDIO_REG_TX_CTRL 0x0000 -/* SDIO Host Interrupt Mask */ -#define SDIO_REG_HIMR 0x0014 -/* SDIO Host Interrupt Service Routine */ -#define SDIO_REG_HISR 0x0018 -/* HCI Current Power Mode */ -#define SDIO_REG_HCPWM 0x0019 -/* RXDMA Request Length */ -#define SDIO_REG_RX0_REQ_LEN 0x001C -/* Free Tx Buffer Page */ -#define SDIO_REG_FREE_TXPG 0x0020 -/* HCI Current Power Mode 1 */ -#define SDIO_REG_HCPWM1 0x0024 -/* HCI Current Power Mode 2 */ -#define SDIO_REG_HCPWM2 0x0026 -/* HTSF Informaion */ -#define SDIO_REG_HTSFR_INFO 0x0030 -/* HCI Request Power Mode 1 */ -#define SDIO_REG_HRPWM1 0x0080 -/* HCI Request Power Mode 2 */ -#define SDIO_REG_HRPWM2 0x0082 -/* HCI Power Save Clock */ -#define SDIO_REG_HPS_CLKR 0x0084 -/* SDIO HCI Suspend Control */ -#define SDIO_REG_HSUS_CTRL 0x0086 -/* SDIO Host Extension Interrupt Mask Always */ -#define SDIO_REG_HIMR_ON 0x0090 -/* SDIO Host Extension Interrupt Status Always */ -#define SDIO_REG_HISR_ON 0x0091 - -#define SDIO_HIMR_DISABLED 0 - -/* RTL8188E SDIO Host Interrupt Mask Register */ -#define SDIO_HIMR_RX_REQUEST_MSK BIT(0) -#define SDIO_HIMR_AVAL_MSK BIT(1) -#define SDIO_HIMR_TXERR_MSK BIT(2) -#define SDIO_HIMR_RXERR_MSK BIT(3) -#define SDIO_HIMR_TXFOVW_MSK BIT(4) -#define SDIO_HIMR_RXFOVW_MSK BIT(5) -#define SDIO_HIMR_TXBCNOK_MSK BIT(6) -#define SDIO_HIMR_TXBCNERR_MSK BIT(7) -#define SDIO_HIMR_BCNERLY_INT_MSK BIT(16) -#define SDIO_HIMR_C2HCMD_MSK BIT(17) -#define SDIO_HIMR_CPWM1_MSK BIT(18) -#define SDIO_HIMR_CPWM2_MSK BIT(19) -#define SDIO_HIMR_HSISR_IND_MSK BIT(20) -#define SDIO_HIMR_GTINT3_IND_MSK BIT(21) -#define SDIO_HIMR_GTINT4_IND_MSK BIT(22) -#define SDIO_HIMR_PSTIMEOUT_MSK BIT(23) -#define SDIO_HIMR_OCPINT_MSK BIT(24) -#define SDIO_HIMR_ATIMEND_MSK BIT(25) -#define SDIO_HIMR_ATIMEND_E_MSK BIT(26) -#define SDIO_HIMR_CTWEND_MSK BIT(27) - -/* RTL8188E SDIO Specific */ -#define SDIO_HIMR_MCU_ERR_MSK BIT(28) -#define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT(29) - -/* SDIO Host Interrupt Service Routine */ -#define SDIO_HISR_RX_REQUEST BIT(0) -#define SDIO_HISR_AVAL BIT(1) -#define SDIO_HISR_TXERR BIT(2) -#define SDIO_HISR_RXERR BIT(3) -#define SDIO_HISR_TXFOVW BIT(4) -#define SDIO_HISR_RXFOVW BIT(5) -#define SDIO_HISR_TXBCNOK BIT(6) -#define SDIO_HISR_TXBCNERR BIT(7) -#define SDIO_HISR_BCNERLY_INT BIT(16) -#define SDIO_HISR_C2HCMD BIT(17) -#define SDIO_HISR_CPWM1 BIT(18) -#define SDIO_HISR_CPWM2 BIT(19) -#define SDIO_HISR_HSISR_IND BIT(20) -#define SDIO_HISR_GTINT3_IND BIT(21) -#define SDIO_HISR_GTINT4_IND BIT(22) -#define SDIO_HISR_PSTIME BIT(23) -#define SDIO_HISR_OCPINT BIT(24) -#define SDIO_HISR_ATIMEND BIT(25) -#define SDIO_HISR_ATIMEND_E BIT(26) -#define SDIO_HISR_CTWEND BIT(27) - -/* RTL8188E SDIO Specific */ -#define SDIO_HISR_MCU_ERR BIT(28) -#define SDIO_HISR_TSF_BIT32_TOGGLE BIT(29) - -#define MASK_SDIO_HISR_CLEAR \ - (SDIO_HISR_TXERR | SDIO_HISR_RXERR | SDIO_HISR_TXFOVW |\ - SDIO_HISR_RXFOVW | SDIO_HISR_TXBCNOK | SDIO_HISR_TXBCNERR |\ - SDIO_HISR_C2HCMD | SDIO_HISR_CPWM1 | SDIO_HISR_CPWM2 |\ - SDIO_HISR_HSISR_IND | SDIO_HISR_GTINT3_IND | SDIO_HISR_GTINT4_IND |\ - SDIO_HISR_PSTIMEOUT | SDIO_HISR_OCPINT) - -/* SDIO HCI Suspend Control Register */ -#define HCI_RESUME_PWR_RDY BIT(1) -#define HCI_SUS_CTRL BIT(0) - -/* SDIO Tx FIFO related */ -/* The number of Tx FIFO free page */ -#define SDIO_TX_FREE_PG_QUEUE 4 -#define SDIO_TX_FIFO_PAGE_SZ 128 - /* 0xFE00h ~ 0xFE55h USB Configuration */ /* 2 USB Information (0xFE17) */ @@ -1276,14 +1035,6 @@ So the following defines for 92C is not entire!!!!!! /* GPS function enable */ #define GPS_FUNC_EN BIT(22) -/* 3 REG_LIFECTRL_CTRL */ -#define HAL92C_EN_PKT_LIFE_TIME_BK BIT(3) -#define HAL92C_EN_PKT_LIFE_TIME_BE BIT(2) -#define HAL92C_EN_PKT_LIFE_TIME_VI BIT(1) -#define HAL92C_EN_PKT_LIFE_TIME_VO BIT(0) - -#define HAL92C_MSDU_LIFE_TIME_UNIT 128 /* in us */ - /* General definitions */ #define LAST_ENTRY_OF_TX_PKT_BUFFER 176 /* 22k 22528 bytes */ @@ -1309,48 +1060,15 @@ So the following defines for 92C is not entire!!!!!! #define EEPROM_CUSTOMERID_88E 0xC5 #define EEPROM_RF_ANTENNA_OPT_88E 0xC9 -/* RTL88EE */ -#define EEPROM_MAC_ADDR_88EE 0xD0 -#define EEPROM_VID_88EE 0xD6 -#define EEPROM_DID_88EE 0xD8 -#define EEPROM_SVID_88EE 0xDA -#define EEPROM_SMID_88EE 0xDC - /* RTL88EU */ #define EEPROM_MAC_ADDR_88EU 0xD7 #define EEPROM_VID_88EU 0xD0 #define EEPROM_PID_88EU 0xD2 #define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 -/* RTL88ES */ -#define EEPROM_MAC_ADDR_88ES 0x11A - /* EEPROM/Efuse Value Type */ #define EETYPE_TX_PWR 0x0 -/* Default Value for EEPROM or EFUSE!!! */ -#define EEPROM_Default_TSSI 0x0 -#define EEPROM_Default_TxPowerDiff 0x0 -#define EEPROM_Default_CrystalCap 0x5 -/* Default: 2X2, RTL8192CE(QFPN68) */ -#define EEPROM_Default_BoardType 0x02 -#define EEPROM_Default_TxPower 0x1010 -#define EEPROM_Default_HT2T_TxPwr 0x10 - -#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 -#define EEPROM_Default_ThermalMeter 0x12 - -#define EEPROM_Default_AntTxPowerDiff 0x0 -#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 -#define EEPROM_Default_TxPowerLevel 0x2A - -#define EEPROM_Default_HT40_2SDiff 0x0 -/* HT20<->40 default Tx Power Index Difference */ -#define EEPROM_Default_HT20_Diff 2 -#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 -#define EEPROM_Default_HT40_PwrMaxOffset 0 -#define EEPROM_Default_HT20_PwrMaxOffset 0 - #define EEPROM_Default_CrystalCap_88E 0x20 #define EEPROM_Default_ThermalMeter_88E 0x18 diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_xmit.h b/drivers/staging/rtl8188eu/include/rtl8188e_xmit.h index 617c2273b41b..72a2bb812c9a 100644 --- a/drivers/staging/rtl8188eu/include/rtl8188e_xmit.h +++ b/drivers/staging/rtl8188eu/include/rtl8188e_xmit.h @@ -154,7 +154,4 @@ bool rtl8188eu_xmitframe_complete(struct adapter *padapter, void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf); -void _dbg_dump_tx_info(struct adapter *padapter, int frame_tag, - struct tx_desc *ptxdesc); - #endif /* __RTL8188E_XMIT_H__ */ diff --git a/drivers/staging/rtl8188eu/include/rtw_android.h b/drivers/staging/rtl8188eu/include/rtw_android.h index d7ca7c2fb118..2c26993b8205 100644 --- a/drivers/staging/rtl8188eu/include/rtw_android.h +++ b/drivers/staging/rtl8188eu/include/rtw_android.h @@ -45,7 +45,6 @@ enum ANDROID_WIFI_CMD { ANDROID_WIFI_CMD_MAX }; -int rtw_android_cmdstr_to_num(char *cmdstr); int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd); #endif /* __RTW_ANDROID_H__ */ diff --git a/drivers/staging/rtl8188eu/include/rtw_cmd.h b/drivers/staging/rtl8188eu/include/rtw_cmd.h index 68b8ad1a412f..4e9cb93e4b8f 100644 --- a/drivers/staging/rtl8188eu/include/rtw_cmd.h +++ b/drivers/staging/rtl8188eu/include/rtw_cmd.h @@ -32,10 +32,7 @@ struct cmd_obj { struct cmd_priv { struct completion cmd_queue_comp; - struct completion terminate_cmdthread_comp; struct __queue cmd_queue; - u8 cmdthd_running; - struct adapter *padapter; }; #define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \ @@ -54,7 +51,7 @@ void rtw_free_cmd_obj(struct cmd_obj *pcmd); int rtw_cmd_thread(void *context); -int rtw_init_cmd_priv(struct cmd_priv *pcmdpriv); +void rtw_init_cmd_priv(struct cmd_priv *pcmdpriv); enum rtw_drvextra_cmd_id { NONE_WK_CID, diff --git a/drivers/staging/rtl8188eu/include/rtw_debug.h b/drivers/staging/rtl8188eu/include/rtw_debug.h deleted file mode 100644 index 1fdf16124a0d..000000000000 --- a/drivers/staging/rtl8188eu/include/rtw_debug.h +++ /dev/null @@ -1,131 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#ifndef __RTW_DEBUG_H__ -#define __RTW_DEBUG_H__ - -#include <osdep_service.h> -#include <drv_types.h> - -#define DRIVERVERSION "v4.1.4_6773.20130222" -#define _drv_always_ 1 -#define _drv_emerg_ 2 -#define _drv_alert_ 3 -#define _drv_crit_ 4 -#define _drv_err_ 5 -#define _drv_warning_ 6 -#define _drv_notice_ 7 -#define _drv_info_ 8 -#define _drv_debug_ 9 - -#define _module_rtl871x_xmit_c_ BIT(0) -#define _module_xmit_osdep_c_ BIT(1) -#define _module_rtl871x_recv_c_ BIT(2) -#define _module_recv_osdep_c_ BIT(3) -#define _module_rtl871x_mlme_c_ BIT(4) -#define _module_mlme_osdep_c_ BIT(5) -#define _module_rtl871x_sta_mgt_c_ BIT(6) -#define _module_rtl871x_cmd_c_ BIT(7) -#define _module_cmd_osdep_c_ BIT(8) -#define _module_rtl871x_io_c_ BIT(9) -#define _module_io_osdep_c_ BIT(10) -#define _module_os_intfs_c_ BIT(11) -#define _module_rtl871x_security_c_ BIT(12) -#define _module_rtl871x_eeprom_c_ BIT(13) -#define _module_hal_init_c_ BIT(14) -#define _module_hci_hal_init_c_ BIT(15) -#define _module_rtl871x_ioctl_c_ BIT(16) -#define _module_rtl871x_ioctl_set_c_ BIT(17) -#define _module_rtl871x_ioctl_query_c_ BIT(18) -#define _module_rtl871x_pwrctrl_c_ BIT(19) -#define _module_hci_intfs_c_ BIT(20) -#define _module_hci_ops_c_ BIT(21) -#define _module_osdep_service_c_ BIT(22) -#define _module_mp_ BIT(23) -#define _module_hci_ops_os_c_ BIT(24) -#define _module_rtl871x_ioctl_os_c BIT(25) -#define _module_rtl8712_cmd_c_ BIT(26) -#define _module_rtl8192c_xmit_c_ BIT(27) -#define _module_hal_xmit_c_ BIT(28) -#define _module_efuse_ BIT(29) -#define _module_rtl8712_recv_c_ BIT(30) -#define _module_rtl8712_led_c_ BIT(31) - -#define DRIVER_PREFIX "R8188EU: " - -extern u32 GlobalDebugLevel; - -#define DBG_88E_LEVEL(_level, fmt, arg...) \ - do { \ - if (_level <= GlobalDebugLevel) \ - pr_info(DRIVER_PREFIX fmt, ##arg); \ - } while (0) - -#define DBG_88E(...) \ - do { \ - if (_drv_err_ <= GlobalDebugLevel) \ - pr_info(DRIVER_PREFIX __VA_ARGS__); \ - } while (0) - -#define MSG_88E(...) \ - do { \ - if (_drv_err_ <= GlobalDebugLevel) \ - pr_info(DRIVER_PREFIX __VA_ARGS__); \ - } while (0) - -#define RT_TRACE(_comp, _level, fmt) \ - do { \ - if (_level <= GlobalDebugLevel) { \ - pr_info("%s [0x%08x,%d]", DRIVER_PREFIX, \ - (unsigned int)_comp, _level); \ - pr_info fmt; \ - } \ - } while (0) - -#define RT_PRINT_DATA(_comp, _level, _titlestring, _hexdata, _hexdatalen)\ - do { \ - if (_level <= GlobalDebugLevel) { \ - int __i; \ - u8 *ptr = (u8 *)_hexdata; \ - pr_info("%s", DRIVER_PREFIX); \ - pr_info(_titlestring); \ - for (__i = 0; __i < (int)_hexdatalen; __i++) { \ - pr_info("%02X%s", ptr[__i], \ - (((__i + 1) % 4) == 0) ? \ - " " : " "); \ - if (((__i + 1) % 16) == 0) \ - pr_cont("\n"); \ - } \ - pr_cont("\n"); \ - } \ - } while (0) - -int proc_get_drv_version(char *page, char **start, - off_t offset, int count, - int *eof, void *data); - -int proc_get_write_reg(char *page, char **start, - off_t offset, int count, - int *eof, void *data); - -int proc_set_write_reg(struct file *file, const char __user *buffer, - unsigned long count, void *data); -int proc_get_read_reg(char *page, char **start, - off_t offset, int count, - int *eof, void *data); - -int proc_set_read_reg(struct file *file, const char __user *buffer, - unsigned long count, void *data); - -int proc_get_adapter_state(char *page, char **start, - off_t offset, int count, - int *eof, void *data); - -int proc_get_best_channel(char *page, char **start, - off_t offset, int count, - int *eof, void *data); - -#endif /* __RTW_DEBUG_H__ */ diff --git a/drivers/staging/rtl8188eu/include/rtw_efuse.h b/drivers/staging/rtl8188eu/include/rtw_efuse.h index 74182c32c4ec..bb5e2b5d4bf1 100644 --- a/drivers/staging/rtl8188eu/include/rtw_efuse.h +++ b/drivers/staging/rtl8188eu/include/rtw_efuse.h @@ -23,9 +23,6 @@ #define PGPKT_DATA_SIZE 8 -#define EFUSE_WIFI 0 -#define EFUSE_BT 1 - /* E-Fuse */ #define EFUSE_MAP_SIZE 512 #define EFUSE_MAX_SIZE 256 @@ -60,13 +57,11 @@ u8 Efuse_CalculateWordCnts(u8 word_en); u8 efuse_OneByteRead(struct adapter *adapter, u16 addr, u8 *data); u8 efuse_OneByteWrite(struct adapter *adapter, u16 addr, u8 data); -void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset, - u16 _size_byte, u8 *pbuf); int Efuse_PgPacketRead(struct adapter *adapt, u8 offset, u8 *data); bool Efuse_PgPacketWrite(struct adapter *adapter, u8 offset, u8 word, u8 *data); void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata); u8 Efuse_WordEnableDataWrite(struct adapter *adapter, u16 efuse_addr, u8 word_en, u8 *data); -void EFUSE_ShadowMapUpdate(struct adapter *adapter, u8 efusetype); +void EFUSE_ShadowMapUpdate(struct adapter *adapter); #endif diff --git a/drivers/staging/rtl8188eu/include/rtw_led.h b/drivers/staging/rtl8188eu/include/rtw_led.h index ee62ed76a465..5f65c3e1e46f 100644 --- a/drivers/staging/rtl8188eu/include/rtw_led.h +++ b/drivers/staging/rtl8188eu/include/rtw_led.h @@ -52,7 +52,7 @@ struct LED_871x { * either RTW_LED_ON or RTW_LED_OFF are. */ - u8 bLedOn; /* true if LED is ON, false if LED is OFF. */ + u8 led_on; /* true if LED is ON, false if LED is OFF. */ u8 bLedBlinkInProgress; /* true if it is blinking, false o.w.. */ diff --git a/drivers/staging/rtl8188eu/include/rtw_mlme.h b/drivers/staging/rtl8188eu/include/rtw_mlme.h index 1b74b32b8a81..2f02316906d0 100644 --- a/drivers/staging/rtl8188eu/include/rtw_mlme.h +++ b/drivers/staging/rtl8188eu/include/rtw_mlme.h @@ -111,8 +111,6 @@ struct mlme_priv { u8 to_join; /* flag */ u8 to_roaming; /* roaming trying times */ - u8 *nic_hdl; - struct list_head *pscanned; struct __queue free_bss_pool; struct __queue scanned_queue; @@ -222,8 +220,6 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf); void rtw_joinbss_event_callback(struct adapter *adapter, u8 *pbuf); void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf); void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf); -void rtw_atimdone_event_callback(struct adapter *adapter, u8 *pbuf); -void rtw_cpwm_event_callback(struct adapter *adapter, u8 *pbuf); void indicate_wx_scan_complete_event(struct adapter *padapter); void rtw_indicate_wx_assoc_event(struct adapter *padapter); void rtw_indicate_wx_disassoc_event(struct adapter *padapter); diff --git a/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h b/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h index 03d55eb7dc16..c4fcfa986726 100644 --- a/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h +++ b/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h @@ -383,7 +383,6 @@ struct p2p_oper_class_map { }; struct mlme_ext_priv { - struct adapter *padapter; u8 mlmeext_init; atomic_t event_seq; u16 mgnt_seq; @@ -662,7 +661,7 @@ static struct fwevent wlanevents[] = { {0, &rtw_joinbss_event_callback}, /*10*/ {sizeof(struct stassoc_event), &rtw_stassoc_event_callback}, {sizeof(struct stadel_event), &rtw_stadel_event_callback}, - {0, &rtw_atimdone_event_callback}, + {0, NULL}, {0, rtw_dummy_event_callback}, {0, NULL}, /*15*/ {0, NULL}, @@ -672,7 +671,7 @@ static struct fwevent wlanevents[] = { {0, NULL}, /*20*/ {0, NULL}, {0, NULL}, - {0, &rtw_cpwm_event_callback}, + {0, NULL}, {0, NULL}, }; diff --git a/drivers/staging/rtl8188eu/include/rtw_recv.h b/drivers/staging/rtl8188eu/include/rtw_recv.h index e20bab41708a..8c906b666b62 100644 --- a/drivers/staging/rtl8188eu/include/rtw_recv.h +++ b/drivers/staging/rtl8188eu/include/rtw_recv.h @@ -231,8 +231,7 @@ struct recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue); struct recv_frame *rtw_alloc_recvframe(struct __queue *pfree_recv_queue); void rtw_init_recvframe(struct recv_frame *precvframe, struct recv_priv *precvpriv); -int rtw_free_recvframe(struct recv_frame *precvframe, - struct __queue *pfree_recv_queue); +void rtw_free_recvframe(struct recv_frame *precvframe, struct __queue *pfree_recv_queue); #define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue) int _rtw_enqueue_recvframe(struct recv_frame *precvframe, struct __queue *queue); diff --git a/drivers/staging/rtl8188eu/include/wifi.h b/drivers/staging/rtl8188eu/include/wifi.h index 84e17330628e..716fec036e54 100644 --- a/drivers/staging/rtl8188eu/include/wifi.h +++ b/drivers/staging/rtl8188eu/include/wifi.h @@ -25,42 +25,6 @@ enum WIFI_FRAME_TYPE { WIFI_QOS_DATA_TYPE = (BIT(7) | BIT(3)), /* QoS Data */ }; -enum WIFI_FRAME_SUBTYPE { - /* below is for mgt frame */ - WIFI_ASSOCREQ = (0 | WIFI_MGT_TYPE), - WIFI_ASSOCRSP = (BIT(4) | WIFI_MGT_TYPE), - WIFI_REASSOCREQ = (BIT(5) | WIFI_MGT_TYPE), - WIFI_REASSOCRSP = (BIT(5) | BIT(4) | WIFI_MGT_TYPE), - WIFI_PROBEREQ = (BIT(6) | WIFI_MGT_TYPE), - WIFI_PROBERSP = (BIT(6) | BIT(4) | WIFI_MGT_TYPE), - WIFI_BEACON = (BIT(7) | WIFI_MGT_TYPE), - WIFI_ATIM = (BIT(7) | BIT(4) | WIFI_MGT_TYPE), - WIFI_DISASSOC = (BIT(7) | BIT(5) | WIFI_MGT_TYPE), - WIFI_AUTH = (BIT(7) | BIT(5) | BIT(4) | WIFI_MGT_TYPE), - WIFI_DEAUTH = (BIT(7) | BIT(6) | WIFI_MGT_TYPE), - WIFI_ACTION = (BIT(7) | BIT(6) | BIT(4) | WIFI_MGT_TYPE), - - /* below is for control frame */ - WIFI_PSPOLL = (BIT(7) | BIT(5) | WIFI_CTRL_TYPE), - WIFI_RTS = (BIT(7) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE), - WIFI_CTS = (BIT(7) | BIT(6) | WIFI_CTRL_TYPE), - WIFI_ACK = (BIT(7) | BIT(6) | BIT(4) | WIFI_CTRL_TYPE), - WIFI_CFEND = (BIT(7) | BIT(6) | BIT(5) | WIFI_CTRL_TYPE), - WIFI_CFEND_CFACK = (BIT(7) | BIT(6) | BIT(5) | BIT(4) | - WIFI_CTRL_TYPE), - - /* below is for data frame */ - WIFI_DATA = (0 | WIFI_DATA_TYPE), - WIFI_DATA_CFACK = (BIT(4) | WIFI_DATA_TYPE), - WIFI_DATA_CFPOLL = (BIT(5) | WIFI_DATA_TYPE), - WIFI_DATA_CFACKPOLL = (BIT(5) | BIT(4) | WIFI_DATA_TYPE), - WIFI_DATA_NULL = (BIT(6) | WIFI_DATA_TYPE), - WIFI_CF_ACK = (BIT(6) | BIT(4) | WIFI_DATA_TYPE), - WIFI_CF_POLL = (BIT(6) | BIT(5) | WIFI_DATA_TYPE), - WIFI_CF_ACKPOLL = (BIT(6) | BIT(5) | BIT(4) | WIFI_DATA_TYPE), - WIFI_QOS_DATA_NULL = (BIT(6) | WIFI_QOS_DATA_TYPE), -}; - #define SetToDs(pbuf) \ *(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_TODS) |