aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/staging/rtl8192e/rtl8192e/rtl_core.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/staging/rtl8192e/rtl8192e/rtl_core.h')
-rw-r--r--drivers/staging/rtl8192e/rtl8192e/rtl_core.h419
1 files changed, 2 insertions, 417 deletions
diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h
index d365af6ebdc7..776d950655cb 100644
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h
@@ -68,74 +68,19 @@
#define DRV_AUTHOR "<wlanfae@realtek.com>"
#define DRV_VERSION "0014.0401.2010"
-#define IS_HARDWARE_TYPE_819xP(_priv) \
- ((((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8190P) || \
- (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192E))
#define IS_HARDWARE_TYPE_8192SE(_priv) \
(((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192SE)
-#define IS_HARDWARE_TYPE_8192CE(_priv) \
- (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CE)
-#define IS_HARDWARE_TYPE_8192CU(_priv) \
- (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CU)
-#define IS_HARDWARE_TYPE_8192DE(_priv) \
- (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DE)
-#define IS_HARDWARE_TYPE_8192DU(_priv) \
- (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DU)
#define RTL_PCI_DEVICE(vend, dev, cfg) \
.vendor = (vend), .device = (dev), \
- .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID , \
+ .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
.driver_data = (kernel_ulong_t)&(cfg)
-#define RTL_MAX_SCAN_SIZE 128
-
-#define RTL_RATE_MAX 30
-
#define TOTAL_CAM_ENTRY 32
#define CAM_CONTENT_COUNT 8
-#ifndef BIT
-#define BIT(_i) (1<<(_i))
-#endif
-
-#define IS_ADAPTER_SENDS_BEACON(dev) 0
-
-#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
-#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
-#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
-#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000
#define HAL_HW_PCI_REVISION_ID_8192SE 0x10
-#define HAL_HW_PCI_REVISION_ID_8192CE 0x1
-#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000
-#define HAL_HW_PCI_REVISION_ID_8192DE 0x0
-#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000
-
-#define HAL_HW_PCI_8180_DEVICE_ID 0x8180
-#define HAL_HW_PCI_8185_DEVICE_ID 0x8185
-#define HAL_HW_PCI_8188_DEVICE_ID 0x8188
-#define HAL_HW_PCI_8198_DEVICE_ID 0x8198
-#define HAL_HW_PCI_8190_DEVICE_ID 0x8190
-#define HAL_HW_PCI_8192_DEVICE_ID 0x8192
-#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192
-#define HAL_HW_PCI_8174_DEVICE_ID 0x8174
-#define HAL_HW_PCI_8173_DEVICE_ID 0x8173
-#define HAL_HW_PCI_8172_DEVICE_ID 0x8172
-#define HAL_HW_PCI_8171_DEVICE_ID 0x8171
-#define HAL_HW_PCI_0045_DEVICE_ID 0x0045
-#define HAL_HW_PCI_0046_DEVICE_ID 0x0046
-#define HAL_HW_PCI_0044_DEVICE_ID 0x0044
-#define HAL_HW_PCI_0047_DEVICE_ID 0x0047
-#define HAL_HW_PCI_700F_DEVICE_ID 0x700F
-#define HAL_HW_PCI_701F_DEVICE_ID 0x701F
-#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
-#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191
-#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178
-#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177
-#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176
-#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191
-#define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D
-#define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D
#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
@@ -150,16 +95,12 @@
(1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) * \
MAX_FRAGMENT_COUNT)
-#define scrclng 4
-
#define DEFAULT_FRAG_THRESHOLD 2342U
#define MIN_FRAG_THRESHOLD 256U
#define DEFAULT_BEACONINTERVAL 0x64U
-#define DEFAULT_SSID ""
#define DEFAULT_RETRY_RTS 7
#define DEFAULT_RETRY_DATA 7
-#define PRISM_HDR_SIZE 64
#define PHY_RSSI_SLID_WIN_MAX 100
@@ -183,29 +124,6 @@
extern int hwwep;
-enum RTL819x_PHY_PARAM {
- RTL819X_PHY_MACPHY_REG = 0,
- RTL819X_PHY_MACPHY_REG_PG = 1,
- RTL8188C_PHY_MACREG = 2,
- RTL8192C_PHY_MACREG = 3,
- RTL819X_PHY_REG = 4,
- RTL819X_PHY_REG_1T2R = 5,
- RTL819X_PHY_REG_to1T1R = 6,
- RTL819X_PHY_REG_to1T2R = 7,
- RTL819X_PHY_REG_to2T2R = 8,
- RTL819X_PHY_REG_PG = 9,
- RTL819X_AGC_TAB = 10,
- RTL819X_PHY_RADIO_A = 11,
- RTL819X_PHY_RADIO_A_1T = 12,
- RTL819X_PHY_RADIO_A_2T = 13,
- RTL819X_PHY_RADIO_B = 14,
- RTL819X_PHY_RADIO_B_GM = 15,
- RTL819X_PHY_RADIO_C = 16,
- RTL819X_PHY_RADIO_D = 17,
- RTL819X_EEPROM_MAP = 18,
- RTL819X_EFUSE_MAP = 19,
-};
-
enum nic_t {
NIC_UNKNOWN = 0,
NIC_8192E = 1,
@@ -220,7 +138,6 @@ enum nic_t {
enum rt_eeprom_type {
EEPROM_93C46,
EEPROM_93C56,
- EEPROM_BOOT_EFUSE,
};
enum dcmg_txcmd_op {
@@ -242,19 +159,6 @@ enum rt_rf_type_819xu {
RF_PSEUDO_11N = 5,
};
-enum rf_step {
- RF_STEP_INIT = 0,
- RF_STEP_NORMAL,
- RF_STEP_MAX
-};
-
-enum rt_status {
- RT_STATUS_SUCCESS,
- RT_STATUS_FAILURE,
- RT_STATUS_PENDING,
- RT_STATUS_RESOURCE
-};
-
enum rt_customer_id {
RT_CID_DEFAULT = 0,
RT_CID_8187_ALPHA0 = 1,
@@ -294,58 +198,9 @@ enum reset_type {
RESET_TYPE_SILENT = 0x02
};
-enum ic_inferiority_8192s {
- IC_INFERIORITY_A = 0,
- IC_INFERIORITY_B = 1,
-};
-
-enum pci_bridge_vendor {
- PCI_BRIDGE_VENDOR_INTEL = 0x0,
- PCI_BRIDGE_VENDOR_ATI,
- PCI_BRIDGE_VENDOR_AMD,
- PCI_BRIDGE_VENDOR_SIS ,
- PCI_BRIDGE_VENDOR_UNKNOWN,
- PCI_BRIDGE_VENDOR_MAX ,
-};
-
-struct buffer {
- struct buffer *next;
- u32 *buf;
- dma_addr_t dma;
-
-};
-
-struct rtl_reg_debug {
- unsigned int cmd;
- struct {
- unsigned char type;
- unsigned char addr;
- unsigned char page;
- unsigned char length;
- } head;
- unsigned char buf[0xff];
-};
-
-struct rt_tx_rahis {
- u32 cck[4];
- u32 ofdm[8];
- u32 ht_mcs[4][16];
-};
-
-struct rt_smooth_data_4rf {
- char elements[4][100];
- u32 index;
- u32 TotalNum;
- u32 TotalVal[4];
-};
-
struct rt_stats {
- unsigned long txrdu;
unsigned long rxrdu;
unsigned long rxok;
- unsigned long rxframgment;
- unsigned long rxurberr;
- unsigned long rxstaterr;
unsigned long rxdatacrcerr;
unsigned long rxmgmtcrcerr;
unsigned long rxcrcerrmin;
@@ -353,8 +208,6 @@ struct rt_stats {
unsigned long rxcrcerrmax;
unsigned long received_rate_histogram[4][32];
unsigned long received_preamble_GI[2][32];
- unsigned long rx_AMPDUsize_histogram[5];
- unsigned long rx_AMPDUnum_histogram[5];
unsigned long numpacket_matchbssid;
unsigned long numpacket_toself;
unsigned long num_process_phyinfo;
@@ -362,58 +215,24 @@ struct rt_stats {
unsigned long numqry_phystatusCCK;
unsigned long numqry_phystatusHT;
unsigned long received_bwtype[5];
- unsigned long txnperr;
- unsigned long txnpdrop;
- unsigned long txresumed;
unsigned long rxoverflow;
unsigned long rxint;
- unsigned long txnpokint;
unsigned long ints;
unsigned long shints;
unsigned long txoverflow;
- unsigned long txlpokint;
- unsigned long txlpdrop;
- unsigned long txlperr;
unsigned long txbeokint;
- unsigned long txbedrop;
- unsigned long txbeerr;
unsigned long txbkokint;
- unsigned long txbkdrop;
- unsigned long txbkerr;
unsigned long txviokint;
- unsigned long txvidrop;
- unsigned long txvierr;
unsigned long txvookint;
- unsigned long txvodrop;
- unsigned long txvoerr;
unsigned long txbeaconokint;
- unsigned long txbeacondrop;
unsigned long txbeaconerr;
unsigned long txmanageokint;
- unsigned long txmanagedrop;
- unsigned long txmanageerr;
unsigned long txcmdpktokint;
- unsigned long txdatapkt;
- unsigned long txfeedback;
- unsigned long txfeedbackok;
- unsigned long txoktotal;
- unsigned long txokbytestotal;
- unsigned long txokinperiod;
- unsigned long txmulticast;
unsigned long txbytesmulticast;
- unsigned long txbroadcast;
unsigned long txbytesbroadcast;
- unsigned long txunicast;
unsigned long txbytesunicast;
unsigned long rxbytesunicast;
- unsigned long txfeedbackfail;
- unsigned long txerrtotal;
- unsigned long txerrbytestotal;
- unsigned long txerrmulticast;
- unsigned long txerrbroadcast;
- unsigned long txerrunicast;
unsigned long txretrycount;
- unsigned long txfeedbackretry;
u8 last_packet_rate;
unsigned long slide_signal_strength[100];
unsigned long slide_evm[100];
@@ -426,10 +245,8 @@ struct rt_stats {
u8 rx_rssi_percentage[4];
u8 rx_evm_percentage[2];
long rxSNRdB[4];
- struct rt_tx_rahis txrate;
u32 Slide_Beacon_pwdb[100];
u32 Slide_Beacon_Total;
- struct rt_smooth_data_4rf cck_adc_pwdb;
u32 CurrentShowTxate;
};
@@ -442,24 +259,6 @@ struct channel_access_setting {
u16 CWmaxIndex;
};
-enum two_port_status {
- TWO_PORT_STATUS__DEFAULT_ONLY,
- TWO_PORT_STATUS__EXTENSION_ONLY,
- TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
- TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
- TWO_PORT_STATUS__ADHOC,
- TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
-};
-
-struct txbbgain_struct {
- long txbb_iq_amplifygain;
- u32 txbbgain_value;
-};
-
-struct ccktxbbgain {
- u8 ccktxbb_valuearray[8];
-};
-
struct init_gain {
u8 xaagccore1;
u8 xbagccore1;
@@ -540,17 +339,11 @@ struct r8192_priv {
struct delayed_work txpower_tracking_wq;
struct delayed_work rfpath_check_wq;
struct delayed_work gpio_change_rf_wq;
- struct delayed_work initialgain_operate_wq;
- struct delayed_work check_hw_scan_wq;
- struct delayed_work hw_scan_simu_wq;
- struct delayed_work start_hw_scan_wq;
struct workqueue_struct *priv_wq;
struct channel_access_setting ChannelAccessSetting;
- struct mp_adapter NdisAdapter;
-
struct rtl819x_ops *ops;
struct rtllib_device *rtllib;
@@ -562,16 +355,10 @@ struct r8192_priv {
enum rt_rf_type_819xu rf_chip;
- enum ic_inferiority_8192s IC_Class;
enum ht_channel_width CurrentChannelBW;
struct bb_reg_definition PHYRegDef[4];
struct rate_adaptive rate_adaptive;
- struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength];
- struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
-
- struct txbbgain_struct txbbgain_table[TxBBGainTableLength];
-
enum acm_method AcmMethod;
struct rt_firmware *pFirmware;
@@ -581,17 +368,11 @@ struct r8192_priv {
struct timer_list fsync_timer;
struct timer_list gpio_polling_timer;
- spinlock_t fw_scan_lock;
- spinlock_t irq_lock;
spinlock_t irq_th_lock;
spinlock_t tx_lock;
spinlock_t rf_ps_lock;
- spinlock_t rw_lock;
- spinlock_t rt_h2c_lock;
- spinlock_t rf_lock;
spinlock_t ps_lock;
- struct sk_buff_head rx_queue;
struct sk_buff_head skb_queue;
struct tasklet_struct irq_rx_tasklet;
@@ -604,12 +385,9 @@ struct r8192_priv {
struct rt_stats stats;
struct iw_statistics wstats;
- struct proc_dir_entry *dir_dev;
short (*rf_set_sens)(struct net_device *dev, short sens);
u8 (*rf_set_chan)(struct net_device *dev, u8 ch);
- void (*rf_close)(struct net_device *dev);
- void (*rf_init)(struct net_device *dev);
struct rx_desc *rx_ring[MAX_RX_QUEUE];
struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
@@ -620,29 +398,19 @@ struct r8192_priv {
u64 LastRxDescTSF;
- u16 EarlyRxThreshold;
u32 ReceiveConfig;
- u8 AcmControl;
- u8 RFProgType;
u8 retry_data;
u8 retry_rts;
u16 rts;
struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
int txringcount;
- int txbuffsize;
- int txfwbuffersize;
atomic_t tx_pending[0x10];
u16 ShortRetryLimit;
u16 LongRetryLimit;
- u32 TransmitConfig;
- u8 RegCWinMin;
- u8 keepAliveLevel;
- bool sw_radio_on;
bool bHwRadioOff;
- bool pwrdown;
bool blinked_ingpio;
u8 polling_timer_on;
@@ -655,17 +423,11 @@ struct r8192_priv {
struct work_struct qos_activate;
- u8 bIbssCoordinator;
-
short promisc;
- short crcmon;
-
- int txbeaconcount;
short chan;
short sens;
short max_sens;
- u32 rx_prevlen;
u8 ScanDelay;
bool ps_force;
@@ -676,114 +438,43 @@ struct r8192_priv {
enum nic_t card_8192;
u8 card_8192_version;
- short enable_gpio0;
-
u8 rf_type;
u8 IC_Cut;
char nick[IW_ESSID_MAX_SIZE + 1];
-
- u8 RegBcnCtrlVal;
- bool bHwAntDiv;
-
- bool bTKIPinNmodeFromReg;
- bool bWEPinNmodeFromReg;
-
- bool bLedOpenDrain;
-
u8 check_roaming_cnt;
- bool bIgnoreSilentReset;
- u32 SilentResetRxSoltNum;
u32 SilentResetRxSlotIndex;
u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
- void *scan_cmd;
- u8 hwscan_bw_40;
-
- u16 nrxAMPDU_size;
- u8 nrxAMPDU_aggr_num;
-
- u32 last_rxdesc_tsf_high;
- u32 last_rxdesc_tsf_low;
-
u16 basic_rate;
u8 short_preamble;
u8 dot11CurrentPreambleMode;
u8 slot_time;
u16 SifsTime;
- u8 RegWirelessMode;
-
- u8 firmware_version;
- u16 FirmwareSubVersion;
- u16 rf_pathmap;
bool AutoloadFailFlag;
- u8 RegPciASPM;
- u8 RegAMDPciASPM;
- u8 RegHwSwRfOffD3;
- u8 RegSupportPciASPM;
- bool bSupportASPM;
-
- u32 RfRegChnlVal[2];
-
- u8 ShowRateMode;
- u8 RATRTableBitmap;
-
- u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
- u16 EfuseUsedBytes;
- u8 EfuseUsedPercentage;
-
short epromtype;
u16 eeprom_vid;
u16 eeprom_did;
- u16 eeprom_svid;
- u16 eeprom_smid;
u8 eeprom_CustomerID;
u16 eeprom_ChannelPlan;
- u8 eeprom_version;
-
- u8 EEPROMRegulatory;
- u8 EEPROMPwrGroup[2][3];
- u8 EEPROMOptional;
u8 EEPROMTxPowerLevelCCK[14];
u8 EEPROMTxPowerLevelOFDM24G[14];
- u8 EEPROMTxPowerLevelOFDM5G[24];
u8 EEPROMRfACCKChnl1TxPwLevel[3];
u8 EEPROMRfAOfdmChnlTxPwLevel[3];
u8 EEPROMRfCCCKChnl1TxPwLevel[3];
u8 EEPROMRfCOfdmChnlTxPwLevel[3];
- u16 EEPROMTxPowerDiff;
u16 EEPROMAntPwDiff;
u8 EEPROMThermalMeter;
- u8 EEPROMPwDiff;
u8 EEPROMCrystalCap;
- u8 EEPROMBluetoothCoexist;
- u8 EEPROMBluetoothType;
- u8 EEPROMBluetoothAntNum;
- u8 EEPROMBluetoothAntIsolation;
- u8 EEPROMBluetoothRadioShared;
-
-
- u8 EEPROMSupportWoWLAN;
- u8 EEPROMBoardType;
- u8 EEPROM_Def_Ver;
- u8 EEPROMHT2T_TxPwr[6];
- u8 EEPROMTSSI_A;
- u8 EEPROMTSSI_B;
- u8 EEPROMTxPowerLevelCCK_V1[3];
u8 EEPROMLegacyHTTxPowerDiff;
- u8 BluetoothCoexist;
-
u8 CrystalCap;
u8 ThermalMeter[2];
- u16 FwCmdIOMap;
- u32 FwCmdIOParam;
-
u8 SwChnlInProgress;
u8 SwChnlStage;
u8 SwChnlStep;
@@ -799,60 +490,16 @@ struct r8192_priv {
u16 RegChannelPlan;
u16 ChannelPlan;
- bool bChnlPlanFromHW;
bool RegRfOff;
bool isRFOff;
bool bInPowerSaveMode;
u8 bHwRfOffAction;
- bool aspm_clkreq_enable;
- u32 pci_bridge_vendor;
- u8 RegHostPciASPMSetting;
- u8 RegDevicePciASPMSetting;
-
bool RFChangeInProgress;
bool SetRFPowerStateInProgress;
bool bdisable_nic;
- u8 pwrGroupCnt;
-
- u8 ThermalValue_LCK;
- u8 ThermalValue_IQK;
- bool bRfPiEnable;
-
- u32 APKoutput[2][2];
- bool bAPKdone;
-
- long RegE94;
- long RegE9C;
- long RegEB4;
- long RegEBC;
-
- u32 RegC04;
- u32 Reg874;
- u32 RegC08;
- u32 ADDA_backup[16];
- u32 IQK_MAC_backup[3];
-
- bool SetFwCmdInProgress;
- u8 CurrentFwCmdIO;
-
- u8 rssi_level;
-
- bool bInformFWDriverControlDM;
- u8 PwrGroupHT20[2][14];
- u8 PwrGroupHT40[2][14];
-
- u8 ThermalValue;
- long EntryMinUndecoratedSmoothedPWDB;
- long EntryMaxUndecoratedSmoothedPWDB;
- u8 DynamicTxHighPowerLvl;
- u8 LastDTPLvl;
- u32 CurrentRATR0;
- struct false_alarm_stats FalseAlmCnt;
-
- u8 DMFlag;
u8 DM_Type;
u8 CckPwEnl;
@@ -862,54 +509,32 @@ struct r8192_priv {
u8 CCKPresentAttentuation_40Mdefault;
char CCKPresentAttentuation_difference;
char CCKPresentAttentuation;
- u8 bCckHighPower;
long undecorated_smoothed_pwdb;
- long undecorated_smoothed_cck_adc_pwdb[4];
u32 MCSTxPowerLevelOriginalOffset[6];
- u32 CCKTxPowerLevelOriginalOffset;
u8 TxPowerLevelCCK[14];
u8 TxPowerLevelCCK_A[14];
u8 TxPowerLevelCCK_C[14];
u8 TxPowerLevelOFDM24G[14];
- u8 TxPowerLevelOFDM5G[14];
u8 TxPowerLevelOFDM24G_A[14];
u8 TxPowerLevelOFDM24G_C[14];
u8 LegacyHTTxPowerDiff;
- u8 TxPowerDiff;
s8 RF_C_TxPwDiff;
- s8 RF_B_TxPwDiff;
- u8 RfTxPwrLevelCck[2][14];
- u8 RfTxPwrLevelOfdm1T[2][14];
- u8 RfTxPwrLevelOfdm2T[2][14];
u8 AntennaTxPwDiff[3];
- u8 TxPwrHt20Diff[2][14];
- u8 TxPwrLegacyHtDiff[2][14];
- u8 TxPwrSafetyFlag;
- u8 HT2T_TxPwr_A[14];
- u8 HT2T_TxPwr_B[14];
- u8 CurrentCckTxPwrIdx;
- u8 CurrentOfdm24GTxPwrIdx;
-
- bool bdynamic_txpower;
+
bool bDynamicTxHighPower;
bool bDynamicTxLowPower;
bool bLastDTPFlag_High;
bool bLastDTPFlag_Low;
- bool bstore_last_dtpflag;
- bool bstart_txctrl_bydtp;
-
u8 rfa_txpowertrackingindex;
u8 rfa_txpowertrackingindex_real;
u8 rfa_txpowertracking_default;
u8 rfc_txpowertrackingindex;
u8 rfc_txpowertrackingindex_real;
- u8 rfc_txpowertracking_default;
bool btxpower_tracking;
bool bcck_in_ch14;
- u8 TxPowerTrackControl;
u8 txpower_count;
bool btxpower_trackingInit;
@@ -925,11 +550,6 @@ struct r8192_priv {
bool bcurrent_turbo_EDCA;
bool bis_cur_rdlstate;
- bool bCCKinCH14;
-
- u8 MidHighPwrTHR_L1;
- u8 MidHighPwrTHR_L2;
-
bool bfsync_processing;
u32 rate_record;
u32 rateCountDiffRecord;
@@ -939,56 +559,21 @@ struct r8192_priv {
u32 framesyncC34;
u8 framesyncMonitor;
- bool bDMInitialGainEnable;
- bool MutualAuthenticationFail;
-
- bool bDisableFrameBursting;
-
u32 reset_count;
- bool bpbc_pressed;
-
- u32 txpower_checkcnt;
- u32 txpower_tracking_callback_cnt;
- u8 thermal_read_val[40];
- u8 thermal_readback_index;
- u32 ccktxpower_adjustcnt_not_ch14;
- u32 ccktxpower_adjustcnt_ch14;
enum reset_type ResetProgress;
bool bForcedSilentReset;
bool bDisableNormalResetCheck;
u16 TxCounter;
u16 RxCounter;
- int IrpPendingCount;
bool bResetInProgress;
bool force_reset;
bool force_lps;
- u8 InitialGainOperateType;
bool chan_forced;
- bool bSingleCarrier;
- bool RegBoard;
- bool bCckContTx;
- bool bOfdmContTx;
- bool bStartContTx;
- u8 RegPaModel;
- u8 btMpCckTxPower;
- u8 btMpOfdmTxPower;
-
- u32 MptActType;
- u32 MptIoOffset;
- u32 MptIoValue;
- u32 MptRfPath;
-
- u32 MptBandWidth;
- u32 MptRateIndex;
- u8 MptChannelToSw;
- u32 MptRCR;
u8 PwrDomainProtect;
u8 H2CTxCmdSeq;
-
-
};
extern const struct ethtool_ops rtl819x_ethtool_ops;