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-rw-r--r--drivers/staging/rtl8192u/r8192U.h114
1 files changed, 29 insertions, 85 deletions
diff --git a/drivers/staging/rtl8192u/r8192U.h b/drivers/staging/rtl8192u/r8192U.h
index 51c150a39fc2..94a148994069 100644
--- a/drivers/staging/rtl8192u/r8192U.h
+++ b/drivers/staging/rtl8192u/r8192U.h
@@ -15,9 +15,10 @@
* project Authors.
*/
-#ifndef R819xU_H
-#define R819xU_H
+#ifndef R8192U_H
+#define R8192U_H
+#include <linux/compiler.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
@@ -58,7 +59,6 @@ extern u32 rt_global_debug_component;
#define COMP_DBG BIT(1)
#define COMP_INIT BIT(2) /* Driver initialization/halt/reset. */
-
#define COMP_RECV BIT(3) /* Receive data path. */
#define COMP_SEND BIT(4) /* Send data path. */
#define COMP_IO BIT(5)
@@ -126,7 +126,6 @@ extern u32 rt_global_debug_component;
#define RT_DEBUG_DATA(level, data, datalen) do {} while (0)
#endif /* RTL8169_DEBUG */
-
/* Queue Select Value in TxDesc */
#define QSLT_BK 0x1
#define QSLT_BE 0x0
@@ -176,7 +175,7 @@ extern u32 rt_global_debug_component;
#define CCK_Table_length 12
/* For rtl819x */
-typedef struct _tx_desc_819x_usb {
+struct tx_desc_819x_usb {
/* DWORD 0 */
u16 PktSize;
u8 Offset;
@@ -212,36 +211,9 @@ typedef struct _tx_desc_819x_usb {
u32 Reserved5;
u32 Reserved6;
u32 Reserved7;
-} tx_desc_819x_usb, *ptx_desc_819x_usb;
-
-#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
-typedef struct _tx_desc_819x_usb_aggr_subframe {
- /* DWORD 0 */
- u16 PktSize;
- u8 Offset;
- u8 TxFWInfoSize;
-
- /* DWORD 1 */
- u8 RATid:3;
- u8 DISFB:1;
- u8 USERATE:1;
- u8 MOREFRAG:1;
- u8 NoEnc:1;
- u8 PIFS:1;
- u8 QueueSelect:5;
- u8 NoACM:1;
- u8 Reserved1:2;
- u8 SecCAMID:5;
- u8 SecDescAssign:1;
- u8 SecType:2;
- u8 PacketID:7;
- u8 OWN:1;
-} tx_desc_819x_usb_aggr_subframe, *ptx_desc_819x_usb_aggr_subframe;
-#endif
-
-
+};
-typedef struct _tx_desc_cmd_819x_usb {
+struct tx_desc_cmd_819x_usb {
/* DWORD 0 */
u16 Reserved0;
u8 Reserved1;
@@ -266,10 +238,9 @@ typedef struct _tx_desc_cmd_819x_usb {
u32 Reserved6;
u32 Reserved7;
u32 Reserved8;
-} tx_desc_cmd_819x_usb, *ptx_desc_cmd_819x_usb;
-
+};
-typedef struct _tx_fwinfo_819x_usb {
+struct tx_fwinfo_819x_usb {
/* DOWRD 0 */
u8 TxRate:7;
u8 CtsEnable:1;
@@ -300,7 +271,7 @@ typedef struct _tx_fwinfo_819x_usb {
u32 TxAGCSign:1;
u32 Tx_INFO_RSVD:6;
u32 PacketID:13;
-} tx_fwinfo_819x_usb, *ptx_fwinfo_819x_usb;
+};
struct rtl8192_rx_info {
struct urb *urb;
@@ -308,7 +279,7 @@ struct rtl8192_rx_info {
u8 out_pipe;
};
-typedef struct rx_desc_819x_usb {
+struct rx_desc_819x_usb {
/* DOWRD 0 */
u16 Length:14;
u16 CRC32:1;
@@ -321,27 +292,9 @@ typedef struct rx_desc_819x_usb {
/* DWORD 1 */
u32 Reserved2;
-} rx_desc_819x_usb, *prx_desc_819x_usb;
-
-#ifdef USB_RX_AGGREGATION_SUPPORT
-typedef struct _rx_desc_819x_usb_aggr_subframe {
- /* DOWRD 0 */
- u16 Length:14;
- u16 CRC32:1;
- u16 ICV:1;
- u8 Offset;
- u8 RxDrvInfoSize;
- /* DOWRD 1 */
- u8 Shift:2;
- u8 PHYStatus:1;
- u8 SWDec:1;
- u8 Reserved1:4;
- u8 Reserved2;
- u16 Reserved3;
-} rx_desc_819x_usb_aggr_subframe, *prx_desc_819x_usb_aggr_subframe;
-#endif
+};
-typedef struct rx_drvinfo_819x_usb {
+struct rx_drvinfo_819x_usb {
/* DWORD 0 */
u16 Reserved1:12;
u16 PartAggr:1;
@@ -362,7 +315,7 @@ typedef struct rx_drvinfo_819x_usb {
/* DWORD 1 */
u32 TSFL;
-} rx_drvinfo_819x_usb, *prx_drvinfo_819x_usb;
+};
/* Support till 64 bit bus width OS */
#define MAX_DEV_ADDR_SIZE 8
@@ -370,25 +323,23 @@ typedef struct rx_drvinfo_819x_usb {
#define MAX_FIRMWARE_INFORMATION_SIZE 32
#define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
#define ENCRYPTION_MAX_OVERHEAD 128
-#define USB_HWDESC_HEADER_LEN sizeof(tx_desc_819x_usb)
-#define TX_PACKET_SHIFT_BYTES (USB_HWDESC_HEADER_LEN + sizeof(tx_fwinfo_819x_usb))
+#define USB_HWDESC_HEADER_LEN sizeof(struct tx_desc_819x_usb)
+#define TX_PACKET_SHIFT_BYTES (USB_HWDESC_HEADER_LEN + sizeof(struct tx_fwinfo_819x_usb))
#define MAX_FRAGMENT_COUNT 8
#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
#define MAX_TRANSMIT_BUFFER_SIZE 32000
#else
#define MAX_TRANSMIT_BUFFER_SIZE 8000
#endif
-#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
-#define TX_PACKET_DRVAGGR_SUBFRAME_SHIFT_BYTES (sizeof(tx_desc_819x_usb_aggr_subframe) + sizeof(tx_fwinfo_819x_usb))
-#endif
/* Octets for crc32 (FCS, ICV) */
#define scrclng 4
-typedef enum rf_optype {
+enum rf_op_type {
RF_OP_By_SW_3wire = 0,
RF_OP_By_FW,
RF_OP_MAX
-} rf_op_type;
+};
+
/* 8190 Loopback Mode definition */
typedef enum _rtl819xUsb_loopback {
RTL819xU_NO_LOOPBACK = 0,
@@ -491,7 +442,6 @@ typedef struct _rt_firmware_info_819xUsb {
#define PHY_RSSI_SLID_WIN_MAX 100
-
typedef enum _WIRELESS_MODE {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_A = 0x01,
@@ -502,7 +452,6 @@ typedef enum _WIRELESS_MODE {
WIRELESS_MODE_N_5G = 0x20
} WIRELESS_MODE;
-
#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 30)
typedef struct buffer {
@@ -522,11 +471,6 @@ typedef struct rtl_reg_debug {
unsigned char buf[0xff];
} rtl_reg_debug;
-
-
-
-
-
typedef struct _rt_9x_tx_rate_history {
u32 cck[4];
u32 ofdm[8];
@@ -641,13 +585,11 @@ typedef struct Stats {
u32 CurrentShowTxate;
} Stats;
-
/* Bandwidth Offset */
#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
#define HAL_PRIME_CHNL_OFFSET_LOWER 1
#define HAL_PRIME_CHNL_OFFSET_UPPER 2
-
typedef struct ChnlAccessSetting {
u16 SIFS_Timer;
u16 DIFS_Timer;
@@ -720,9 +662,17 @@ typedef enum _RT_RF_TYPE_819xU {
RF_PSEUDO_11N = 4,
} RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
+/* 2007/10/08 MH Define RATR state. */
+enum dynamic_ratr_state {
+ DM_RATR_STA_HIGH = 0,
+ DM_RATR_STA_MIDDLE = 1,
+ DM_RATR_STA_LOW = 2,
+ DM_RATR_STA_MAX
+};
+
typedef struct _rate_adaptive {
u8 rate_adaptive_disabled;
- u8 ratr_state;
+ enum dynamic_ratr_state ratr_state;
u16 reserve;
u32 high_rssi_thresh_for_ra;
@@ -756,7 +706,6 @@ typedef struct _ccktxbbgain_struct {
u8 ccktxbb_valuearray[8];
} ccktxbbgain_struct, *pccktxbbgain_struct;
-
typedef struct _init_gain {
u8 xaagccore1;
u8 xbagccore1;
@@ -792,7 +741,6 @@ typedef struct _phy_cck_rx_status_report_819xusb {
u8 cck_agc_rpt;
} phy_sts_cck_819xusb_t;
-
struct phy_ofdm_rx_status_rxsc_sgien_exintfflag {
u8 reserved:4;
u8 rxsc:2;
@@ -884,7 +832,6 @@ typedef struct r8192_priv {
short sens;
short max_sens;
-
short up;
/* If 1, allow bad crc frame, reception in monitor mode */
short crcmon;
@@ -923,7 +870,6 @@ typedef struct r8192_priv {
short tx_urb_index;
atomic_t tx_pending[0x10]; /* UART_PRIORITY + 1 */
-
struct tasklet_struct irq_rx_tasklet;
struct urb *rxurb_task;
@@ -936,7 +882,6 @@ typedef struct r8192_priv {
u32 LastRxDescTSFHigh;
u32 LastRxDescTSFLow;
-
/* Rx Related variables */
u16 EarlyRxThreshold;
u32 ReceiveConfig;
@@ -958,7 +903,7 @@ typedef struct r8192_priv {
u8 slot_time;
bool bDcut;
bool bCurrentRxAggrEnable;
- u8 Rf_Mode; /* For Firmware RF -R/W switch */
+ enum rf_op_type Rf_Mode; /* For Firmware RF -R/W switch */
prt_firmware pFirmware;
rtl819xUsb_loopback_e LoopbackMode;
u16 EEPROMTxPowerDiff;
@@ -995,7 +940,7 @@ typedef struct r8192_priv {
u8 SwChnlStage;
u8 SwChnlStep;
u8 SetBWModeInProgress;
- HT_CHANNEL_WIDTH CurrentChannelBW;
+ enum ht_channel_width CurrentChannelBW;
u8 ChannelPlan;
/* 8190 40MHz mode */
/* Control channel sub-carrier */
@@ -1171,5 +1116,4 @@ void rtl819xusb_beacon_tx(struct net_device *dev, u16 tx_rate);
void EnableHWSecurityConfig8192(struct net_device *dev);
void setKey(struct net_device *dev, u8 EntryNo, u8 KeyIndex, u16 KeyType, u8 *MacAddr, u8 DefaultKey, u32 *KeyContent);
-
#endif