diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/amba/pl08x.h | 10 | ||||
| -rw-r--r-- | include/linux/amba/pl330.h | 1 | ||||
| -rw-r--r-- | include/linux/dmaengine.h | 35 | ||||
| -rw-r--r-- | include/linux/dw_dmac.h | 38 |
4 files changed, 34 insertions, 50 deletions
diff --git a/include/linux/amba/pl08x.h b/include/linux/amba/pl08x.h index 033f6aa670de..e64ce2cfee99 100644 --- a/include/linux/amba/pl08x.h +++ b/include/linux/amba/pl08x.h @@ -47,9 +47,6 @@ enum { * @muxval: a number usually used to poke into some mux regiser to * mux in the signal to this channel * @cctl_opt: default options for the channel control register - * @device_fc: Flow Controller Settings for ccfg register. Only valid for slave - * channels. Fill with 'true' if peripheral should be flow controller. Direction - * will be selected at Runtime. * @addr: source/target address in physical memory for this DMA channel, * can be the address of a FIFO register for burst requests for example. * This can be left undefined if the PrimeCell API is used for configuring @@ -68,7 +65,6 @@ struct pl08x_channel_data { int max_signal; u32 muxval; u32 cctl; - bool device_fc; dma_addr_t addr; bool circular_buffer; bool single; @@ -176,13 +172,15 @@ enum pl08x_dma_chan_state { * @runtime_addr: address for RX/TX according to the runtime config * @runtime_direction: current direction of this channel according to * runtime config - * @lc: last completed transaction on this channel * @pend_list: queued transactions pending on this channel * @at: active transaction on this channel * @lock: a lock for this channel data * @host: a pointer to the host (internal use) * @state: whether the channel is idle, paused, running etc * @slave: whether this channel is a device (slave) or for memcpy + * @device_fc: Flow Controller Settings for ccfg register. Only valid for slave + * channels. Fill with 'true' if peripheral should be flow controller. Direction + * will be selected at Runtime. * @waiting: a TX descriptor on this channel which is waiting for a physical * channel to become available */ @@ -198,13 +196,13 @@ struct pl08x_dma_chan { u32 src_cctl; u32 dst_cctl; enum dma_transfer_direction runtime_direction; - dma_cookie_t lc; struct list_head pend_list; struct pl08x_txd *at; spinlock_t lock; struct pl08x_driver_data *host; enum pl08x_dma_chan_state state; bool slave; + bool device_fc; struct pl08x_txd *waiting; }; diff --git a/include/linux/amba/pl330.h b/include/linux/amba/pl330.h index 12e023c19ac1..fe93758e8403 100644 --- a/include/linux/amba/pl330.h +++ b/include/linux/amba/pl330.h @@ -13,7 +13,6 @@ #define __AMBA_PL330_H_ #include <linux/dmaengine.h> -#include <asm/hardware/pl330.h> struct dma_pl330_platdata { /* diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index a5966f691ef8..676f967390ae 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -18,14 +18,15 @@ * The full GNU General Public License is included in this distribution in the * file called COPYING. */ -#ifndef DMAENGINE_H -#define DMAENGINE_H +#ifndef LINUX_DMAENGINE_H +#define LINUX_DMAENGINE_H #include <linux/device.h> #include <linux/uio.h> #include <linux/bug.h> #include <linux/scatterlist.h> #include <linux/bitmap.h> +#include <linux/types.h> #include <asm/page.h> /** @@ -258,6 +259,7 @@ struct dma_chan_percpu { * struct dma_chan - devices supply DMA channels, clients use them * @device: ptr to the dma device who supplies this channel, always !%NULL * @cookie: last cookie value returned to client + * @completed_cookie: last completed cookie for this channel * @chan_id: channel ID for sysfs * @dev: class device for sysfs * @device_node: used to add this to the device chan list @@ -269,6 +271,7 @@ struct dma_chan_percpu { struct dma_chan { struct dma_device *device; dma_cookie_t cookie; + dma_cookie_t completed_cookie; /* sysfs */ int chan_id; @@ -332,6 +335,9 @@ enum dma_slave_buswidth { * may or may not be applicable on memory sources. * @dst_maxburst: same as src_maxburst but for destination target * mutatis mutandis. + * @device_fc: Flow Controller Settings. Only valid for slave channels. Fill + * with 'true' if peripheral should be flow controller. Direction will be + * selected at Runtime. * * This struct is passed in as configuration data to a DMA engine * in order to set up a certain channel for DMA transport at runtime. @@ -358,6 +364,7 @@ struct dma_slave_config { enum dma_slave_buswidth dst_addr_width; u32 src_maxburst; u32 dst_maxburst; + bool device_fc; }; static inline const char *dma_chan_name(struct dma_chan *chan) @@ -576,10 +583,11 @@ struct dma_device { struct dma_async_tx_descriptor *(*device_prep_slave_sg)( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, - unsigned long flags); + unsigned long flags, void *context); struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)( struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, - size_t period_len, enum dma_transfer_direction direction); + size_t period_len, enum dma_transfer_direction direction, + void *context); struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)( struct dma_chan *chan, struct dma_interleaved_template *xt, unsigned long flags); @@ -613,7 +621,24 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single( struct scatterlist sg; sg_init_one(&sg, buf, len); - return chan->device->device_prep_slave_sg(chan, &sg, 1, dir, flags); + return chan->device->device_prep_slave_sg(chan, &sg, 1, + dir, flags, NULL); +} + +static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg( + struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, + enum dma_transfer_direction dir, unsigned long flags) +{ + return chan->device->device_prep_slave_sg(chan, sgl, sg_len, + dir, flags, NULL); +} + +static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic( + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, + size_t period_len, enum dma_transfer_direction dir) +{ + return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len, + period_len, dir, NULL); } static inline int dmaengine_terminate_all(struct dma_chan *chan) diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h index f2c64f92c4a0..2412e02d7c0f 100644 --- a/include/linux/dw_dmac.h +++ b/include/linux/dw_dmac.h @@ -31,18 +31,6 @@ struct dw_dma_platform_data { unsigned char chan_priority; }; -/** - * enum dw_dma_slave_width - DMA slave register access width. - * @DMA_SLAVE_WIDTH_8BIT: Do 8-bit slave register accesses - * @DMA_SLAVE_WIDTH_16BIT: Do 16-bit slave register accesses - * @DMA_SLAVE_WIDTH_32BIT: Do 32-bit slave register accesses - */ -enum dw_dma_slave_width { - DW_DMA_SLAVE_WIDTH_8BIT, - DW_DMA_SLAVE_WIDTH_16BIT, - DW_DMA_SLAVE_WIDTH_32BIT, -}; - /* bursts size */ enum dw_dma_msize { DW_DMA_MSIZE_1, @@ -55,47 +43,21 @@ enum dw_dma_msize { DW_DMA_MSIZE_256, }; -/* flow controller */ -enum dw_dma_fc { - DW_DMA_FC_D_M2M, - DW_DMA_FC_D_M2P, - DW_DMA_FC_D_P2M, - DW_DMA_FC_D_P2P, - DW_DMA_FC_P_P2M, - DW_DMA_FC_SP_P2P, - DW_DMA_FC_P_M2P, - DW_DMA_FC_DP_P2P, -}; - /** * struct dw_dma_slave - Controller-specific information about a slave * * @dma_dev: required DMA master device - * @tx_reg: physical address of data register used for - * memory-to-peripheral transfers - * @rx_reg: physical address of data register used for - * peripheral-to-memory transfers - * @reg_width: peripheral register width * @cfg_hi: Platform-specific initializer for the CFG_HI register * @cfg_lo: Platform-specific initializer for the CFG_LO register * @src_master: src master for transfers on allocated channel. * @dst_master: dest master for transfers on allocated channel. - * @src_msize: src burst size. - * @dst_msize: dest burst size. - * @fc: flow controller for DMA transfer */ struct dw_dma_slave { struct device *dma_dev; - dma_addr_t tx_reg; - dma_addr_t rx_reg; - enum dw_dma_slave_width reg_width; u32 cfg_hi; u32 cfg_lo; u8 src_master; u8 dst_master; - u8 src_msize; - u8 dst_msize; - u8 fc; }; /* Platform-configurable bits in CFG_HI */ |