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-rw-r--r--sound/soc/uniphier/aio-core.c84
-rw-r--r--sound/soc/uniphier/aio-cpu.c5
-rw-r--r--sound/soc/uniphier/aio-ld11.c2
-rw-r--r--sound/soc/uniphier/aio-reg.h1
-rw-r--r--sound/soc/uniphier/aio.h6
5 files changed, 81 insertions, 17 deletions
diff --git a/sound/soc/uniphier/aio-core.c b/sound/soc/uniphier/aio-core.c
index 638cb3fc5f7b..9bcba06ba52e 100644
--- a/sound/soc/uniphier/aio-core.c
+++ b/sound/soc/uniphier/aio-core.c
@@ -265,6 +265,57 @@ void aio_port_reset(struct uniphier_aio_sub *sub)
}
/**
+ * aio_port_set_ch - set channels of LPCM
+ * @sub: the AIO substream pointer, PCM substream only
+ * @ch : count of channels
+ *
+ * Set suitable slot selecting to input/output port block of AIO.
+ *
+ * This function may return error if non-PCM substream.
+ *
+ * Return: Zero if successful, otherwise a negative value on error.
+ */
+static int aio_port_set_ch(struct uniphier_aio_sub *sub)
+{
+ struct regmap *r = sub->aio->chip->regmap;
+ u32 slotsel_2ch[] = {
+ 0, 0, 0, 0, 0,
+ };
+ u32 slotsel_multi[] = {
+ OPORTMXTYSLOTCTR_SLOTSEL_SLOT0,
+ OPORTMXTYSLOTCTR_SLOTSEL_SLOT1,
+ OPORTMXTYSLOTCTR_SLOTSEL_SLOT2,
+ OPORTMXTYSLOTCTR_SLOTSEL_SLOT3,
+ OPORTMXTYSLOTCTR_SLOTSEL_SLOT4,
+ };
+ u32 mode, *slotsel;
+ int i;
+
+ switch (params_channels(&sub->params)) {
+ case 8:
+ case 6:
+ mode = OPORTMXTYSLOTCTR_MODE;
+ slotsel = slotsel_multi;
+ break;
+ case 2:
+ mode = 0;
+ slotsel = slotsel_2ch;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ for (i = 0; i < AUD_MAX_SLOTSEL; i++) {
+ regmap_update_bits(r, OPORTMXTYSLOTCTR(sub->swm->oport.map, i),
+ OPORTMXTYSLOTCTR_MODE, mode);
+ regmap_update_bits(r, OPORTMXTYSLOTCTR(sub->swm->oport.map, i),
+ OPORTMXTYSLOTCTR_SLOTSEL_MASK, slotsel[i]);
+ }
+
+ return 0;
+}
+
+/**
* aio_port_set_rate - set sampling rate of LPCM
* @sub: the AIO substream pointer, PCM substream only
* @rate: Sampling rate in Hz.
@@ -276,7 +327,7 @@ void aio_port_reset(struct uniphier_aio_sub *sub)
*
* Return: Zero if successful, otherwise a negative value on error.
*/
-int aio_port_set_rate(struct uniphier_aio_sub *sub, int rate)
+static int aio_port_set_rate(struct uniphier_aio_sub *sub, int rate)
{
struct regmap *r = sub->aio->chip->regmap;
struct device *dev = &sub->aio->chip->pdev->dev;
@@ -395,7 +446,7 @@ int aio_port_set_rate(struct uniphier_aio_sub *sub, int rate)
*
* Return: Zero if successful, otherwise a negative value on error.
*/
-int aio_port_set_fmt(struct uniphier_aio_sub *sub)
+static int aio_port_set_fmt(struct uniphier_aio_sub *sub)
{
struct regmap *r = sub->aio->chip->regmap;
struct device *dev = &sub->aio->chip->pdev->dev;
@@ -460,7 +511,7 @@ int aio_port_set_fmt(struct uniphier_aio_sub *sub)
*
* Return: Zero if successful, otherwise a negative value on error.
*/
-int aio_port_set_clk(struct uniphier_aio_sub *sub)
+static int aio_port_set_clk(struct uniphier_aio_sub *sub)
{
struct uniphier_aio_chip *chip = sub->aio->chip;
struct device *dev = &sub->aio->chip->pdev->dev;
@@ -575,6 +626,10 @@ int aio_port_set_param(struct uniphier_aio_sub *sub, int pass_through,
rate = params_rate(params);
}
+ ret = aio_port_set_ch(sub);
+ if (ret)
+ return ret;
+
ret = aio_port_set_rate(sub, rate);
if (ret)
return ret;
@@ -731,15 +786,28 @@ void aio_port_set_volume(struct uniphier_aio_sub *sub, int vol)
int aio_if_set_param(struct uniphier_aio_sub *sub, int pass_through)
{
struct regmap *r = sub->aio->chip->regmap;
- u32 v;
+ u32 memfmt, v;
if (sub->swm->dir == PORT_DIR_OUTPUT) {
- if (pass_through)
+ if (pass_through) {
v = PBOUTMXCTR0_ENDIAN_0123 |
PBOUTMXCTR0_MEMFMT_STREAM;
- else
- v = PBOUTMXCTR0_ENDIAN_3210 |
- PBOUTMXCTR0_MEMFMT_2CH;
+ } else {
+ switch (params_channels(&sub->params)) {
+ case 2:
+ memfmt = PBOUTMXCTR0_MEMFMT_2CH;
+ break;
+ case 6:
+ memfmt = PBOUTMXCTR0_MEMFMT_6CH;
+ break;
+ case 8:
+ memfmt = PBOUTMXCTR0_MEMFMT_8CH;
+ break;
+ default:
+ return -EINVAL;
+ }
+ v = PBOUTMXCTR0_ENDIAN_3210 | memfmt;
+ }
regmap_write(r, PBOUTMXCTR0(sub->swm->oif.map), v);
regmap_write(r, PBOUTMXCTR1(sub->swm->oif.map), 0);
diff --git a/sound/soc/uniphier/aio-cpu.c b/sound/soc/uniphier/aio-cpu.c
index 2d9b7dde2ffa..ee90e6c3937c 100644
--- a/sound/soc/uniphier/aio-cpu.c
+++ b/sound/soc/uniphier/aio-cpu.c
@@ -219,15 +219,10 @@ static int uniphier_aio_set_pll(struct snd_soc_dai *dai, int pll_id,
unsigned int freq_out)
{
struct uniphier_aio *aio = uniphier_priv(dai);
- struct device *dev = &aio->chip->pdev->dev;
int ret;
if (!is_valid_pll(aio->chip, pll_id))
return -EINVAL;
- if (!aio->chip->plls[pll_id].enable) {
- dev_err(dev, "PLL(%d) is not implemented\n", pll_id);
- return -ENOTSUPP;
- }
ret = aio_chip_set_pll(aio->chip, pll_id, freq_out);
if (ret < 0)
diff --git a/sound/soc/uniphier/aio-ld11.c b/sound/soc/uniphier/aio-ld11.c
index ab04d3331be9..de962df245ba 100644
--- a/sound/soc/uniphier/aio-ld11.c
+++ b/sound/soc/uniphier/aio-ld11.c
@@ -286,7 +286,7 @@ static struct snd_soc_dai_driver uniphier_aio_dai_ld11[] = {
.formats = SNDRV_PCM_FMTBIT_S32_LE,
.rates = SNDRV_PCM_RATE_48000,
.channels_min = 2,
- .channels_max = 2,
+ .channels_max = 8,
},
.ops = &uniphier_aio_i2s_ops,
},
diff --git a/sound/soc/uniphier/aio-reg.h b/sound/soc/uniphier/aio-reg.h
index 45fdc6ae358a..734395dbcffb 100644
--- a/sound/soc/uniphier/aio-reg.h
+++ b/sound/soc/uniphier/aio-reg.h
@@ -374,6 +374,7 @@
#define OPORTMXTYVOLGAINSTATUS(n, m) (0x42108 + 0x400 * (n) + 0x20 * (m))
#define OPORTMXTYVOLGAINSTATUS_CUR_MASK GENMASK(15, 0)
#define OPORTMXTYSLOTCTR(n, m) (0x42114 + 0x400 * (n) + 0x20 * (m))
+#define OPORTMXTYSLOTCTR_MODE BIT(15)
#define OPORTMXTYSLOTCTR_SLOTSEL_MASK GENMASK(11, 8)
#define OPORTMXTYSLOTCTR_SLOTSEL_SLOT0 (0x8 << 8)
#define OPORTMXTYSLOTCTR_SLOTSEL_SLOT1 (0x9 << 8)
diff --git a/sound/soc/uniphier/aio.h b/sound/soc/uniphier/aio.h
index aa89c2f6fa24..ca6ccbae0ee8 100644
--- a/sound/soc/uniphier/aio.h
+++ b/sound/soc/uniphier/aio.h
@@ -141,6 +141,9 @@ enum IEC61937_PC {
#define AUD_MIN_FRAGMENT_SIZE (4 * 1024)
#define AUD_MAX_FRAGMENT_SIZE (16 * 1024)
+/* max 5 slots, 10 channels, 2 channel in 1 slot */
+#define AUD_MAX_SLOTSEL 5
+
/*
* This is a selector for virtual register map of AIO.
*
@@ -322,9 +325,6 @@ int aio_chip_set_pll(struct uniphier_aio_chip *chip, int pll_id,
void aio_chip_init(struct uniphier_aio_chip *chip);
int aio_init(struct uniphier_aio_sub *sub);
void aio_port_reset(struct uniphier_aio_sub *sub);
-int aio_port_set_rate(struct uniphier_aio_sub *sub, int rate);
-int aio_port_set_fmt(struct uniphier_aio_sub *sub);
-int aio_port_set_clk(struct uniphier_aio_sub *sub);
int aio_port_set_param(struct uniphier_aio_sub *sub, int pass_through,
const struct snd_pcm_hw_params *params);
void aio_port_set_enable(struct uniphier_aio_sub *sub, int enable);
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.