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2022-06-27docs/zh_CN: Update the translation of highmem to 5.19-rc1Yanteng Si1-34/+43
update to commit 110bf7a52307 ("Documentation/vm: rework "Temporary Virtual Mappings" section") Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Reviewed-by: Wu XiangCheng <bobwxc@email.cn> Reviewed-by: Alex Shi <alexs@kernel.org> Link: https://lore.kernel.org/r/76c418554d9b8d395f7e8331e8e3b89d1b7beff0.1655362610.git.siyanteng@loongson.cn Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-06-27drm/i915/guc/slpc: Use non-blocking H2G for waitboostVinay Belgaumkar1-7/+35
SLPC min/max frequency updates require H2G calls. We are seeing timeouts when GuC channel is backed up and it is unable to respond in a timely fashion causing warnings and affecting CI. This is seen when waitboosting happens during a stress test. this patch updates the waitboost path to use a non-blocking H2G call instead, which returns as soon as the message is successfully transmitted. v2: Use drm_notice to report any errors that might occur while sending the waitboost H2G request (Tvrtko) v3: Add drm_notice inside force_min_freq (Ashutosh) Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220623003225.23301-1-vinay.belgaumkar@intel.com
2022-06-27dt-bindings: clock: qcom,gcc-sdm845: add parent power domainKrzysztof Kozlowski1-0/+3
Allow Qualcomm GCC to register its parent power domain (e.g. RPMHPD) to properly pass performance state from children. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220513061347.46480-2-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm630: order interrupts according to bindingsKrzysztof Kozlowski1-8/+8
The CAMSS DTSI device node, which came after the bindings were merged, got the interrupts ordered differently then specified in the bindings: sdm630-sony-xperia-nile-pioneer.dtb: camss@ca00000: interrupt-names:0: 'csid0' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-4-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm630: order regs according to bindingsKrzysztof Kozlowski1-12/+12
The CAMSS DTSI device node, which came after the bindings were merged, got the regs ordered differently then specified in the bindings: sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:0: 'csi_clk_mux' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-3-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm630: order clocks according to bindingsKrzysztof Kozlowski1-84/+84
The CAMSS DTSI device node, which came after the bindings were merged, got the clocks ordered differently then specified in the bindings: sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:4: 'csid3' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-2-krzysztof.kozlowski@linaro.org
2022-06-27ARM: dts: qcom: add missing gpio-ranges in PMIC GPIOsKrzysztof Kozlowski2-0/+2
The new Qualcomm PMIC GPIO bindings require gpio-ranges property: qcom-sdx55-telit-fn980-tlb.dtb: gpio@c000: 'gpio-ranges' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220508135932.132378-5-krzysztof.kozlowski@linaro.org
2022-06-27ARM: dts: qcom: pmx65: add fallback compatible to PMIC GPIOKrzysztof Kozlowski1-1/+1
The bindings require all PMIC GPIO nodes to have two compatibles - specific followed by SPMI or SSBI fallback. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-12-krzysztof.kozlowski@linaro.org
2022-06-27ARM: dts: qcom: mdm9615: add missing PMIC GPIO regKrzysztof Kozlowski1-0/+1
'reg' property is required in SSBI children: qcom-mdm9615-wp8548-mangoh-green.dtb: gpio@150: 'reg' is a required property Fixes: 2c5e596524e7 ("ARM: dts: Add MDM9615 dtsi") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-11-krzysztof.kozlowski@linaro.org
2022-06-27ARM: dts: qcom: align PMIC GPIO pin configuration with DT schemaKrzysztof Kozlowski11-37/+37
DT schema expects PMIC GPIO pin configuration nodes to be named with '-state' suffix. Optional children should be either 'pinconf' or followed with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-10-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: msm8994-msft-lumia-octagon: add PM8994 pin propertiesKrzysztof Kozlowski1-3/+6
The bindings require that every pin configuration comes with 'function' property. There is also no 'drive-strength' property but 'qcom,drive-strength': msm8994-msft-lumia-octagon-cityman.dtb: gpios@c000: amsel-high-state: 'oneOf' conditional failed, one must be fixed: 'drive-strength' does not match any of the regexes: 'pinctrl-[0-9]+' 'bias-pull-up', 'drive-strength', 'function', 'pins' do not match any of the regexes: '(pinconf|-pins)$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-9-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: apq8096-db820c: add PM8994 pin functionKrzysztof Kozlowski1-0/+1
The bindings require that every pin configuration comes with 'function' property. Add such to PM8994 GPIO5. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-8-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: add fallback compatible to PMIC GPIOsKrzysztof Kozlowski13-13/+13
The bindings require all PMIC GPIO nodes to have two compatibles - specific followed by SPMI or SSBI fallback. Add the fallback to fix warnings like: msm8916-samsung-serranove.dtb: gpios@c000: compatible: ['qcom,pm8916-gpio'] is too short Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-7-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: align PMIC GPIO pin configuration with DT schemaKrzysztof Kozlowski22-86/+86
DT schema expects PMIC GPIO pin configuration nodes to be named with '-state' suffix. Optional children should be either 'pinconf' or followed with '-pins' suffix. This fixes dtbs_check warnings like: sdm845-xiaomi-beryllium.dtb: gpios@c000: 'vol-up-active' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-6-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm845-akatsuki: Round down l22a regulator voltageMarijn Suijten1-2/+3
2700000 is not a multiple of pmic4_pldo's step size of 8000 (with base voltage 1664000), resulting in pm8998-rpmh-regulators not probing. Just as we did with MSM8998's Sony Yoshino Poplar [1], round the voltages down to err on the cautious side and leave a comment in place to document this discrepancy wrt downstream sources. [1]: https://lore.kernel.org/linux-arm-msm/20220507153627.1478268-1-marijn.suijten@somainline.org/ Fixes: 30a7f99befc6 ("arm64: dts: qcom: Add support for SONY Xperia XZ2 / XZ2C / XZ3 (Tama platform)") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220620211212.269956-1-marijn.suijten@somainline.org
2022-06-27ARM: dts: qcom: sdx65: Add Watchdog supportRohit Agarwal1-0/+6
Enable Watchdog support for Application Processor Subsystem (APSS) block on SDX65 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1654080312-5408-11-git-send-email-quic_rohiagar@quicinc.com
2022-06-27dt-bindings: firmware: scm: Add compatible for SDX65Rohit Agarwal1-0/+1
Add devicetree compatible for SCM present in SDX65 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1654080312-5408-5-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add pshold supportRohit Agarwal1-0/+5
Add support for pshold block to drive pshold towards the PMIC, which is used to trigger a configurable event such as reboot or poweroff of the SDX65 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1654080312-5408-12-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65-mtp: Enable modemRohit Agarwal1-0/+5
Enable modem on SDX65 MTP board. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1654080312-5408-8-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add Modem remoteproc nodeRohit Agarwal1-0/+33
Add modem support to SDX65 using the PAS remoteproc driver. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1654080312-5408-7-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add SCM nodeRohit Agarwal1-0/+6
Add SCM node to enable SCM functionality on SDX65 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1654080312-5408-6-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add IMEM and PIL info regionRohit Agarwal1-0/+13
Add a simple-mfd representing IMEM on SDX65 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteproc. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1654080312-5408-4-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add modem SMP2P nodeRohit Agarwal1-0/+31
Add SMP2P nodes for the SDX65 platform to communicate with the modem. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1654080312-5408-3-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add CPUFreq supportRohit Agarwal1-0/+29
Add CPUFreq support to SDX65 platform using the cpufreq-dt driver. There is no dedicated hardware block available on this platform to carry on the CPUFreq duties. Hence, it is accomplished using the CPU clock and regulators tied together by the operating points table. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1654080312-5408-2-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65-mtp: Enable QPIC NAND supportKaushal Kumar1-0/+15
Enable QPIC NAND devicetree node for Qualcomm SDX65-MTP board. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1651511286-18690-5-git-send-email-quic_kaushalk@quicinc.com
2022-06-27ARM: dts: qcom: sdx65-mtp: Enable QPIC BAM supportKaushal Kumar1-4/+8
Enable QPIC BAM devicetree node for Qualcomm SDX65-MTP board. While at it, sort the blsp1_uart3 node in alphabetical order and set it's status as "okay". Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1651511286-18690-4-git-send-email-quic_kaushalk@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add QPIC NAND supportKaushal Kumar1-0/+22
Add devicetree node to enable support for QPIC NAND controller on Qualcomm SDX65 platform. Since there is no "aon" clock in SDX65, a dummy clock is provided. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1651511286-18690-3-git-send-email-quic_kaushalk@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add QPIC BAM supportKaushal Kumar1-0/+12
Add devicetree node to enable support for QPIC BAM DMA controller on Qualcomm SDX65 platform. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1651511286-18690-2-git-send-email-quic_kaushalk@quicinc.com
2022-06-27ARM: dts: qcom: sdx65-mtp: Enable USB3 and PHY supportRohit Agarwal1-4/+25
Enable the support for USB3 controller, QMP PHY and HS PHY on SDX65 MTP. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1651482395-29443-5-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add USB3 and PHY supportRohit Agarwal1-0/+83
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and SNPS HS PHY on SDX65. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1651482395-29443-4-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add interconnect nodesRohit Agarwal1-0/+25
Add interconnect devicetree nodes in SDX65 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [bjorn: Sorted nodes] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1651482395-29443-2-git-send-email-quic_rohiagar@quicinc.com
2022-06-27ARM: dts: qcom: sdx65: Add Shared memory manager supportRohit Agarwal1-1/+3
Add smem node to support shared memory manager on SDX65 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1651480665-14978-5-git-send-email-quic_rohiagar@quicinc.com
2022-06-27arm64: dts: qcom: msm8996: Add SDHCI resetsKonrad Dybcio1-0/+2
On MSM8996, the default bootloader configuration leaves the hosts in some weird state that never allows them to function properly under Linux. Add the hardware resets so that we can start clean and get them actually working. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162642.608106-1-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8996-tone: Rule out PM(I)8994 variantsKonrad Dybcio5-37/+1
It looks like all Tone devices out in the wild are using PMI8996, which suggests the PMI8994-variant DTs are not needed. Remove them. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162525.607946-1-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8996-tone: Drop cont_splash_mem regionKonrad Dybcio1-5/+0
Tone does not have a functioning bootloader framebuffer and Linux allocates the DRM framebuffer dynamically. Free up 36 MiB of precious RAM by removing this reservation. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162319.607629-1-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-mtp: Merge and fix up the DTKonrad Dybcio2-422/+440
Merge the two DT files into one, sort the nodes and fix up a couple of style incoherencies by adding some newlines, removing some, sorting properties etc. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-14-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-fxtec: Decouple from 8998 MTPKonrad Dybcio1-1/+420
While the Pro-1 is based on MTP and is very close to it, it's really not great for it to include the MTP dtsi straight up, as any small change will affect both boards and not all of them will apply to the phone as well. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-13-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998*: Clean up #includesKonrad Dybcio3-8/+5
Sort the includes and remove unused ones. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-12-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-oneplus: Add clocks & GDSC to simplefbKonrad Dybcio1-0/+13
This is required to keep the display working with MMCC enabled until proper panel support is in place. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-11-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998*: Keep MMCC & MMSS_SMMU enabled by defaultKonrad Dybcio4-18/+14
MMCC is a component of the SoC that should always be configured. It was kept off due to misconfiguration on clamshell machines. Keep it disabled on these ones and enable it by default on all the others. Exactly the same story applies to MMSS_SMMU, which directly depends on MMCC. Do note, that if a platform doesn't use neither EFIFB (only applies to WoA devices in this case) or simplefb (applies to precisely 2 msm8998 devices as of this commit), this will not cause any harm. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-10-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-fxtec: Use "okay" instead of "ok"Konrad Dybcio1-5/+5
This is the standard way. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-9-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-oneplus: Apply style fixesKonrad Dybcio1-9/+36
Add some newlines, reorder some properties, remove some indentation to make it more coherent. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-8-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-yoshino/oneplus: Use pm8005_regulators labelKonrad Dybcio2-27/+16
Now that a label is added, use it! Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-7-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-yoshino: Remove simple-bus compatible from clocks{}Konrad Dybcio1-2/+0
It's not necessary and the SoC clocks{} node doesn't use it either. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-6-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-yoshino: Add USB extconKonrad Dybcio1-0/+24
While not strictly necessary, at least on maple, configure the USB extcon, which requires two pins on Yoshino. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-5-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-yoshino-lilac: Disable LVS1Konrad Dybcio1-0/+4
It's disabled on downstream, follow it. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-4-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-laptops: Clean up DTsKonrad Dybcio3-14/+18
Reorder properties to match new laptop DTs, change hex to dec. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-3-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-clamshell: Clean up the DTKonrad Dybcio2-49/+73
Keep the nodes and includes in order, clean up unnecessary properties & nodes. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-2-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998*: Fix TLMM and pin nodesKonrad Dybcio5-71/+33
Remove the unnecessary level of indentation, commonize SDC2 pins and notice that SDCC2_CD_ON and _OFF is identical, deduplicate it! Also, remove some unnecessary overrides and use decimal values in #-cells Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-1-konrad.dybcio@somainline.org
2022-06-27ASoC: max98396: Some assorted fixes and additionsMark Brown3-10/+175
Merge series from Daniel Mack <daniel@zonque.org>: This is a series of some patches that I collected while using the max98396 driver is a TDM mode setup. They correct BSEL and PCM mode configs, add support for power supplies and add some bits to the documentation. The code is tested in TDM-16 and TDM-8 mode with 32 channel width.
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