Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2015-06-18 | clk: keystone: add support for post divider register for main pll | 1 | -4/+4 | |
2013-12-10 | clk: keystone: use clkod register bits for postdiv | 1 | -4/+4 | |
2013-10-07 | clk: keystone: add Keystone PLL clock driver | 1 | -0/+84 |