Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2019-10-23 | dt-bindings: riscv: Fix CPU schema errors | 1 | -16/+13 | |
2019-08-08 | dt-bindings: riscv: fix the schema compatible string for the HiFive Unleashed board | 1 | -1/+1 | |
2019-08-08 | dt-bindings: riscv: remove obsolete cpus.txt | 2 | -162/+12 | |
2019-08-08 | dt-bindings: Update the riscv,isa string description | 1 | -0/+4 | |
2019-07-20 | dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodes | 1 | -82/+61 | |
2019-06-26 | dt-bindings: riscv: resolve 'make dt_binding_check' warnings | 1 | -12/+14 | |
2019-06-17 | dt-bindings: riscv: convert cpu binding to json-schema | 1 | -0/+168 | |
2019-06-17 | dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540 | 1 | -0/+25 | |
2019-05-16 | RISC-V: Add DT documentation for SiFive L2 Cache Controller | 1 | -0/+51 | |
2017-09-25 | dt-bindings: RISC-V CPU Bindings | 1 | -0/+162 |