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2019-07-31docs: i2c: convert to ReST and add to driver-api booksetMauro Carvalho Chehab1-173/+0
Convert each file at I2C subsystem, renaming them to .rst and adding to the driver-api book. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2019-07-05i2c: i801: Documentation updateJean Delvare1-8/+8
The i2c-i801 driver documentation needs some dusting: * Mention disable_features flag 0x20. * The i2c_ec driver has been removed from the kernel long ago. Driver i2c-scmi serves the same purpose for more recent hardware. * Replace obsolete /proc paths with equivalent /sys paths. Signed-off-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-07-05i2c: i801: Add support for Intel Tiger LakeJarkko Nikula1-0/+1
Add SMBUS PCI ID for Intel Tiger Lake -LP. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-06-21i2c: i801: Add support for Intel Elkhart LakeJarkko Nikula1-0/+1
Add PCI ID for Intel Elkhart Lake PCH. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-06-21i2c: i801: Add Block Write-Block Read Process Call supportAlexander Sverdlin1-1/+1
Add SMBUS 2.0 Block Write-Block Read Process Call command support. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-03-20i2c: i801: Add support for Intel Comet LakeJarkko Nikula1-0/+1
Add PCI ID for Intel Comet Lake PCH. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-07-03i2c: i801: Add support for Intel Ice LakeMika Westerberg1-0/+1
Intel Ice Lake has the same SMBus host controller than Intel Cannon Lake. Add the PCI ID to the drivers list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [jarkko.nikula@linux.intel.com: Add entries to Documentation and Kconfig] Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-07-03i2c: i801: Consolidate chipset names in documentation and KconfigJarkko Nikula1-7/+3
Make list of supported chipsets a little bit shorter by consolidating names that belong to the same family. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-02-21i2c: i801: Add missing documentation entries for Braswell and Kaby LakeJarkko Nikula1-0/+2
Commits adding PCI IDs for Intel Braswell and Kaby Lake PCH-H lacked the respective Kconfig and Documentation/i2c/busses/i2c-i801 change. Add them now. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-10-05i2c: i801: Add support for Intel Cedar ForkJarkko Nikula1-0/+1
Add PCI ID for Intel Cedar Fork PCH. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-19i2c: i801: Add support for Intel Cannon LakeSrinivas Pandruvada1-0/+2
Added SMBUS PCI Ids for SMBUS for Cannon Lake PCH. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> [jarkko.nikula@linux.intel.com: Add entries to Documentation and Kconfig. Cover Cannon Lake-H too] Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-02-09i2c: i801: Add support for Intel Gemini LakeMika Westerberg1-0/+1
Intel Gemini Lake has the same SMBus host controller than Intel Broxton. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-20i2c: i801: add Intel Lewisburg device IDsAlexandra Yates1-0/+1
Adding Intel codename Lewisburg platform device IDs for SMBus. Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-26i2c: i801: Document Intel DNV and BroxtonJarkko Nikula1-0/+2
Add missing entries into i2c-i801 documentation and Kconfig about recently added Intel DNV and Broxton. Reported-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-11-12i2c: i801: Add DeviceIDs for SunrisePoint LPDevin Ryles1-0/+1
Signed-off-by: Devin Ryles <devin.ryles@intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-16i2c: i801: Add Device IDs for Intel Sunrise Point PCHjames.d.ralston@intel.com1-0/+1
This patch adds the I2C/SMBus Device IDs for the Intel Sunrise Point PCH. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-07-17i2c: i801: Add device ID for Intel Wildcat Point PCHJean Delvare1-0/+1
Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-03-09i2c: i801: enable Intel BayTrail SMBUSChew, Kean ho1-0/+1
Add Device ID of Intel BayTrail SMBus Controller. Signed-off-by: Chew, Kean ho <kean.ho.chew@intel.com> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-01-29Update Jean Delvare's e-mail addressJean Delvare1-1/+1
Signed-off-by: Jean Delvare <khali@linux-fr.org>
2013-11-14i2c: i801: Add Device IDs for Intel Wildcat Point-LP PCHJames Ralston1-0/+1
This patch adds the SMBus Device IDs for the Intel Wildcat Point-LP PCH. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-06-20i2c: i801: SMBus patch for Intel Coleto Creek DeviceIDsSeth Heasley1-0/+1
This patch adds the i801 SMBus Controller DeviceIDs for the Intel Coleto Creek PCH. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-02-15i2c: i801: Add Device IDs for Intel Wellsburg PCHJames Ralston1-0/+1
This patch adds the SMBus Device IDs for the Intel Wellsburg PCH Signed-off-by: James Ralston <james.d.ralston@intel.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
2013-02-08i2c: i801: SMBus patch for Intel Avoton DeviceIDsSeth Heasley1-0/+1
This patch adds the PCU SMBus DeviceID for the Intel Avoton SOC. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-09-10i2c-i801: Add Device IDs for Intel Lynx Point-LP PCHJames Ralston1-0/+1
Add the SMBus Device IDs for the Intel Lynx Point-LP PCH. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-i801: Enable IRQ for SMBus transactionsDaniel Kurtz1-3/+10
Add a new 'feature' to i2c-i801 to enable using PCI interrupts. When the feature is enabled, then an isr is installed for the device's PCI IRQ. An I2C/SMBus transaction is always terminated by one of the following interrupt sources: FAILED, BUS_ERR, DEV_ERR, or on success: INTR. When the isr fires for one of these cases, it sets the ->status variable and wakes up the waitq. The waitq then saves off the status code, and clears ->status (in preparation for some future transaction). The SMBus controller generates an INTR irq at the end of each transaction where INTREN was set in the HST_CNT register. No locking is needed around accesses to priv->status since all writes to it are serialized: it is only ever set once in the isr at the end of a transaction, and cleared while no interrupts can occur. In addition, the I2C adapter lock guarantees that entire I2C transactions for a single adapter are always serialized. For this patch, the INTREN bit is set only for SMBus block, byte and word transactions, but not for I2C reads or writes. The use of the DS (BYTE_DONE) interrupt with byte-by-byte I2C transactions is implemented in a subsequent patch. The interrupt feature has only been enabled for COUGARPOINT hardware. In addition, it is disabled if SMBus is using the SMI# interrupt. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-03-26i2c-i801: Add device IDs for Intel Lynx PointSeth Heasley1-0/+1
Add the SMBus controller device IDs for the Intel Lynx Point PCH. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2011-05-24i2c-i801: SMBus patch for Intel Panther Point DeviceIDsSeth Heasley1-0/+1
This patch adds the SMBus controller DeviceID for the Intel Panther Point PCH. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2011-03-20i2c-i801: SMBus patch for Intel DH89xxCC DeviceIDsSeth Heasley1-1/+2
Add the SMBus Controller DeviceIDs for the Intel DH89xxCC PCH. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2010-10-31i2c-i801: Add PCI idents for Patsburg 'IDF' SMBus controllersDavid Woodhouse1-0/+3
These are the extra 'Integrated Device Function' SMBus controllers found on the Patsburg chipset. Mention the absence of slave mode support. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2010-10-31i2c-i801: Add Intel Patsburg device IDSeth Heasley1-1/+2
Add support for the Intel Patsburg PCH SMBus Controller. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2010-05-21i2c-i801: Let the user disable selected driver featuresJean Delvare1-1/+7
Let the user disable selected features normally supported by the device. This makes it possible to work around possible driver or hardware bugs if the feature in question doesn't work as intended for whatever reason. Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Felix Rubinstein <felixru@gmail.com>
2010-03-02i2c-i801: Add Intel Cougar Point device IDsSeth Heasley1-1/+2
Add the Intel Cougar Point (PCH) SMBus controller device IDs. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-10-22i2c-i801: Add support for Intel Ibex PeakSeth Heasley1-3/+4
Adds the Intel Ibex Peak (PCH) SMBus Controller Device IDs. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-02-24i2c-i801: Add support for the ICH10Gaston, Jason D1-1/+2
Add the Intel ICH10 SMBus Controller DeviceID's and updates Tolapai support. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-27i2c-i801: Implement I2C block read supportJean Delvare1-3/+2
I2C block read is supported since the ICH5. I couldn't get it to work using the block buffer, so it's using the old-style byte-by-byte mode for now. Note: I'm also updating the driver author... The i2c-i801 driver was really written by Mark Studebaker, even though he based his work on the i2c-piix4 driver which was written by Philip Edelbrock. Signed-off-by: Jean Delvare <khali@linux-fr.org>
2007-10-13i2c-i801: Add support for the Intel Tolapai SMBusJason Gaston1-1/+2
Add the Intel Tolapai SMBus Controller DID. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2007-07-12i2c-i801: Use the internal 32-byte buffer on ICH4+Oleg Ryjkov1-2/+2
Add an ability to utilize the internal SRAM buffer on ICH4 and newer host controllers to speed up execution of block operations. I've split the code so that it is more clear which block transaction is performed. First of all the host controller's type is identified. isich4 is set when we think that the controller has the internal buffer. Then, before every block transaction, if isich4 is set, we attempt to enable the E32B bit in SMBAUXCTL register. Signed-off-by: Oleg Ryjkov <olegr@google.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2007-02-13i2c-i801: Document the SMBus unhiding quirkJean Delvare1-5/+55
This is a frequently asked question so it deserves a paragraph in the driver documentation. Signed-off-by: Jean Delvare <khali@linux-fr.org>
2006-12-10i2c: i2c-i801 documentation updateJason Gaston1-1/+4
Add the Intel ICH9/ICH8/ESB2 SMBus Controller text to i2c-i801 documentation. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2006-06-22[PATCH] i2c-i801: Remove force_addr parameterJean Delvare1-2/+1
i2c-i801: Remove force_addr parameter Remove the force_addr module parameter. It doesn't appear to ever have been needed, and PCI resources shouldn't be arbitrarily changed anyway. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-04-16Linux-2.6.12-rc2Linus Torvalds1-0/+80
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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