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path: root/arch/arc/include/asm/cacheflush.h (follow)
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2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
2016-12-19ARC: mm: arc700: Don't assume 2 colours for aliasing VIPT dcacheVineet Gupta1-2/+4
2016-03-19ARC: dma: ioremap: use phys_addr_t consistenctly in code pathsVineet Gupta1-3/+3
2015-10-28ARC: mm: PAE40: switch to using phys_addr_t for physical addressesVineet Gupta1-4/+4
2015-05-19ARC: fold ___flush_dcache_page into __flush_dcache_pageVineet Gupta1-3/+1
2013-06-22ARC: [mm] Assume pagecache page dirty by defaultVineet Gupta1-0/+7
2013-06-22ARC: cache detection code bitrotVineet Gupta1-5/+1
2013-05-23ARC: Use enough bits for determining page's cache colorVineet Gupta1-1/+1
2013-05-23ARC: Brown paper bag bug in macro for checking cache colorVineet Gupta1-1/+3
2013-05-09ARC: [mm] Aliasing VIPT dcache support 4/4Vineet Gupta1-0/+1
2013-05-09ARC: [mm] Aliasing VIPT dcache support 3/4Vineet Gupta1-1/+3
2013-05-09ARC: [mm] Aliasing VIPT dcache support 2/4Vineet Gupta1-8/+45
2013-05-09ARC: [mm] Aliasing VIPT dcache support 1/4Vineet Gupta1-1/+1
2013-05-07ARC: [mm] Lazy D-cache flush (non aliasing VIPT)Vineet Gupta1-0/+1
2013-05-07ARC: [mm] consolidate icache/dcache sync codeVineet Gupta1-3/+2
2013-05-07ARC: [mm] optimise icache flush for user mappingsVineet Gupta1-1/+9
2013-02-15ARC: Cache Flush ManagementVineet Gupta1-0/+67