aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/r8a7745.dtsi (follow)
AgeCommit message (Expand)AuthorFilesLines
2017-08-15ARM: dts: r8a7745: add PFC supportSergei Shtylyov1-1/+6
2017-07-27ARM: dts: r8a7745: Reserve SRAM for the SMP jump stubGeert Uytterhoeven1-0/+8
2017-07-27ARM: dts: r8a7745: Add Inter Connect RAMGeert Uytterhoeven1-0/+15
2017-03-21ARM: dts: r8a7745: Add reset control propertiesGeert Uytterhoeven1-0/+24
2017-03-07ARM: dts: r8a7745: Remove unit-address and reg from integrated cacheGeert Uytterhoeven1-2/+1
2017-03-06ARM: dts: r8a7745: Fix SCIFB0 dmas indentationGeert Uytterhoeven1-1/+1
2017-02-07ARM: DTS: Fix register map for virt-capable GICMarc Zyngier1-1/+1
2017-01-23ARM: dts: r8a7745: Link ARM GIC to clock and clock domainGeert Uytterhoeven1-0/+3
2017-01-03ARM: dts: r8a7745: Add device node for PRRGeert Uytterhoeven1-0/+5
2017-01-03ARM: dts: r8a7745: Move RST node before SYSC nodeGeert Uytterhoeven1-5/+5
2016-11-23ARM: dts: r8a7745: add IRQC supportSergei Shtylyov1-0/+19
2016-11-23ARM: dts: r8a7745: add Ether supportSergei Shtylyov1-0/+12
2016-11-23ARM: dts: r8a7745: add [H]SCIF{|A|B} supportSergei Shtylyov1-0/+261
2016-11-23ARM: dts: r8a7745: add SYS-DMAC supportSergei Shtylyov1-0/+64
2016-11-23ARM: dts: r8a7745: initial SoC device treeSergei Shtylyov1-0/+120
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.