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2018-09-26ARM: tegra: apalis-tk1: shorten temperature-sensor nodeMarcel Ziswiler1-1/+1
Shorten temperature-sensor node to just temp-sensor as suggested in the binding documentation. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: get rid of fake clocks simple busMarcel Ziswiler1-11/+4
Get rid of the fake clocks simple bus and use node names as per the actual schematics. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: replace underscores in node names with dashesMarcel Ziswiler1-145/+145
As underscores in node names are not recommended replace them all where possible with dashes. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: drop module level model and compatibleMarcel Ziswiler1-4/+0
Drop model and compatible nodes from the module level device tree as they get overridden by the carrier board device tree anyway. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: reorder cpu dfll clock propertiesMarcel Ziswiler1-1/+1
Reorder CPU DFLL clock properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: enable emmc ddr52 modeMarcel Ziswiler1-0/+1
Add mmc-ddr-1_8v property enabling eMMC DDR52 mode. root@apalis-tk1-mainline:~# cat /sys/kernel/debug/mmc2/ios clock: 52000000 Hz actual clock: 52000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 8 (mmc DDR52) signal voltage: 1 (1.80 V) driver type: 0 (driver type B) root@apalis-tk1-mainline:~# hdparm -t /dev/mmcblk2 /dev/mmcblk2: Timing buffered disk reads: 256 MB in 3.02 seconds = 84.83 MB/sec Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: add proper emmc vmmc and vqmmc suppliesMarcel Ziswiler1-0/+2
Add proper eMMC vmmc and vqmmc supplies e.g. fixing signalling voltage. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: white-space clean-upMarcel Ziswiler1-3/+0
White-space clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: drop unused pinmux labelMarcel Ziswiler1-1/+1
Drop unused pinmux label. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: add missing regulatorsMarcel Ziswiler1-1/+13
Add missing regulators: - reg_module_3v3_audio being VDDA supply of SGTL5000 - VDDD supply of SGTL5000 actually being reg_1v8_vio - TMP451 temperature sensor vcc supply being reg_module_3v3 - usb3-0 vbus supply being reg_usbh_vbus - usb3-1 vbus supply being reg_usbo1_vbus - carrier board HDMI supply being reg_5v0 - carrier board sata target 5v supply being reg_5v0 - carrier board sata target 12v supply being reg_12v0 - carrier board reg_3v3 actually being backlight power supply Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: regulator clean-upMarcel Ziswiler1-50/+50
Just cosmetic regulator clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: reorder padctl propertiesMarcel Ziswiler1-11/+11
Reorder padctl properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: reorder host1x/hdmi propertiesMarcel Ziswiler1-2/+2
Reorder Host1x/HDMI properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis-tk1: add local-mac-address propertyMarcel Ziswiler1-0/+5
Add empty local-mac-address property to be filled in by boot loader (e.g. U-Boot). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09ARM: tegra: Fix unit_address_vs_reg DTC warnings for /memoryKrzysztof Kozlowski1-1/+1
Add a generic /memory node in each Tegra DTSI (with empty reg property, to be overidden by each DTS) and set proper unit address for /memory nodes to fix the DTC warnings: arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name The DTB after the change is the same as before except adding unit-address to /memory node. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-03ARM: tegra: apalis-tk1: Fix high speed UART compatibleMarcel Ziswiler1-3/+3
Turns out the compatible "nvidia,tegra124-hsuart" does not (yet) exist and everybody else also uses it only in conjunction with "nvidia,tegra30-hsuart". Reported-by: Martin Šafařík <msafarik@retia.cz> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Support v1.2 hardware revisionMarcel Ziswiler1-0/+2052
Support the V1.2 hardware revision with the following pin muxing changes: Ddc_scl_pv4 and ddc_sda_pv5 previously used as Apalis GPIO3 and GPIO4 are now used as DDC pins. Gen2_i2c_scl_pt5 and gen2_i2c_sda_pt6 previously used as DDC pins are now used as USB power enable signals. Usb_vbus_en0_pn4 and usb_vbus_en1_pn5 previously used as USB power enable signals are now used as GPIO3 and GPIO4. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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