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path: root/arch/arm/mach-at91/pm_slowclock.S (follow)
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2015-03-13ARM: at91/pm: rename file name: pm_slowclock.S --> pm_suspend.SWenyou Yang1-324/+0
2015-03-13ARM: at91/pm: standby mode uses same sram function as suspend to memory modeWenyou Yang1-1/+24
2015-03-13ARM: at91/pm_slowclock: create the procedure to handle the sdram self-refreshWenyou Yang1-105/+139
2015-03-13ARM: at91/pm_slowclock: remove clocks which are already stopped when entering slow clock modeSylvain Rochet1-31/+0
2015-03-13ARM: at91/pm_slowclock: remove the unused code related with SLOWDOWN_MASTER_CLOCKWenyou Yang1-37/+0
2015-03-11ARM: at91: pm_slowclock: fix the compilation errorWenyou Yang1-0/+2
2015-03-05ARM: at91/pm: MOR register KEY was missingPatrice Vilchez1-0/+2
2015-03-03pm: at91: Workaround DDRSDRC self-refresh bug with LPDDR1 memories.Peter Rosin1-5/+38
2015-03-03pm: at91: pm_slowclock: fix suspend/resume hang up in timeoutsSylvain Rochet1-29/+4
2015-01-26ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usageAlexandre Belloni1-9/+0
2013-12-02ARM: at91: move at91_pmc.h to include/linux/clk/at91_pmc.hBoris BREZILLON1-1/+1
2012-04-17ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core supportJean-Christophe PLAGNIOL-VILLARD1-1/+1
2012-02-23ARM: at91/PMC: make register base soc independentJean-Christophe PLAGNIOL-VILLARD1-19/+19
2012-02-23ARM: at91/pm_slowclock: add runtime detection of memory contollerJean-Christophe PLAGNIOL-VILLARD1-15/+51
2012-02-23ARM: at91: make sdram/ddr register base soc independentJean-Christophe PLAGNIOL-VILLARD1-9/+1
2012-02-23ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.hJean-Christophe PLAGNIOL-VILLARD1-1/+2
2012-02-23ARM: at91/pm_slowclock: function slow_clock() accepts parametersJean-Christophe PLAGNIOL-VILLARD1-32/+9
2012-02-23ARM: at91/pm_slowclock: rename register to named defineJean-Christophe PLAGNIOL-VILLARD1-86/+91
2012-02-03ARM: at91: code removal of CAP9 SoCJean-Christophe PLAGNIOL-VILLARD1-8/+4
2012-01-20ARM: at91: merge at91cap9_ddrsdr.h in at91sam9_ddrsdr.hJean-Christophe PLAGNIOL-VILLARD1-3/+2
2010-10-26AT91: pm: make sure that r0 is 0 when dealing with cache operationsNicolas Ferre1-0/+1
2010-07-09ARM: 6185/1: AT91: PM: dual ram controller supportNicolas Ferre1-20/+54
2010-04-14ARM: 5975/1: AT91 slow-clock suspend: don't wait when turning PLLs offAnders Larsen1-4/+0
2010-04-09ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lockAnders Larsen1-0/+12
2008-09-21[ARM] 5264/2: [AT91] Suspend-to-RAM disables main oscillatorAndrew Victor1-0/+283
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