Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2015-11-24 | ARM: tegra: Ensure entire dcache is flushed on entering LP0/1 | 1 | -0/+3 | |
2015-05-04 | ARM: tegra20: Store CPU "resettable" status in IRAM | 1 | -16/+21 | |
2014-07-18 | ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ | 1 | -12/+12 | |
2013-09-17 | ARM: tegra: move resume vector define to irammap.h | 1 | -2/+3 | |
2013-08-12 | ARM: tegra: add LP1 suspend support for Tegra20 | 1 | -0/+296 | |
2013-07-19 | ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL | 1 | -0/+1 | |
2013-04-29 | ARM: tegra: call cpu_do_idle from C code | 1 | -1/+1 | |
2013-01-28 | ARM: tegra20: cpuidle: apply coupled cpuidle for powered-down mode | 1 | -0/+53 | |
2013-01-28 | ARM: tegra20: cpuidle: add powered-down state for secondary CPU | 1 | -0/+147 | |
2013-01-28 | ARM: tegra: update the cache maintenance order for CPU shutdown | 1 | -3/+0 | |
2012-11-15 | ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX" | 1 | -0/+80 |