aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/proc-macros.S (follow)
AgeCommit message (Expand)AuthorFilesLines
2018-05-31ARM: bugs: add support for per-processor bug checkingRussell King1-1/+2
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2017-06-30ARM: Prepare for randomized task_structArnd Bergmann1-6/+4
2016-09-06ARM: 8606/1: V7M: introduce cache operationsVladimir Murzin1-0/+16
2015-04-14Merge branches 'misc', 'vdso' and 'fixes' into for-nextRussell King1-0/+24
2015-04-10ARM: proc-arm94*.S: fix setup functionRussell King1-0/+24
2015-03-28ARM: 8314/1: replace PROCINFO embedded branch with relative offsetArd Biesheuvel1-0/+4
2015-02-10arm: drop L_PTE_FILE and pte_file()-related helpersKirill A. Shutemov1-1/+1
2014-09-24ARM: mm: Fix ifdef around cpu_*_do_[suspend, resume] opsBartlomiej Zolnierkiewicz1-1/+1
2014-02-10ARM: 7954/1: mm: remove remaining domain support from ARMv6Will Deacon1-13/+6
2013-06-24ARM: 7773/1: PJ4B: Add support for errata 4742Gregory CLEMENT1-0/+5
2013-02-16ARM: 7649/1: mm: mm->context.id fix for big-endianBen Dooks1-0/+5
2012-11-09ARM: mm: introduce present, faulting entries for PAGE_NONEWill Deacon1-0/+4
2012-09-25ARM: mm: implement LoUIS API for cache maintenance opsLorenzo Pieralisi1-0/+1
2011-12-08ARM: LPAE: MMU setup for the 3-level page table formatCatalin Marinas1-2/+3
2011-07-21ARM: Fix build errors caused by adding generic macrosRussell King1-0/+5
2011-07-07ARM: mm: proc-macros: Add generic proc/cache/tlb struct definition macrosDave Martin1-0/+63
2011-03-31Fix common misspellingsLucas De Marchi1-1/+1
2011-01-06Merge branch 'pgt' (early part) into develRussell King1-15/+15
2011-01-06Merge branch 'misc' into develRussell King1-0/+7
2010-12-22ARM: pgtable: provide RDONLY page table bit rather than WRITE bitRussell King1-8/+8
2010-12-22ARM: pgtable: invert L_PTE_EXEC to L_PTE_XNRussell King1-3/+3
2010-12-22ARM: pgtable: switch order of Linux vs hardware page tablesRussell King1-5/+5
2010-12-12ARM: 6528/1: Use CTR for the I-cache line size on ARMv7Catalin Marinas1-0/+10
2010-12-12ARM: 6527/1: Use CTR instead of CCSIDR for the D-cache line size on ARMv7Catalin Marinas1-6/+6
2010-11-04ARM: 6384/1: Remove the domain switching on ARMv6k/v7 CPUsCatalin Marinas1-0/+7
2009-09-12Merge branch 'devel-stable' into develRussell King1-0/+2
2009-07-24nommu: Add #ifdef CONFIG_MMU around the PTE sanity checksCatalin Marinas1-0/+2
2009-07-11[ARM] remove L_PTE_BUFFERABLE and L_PTE_CACHEABLERussell King1-6/+0
2008-10-01[ARM] Remove MT_DEVICE_IXP2000 and associated definitionsRussell King1-1/+1
2008-10-01[ARM] Convert ARMv6 and ARMv7 to use new memory typesRussell King1-2/+28
2008-10-01[ARM] Convert set_pte_ext implementions to macrosRussell King1-0/+144
2007-05-08[ARM] armv7: add support for ARMv7 cores.Catalin Marinas1-0/+12
2006-06-29[ARM] nommu: provide a way for correct control register value selectionRussell King1-0/+10
2005-09-09kbuild: arm - use generic asm-offsets.h supportSam Ravnborg1-1/+1
2005-04-16Linux-2.6.12-rc2Linus Torvalds1-0/+51
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.