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2022-06-27arm64: dts: qcom: msm8998-yoshino: Add USB extconKonrad Dybcio1-0/+24
While not strictly necessary, at least on maple, configure the USB extcon, which requires two pins on Yoshino. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-5-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-yoshino-lilac: Disable LVS1Konrad Dybcio1-0/+4
It's disabled on downstream, follow it. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-4-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-laptops: Clean up DTsKonrad Dybcio3-14/+18
Reorder properties to match new laptop DTs, change hex to dec. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-3-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-clamshell: Clean up the DTKonrad Dybcio2-49/+73
Keep the nodes and includes in order, clean up unnecessary properties & nodes. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-2-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998*: Fix TLMM and pin nodesKonrad Dybcio5-71/+33
Remove the unnecessary level of indentation, commonize SDC2 pins and notice that SDCC2_CD_ON and _OFF is identical, deduplicate it! Also, remove some unnecessary overrides and use decimal values in #-cells Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-1-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: sdm845: Add camss vdda-pll-supplyBryan O'Donoghue1-0/+1
Add in the missing vdda-pll-supply rail description. Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220111125212.2343184-5-bryan.odonoghue@linaro.org
2022-06-27arm64: dts: qcom: sdm845: Rename camss vdda-supply to vdda-phy-supplyBryan O'Donoghue1-1/+1
The dts entry vdda-supply connects to a common vdda-phy-supply rail. Rename to reflect what the functionality is. Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220111125212.2343184-4-bryan.odonoghue@linaro.org
2022-06-27arm64: dts: qcom: timer should use only 32-bit sizeDavid Heidelberg9-99/+99
There's no reason the timer needs > 32-bits of address or size. Since we using 32-bit size, we need to define ranges properly. Fixes warnings as: ``` arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: timer@17c90000: #size-cells:0:0: 1 was expected From schema: Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml ``` Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220626105800.35586-1-david@ixit.cz
2022-06-27arm64: dts: qcom: align OPP table names with DT schemaKrzysztof Kozlowski11-44/+44
DT schema expects names of operating points tables to start with "opp-table": ipq6018-cp01-c1.dtb: cpu_opp_table: $nodename:0: 'cpu_opp_table' does not match '^opp-table(-[a-z0-9]+)?$' Use hyphens instead of underscores, fix the names to match DT schema or remove the prefix entirely when it is not needed. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220627093250.84391-1-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typoStephan Gerhold2-2/+2
"make dtbs_check" complains about the missing "-supply" suffix for vdd_lvs1_2 which is clearly a typo, originally introduced in the msm8994-smd-rpm.dtsi file and apparently later copied to msm8992-xiaomi-libra.dts: msm8992-lg-bullhead-rev-10/101.dtb: pm8994-regulators: 'vdd_lvs1_2' does not match any of the regexes: '.*-supply$', '^((s|l|lvs|5vs)[0-9]*)|(boost-bypass)|(bob)$', 'pinctrl-[0-9]+' From schema: regulator/qcom,smd-rpm-regulator.yaml msm8992-xiaomi-libra.dtb: pm8994-regulators: 'vdd_lvs1_2' does not match any of the regexes: '.*-supply$', '^((s|l|lvs|5vs)[0-9]*)|(boost-bypass)|(bob)$', 'pinctrl-[0-9]+' From schema: regulator/qcom,smd-rpm-regulator.yaml Reported-by: Rob Herring <robh@kernel.org> Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Fixes: f3b2c99e73be ("arm64: dts: Enable onboard SDHCI on msm8992") Fixes: 0f5cdb31e850 ("arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree") Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220627135938.2901871-1-stephan.gerhold@kernkonzept.com
2022-06-27arm64: dts: marvell: armada-3720: align lednode names with dtschemaKrzysztof Kozlowski1-1/+1
The node names should be generic and DT schema expects certain pattern with 'led'. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-12-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: marvell: align gpio-key node names with dtschemaKrzysztof Kozlowski2-3/+3
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-11-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: apm: Harmonize DWC USB3 DT nodes nameSerge Semin2-5/+5
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named despite of the warning comment about possible backward compatibility issues. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20220624141622.7149-6-Sergey.Semin@baikalelectronics.ru Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-27arm64: dts: freescale: Add phyBOARD-Polis-i.MX8MM supportTeresa Remmet3-0/+891
Add initial support for phyBOARD-Polis-i.MX8MM. Main features are: * Bluetooth and Wifi * CANFD * eMMC * i2c RTC * Ethernet * PCIe * RS232/RS485 * SD-Card * SPI-NOR flash * USB Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8m{m,p}-verdin: use IT temperaturesPhilippe Schenker2-0/+16
Use IT temperature threshold for critical/passive trip point on Verdin iMX8M Plus and Mini. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-icore-mx8mp-edim2.2: correct pad settingsPeng Fan1-20/+20
BIT3 and BIT0 are reserved bits, should not touch. Fixes: aec8ad34f7f2 ("arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc settingsPeng Fan1-8/+8
BIT3 and BIT0 are reserved bits, should not touch. Fixes: 88f7f6bcca37 ("arm64: dts: freescale: Add support for phyBOARD-Pollux-i.MX8MP") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-phyboard-pollux-rdk: correct eqos pad settingsPeng Fan1-14/+14
BIT3 and BIT0 are reserved bits, should not touch. Fixes: 6f96852619d5 ("arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-phyboard-pollux-rdk: correct uart pad settingsPeng Fan1-2/+2
BIT3 and BIT0 are reserved bits, should not touch. Fixes: 846f752866bd ("arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-venice-gw74xx: correct pad settingsPeng Fan1-58/+58
According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Should not set reserved bit. Fixes: 7899eb6cb15d ("arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-evk: correct I2C3 pad settingsPeng Fan1-2/+2
According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Although function is not broken, we should not set reserved bit. Fixes: 5e4a67ff7f69 ("arm64: dts: imx8mp-evk: Add i2c3 support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-evk: correct I2C1 pad settingsPeng Fan1-2/+2
According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Although function is not broken, we should not set reserved bit. Fixes: 5497bc2a2bff ("arm64: dts: imx8mp-evk: Add PMIC device") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-evk: correct I2C5 pad settingsPeng Fan1-2/+2
According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Although function is not broken, we should not set reserved bit. Fixes: 8134822db08d ("arm64: dts: imx8mp-evk: add support for I2C5") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-evk: correct vbus pad settingsPeng Fan1-15/+15
According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Not set reserved bit. Fixes: 9e847693c6f3 ("arm64: dts: freescale: Add i.MX8MP EVK board support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-evk: correct eqos pad settingsPeng Fan1-15/+15
According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Although function is not broken, we should not set reserved bit. Fixes: dc6d5dc89bad ("arm64: dts: imx8mp-evk: enable EQOS ethernet") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-evk: correct vbus pad settingsPeng Fan1-1/+1
0x19 is not a valid setting. According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Not set reserved bit. Fixes: 43da4f92a611 ("arm64: dts: imx8mp-evk: enable usb1 as host mode") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-evk: correct gpio-led pad settingsPeng Fan1-1/+1
0x19 is not a valid setting. According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Correct setting with PE PUE set, DSE set to 0. Fixes: 50d336b12f34 ("arm64: dts: imx8mp-evk: Add GPIO LED support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-evk: correct the uart2 pinctl valueSherry Sun1-2/+2
According to the IOMUXC_SW_PAD_CTL_PAD_UART2_RXD/TXD register define in imx8mp RM, bit0 and bit3 are reserved, and the uart2 rx/tx pin should enable the pull up, so need to set bit8 to 1. The original pinctl value 0x49 is incorrect and needs to be changed to 0x140, same as uart1 and uart3. Fixes: 9e847693c6f3 ("arm64: dts: freescale: Add i.MX8MP EVK board support") Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp-evk: correct mmc pad settingsPeng Fan1-4/+4
According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Not set reserved bit. Fixes: 9e847693c6f3 ("arm64: dts: freescale: Add i.MX8MP EVK board support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mn-evk: add bt-sco sound card supportShengjiu Wang1-0/+43
Add bt-sco sound card, which supports wb profile as default Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mq-evk: add bt-sco sound card supportShengjiu Wang1-0/+43
Add bt-sco sound card, which supports wb profile as default Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mm-evk: add bt-sco sound card supportShengjiu Wang1-0/+43
Add bt-sco sound card, which supports wb profile as default Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27arm64: dts: imx8mp: correct clock of pgc_ispdwpPeng Fan1-1/+1
The deprecated DIV clk is previously part of the ISP composite clk, but there is still one child clk(IMX8MP_CLK_MEDIA_ISP_ROOT) sourcing from IMX8MP_CLK_MEDIA_ISP( previously IMX8MP_CLK_MEDIA_ISP_DIV) So IMX8MP_CLK_MEDIA_ISP_ROOT should be used, not IMX8MP_CLK_MEDIA_ISP_DIV. Fixes: 9d89189d5227 ("arm64: dts: imx8mp: Add MEDIAMIX power domains") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-25arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss nodeDmitry Baryshkov1-1/+1
It was noticed that on sdm845 after an MDSS suspend/resume cycle the driver can not read HW_REV registers properly (they will return 0 instead). Chaning the "iface" clock from <&gcc GCC_DISP_AHB_CLK> to <&dispcc DISP_CC_MDSS_AHB_CLK> fixes the issue. Fixes: 08c2a076d18f ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220531124735.1165582-1-dmitry.baryshkov@linaro.org
2022-06-25arm64: dts: qcom: sm8250: Disable camcc by defaultVladimir Zapolskiy1-0/+1
At the moment there are no changes in SM8250 board files, which require camera clock controller to run, whenever it is needed for a particular board, the status of camcc device node will be changed in a board file. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220518091943.734478-1-vladimir.zapolskiy@linaro.org
2022-06-25arm64: dts: qcom: msm8996: add clocks to the MMCC device nodeDmitry Baryshkov1-0/+16
As we are converting this platform to use DT clock bindings, add clocks and clock-names properties to the MMCC device tree node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220617122922.769562-7-dmitry.baryshkov@linaro.org
2022-06-25arm64: dts: qcom: sm8450: add uart20 nodeDmitry Baryshkov1-0/+19
Add device tree node for uart20, which is typically used for Bluetooth attachment. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220502195133.275209-1-dmitry.baryshkov@linaro.org
2022-06-25arm64: dts: qcom: sc7280-qcard: Add ldo_l17b regulator nodeSrinivasa Rao Mandadapu1-0/+6
Add pm7325 ldo_l17b regulator, which is required for wcd codec vdd buck supply on sc7280-qcard board. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1650621734-10297-1-git-send-email-quic_srivasam@quicinc.com
2022-06-25arm64: dts: qcom: sc7280: Set SPI flash to 50 MHz for herobrine boardsDouglas Anderson1-0/+4
sc7280-herobrine based boards are specced to be able to access their SPI flash at 50 MHz with the drive strength of the pins set at 8. The drive strength is already set to 8 in "sc7280-herobrine.dtsi", so let's bump up the clock. The matching firmware change for this is at: https://review.coreboot.org/c/coreboot/+/63948 NOTE: the firmware change isn't _required_ to make the kernel work at 50 MHz, it merely shows that the boards are known to work fine at 50 MHz. ALSO NOTE: this doesn't update the "sc7280-chrome-common.dtsi" file which is used by both herobrine boards and IDP. At the moment the IDP boards aren't configuring a drive strength of 8 and it seems safer to just leave them at the slower speed if they're already working. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505161425.1.Icf6f3796d2fa122b4c0566d9317b461bfbc24b7f@changeid
2022-06-25arm64: dts: qcom: sc7280: Set modem FW path for Chrome OS boardsMatthias Kaehlcke1-0/+2
Specify the path of the modem FW for SC7280 Chrome OS boards in the 'remoteproc_mpss' node. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220510104656.1.Id98b473e08c950f9a461826dde187ef7705a928c@changeid
2022-06-25arm64: qcom: sc7280-herobrine: Enable DPDouglas Anderson1-0/+9
This enables DisplayPort for herobrine boards. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220513065704.1.I9b9b9d4d1a3e0350a89221892261881a1771ad15@changeid
2022-06-25arm64: dts: qcom: sc7180: Remove ipa_fw_mem node on trogdorStephen Boyd1-0/+1
We don't use this carveout on trogdor boards, and having it defined in the sc7180 SoC file causes an overlap message to be printed at boot. OF: reserved mem: OVERLAP DETECTED! memory@86000000 (0x0000000086000000--0x000000008ec00000) overlaps with memory@8b700000 (0x000000008b700000--0x000000008b710000) Delete the node in the trogdor dtsi file to fix the overlap problem and remove the error message. Cc: Alex Elder <elder@linaro.org> Cc: Matthias Kaehlcke <mka@chromium.org> Fixes: 310b266655a3 ("arm64: dts: qcom: sc7180: define ipa_fw_mem node") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Alex Elder <elder@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220517193307.3034602-1-swboyd@chromium.org
2022-06-25arm64: dts: qcom: sc7280: Enable wifi for Chrome OS boardsMatthias Kaehlcke2-11/+13
Enable the 'wifi' and 'remoteproc_wpss' nodes for all sc7280 based Chrome OS boards. Delete the corresponding entries from sc7280-idp.dtsi since this file includes sc7280-chrome-common.dtsi. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220518155252.1.I176d4254c79cfaafa38cbe36f066f02f819df9b6@changeid
2022-06-25arm64: dts: qcom: sc7280: Enable keyboard backlight for villagerMatthias Kaehlcke1-0/+4
Villager has a backlit keyboard, enable support for the backlight. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220523123157.v2.2.I3d1b5a109675a0cc90e66a4e0b45cb823edbdee7@changeid
2022-06-25arm64: dts: qcom: sc7280: herobrine: Don't disable the keyboard backlight nodeMatthias Kaehlcke1-2/+1
On herobrine boards the keyboard backlight is controlled through the PWM LED driver. Currently both the PWM LED node and the node for the keyboard backlight are disabled in sc7280-herobrine.dtsi, which requires boards with a backlit keyboard to enable both nodes. There are no other PWM LEDs on herobrine boards besides the keyboard backlight, delete the 'disabled' status from the keyboard backlight node, with that boards only have to enable the 'pwmleds' node for keyboard backlight support. Also add a label to the 'pwmleds' node to allow board files to refer to it with a phandle. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220523123157.v2.1.I47ec78581907f7ef024f10bc085f970abf01ec11@changeid
2022-06-25arm64: dts: qcom: sc7280: Add touchscreen to villagerDouglas Anderson4-1/+47
This adds the touchscreen to the sc7280-herobrine-villager device tree. Note that the touchscreen on villager actually uses the reset line and thus we use the more specific "elan,ekth6915" compatible which allows us to specify the reset. The fact that villager's touchscreen uses the reset line can be contrasted against the touchscreen for CRD/herobrine-r1. On those boards, even though the touchscreen goes to the display, it's not hooked up to anything there. In order to keep the line parked on herobrine/CRD, we'll move the pullup from the qcard.dtsi file to the specific boards. This allows us to disable the pullup in the villager device tree since the pin is an output. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220524134840.1.I80072b8815ac08c12af8f379a33cc2d83693dc51@changeid
2022-06-25arm64: dts: qcom: sm8450 add ITS device tree nodeDmitry Baryshkov1-0/+10
Add device tree node corresponding to the ITS part of GICv3. Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220502192604.272686-1-dmitry.baryshkov@linaro.org
2022-06-25arm64: dts: qcom: msm8994: Fix CPU6/7 reg valuesKonrad Dybcio1-2/+2
CPU6 and CPU7 were mistakengly pointing to CPU5 reg. Fix it. Fixes: 02d8091bbca0 ("arm64: dts: qcom: msm8994: Add a proper CPU map") Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220501184016.64138-1-konrad.dybcio@somainline.org
2022-06-25arm64: dts: qcom: sc7280-herobrine: Add lpi pinmux properties for CRD 3.0/3.1Srinivasa Rao Mandadapu1-0/+61
Add LPASS LPI pinctrl properties, which are required for Audio functionality on herobrine based platforms of rev5+ (aka CRD 3.0/3.1) boards. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1655108645-1517-5-git-send-email-quic_srivasam@quicinc.com
2022-06-25arm64: dts: qcom: sc7280: add lpass lpi pin controller nodeSrinivasa Rao Mandadapu2-0/+154
Add LPASS LPI pinctrl node required for Audio functionality on sc7280 based platforms. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1655108645-1517-4-git-send-email-quic_srivasam@quicinc.com
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