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2015-07-30arm64: cmpxchg: truncate sub-word signed types before comparisonWill Deacon1-4/+4
2015-07-30arm64: alternative: put secondary CPUs into polling loop during patchWill Deacon1-1/+2
2015-07-29arm64: lse: fix lse cmpxchg code indentationWill Deacon1-3/+3
2015-07-29arm64: remove dead-code depending on CONFIG_UP_LATE_INITJonas Rabenstein1-2/+0
2015-07-28arm64: pgtable: fix definition of pte_validWill Deacon1-1/+1
2015-07-28arm64: spinlock: fix ll/sc unlock on big-endian systemsWill Deacon1-1/+1
2015-07-28arm64: Use last level TLBI for user pte changesCatalin Marinas2-6/+22
2015-07-28arm64: Clean up __flush_tlb(_kernel)_range functionsCatalin Marinas1-26/+21
2015-07-27arm64: debug: rename enum debug_el to avoid symbol collisionWill Deacon1-3/+3
2015-07-27arm64: lse: rename ARM64_CPU_FEAT_LSE_ATOMICS for consistencyWill Deacon2-3/+3
2015-07-27arm64: atomic64_dec_if_positive: fix incorrect branch conditionWill Deacon2-2/+2
2015-07-27arm64: atomics: implement atomic{,64}_cmpxchg using cmpxchgWill Deacon3-89/+2
2015-07-27arm64: atomics: prefetch the destination word for write prior to stxrWill Deacon3-0/+19
2015-07-27arm64: atomics: tidy up common atomic{,64}_* macrosWill Deacon1-57/+38
2015-07-27arm64: cmpxchg: avoid memory barrier on comparison failureWill Deacon1-26/+22
2015-07-27arm64: cmpxchg: avoid "cc" clobber in ll/sc routinesWill Deacon2-10/+8
2015-07-27arm64: cmpxchg_dbl: patch in lse instructions when supported by the CPUWill Deacon3-51/+94
2015-07-27arm64: cmpxchg: patch in lse instructions when supported by the CPUWill Deacon4-66/+98
2015-07-27arm64: xchg: patch in lse instructions when supported by the CPUWill Deacon1-5/+33
2015-07-27arm64: bitops: patch in lse instructions when supported by the CPUWill Deacon1-2/+21
2015-07-27arm64: locks: patch in lse instructions when supported by the CPUWill Deacon1-29/+108
2015-07-27arm64: atomics: patch in lse instructions when supported by the CPUWill Deacon4-109/+313
2015-07-27arm64: introduce CONFIG_ARM64_LSE_ATOMICS as fallback to ll/sc atomicsWill Deacon3-2/+196
2015-07-27arm64: alternatives: add cpu feature for lse atomicsWill Deacon1-1/+2
2015-07-27arm64: elf: advertise 8.1 atomic instructions as new hwcapWill Deacon1-0/+1
2015-07-27arm64: atomics: move ll/sc atomics into separate header fileWill Deacon2-174/+221
2015-07-27arm64: cpufeature.h: add missing #include of kernel.hWill Deacon1-0/+2
2015-07-27arm64: rwlocks: don't fail trylock purely due to contentionWill Deacon1-6/+8
2015-07-27Merge branch 'locking/arch-atomic' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into aarch64/for-next/coreWill Deacon1-0/+14
2015-07-27atomic: Provide atomic_{or,xor,and}Peter Zijlstra1-1/+0
2015-07-27arm64: Provide atomic_{or,xor,and}Peter Zijlstra1-0/+15
2015-07-27arm64: include linux/types.h in asm/spinlock_types.hWill Deacon1-0/+2
2015-07-27arm64/BUG: Use BRK instruction for generic BUG trapsDave P Martin2-0/+66
2015-07-27arm64/debug: Add missing #includesDave P Martin2-0/+5
2015-07-27arm64/debug: Simplify BRK insn opcode declarationsDave P Martin1-19/+4
2015-07-27arm64/debug: Move BRK ESR template macro into <asm/esr.h>Dave P Martin2-7/+7
2015-07-27arm64/debug: More consistent naming for the BRK ESR template macroDave P Martin1-2/+3
2015-07-27arm64/debug: Eliminate magic number from ESR template definitionDave P Martin1-1/+3
2015-07-27arm64/debug: Mask off all reserved bits from generated ESR valuesDave P Martin1-1/+1
2015-07-27arm64/debug: Eliminate magic number for size of BRK instructionDave P Martin1-1/+3
2015-07-27arm64: alternatives: add enable parameter to conditional asm macrosWill Deacon1-3/+9
2015-07-27arm64: kernel: Add support for Privileged Access NeverJames Morse6-1/+32
2015-07-27arm64: Generalise msr_s/mrs_s operationsSuzuki K. Poulose1-5/+15
2015-07-27arm64: kernel: Add optional CONFIG_ parameter to ALTERNATIVE()James Morse1-3/+25
2015-07-27arm64: kernel: Add min_field_value and use '>=' for feature detectionJames Morse1-2/+2
2015-07-27arm64: kernel: Add cpufeature 'enable' callbackJames Morse1-0/+1
2015-07-27arm64: kernel: Move config_sctlr_el1James Morse2-3/+12
2015-07-27arm64: alternative: Provide if/else/endif assembler macrosDaniel Thompson1-0/+41
2015-07-27arm64: kernel: Add cpuid_feature_extract_field() for 4bit sign extensionJames Morse1-0/+7
2015-07-27arm64: hugetlb: remove paragraph about writing to FSFJisheng Zhang1-4/+0
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