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path: root/arch/arm64/kernel/cpuinfo.c (follow)
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2019-04-23arm64: Expose SVE2 features for userspaceDave Martin1-0/+6
2019-04-16arm64: Expose DC CVADP to userspaceAndrew Murray1-0/+1
2019-04-16arm64: HWCAP: add support for AT_HWCAP2Andrew Murray1-1/+1
2018-12-13arm64: add basic pointer authentication supportMark Rutland1-0/+2
2018-12-06arm64: Add support for SB barrier and patch in over DSB; ISB sequencesWill Deacon1-0/+1
2018-10-16arm64: cpufeature: Fix handling of CTR_EL0.IDC fieldSuzuki K Poulose1-1/+9
2018-09-14arm64: cpufeature: Detect SSBS and advertise to userspaceWill Deacon1-0/+1
2018-03-19arm64: Expose Arm v8.4 featuresSuzuki K Poulose1-0/+4
2018-01-05arm64: v8.4: Support for new floating point multiplication instructionsDongjiu Geng1-0/+1
2017-11-03arm64/sve: Detect SVE and activate runtime supportDave Martin1-0/+1
2017-11-03arm64/sve: Probe SVE capabilities and usable vector lengthsDave Martin1-0/+6
2017-10-11arm64: Expose support for optional ARMv8-A featuresSuzuki K Poulose1-0/+5
2017-08-09arm64: Expose DC CVAP to userspaceRobin Murphy1-0/+1
2017-06-30arm64: cpuinfo: constify attribute_group structures.Arvind Yadav1-1/+1
2017-03-20arm64: v8.3: Support for weaker release consistencySuzuki K Poulose1-0/+1
2017-03-20arm64: v8.3: Support for complex number instructionsSuzuki K Poulose1-0/+1
2017-03-20arm64: v8.3: Support for Javascript conversion instructionSuzuki K Poulose1-0/+1
2017-03-20arm64: cache: Identify VPIPT I-cachesWill Deacon1-0/+4
2017-03-20arm64: cache: Merge cachetype.h into cache.hWill Deacon1-1/+1
2017-03-20arm64: cache: Remove support for ASID-tagged VIVT I-cachesWill Deacon1-6/+3
2017-03-20arm64: cpuinfo: remove I-cache VIPT aliasing detectionWill Deacon1-13/+10
2017-01-12arm64: Advertise support for Rounding double multiply instructionsSuzuki K Poulose1-0/+1
2017-01-12arm64: cpufeature: Expose CPUID registers by emulationSuzuki K Poulose1-0/+1
2016-12-02arm64/cpuinfo: Convert to hotplug state machineAnna-Maria Gleixner1-28/+9
2016-12-02arm64/cpuinfo: Make hotplug notifier symmetricAnna-Maria Gleixner1-1/+2
2016-09-09arm64: Rearrange CPU errata workaround checksSuzuki K Poulose1-2/+0
2016-09-09arm64: Use consistent naming for errata handlingSuzuki K Poulose1-1/+1
2016-07-12arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfsSteve Capper1-0/+120
2016-05-31arm64: Provide "model name" in /proc/cpuinfo for PER_LINUX32 tasksCatalin Marinas1-1/+7
2016-05-11arm64: cpuinfo: Missing NULL terminator in compat_hwcap_strJulien Grall1-1/+2
2016-04-20arm64: cpufeature: Check availability of AArch32Suzuki K Poulose1-17/+20
2016-03-04arm64: make mrs_s prefixing implicit in read_cpuidMark Rutland1-28/+28
2016-02-26arm64: Add support for Half precision floating pointSuzuki K Poulose1-0/+2
2016-02-18arm64: add ARMv8.2 id_aa64mmfr2 boiler plateJames Morse1-0/+1
2016-02-18arm64: cpufeature: Change read_cpuid() to use sysreg's mrs_s macroJames Morse1-27/+27
2015-11-19arm64: restore bogomips information in /proc/cpuinfoYang Shi1-0/+5
2015-10-21arm64: Constify hwcap name string arraysDave Martin1-3/+3
2015-10-21arm64: Delay cpu feature capability checksSuzuki K. Poulose1-1/+0
2015-10-21arm64: Consolidate CPU Sanity check to CPU Feature infrastructureSuzuki K. Poulose1-112/+1
2015-10-21arm64: Keep track of CPU feature registersSuzuki K. Poulose1-1/+2
2015-10-21arm64: Move /proc/cpuinfo handling codeSuzuki K. Poulose1-0/+124
2015-10-21arm64: Move mixed endian support detectionSuzuki K. Poulose1-21/+0
2015-03-30arm64: Extract feature parsing code from cpu_errata.cMarc Zyngier1-0/+1
2015-01-23arm64: Track system support for mixed endian EL0Suzuki K. Poulose1-0/+22
2015-01-15arm64: kernel: add support for cpu cache informationSudeep Holla1-12/+0
2015-01-07arm64: sanity checks: add missing AArch32 registersMark Rutland1-0/+10
2014-11-25arm64: sanity checks: add ID_AA64DFR{0,1}_EL1Mark Rutland1-0/+11
2014-11-25arm64: sanity checks: add missing newline to printMark Rutland1-1/+1
2014-11-25arm64: sanity checks: ignore ID_MMFR0.AuxRegMark Rutland1-1/+6
2014-11-25arm64: detect silicon revisions and set cap bits accordinglyAndre Przywara1-0/+3
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