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2017-05-09arm64: entry: improve data abort handling of tagged pointersKristina Martsenko1-2/+3
2017-01-19arm64: avoid returning from bad_modeMark Rutland1-1/+1
2016-12-26arm64: don't pull uaccess.h into *.SAl Viro1-1/+1
2016-12-24Replace <asm/uaccess.h> with <linux/uaccess.h> globallyLinus Torvalds1-1/+1
2016-11-21arm64: Disable TTBR0_EL1 during normal kernel executionCatalin Marinas1-0/+63
2016-11-21arm64: Introduce uaccess_{disable,enable} functionality based on TTBR0_EL1Catalin Marinas1-4/+0
2016-11-11arm64: split thread_info from task stackMark Rutland1-21/+20
2016-11-11arm64: assembler: introduce ldr_this_cpuMark Rutland1-1/+1
2016-09-12arm64: use alternative auto-nopMark Rutland1-8/+2
2016-09-01arm64: kernel: do not need to reset UAO on exception entryVladimir Murzin1-1/+1
2016-08-22arm64: factor work_pending state machine to CChris Metcalf1-8/+4
2016-08-12arm64: Handle el1 synchronous instruction aborts cleanlyLaura Abbott1-0/+7
2016-07-27Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxLinus Torvalds1-2/+15
2016-07-21Merge branch 'for-next/kprobes' into for-next/coreCatalin Marinas1-0/+3
2016-07-19arm64: Treat all entry code as non-kprobe-ablePratyush Anand1-0/+3
2016-07-07arm64: kernel: Save and restore UAO and addr_limit on exception entryJames Morse1-2/+17
2016-07-01arm64: trap userspace "dc cvau" cache operation on errata-affected coreAndre Przywara1-1/+11
2016-06-21arm64: kill ESR_LNX_EXECMark Rutland1-1/+1
2016-03-21arm64/kernel: fix incorrect EL0 check in inv_entry macroArd Biesheuvel1-1/+1
2016-01-06arm64: entry: remove pointless SPSR mode checkMark Rutland1-4/+0
2015-12-21arm64: remove irq_count and do_softirq_own_stack()James Morse1-9/+10
2015-12-15arm64: reduce stack use in irq_handlerJames Morse1-5/+7
2015-12-10arm64: don't call C code with el0's fp registerJames Morse1-0/+2
2015-12-10arm64: Add this_cpu_ptr() assembler macro for use in entry.SJames Morse1-3/+1
2015-12-09arm64: irq: fix walking from irq stack to task stackWill Deacon1-1/+1
2015-12-08arm64: Add do_softirq_own_stack() and enable irq_stacksJames Morse1-2/+40
2015-12-08arm64: Store struct thread_info in sp_el0Jungseok Lee1-3/+12
2015-12-04arm64: Add trace_hardirqs_off annotation in ret_to_userCatalin Marinas1-0/+3
2015-10-16arm64: AArch32 user space PC alignment exceptionMark Salyzyn1-0/+2
2015-08-21arm64: entry: always restore x0 from the stack on syscall returnWill Deacon1-11/+6
2015-07-27arm64: kernel: Adopt new alternative assembler macrosDaniel Thompson1-16/+13
2015-07-22arm64: switch_to: calculate cpu context pointer using separate registerWill Deacon1-2/+3
2015-07-08arm64: entry: handle debug exceptions in el*_invMark Rutland1-2/+2
2015-06-17arm64: entry: fix context tracking for el0_sp_pcMark Rutland1-0/+1
2015-06-08arm64: fix missing syscall trace exitJosh Stone1-1/+6
2015-06-05arm64: alternative: Merge alternative-asm.h into alternative.hMarc Zyngier1-1/+1
2015-06-05arm64: Rework alternate sequence for ARM erratum 845719Marc Zyngier1-12/+15
2015-04-01arm64: errata: add workaround for cortex-a53 erratum #845719Will Deacon1-0/+20
2015-01-27arm64: Implement the compat_sys_call_table in CCatalin Marinas1-1/+1
2015-01-15arm64: move to ESR_ELx macrosMark Rutland1-32/+32
2014-11-28arm64: ptrace: allow tracer to skip a system callAKASHI Takahiro1-2/+10
2014-11-25arm64: Treat handle_arch_irq as a function pointerLaura Abbott1-4/+2
2014-11-14arm64: entry: use ldp/stp instead of push/pop when saving/restoring regsWill Deacon1-38/+37
2014-11-14arm64: entry: avoid writing lr explicitly for constructing return pathsWill Deacon1-20/+25
2014-09-23arm64: debug: don't re-enable debug exceptions on return from el1_dbgWill Deacon1-1/+0
2014-07-10arm64: Add __NR_* definitions for compat syscallsCatalin Marinas1-1/+0
2014-07-10arm64: enable context trackingLarry Bassel1-0/+36
2014-07-10arm64: adjust el0_sync so that a function can be calledLarry Bassel1-6/+13
2014-06-18arm64: Bug fix in stack alignment exceptionChiaHao1-1/+0
2014-05-16Merge tag 'for-3.16' of git://git.linaro.org/people/ard.biesheuvel/linux-arm into upstreamCatalin Marinas1-1/+1