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2022-07-05ARM: dts: lan966x: Add UDPHS supportHerve Codina1-0/+11
Add UDPHS (the USB High Speed Device Port controller) support. The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS IP. This IP is also the same as the one present in the SAMA5D3 SOC. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220704102845.168438-4-herve.codina@bootlin.com
2022-07-05ARM: dts: stm32: add optee reserved memory on stm32mp135f-dkGabriel Fernandez1-0/+11
Add the static OP-TEE reserved memory regions. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: add RCC on STM32MP13x SoC familyGabriel Fernandez4-79/+47
Enables Reset and Clocks Controller on STM32MP13 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP13Gabriel Fernandez1-0/+38
Enable optee and SCMI clocks support. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: correct vcc-supply for eeprom on stm32mp15xx-osd32Leonard Göhrs1-7/+1
According to the OSD32MP1 Power System overview[1] the EEPROM is connected to the VDD line and not to some single-purpose fixed regulator. Set the EEPROM supply according to the diagram to eliminate this parent-less regulator. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: fix missing internally connected voltage regulator for OSD32MP1Leonard Göhrs1-0/+1
According to the OSD32MP1 Power System overview[1] ldo3's input is always internally connected to vdd_ddr. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: adjust whitespace around '=' on MCU boardsKrzysztof Kozlowski5-18/+18
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSIMarek Vasut2-2/+7
The Buck3 on DHCOR is used to supply IO voltage. It can output either 3V3 in the default DHCOR configuration, or 2V9 in case of AV96 DHCOR variant which has extra Empirion DCDC converter in front of the 1V8 IO supply, or outright 1V8 in case of 1V8 IO DHCOR without the Empirion DCDC converter. The 2V9 mode in case of AV96 DHCOR variant is used to reduce unnecessarily high input voltage to the Empirion DCDC converter, so move it into matching DTSI to stop confusing users. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151Fabien Dessenne1-4/+3
The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so remove the unsupported "wakeup" one. Note that the EXTI interrupt 61 has two roles : it is hierarchically linked to the GIC IPCC "rx" interrupt, and it acts as a wakeup source. Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.Kavyasree Kotagiri1-14/+4
On pcb8291, Flexcom3 usart has only tx and rx pins. Cleaningup usart3 pinctrl settings. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220704135809.6952-1-kavyasree.kotagiri@microchip.com
2022-07-05ARM: shmobile: rcar-gen2: Increase refcount for new referenceLiang He1-1/+4
In rcar_gen2_regulator_quirk(), for_each_matching_node_and_match() will automatically increase and decrease the refcount. However, we should call of_node_get() for the new reference created in 'quirk->np'. Besides, we also should call of_node_put() before the 'quirk' being freed. Signed-off-by: Liang He <windhl@126.com> Link: https://lore.kernel.org/r/20220701121804.234223-1-windhl@126.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05ARM: dts: imx6qdl-ts7970: Fix ngpio typo and countKris Bahnsen1-1/+1
Device-tree incorrectly used "ngpio" which caused the driver to fallback to 32 ngpios. This platform has 62 GPIO registers. Fixes: 9ff8e9fccef9 ("ARM: dts: TS-7970: add basic device tree") Signed-off-by: Kris Bahnsen <kris@embeddedTS.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-05ARM: dts: layerscape: Add SFP node for TA 2.1 devicesSean Anderson1-0/+7
This adds an appropriate SFP node for Trust Architecture 2.1 devices. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-05ARM: dts: ux500: Drop unused i2c power domain supplyLinus Walleij1-5/+0
This regulator supply is replaced by the proper power domain. Reported-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220701225339.814962-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-04Merge tag 'omap-for-v5.20/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/socArnd Bergmann4-3/+9
SoC changes omaps for v5.20 merge window SoC changes omaps mostly for missing of_node_put() calls and cosmetic Kconfig changes. These can be all merged when suitable, there is no urgent need to merge this as fixes. * tag 'omap-for-v5.20/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Kconfig: Fix indentation ARM: OMAP2+: Fix refcount leak in omap3xxx_prm_late_init ARM: OMAP2+: pdata-quirks: Fix refcount leak bug ARM: OMAP2+: display: Fix refcount leak bug ARM: OMAP2+: Fix refcount leak in omapdss_init_of Link: https://lore.kernel.org/r/pull-1656918583-2801@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-04Merge tag 'omap-for-v5.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dtArnd Bergmann1-0/+4
Devicetree changes omaps for v5.20 merge window Just one devicetree change to add EEPROM regulator for BeagleBone Black. * tag 'omap-for-v5.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am33xx: Map baseboard EEPROM on BeagleBone Black Link: https://lore.kernel.org/r/pull-1656918942-515224@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-04Merge tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/fixesArnd Bergmann6-3/+71
STM32 DT fixes for v5.19, round 2 Highlights: ----------- -Fixes STM32MP15: - Add missing usbh clock and fix clk order for usbh to avoid PLL issue. - Fix SCMI version: use scmi regulator and update missing SCMI clocks to be able to correcly boot. * tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15 ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board ARM: dts: stm32: use the correct clock source for CEC on stm32mp151 ARM: dts: stm32: fix pwr regulators references to use scmi Link: https://lore.kernel.org/r/1259e082-a3a4-96a5-ec9c-05dbb893a746@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-04ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15Fabrice Gasnier1-2/+2
The USBH composed of EHCI and OHCI controllers needs the PHY clock to be initialized first, before enabling (gating) them. The reverse is also required when going to suspend. So, add USBPHY clock as 1st entry in both controllers, so the USBPHY PLL gets enabled 1st upon controller init. Upon suspend/resume, this also makes the clock to be disabled/re-enabled in the correct order. This fixes some IRQ storm conditions seen when going to low-power, due to PHY PLL being disabled before all clocks are cleanly gated. Fixes: 949a0c0dec85 ("ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c") Fixes: db7be2cb87ae ("ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMIGabriel Fernandez1-0/+6
Delete the node fixed clock managed by secure world with SCMI. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 boardGabriel Fernandez2-0/+8
LSE clock is provided by SCMI. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: stm32: use the correct clock source for CEC on stm32mp151Gabriel Fernandez1-1/+1
The peripheral clock of CEC is not LSE but CEC. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: stm32: fix pwr regulators references to use scmiEtienne Carriere3-0/+54
Fixes stm32mp15*-scmi DTS files introduced in [1] to also access PWR regulators through SCMI service. This is needed since enabling secure only access to RCC clock and reset controllers also enables secure access only on PWR voltage regulators reg11, reg18 and usb33 hence these must also be accessed through SCMI Voltage Domain protocol. This change applies on commit [2] that already corrects issues from commit [1]. Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Link: [1] https://lore.kernel.org/linux-arm-kernel/20220422150952.20587-7-alexandre.torgue@foss.st.com Link: [2] https://lore.kernel.org/linux-arm-kernel/20220613071920.5463-1-alexandre.torgue@foss.st.com Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: lan966x: Add mcan1 node.Kavyasree Kotagiri1-0/+15
Add the mcan1 node. By default, keep it disabled. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220627110552.26315-1-kavyasree.kotagiri@microchip.com
2022-07-04ARM: dts: am33xx: Fix MMCHS0 dma propertiesYuTong Chang1-2/+1
According to technical manual(table 11-24), the DMA of MMCHS0 should be direct mapped. Fixes: b5e509066074 ("ARM: DTS: am33xx: Use the new DT bindings for the eDMA3") Signed-off-by: YuTong Chang <mtwget@gmail.com> Message-Id: <20220620124146.5330-1-mtwget@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-07-04ARM: dts: at91: sama7g5: add reset-controller nodeClaudiu Beznea1-0/+7
Add reset controller node. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220610092414.1816571-10-claudiu.beznea@microchip.com
2022-07-04ARM: dts: at91: use generic name for reset controllerClaudiu Beznea11-11/+11
Use generic name for reset controller of AT91 devices to comply with DT specifications. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220610092414.1816571-2-claudiu.beznea@microchip.com
2022-07-04ARM: dts: at91: sama5d2: fix compilation warningClaudiu Beznea5-2/+8
Fix the following compilation warning: arch/arm/boot/dts/sama5d2.dtsi:371.29-382.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/ethernet@f8008000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property also defined at arch/arm/boot/dts/at91-sama5d2_icp.dts:353.8-363.3 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220615080633.1881196-2-claudiu.beznea@microchip.com
2022-07-04ARM: dts: at91: sama5d2: fix compilation warningClaudiu Beznea1-10/+10
Fix the following compilation warning: Warning (simple_bus_reg): /ahb/apb/resistive-touch: missing or empty reg/ranges property Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220615080633.1881196-1-claudiu.beznea@microchip.com
2022-07-02ARM: dts: qcom: Fix sdhci node names - use 'mmc@'Bhupesh Sharma6-11/+11
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'sdhci@' convention used for specifying the sdhci nodes. The generic mmc bindings expect 'mmc@' format instead. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> [bjorn: Extracted from combined arm64 patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
2022-07-01Merge tag 'samsung-soc-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/socArnd Bergmann4-30/+28
Samsung mach/soc changes for v5.20 1. Use preferred strscpy() over strlcpy(). 2. Kconfig indentation cleanup. * tag 'samsung-soc-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: s3c: Kconfig.s3c64xx: Fix indentation ARM: s3c: Kconfig.s3c24xx: Fix indentation and replace some tabs ARM: s3c: Kconfig: Fix indentation ARM: s3c: Use strscpy to replace strlcpy Link: https://lore.kernel.org/r/20220624080746.31947-3-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01Merge tag 'amlogic-arm-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/fixesArnd Bergmann1-0/+2
Amlogic ARM mach-meson changes for v5.20: - Fix refcount leak in meson_smp_prepare_cpus * tag 'amlogic-arm-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: ARM: meson: Fix refcount leak in meson_smp_prepare_cpus Link: https://lore.kernel.org/r/cbf6bcb5-c7be-40fe-4436-4578c9d6c532@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01Merge tag 'renesas-arm-defconfig-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfigArnd Bergmann1-1/+3
Renesas ARM defconfig updates for v5.20 - Enable support for the Renesas R-Car V4H SoC, - Refresh shmobile_defconfig for v5.19-rc1. * tag 'renesas-arm-defconfig-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: defconfig: Enable R8A779G0 SoC ARM: shmobile: defconfig: Refresh for v5.19-rc1 Link: https://lore.kernel.org/r/cover.1656069632.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01Merge tag 'amlogic-arm-dt-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dtArnd Bergmann3-4/+4
Amlogic ARM DT changes for v5.20: - adjust whitespace around '=' in ARM meson DT * tag 'amlogic-arm-dt-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: ARM: dts: meson: adjust whitespace around '=' Link: https://lore.kernel.org/r/51034acd-13db-5c25-7b9f-ff87537406bd@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01Merge tag 'dt-cleanup-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dtArnd Bergmann37-171/+170
Cleanup of ARM DTS for v5.20 Series of cleanups for ARM DTS: 1. White-spaces, gpio-key subnode names, USB DWC3/EHCI node names, 2. Add board-level compatibles to Aspeed evaluation boards. * tag 'dt-cleanup-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: stih407-family: Harmonize DWC USB3 DT nodes name ARM: dts: lpc18xx: Harmonize EHCI/OHCI DT nodes name ARM: dts: ast2600-evb-a1: fix board compatible ARM: dts: ast2600-evb: fix board compatible ARM: dts: ast2500-evb: fix board compatible ARM: dts: animeo: correct gpio-keys properties ARM: dts: animeo: align gpio-key node names with dtschema ARM: dts: sd: adjust whitespace around '=' ARM: dts: sti: adjust whitespace around '=' ARM: dts: ste: adjust whitespace around '=' ARM: dts: nuvoton: adjust whitespace around '=' ARM: dts: lpc: adjust whitespace around '=' ARM: dts: ecx: adjust whitespace around '=' ARM: dts: alpine: adjust whitespace around '=' ARM: dts: spear: adjust whitespace around '=' ARM: dts: axm: adjust whitespace around '=' ARM: dts: at91: adjust whitespace around '=' ARM: dts: aspeed: adjust whitespace around '=' ARM: dts: pxa: adjust whitespace around '=' Link: https://lore.kernel.org/r/20220627082842.50508-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01Merge tag 'socfpga_dts_updates_for_v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dtArnd Bergmann4-41/+109
SoCFPGA dts updates for v5.20 - Clean up the Mercury++ AA1 dts - Add support the Google Chameleon v3 board - Add defined GIC interrupt type for Agilex ECC - Fix coding style around Stratix10 QSPI dts entry - Add support for Stratix10 SW Virtual platform - Move clocks entry out of the Stratix10 soc node * tag 'socfpga_dts_updates_for_v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: altera: socfpga_stratix10: move clocks out of soc node arm64: dts: Add support for Stratix 10 Software Virtual Platform dt-bindings: altera: document Stratix 10 SWVP compatibles arm64: dts: altera: adjust whitespace around '=' arm64: dts: intel: socfpga_agilex: use defined GIC interrupt type for ECC dt-bindings: altera: Add Chameleon v3 board ARM: dts: socfpga: Add Google Chameleon v3 devicetree ARM: dts: socfpga: Add atsha204a node to Mercury+ AA1 dts ARM: dts: socfpga: Move sdmmc-ecc node to Arria 10 dts ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi Link: https://lore.kernel.org/r/20220626004437.1224820-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01Merge tag 'renesas-arm-dt-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dtArnd Bergmann2-2/+6
Renesas ARM DT updates for v5.20 - ADC and SPI support for the RZ/G2UL Soc and the RZ/G2UL SMARC EVK development board, - Ethernet support for the RZ/V2M SoC and the RZV2MEVK2 development board, - Thermal, IOMMU, Universal Flash Storage, octal Cortex-A55, and full serial support for the R-Car S4-8 SoC on the Spider development board, - RTC support for the RZN1D-DB board, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits) ARM: dts: rza2mevb: Fix LED node names arm64: dts: renesas: Fix thermal-sensors on single-zone sensors arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector arm64: dts: renesas: r8a779f0: Add SCIF nodes arm64: dts: renesas: r8a779f0: Add HSCIF nodes arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3 arm64: dts: renesas: Add missing space after remote-endpoint arm64: dts: renesas: rzg2ul-smarc-som: Enable ADC on SMARC platform arm64: dts: renesas: rzg2ul-smarc: Enable RSPI1 on carrier board arm64: dts: renesas: r8a779f0: Add CPU core clocks arm64: dts: renesas: r8a779f0: Add CPUIdle support arm64: dts: renesas: r8a779f0: Add secondary CA55 CPU cores arm64: dts: renesas: r8a779f0: Add L3 cache controller arm64: dts: renesas: r8a779a0: Add CPU0 core clock arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values ARM: dts: r9a06g032-rzn1d400-db: Enable rtc0 arm64: dts: renesas: rzg2l-smarc: Use proper bool operator arm64: dts: renesas: r8a779f0: Add UFS node arm64: dts: renesas: r8a779f0: Add iommus to DMAC nodes arm64: dts: renesas: r8a779f0: Add IPMMU nodes ... Link: https://lore.kernel.org/r/cover.1656069634.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01Merge tag 'samsung-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dtArnd Bergmann40-514/+738
Samsung DTS ARM changes for v5.20 1. Add display panel and backlight to P4 Note family (Samsung Galaxy Note 10.1). 2. DTS cleanup: white-spaces, node names, LED color/function. 3. Switch to DTS-local header for pinctrl register values instead of bindings header. The bindings header is being deprecated because it does not reflect the purpose of bindings. * tag 'samsung-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: add function and color to LED nodes in Odroid XU/XU3 ARM: dts: exynos: add function and color to LED node in Odroid XU4 ARM: dts: exynos: add function and color to LED node in Odroid HC1 ARM: dts: exynos: add function and color to LED nodes in Odroid X/X2 ARM: dts: exynos: add function and color to LED node in Odroid U3 ARM: dts: exynos: add function and color to LED nodes in Itop Elite ARM: dts: exynos: add function to LED nodes in Tiny4412 ARM: dts: exynos: add function to LED node in Origen 4210 ARM: dts: exynos: add function and color to aat1290 flash LED node in Galaxy S3 ARM: dts: exynos: align aat1290 flash LED node with bindings in Galaxy S3 ARM: dts: s5pv210: align gpio-key node names with dtschema ARM: dts: exynos: align gpio-key node names with dtschema ARM: dts: exynos: use local header for pinctrl register values ARM: dts: s5pv210: use local header for pinctrl register values ARM: dts: s3c64xx: use local header for pinctrl register values ARM: dts: s3c2410: use local header for pinctrl register values ARM: dts: exynos: align MMC node name with dtschema ARM: dts: exynos: adjust whitespace around '=' ARM: dts: exynos: add panel and backlight to p4note Link: https://lore.kernel.org/r/20220624080746.31947-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01Merge tag 'imx-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixesArnd Bergmann2-3/+2
i.MX fixes for 5.19, round 2: - Fix the SDIO description for imx7d-smegw01 board to ensure there is no communication made at 1.8V. - Fix pgc_ispdwp power-domain clock, which should be IMX8MP_CLK_MEDIA_ISP_ROOT. - Re-enable framebuffer support in mxs_defconfig to fix a Kconfig regression. - A series from Peng Fan (and Sherry Sun) fixing various pads on i.MX8MP based boards to leave reserved bits untouched. * tag 'imx-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx8mp-icore-mx8mp-edim2.2: correct pad settings arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc settings arm64: dts: imx8mp-phyboard-pollux-rdk: correct eqos pad settings arm64: dts: imx8mp-phyboard-pollux-rdk: correct uart pad settings arm64: dts: imx8mp-venice-gw74xx: correct pad settings arm64: dts: imx8mp-evk: correct I2C3 pad settings arm64: dts: imx8mp-evk: correct I2C1 pad settings arm64: dts: imx8mp-evk: correct I2C5 pad settings arm64: dts: imx8mp-evk: correct vbus pad settings arm64: dts: imx8mp-evk: correct eqos pad settings arm64: dts: imx8mp-evk: correct vbus pad settings arm64: dts: imx8mp-evk: correct gpio-led pad settings arm64: dts: imx8mp-evk: correct the uart2 pinctl value arm64: dts: imx8mp-evk: correct mmc pad settings ARM: mxs_defconfig: Enable the framebuffer arm64: dts: imx8mp: correct clock of pgc_ispdwp ARM: dts: imx7d-smegw01: Fix the SDIO description Link: https://lore.kernel.org/r/20220629021244.GL819983@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01Merge tag 'at91-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixesArnd Bergmann3-11/+10
AT91 fixes for 5.19 It contains 3 SoC fixes and 2 DT fixes: SoC: - fix the wakeup from RTC and RTT for ULP1 mode - fix section mismatch warning - fix SAM9X60 SiP detection DT: - fixes the EEPROMs compatibles for sama5d2_icp and sam9x60ek and EEPROM size for sam9x60ek * tag 'at91-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: Mark at91_pm_secure_init as __init ARM: at91: fix soc detection for SAM9X60 SiPs ARM: dts: at91: sama5d2_icp: fix eeprom compatibles ARM: dts: at91: sam9x60ek: fix eeprom compatible and size ARM: at91: pm: use proper compatibles for sama7g5's rtc and rtt ARM: at91: pm: use proper compatibles for sam9x60's rtc and rtt ARM: at91: pm: use proper compatible for sama5d2's rtc Link: https://lore.kernel.org/r/20220628135130.3114878-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01ARM: davinci: Delete DM646x board filesLinus Walleij4-1618/+0
The interest of maintaining the DaVinci DM644x board files seems very low. Patches to convert the EVM board to use GPIO descriptors has not been reviewed, tested or merged for several merge windows in a row, see link below. When I look in the logs for the board files I see nothing but generic kernel maintenance and no testing on real hardware for years. I conclude the DM646x board files are unused and can be deleted. Cc: Kevin Hilman <khilman@baylibre.com> Cc: Arnd Bergmann <arnd@kernel.org> Cc: Matt Porter <mporter@konsulko.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Link: https://lore.kernel.org/linux-arm-kernel/20220507124536.171930-2-linus.walleij@linaro.org/ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-01ARM: davinci: Delete DM644x board filesLinus Walleij6-2113/+0
The interest of maintaining the DaVinci DM644x board files seems very low. Patches to convert the EVM board to use GPIO descriptors has not been reviewed, tested or merged for several merge windows in a row, see link below. When I look in the logs for the board files I see nothing but generic kernel maintenance and no testing on real hardware for years. I conclude the DM644x board files are unused and can be deleted. Cc: Arnd Bergmann <arnd@kernel.org> Cc: Matt Porter <mporter@konsulko.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Link: https://lore.kernel.org/linux-arm-kernel/20220507124536.171930-1-linus.walleij@linaro.org/ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-01xen/arm: Fix race in RB-tree based P2M accountingOleksandr Tyshchenko1-2/+4
During the PV driver life cycle the mappings are added to the RB-tree by set_foreign_p2m_mapping(), which is called from gnttab_map_refs() and are removed by clear_foreign_p2m_mapping() which is called from gnttab_unmap_refs(). As both functions end up calling __set_phys_to_machine_multi() which updates the RB-tree, this function can be called concurrently. There is already a "p2m_lock" to protect against concurrent accesses, but the problem is that the first read of "phys_to_mach.rb_node" in __set_phys_to_machine_multi() is not covered by it, so this might lead to the incorrect mappings update (removing in our case) in RB-tree. In my environment the related issue happens rarely and only when PV net backend is running, the xen_add_phys_to_mach_entry() claims that it cannot add new pfn <-> mfn mapping to the tree since it is already exists which results in a failure when mapping foreign pages. But there might be other bad consequences related to the non-protected root reads such use-after-free, etc. While at it, also fix the similar usage in __pfn_to_mfn(), so initialize "struct rb_node *n" with the "p2m_lock" held in both functions to avoid possible bad consequences. This is CVE-2022-33744 / XSA-406. Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Signed-off-by: Juergen Gross <jgross@suse.com>
2022-06-30ARM: dts: qcom: apq8064: drop phy-names from HDMI device nodeDmitry Baryshkov1-1/+0
The HDMI driver doesn't use the phy-names to identify the PHY. Different Qualcomm platforms have used different names for the PHY. So, we are deprecating phy-names propertty of the HDMI device and dropping them from existing DTs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220609122350.3157529-14-dmitry.baryshkov@linaro.org
2022-06-30ARM: dts: qcom: apq8064-ifc6410: drop hdmi-mux-supplyDmitry Baryshkov1-1/+0
The HDMI circuitry on the IFC6410 is not powered by the 3v3. Drop the hdmi-mux-supply property. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220609122350.3157529-5-dmitry.baryshkov@linaro.org
2022-06-30ARM: dts: qcom: pm8841: add required thermal-sensor-cellsKrzysztof Kozlowski1-0/+1
The PM8841 temperature sensor has to define thermal-sensor-cells. Fixes: dab8134ca072 ("ARM: dts: qcom: Add PM8841 functions device nodes") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220608112702.80873-2-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: msm8974: add required ranges to OCMEMKrzysztof Kozlowski1-0/+1
The OCMEM bindings require ranges property. Fixes: a2cc991ed634 ("ARM: dts: qcom: msm8974: add ocmem node") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Tested-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-7-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: sdx55: add dedicated IMEM and syscon compatiblesKrzysztof Kozlowski1-1/+1
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-6-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: msm8974: add dedicated IMEM compatibleKrzysztof Kozlowski1-1/+1
syscon compatible must be preceded with a specific compatible, to accurately describe the device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-5-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: apq8064-asus-nexus7: add dedicated IMEM compatibleKrzysztof Kozlowski1-1/+1
syscon compatible must be preceded with a specific compatible, to accurately describe the device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-4-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: use generic sram as name for imem and ocmem nodesKrzysztof Kozlowski3-4/+4
According to Devicetree specification, the device nodes should be generic, reflecting the function of the device. The typical name for memory regions is "sram". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-3-krzysztof.kozlowski@linaro.org
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