Age | Commit message (Expand) | Author | Files | Lines |
2015-02-20 | MIPS: Add set/clear CP0 macros for PageGrain register | ![](https://seccdn.libravatar.org/avatar/f4838e553e20c040c11f9b2c818501b2?s=13&d=retro) Steven J. Hill | 1 | -1/+1 |
2015-02-19 | Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/linux into mips-for-linux-next | ![](https://seccdn.libravatar.org/avatar/091e52bf20dead91ded99470048602a5?s=13&d=retro) Ralf Baechle | 21 | -195/+3334 |
2015-02-19 | MIPS: Export MSA functions used by lose_fpu(1) for KVM | ![](https://seccdn.libravatar.org/avatar/7a0f6e863728e469eccde1dba075730f?s=13&d=retro) James Hogan | 1 | -0/+4 |
2015-02-19 | MIPS: Export FP functions used by lose_fpu(1) for KVM | ![](https://seccdn.libravatar.org/avatar/7a0f6e863728e469eccde1dba075730f?s=13&d=retro) James Hogan | 1 | -0/+6 |
2015-02-17 | MIPS: kernel: elf: Improve the overall ABI and FPU mode checks | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -115/+188 |
2015-02-17 | MIPS: kernel: process: Do not allow FR=0 on MIPS R6 | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+4 |
2015-02-17 | MIPS: Make use of the ERETNC instruction on MIPS R6 | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 3 | -0/+21 |
2015-02-17 | MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6 | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 4 | -1/+2407 |
2015-02-17 | MIPS: Add LLB bit and related feature for the Config 5 CP0 register | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+2 |
2015-02-17 | MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+10 |
2015-02-17 | MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+8 |
2015-02-17 | MIPS: Emulate the new MIPS R6 BALC instruction | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+10 |
2015-02-17 | MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -1/+5 |
2015-02-17 | MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+11 |
2015-02-17 | MIPS: Emulate the new MIPS R6 branch compact (BC) instruction | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+9 |
2015-02-17 | MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+22 |
2015-02-17 | MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+31 |
2015-02-17 | MIPS: Emulate the BC1{EQ,NE}Z FPU instructions | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -29/+72 |
2015-02-17 | MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6 | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -7/+63 |
2015-02-17 | MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6 | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -2/+9 |
2015-02-17 | MIPS: kernel: syscall: Set the appropriate ISA level for MIPS R6 | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -1/+1 |
2015-02-17 | MIPS: kernel: unaligned: Add support for the MIPS R6 | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 1 | -4/+386 |
2015-02-17 | MIPS: kernel: cps-vec: Replace "addi" with "addiu" | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -8/+8 |
2015-02-17 | MIPS: kernel: genex: Set correct ISA level | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -1/+1 |
2015-02-17 | MIPS: kernel: r4k_fpu: Add support for MIPS R6 | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 1 | -3/+9 |
2015-02-17 | MIPS: kernel: r4k_switch: Add support for MIPS R6 | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 1 | -6/+8 |
2015-02-17 | MIPS: kernel: traps: Add MIPS R6 related definitions | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 1 | -5/+5 |
2015-02-17 | MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -1/+7 |
2015-02-17 | MIPS: kernel: entry.S: Add MIPS R6 related definitions | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -2/+3 |
2015-02-17 | MIPS: kernel: cpu-probe.c: Add support for MIPS R6 | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 1 | -4/+16 |
2015-02-17 | MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 1 | -1/+1 |
2015-02-17 | MIPS: kernel: cpu-bugs64: Do not check R6 cores for existing 64-bit bugs | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 1 | -4/+7 |
2015-02-17 | MIPS: asm: spram: Add new symbol for MIPS scratch pad storage | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -1/+1 |
2015-02-17 | MIPS: Use generic checksum functions for MIPS R6 | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+2 |
2015-02-16 | MIPS: Add MIPS generic QEMU probe support | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 1 | -0/+5 |
2015-02-16 | MIPS: Add cases for CPU_QEMU_GENERIC | ![](https://seccdn.libravatar.org/avatar/eceae9cfa9c92a51e7ac67e8053df4bf?s=13&d=retro) Leonid Yegoshin | 3 | -0/+3 |
2015-02-16 | MIPS: HTW: Prevent accidental HTW start due to nested htw_{start, stop} | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -1/+3 |
2015-02-16 | MIPS: Makefile: Move the ASEs checks after setting the core's CFLAGS | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 0 | -0/+0 |
2015-02-12 | MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS | ![](https://seccdn.libravatar.org/avatar/ec5f5fa43144b7e199c834d792506d8d?s=13&d=retro) Paul Burton | 2 | -0/+111 |
2015-02-05 | MIPS: cevt-r4k: Drop GIC special case | ![](https://seccdn.libravatar.org/avatar/7a0f6e863728e469eccde1dba075730f?s=13&d=retro) James Hogan | 1 | -5/+1 |
2014-12-12 | MIPS: Use phys_addr_t instead of phys_t | ![](https://seccdn.libravatar.org/avatar/688f7c4335e77ae8a1f9bac924d10a45?s=13&d=retro) Jaedon Shin | 1 | -1/+1 |
2014-12-11 | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus | ![](https://seccdn.libravatar.org/avatar/fb47627bc8c0bcdb36321edfbf02e916?s=13&d=retro) Linus Torvalds | 26 | -700/+550 |
2014-11-24 | MIPS: Replace use of phys_t with phys_addr_t. | ![](https://seccdn.libravatar.org/avatar/091e52bf20dead91ded99470048602a5?s=13&d=retro) Ralf Baechle | 3 | -13/+13 |
2014-11-24 | MIPS: Enable VDSO randomization | ![](https://seccdn.libravatar.org/avatar/0e43c11863f94582e9ddf494675e07bc?s=13&d=retro) Prem Karat | 1 | -1/+14 |
2014-11-24 | MIPS: Apply `.insn' to fixup labels throughout | ![](https://seccdn.libravatar.org/avatar/acbbc030cd7bf82de0cca0da1eddaa9f?s=13&d=retro) Maciej W. Rozycki | 1 | -0/+2 |
2014-11-24 | MIPS: signal.c: Fix an invalid cast in ISA mode bit handling | ![](https://seccdn.libravatar.org/avatar/acbbc030cd7bf82de0cca0da1eddaa9f?s=13&d=retro) Maciej W. Rozycki | 1 | -1/+1 |
2014-11-24 | MIPS: traps: Dump the PageGrain and Wired registers on MC | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+2 |
2014-11-24 | MIPS: traps: Dump the HTW registers on a MC exception | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -0/+5 |
2014-11-24 | MIPS: traps: Replace printk with pr_err for MC exceptions | ![](https://seccdn.libravatar.org/avatar/adedf3640b1b436a98304333dfd9668d?s=13&d=retro) Markos Chandras | 1 | -6/+6 |
2014-11-24 | clocksource: mips-gic: Combine with GIC clockevent driver | ![](https://seccdn.libravatar.org/avatar/3f77a960627e5eceb1cee1f7258f78e2?s=13&d=retro) Andrew Bresticker | 2 | -104/+0 |