aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/mips-boards (follow)
AgeCommit message (Collapse)AuthorFilesLines
2007-12-14[MIPS] Atlas, Malta: Don't free firmware memory on free_initmem.Ralf Baechle1-0/+2
A proper fix for this needs to turn a few MIPS-generic bits which I don't want at this stage. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-09[MIPS] Don't byteswap writes to display when running bigendianChris Dearman1-2/+2
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Replace plat_timer_setup with modern APIs.Ralf Baechle1-30/+22
plat_timer_setup is no longer getting called. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22[MIPS] Malta: Delete dead code.Ralf Baechle1-13/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] checkfiles: Fix "need space after that ','" errors.Ralf Baechle3-3/+3
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle10-48/+48
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] i8253 PIT clocksource and clockevent driversRalf Baechle1-0/+4
Derived from the i386 variant with a few x86 complexities chopped off. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Dyntick support for SMTC:Ralf Baechle1-1/+0
The kernel currently only supports broadcasting of the timer interrupt from a single timer, not multicasting into two multicast groups of processors. So the implemented mechanism for SMTC works by broadcasting the cp0 compare interrupt on VPE 0 and ignoring it on any additional VPEs. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Implement clockevents for R4000-style cp0 count/compare interruptRalf Baechle1-16/+10
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers.Ralf Baechle1-107/+5
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Deforest the function pointer jungle in the time code.Ralf Baechle4-14/+2
Hard to follow who is pointing what to where and why so it's simply getting in the way of the time code renovation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] IRQ Affinity Support for SMTC on Malta PlatformKevin D. Kissell1-0/+50
Signed-off-by: Kevin D. Kissell <kevink@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-09-14[MIPS] Malta: Fix off by one bug in interrupt handler.Ralf Baechle1-1/+1
Fairly cosmetic as it would only affect VSMP / SMTC kernels that don't use vectored interrupts. Found by Beth. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27[MIPS] MIPSsim: Delete old file that survived moving around in the tree.Ralf Baechle1-88/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27[MIPS] Malta: Include <linux/irq.h for cp0_compare_irq / cp0_perfcount_irq.Ralf Baechle1-0/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27[MIPS] SMP: Scatter __cpuinit over the code as needed.Ralf Baechle1-3/+3
MIPS doesn't do CPU hotplugging yet but since many of the functions don't even have an __init let's fix this right. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27[MIPS] SMTC: Fix secondary VPE interrupt mask initialization.Ralf Baechle1-4/+5
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31[MIPS] Use -Werror on subdirectories which build cleanly.Ralf Baechle4-0/+8
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31[MIPS] Fix modpost warning.Ralf Baechle1-1/+1
WARNING: vmlinux.o(.text+0x1718): Section mismatch: reference to .init.text:mipsmt_build_cpu_map (between 'plat_smp_setup' and 'prom_init_secondary') Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31[MIPS] MTI: Add CoreFPGA4 ID.Chris Dearman2-0/+2
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31[MIPS] SMTC: Safety net for i8259A interrupts.Kevin D. Kissell1-0/+12
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31[MIPS] SMTC: smtc_timer_broadcast ignores its arguments, make it void.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-18serial: add early_serial_setup() back to header fileYinghai Lu2-0/+2
early_serial_setup was removed from serial.h, but forgot to put in serial_8250.h Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-10[MIPS] Put an end to <asm/serial.h>'s long and annyoing existenceRalf Baechle2-1/+67
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] MIPSsim: Move code away from the other MIPS Inc. BSP code.Ralf Baechle8-664/+0
It shares no code at all. While at it also fix up the beginning bitrot. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-20[MIPS] Don't drag a platform specific header into generic arch code.Ralf Baechle7-52/+34
For some platforms it's definitions may conflict. So that's the one-liner. The rest is 10 square kilometers of collateral damage fixup this include used to paper over. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14[MIPS] Fix builds where MSC01E_xxx is undefined.Chris Dearman1-1/+4
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14[MIPS] Separate performance counter interruptsChris Dearman1-25/+93
Support for performance counter overflow interrupt that is on a separate interrupt from the timer. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14[MIPS] Malta: Fix for SOCitSC based MaltasChris Dearman4-61/+67
And an attempt to tidy up the core/controller differences. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] SMTC: Fix build error caused by nonsense code.Chris Dearman1-14/+2
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] Atlas: Fix build.Ralf Baechle1-3/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06[MIPS] Atlas, Malta, SEAD: Remove scroll from interrupt handler.Ralf Baechle5-29/+36
Aside of being handy for debugging this has never been a particularly good idea but is now getting in the way of dyntick / tickless kernels and general cleanups. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11[MIPS] MT: Reenable EIC support and add support for SOCit SC.Chris Dearman1-8/+13
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-04-28MIPSnet: Modernize use platform_device API.Ralf Baechle2-1/+37
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-27[MIPS] Malta: Delete unused prototype of mips_timer_interrupt.Ralf Baechle1-2/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-04-27[MIPS] MIPS Tech: Get rid of volatile in core code.Ralf Baechle4-13/+13
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-04-27[MIPS] merge GT64111 PCI routines and GT64120 PCI_0 routinesYoichi Yuasa1-2/+2
This patch has merged GT64111 PCI routines and GT64120 PCI_0 routines. GT64111 PCI is almost the same as GT64120's PCI_0. This patch don't change GT64120 PCI routines. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-19[MIPS] mips-boards: More liberal check for mips-board consoleThiemo Seufer1-1/+1
Allows overriding the MALTA/ATLAS/etc. default console setting with non-serial console devices. Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-07[MIPS] SMTC: De-obscure Malta hooks.Ralf Baechle2-27/+6
Should now be understandable why the thing works ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-07[MIPS] Atlas, Malta: Fix build warning.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-04[MIPS] Fix and cleanup the mess that a dozen prom_printf variants are.Ralf Baechle8-65/+29
early_printk is a so much saner thing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-04[MIPS] No need to write c0_compare in plat_timer_setupAtsushi Nemoto2-6/+0
If R4k counter was used for hpt_timer and interrupt source, c0_hpt_timer_init() initializes the c0_compare register. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-26[MIPS] Kill redundant EXTRA_AFLAGSAtsushi Nemoto1-2/+0
Many Makefiles in arch/mips have EXTRA_AFLAGS := $(CFLAGS) line. This is redundant while AFLAGS contains $(cflags-y) and any options only listed in CFLAGS (not in cflags-y) should be unnecessary for asm sources. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06[MIPS] Use ARRAY_SIZE macro when appropriateAhmed S. Darwish2-4/+6
Signed-off-by: Ahmed S. Darwish <darwish.07@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06[MIPS] use name instead of typename for each irq_chipAtsushi Nemoto1-1/+1
The "typename" field was obsoleted by the "name" field. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06[MIPS] prom_free_prom_memory cleanupAtsushi Nemoto2-27/+7
Current prom_free_prom_memory() implementations are almost same as free_init_pages(), or no-op. Make free_init_pages() extern (again) and make prom_free_prom_memory() use it. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06[MIPS] Define MIPS_CPU_IRQ_BASE in generic headerAtsushi Nemoto4-7/+5
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-30[MIPS] Fix typo of "CONFIG_MT_SMP".Robert P. J. Day1-1/+1
Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-30[PATCH] Malta: Fix build if CONFIG_MTD is diabled.Jan Altenberg1-1/+2
Signed-off-by: Jan Altenberg <jan@linutronix.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-08[MIPS] Fix build errors on SEADAtsushi Nemoto2-4/+9
Quick and dirty fix for build errors on SEAD. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.