aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/mm/c-r4k.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2009-06-17MIPS: Support 64-byte D-cache line sizeKevin Cernekee1-0/+12
2009-05-14MIPS: Print the actual detected I-cache associativity on bootup.Ralf Baechle1-1/+1
2009-03-30MIPS: Alchemy: unify CPU model constants.Manuel Lauss1-12/+5
2009-03-23MIPS: VR5500: Enable prefetchShinya Kuribayashi1-1/+1
2009-01-30MIPS: Avoid destructive invalidation on partial cachelines.Ralf Baechle1-1/+21
2008-09-05[MIPS] Fix WARNING: at kernel/smp.c:290Thomas Bogendoerfer1-6/+12
2008-06-26smp_call_function: get rid of the unused nonatomic/retry argumentJens Axboe1-9/+9
2008-06-16[MIPS] Fix buggy use of kmap_coherent.Ralf Baechle1-2/+5
2008-06-16[MIPS] Fix build for PNX platforms.Ralf Baechle1-0/+26
2008-04-28[MIPS] Add support for MIPS CMP platform.Ralf Baechle1-6/+37
2008-04-28[MIPS] Allow setting of the cache attribute at run time.Chris Dearman1-1/+18
2008-04-07[MIPS] Handle aliases in vmalloc correctly.Ralf Baechle1-0/+14
2008-03-12[MIPS] Fix loads of section missmatchesRalf Baechle1-15/+15
2008-02-19[MIPS] Handle I-cache coherency in flush_cache_range()Ralf Baechle1-3/+6
2008-02-03arch/mips/: Spelling fixesJoe Perches1-1/+1
2008-01-29[MIPS] Alchemy: Au1210/Au1250 CPU supportManuel Lauss1-0/+2
2008-01-29[MIPS] Use real cache invalidateThomas Bogendoerfer1-2/+2
2008-01-29[MIPS] Remove useless S-cache flushes.Ralf Baechle1-9/+0
2008-01-29[MIPS] Use pte_present instead of open coded test for _PAGE_PRESENT.Ralf Baechle1-1/+1
2007-11-15[MIPS] Sibyte: resurrect old cache hack.Ralf Baechle1-1/+6
2007-10-29[MIPS] MT: Fix bug in multithreaded kernels.Ralf Baechle1-3/+18
2007-10-16[MIPS] Cache: Provide more information on cache policy on bootup.Ralf Baechle1-3/+7
2007-10-11[MIPS] checkfiles: Fix "need space after that ','" errors.Ralf Baechle1-4/+4
2007-10-11[MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle1-6/+6
2007-10-11[MIPS] Avoid indexed cacheops.Ralf Baechle1-46/+28
2007-10-11[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle1-4/+18
2007-07-31[MIPS] Replace use of stext with _stext.Ralf Baechle1-2/+2
2007-07-10[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2Fuxin Zhang1-0/+54
2006-11-30[MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.Ralf Baechle1-3/+7
2006-11-30[MIPS] Remove redundant r4k_blast_icache() callsAtsushi Nemoto1-8/+4
2006-10-01[MIPS] Remove __flush_icache_pageAtsushi Nemoto1-77/+0
2006-09-27[MIPS] c-r4k: Convert init functions from inline to __init.Ralf Baechle1-10/+10
2006-09-27[MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache.Atsushi Nemoto1-2/+2
2006-09-27[MIPS] Retire flush_icache_page from mm use.Ralf Baechle1-1/+1
2006-09-27[MIPS] c-r4k: Typo fix.Ralf Baechle1-1/+1
2006-07-13[MIPS] vr41xx: Replace magic number for P4K bit with symbol.Yoichi Yuasa1-1/+1
2006-07-13[MIPS] vr41xx: Changed workaround to recommended methodYoichi Yuasa1-4/+3
2006-07-13[MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.Yoichi Yuasa1-1/+3
2006-07-13[MIPS] Use the proper technical term for naming some of the cache macros.Ralf Baechle1-4/+4
2006-06-30Remove obsolete #include <linux/config.h>Jörn Engel1-1/+0
2006-06-29[MIPS] 74K: Assume it will also have an AR bit in config7Ralf Baechle1-0/+1
2006-06-29[MIPS] Treat CPUs with AR bit as physically indexed.Ralf Baechle1-3/+8
2006-06-29[MIPS] Fix handling of 0 length I & D caches.Chris Dearman1-23/+41
2006-06-29[MIPS] MIPS32/MIPS64 secondary cache managementChris Dearman1-5/+18
2006-06-06[MIPS] Save write-only Config.OD from being clobberedSergei Shtylyov1-0/+34
2006-06-01[MIPS] Treat R14000 like R10000.Kumba1-0/+4
2006-06-01[MIPS] Fix deadlock on MP with cache aliases.Ralf Baechle1-9/+30
2006-06-01[MIPS] Add missing 34K processor IDsNigel Stephens1-0/+1
2006-04-19[MIPS] Use __ffs() instead of ffs() for waybit calculation.Atsushi Nemoto1-8/+8
2006-04-19[MIPS] Handle IDE PIO cache aliases on SMP.Ralf Baechle1-0/+1