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2014-05-14MIPS: mm: Fix broken microMIPS kernel regression.Steven J. Hill2-4/+7
2014-04-18mips: export flush_icache_rangeKees Cook1-2/+2
2014-03-31MIPS: Loongson: Add basic Loongson-3 CPU supportHuacai Chen3-2/+63
2014-03-31MIPS: Use current_cpu_type() instead of c->cputypeWu Zhangjin1-1/+1
2014-03-26MIPS: Add support for the M5150 processorLeonid Yegoshin2-0/+2
2014-03-26MIPS: Extend DMA_MAYBE_COHERENT logic to DMA_NONCOHERENT useManuel Lauss2-5/+5
2014-03-26MIPS: mm: c-r4k: Flush scache to avoid cache aliasesLeonid Yegoshin1-0/+11
2014-03-26MIPS: mm: c-r4k: Add support for flushing user pages from cacheMarkos Chandras1-2/+4
2014-03-26MIPS: mm: c-r4k: Build EVA {d,i}cache flushing functionsLeonid Yegoshin1-0/+47
2014-03-26MIPS: mm: init: Add free_init_pages() callback for EVAMarkos Chandras1-1/+11
2014-03-26MIPS: Add cases for CPU_P5600James Hogan3-0/+3
2014-03-26MIPS: Coherent Processing System SMP implementationPaul Burton1-1/+1
2014-03-06MIPS: Add 1074K CPU support explicitly.Steven J. Hill3-1/+4
2014-03-06MIPS: mm: c-r4k: Detect instruction cache aliasesMarkos Chandras1-3/+8
2014-01-30Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds17-38/+55
2014-01-24mips: delete non-required instances of include <linux/init.h>Paul Gortmaker12-12/+0
2014-01-22MIPS: improve checks for noncoherent DMAFelix Fietkau1-0/+2
2014-01-22MIPS: Add support for interAptiv coresLeonid Yegoshin2-0/+2
2014-01-22MIPS: Add support for FTLBsLeonid Yegoshin1-7/+22
2014-01-22MIPS: mm: Use the TLBINVF instruction to flush the VTLBLeonid Yegoshin1-6/+12
2014-01-22MIPS: Add support for the proAptiv coresLeonid Yegoshin3-0/+3
2014-01-22MIPS: mm: Move UNIQUE_ENTRYHI macro to a header fileMarkos Chandras2-8/+1
2014-01-22MIPS: mm: c-r4k: Panic if IL or DL fields have a reserved valueMarkos Chandras1-8/+16
2014-01-15MIPS: fix blast_icache32 on loongson2Aaro Koskinen1-0/+7
2014-01-15MIPS: fix case mismatch in local_r4k_flush_icache_range()Huacai Chen1-2/+2
2013-11-12Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds1-3/+2
2013-10-29MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over arch/mips.Ralf Baechle3-119/+139
2013-10-29MIPS: mm: Use scratch for PGD when !CONFIG_MIPS_PGD_C0_CONTEXTJayachandran C2-35/+57
2013-10-29MIPS: Remove unnecessary platform dma helper functionsFelix Fietkau1-3/+1
2013-10-29MIPS: Move definition of SMP processor id register to header fileJayachandran C1-50/+6
2013-10-09Merge tag 'v3.12-rc4' into sched/coreIngo Molnar7-27/+48
2013-10-02MIPS: Fix forgotten preempt_enable() when CPU has inclusive pcachesYoichi Yuasa1-0/+2
2013-09-25MIPS: mm: Move some checks out of 'for' loop in DMA operationsJayachandran C1-8/+4
2013-09-25sched: Extract the basic add/sub preempt_count modifiersPeter Zijlstra1-3/+2
2013-09-18MIPS: 74K/1074K: Correct erratum workaround.Maciej W. Rozycki1-8/+18
2013-09-18MIPS: Cleanup CP0 PRId and CP1 FPIR register access masksMaciej W. Rozycki1-5/+6
2013-09-17MIPS: Optimize current_cpu_type() for better code.Ralf Baechle7-10/+17
2013-09-17MIPS: Fix accessing to per-cpu data when flushing the cacheRalf Baechle1-0/+5
2013-09-12Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds6-8/+32
2013-09-12arch: mm: pass userspace fault flag to generic fault handlerJohannes Weiner1-2/+4
2013-09-12arch: mm: do not invoke OOM killer on kernel fault OOMJohannes Weiner1-0/+2
2013-09-11mm: migrate: check movability of hugepage in unmap_and_move_huge_page()Naoya Horiguchi1-0/+5
2013-09-06Merge branch '3.11-fixes' into mips-for-linux-nextRalf Baechle1-3/+3
2013-09-06MIPS: DMA: Fix BUG due to smp_processor_id() in preemptible codeJerin Jacob1-2/+2
2013-09-05Merge branch '3.11-fixes' into mips-for-linux-nextRalf Baechle1-0/+1
2013-09-05MIPS: Export copy_from_user_page() (needed by lustre)Geert Uytterhoeven1-0/+1
2013-09-04Merge branch '3.11-fixes' into mips-for-linux-nextRalf Baechle1-1/+2
2013-09-04MIPS: DMA: For BMIPS5000 cores flush region just like non-coherent R10000Jim Quinlan1-6/+10
2013-08-26MIPS: OCTEON: Set L1 cache parameters for OCTEON3 CPUs.David Daney1-0/+14
2013-08-26MIPS: Generate OCTEON3 TLB handlers with the same features as OCTEON2.David Daney1-0/+2