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path: root/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi (follow)
AgeCommit message (Expand)AuthorFilesLines
2014-11-07powerpc/dts: Factorize the clock control nodeEmil Medve1-46/+2
2014-05-22powerpc/fsl: Add fsl,portid-mapping to corenet1-cf chipsScott Wood1-0/+1
2014-05-22powerpc/fsl: Updated corenet-cf compatible string for corenet1-cf chipsDiana Craciun1-1/+1
2014-03-19powerpc/mpc85xx: Update clock nodes in device treeTang Yuantian1-0/+61
2013-03-18powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCsStephen George1-1/+1
2013-02-13powerpc/85xx: describe the PAMU topology in the device treeTimur Tabi1-14/+78
2012-09-12powerpc/85xx: add Freescale P5040 SOC and SEC v5.2 device treesKim Phillips1-0/+320