Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-08-13 | irqchip: add a SiFive PLIC driver | 1 | -0/+1 | |
2018-06-11 | RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig | 1 | -0/+1 | |
2018-04-02 | RISC-V: Enable module support in defconfig | 1 | -0/+2 | |
2018-01-07 | RISC-V: Add a basic defconfig | 1 | -0/+75 | |
2017-09-26 | RISC-V: Build Infrastructure | 1 | -0/+0 |