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2019-12-03Merge tag 'pci-v5.5-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pciLinus Torvalds1-1/+0
2019-11-28Merge tag 'ioremap-5.5' of git://git.infradead.org/users/hch/ioremapLinus Torvalds2-14/+7
2019-11-26asm-generic: Make msi.h a mandatory include/asm headerMichal Simek1-1/+0
2019-11-22Merge branch 'next/nommu' into for-nextPaul Walmsley20-226/+417
2019-11-22Merge branch 'next/misc' into for-nextPaul Walmsley15-33/+40
2019-11-17riscv: add nommu supportChristoph Hellwig12-49/+102
2019-11-17riscv: clear the instruction cache and all registers when bootingChristoph Hellwig1-0/+1
2019-11-17riscv: read the hart ID from mhartid on bootDamien Le Moal1-0/+1
2019-11-17riscv: provide native clint access for M-modeChristoph Hellwig2-0/+41
2019-11-13riscv: add support for MMIO access to the timer registersChristoph Hellwig2-3/+19
2019-11-13riscv: implement remote sfence.i using IPIsChristoph Hellwig1-0/+3
2019-11-13riscv: poison SBI calls for M-modeChristoph Hellwig1-2/+3
2019-11-12riscv: clean up the macro format in each header fileZong Li15-33/+40
2019-11-11riscv: use the generic ioremap codeChristoph Hellwig2-3/+6
2019-11-11arch: rely on asm-generic/io.h for default ioremap_* definitionsChristoph Hellwig1-10/+0
2019-11-05riscv: abstract out CSR names for supervisor vs machine modeChristoph Hellwig5-30/+82
2019-11-05riscv: separate MMIO functions into their own header filePaul Walmsley2-144/+167
2019-10-29riscv: add support for SECCOMP and SECCOMP_FILTERDavid Abdurachmanov2-1/+14
2019-10-28RISC-V: Add PCIe I/O BAR memory mappingYash Shah2-1/+13
2019-10-28riscv: add missing header file includesPaul Walmsley2-0/+4
2019-10-23riscv: cleanup <asm/bug.h>Christoph Hellwig1-13/+3
2019-10-23riscv: Fix implicit declaration of 'page_to_section'Kefeng Wang1-4/+1
2019-10-23riscv: fix fs/proc/kcore.c compilation with sparsemem enabledDavid Abdurachmanov1-2/+0
2019-10-15RISC-V: fix virtual address overlapped in FIXADDR_START and VMEMMAP_STARTGreentime Hu1-8/+8
2019-10-14riscv: tlbflush: remove confusing comment on local_flush_tlb_all()Paul Walmsley1-4/+0
2019-10-01RISC-V: Clear load reservations while restoring hart contextsPalmer Dabbelt1-0/+1
2019-09-27Merge tag 'riscv/for-v5.4-rc1-b' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linuxLinus Torvalds1-12/+12
2019-09-26mm: treewide: clarify pgtable_page_{ctor,dtor}() namingMark Rutland1-1/+1
2019-09-24mm: consolidate pgtable_cache_init() and pgd_cache_init()Mike Rapoport1-5/+0
2019-09-24mm: remove quicklist page table cachesNicholas Piggin1-4/+0
2019-09-19RISC-V: Fix building error when CONFIG_SPARSEMEM_MANUAL=yGreentime Hu1-12/+12
2019-09-16Merge tag 'riscv/for-v5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linuxLinus Torvalds7-60/+96
2019-09-13riscv: modify the Image header to improve compatibility with the ARM64 headerPaul Walmsley1-6/+6
2019-09-05riscv: move the TLB flush logic out of lineChristoph Hellwig1-30/+7
2019-09-05riscv: don't use the rdtime(h) pseudo-instructionsChristoph Hellwig1-23/+21
2019-09-05riscv: cleanup riscv_cpuid_to_hartid_maskChristoph Hellwig2-7/+0
2019-09-05riscv: Add support for perf registers samplingMao Han1-0/+42
2019-08-30RISC-V: Implement sparsememLogan Gunthorpe3-0/+26
2019-08-28RISC-V: Fix FIXMAP area corruption on RV32 systemsAnup Patel2-6/+10
2019-08-14riscv: Make __fstate_clean() work correctly.Vincent Chen1-1/+1
2019-08-14riscv: Correct the initialized flow of FP registerVincent Chen1-0/+6
2019-08-13riscv: fix flush_tlb_range() end address for flush_tlb_page()Paul Walmsley1-2/+9
2019-07-28Merge tag 'spdx-5.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdxLinus Torvalds7-7/+7
2019-07-25treewide: add "WITH Linux-syscall-note" to SPDX tag of uapi headersMasahiro Yamada7-7/+7
2019-07-22riscv: include generic support for MSI irqdomainsWesley Terpstra1-0/+1
2019-07-18riscv: enable sys_clone3 syscall for rv64Paul Walmsley1-0/+1
2019-07-18Merge tag 'riscv/for-v5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linuxLinus Torvalds7-10/+176
2019-07-18riscv: fix build break after macro-to-function conversion in generic cacheflush.hPaul Walmsley1-4/+59
2019-07-12riscv: switch to generic version of pte allocationMike Rapoport1-27/+2
2019-07-11RISC-V: Add an Image header that boot loader can parse.Atish Patra1-0/+65