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AgeCommit message (Expand)AuthorFilesLines
2019-01-23RISC-V: Add _TIF_NEED_RESCHED check for kernel thread when CONFIG_PREEMPT=yVincent Chen1-1/+17
2019-01-07riscv: add audit supportDavid Abdurachmanov1-2/+2
2018-10-22RISC-V: SMP cleanup and new featuresPalmer Dabbelt1-1/+0
2018-10-22RISC-V: No need to pass scause as arg to do_IRQ()Anup Patel1-1/+0
2018-10-22Extract FPU context operations from entry.SAlan Kao1-87/+0
2018-08-13RISC-V: implement low-level interrupt handlingChristoph Hellwig1-2/+2
2018-03-14RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handlerPalmer Dabbelt1-4/+3
2018-02-20RISC-V: Enable IRQ during exception handlingzongbox@gmail.com1-2/+3
2018-01-30riscv: disable SUM in the exception handlerChristoph Hellwig1-3/+6
2018-01-07riscv: rename SR_* constants to match the specChristoph Hellwig1-4/+4
2017-09-26RISC-V: Task implementationPalmer Dabbelt1-0/+464