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Linux kernel development work - see feature branches
Jason A. Donenfeld
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2019-09-20
riscv: Avoid interrupts being erroneously enabled in handle_exception()
Vincent Chen
1
-1
/
+5
2019-08-30
riscv: Using CSR numbers to access CSRs
Bin Meng
1
-3
/
+3
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
Thomas Gleixner
1
-9
/
+1
2019-05-16
RISC-V: Access CSRs using CSR numbers
Anup Patel
1
-11
/
+11
2019-01-23
RISC-V: Add _TIF_NEED_RESCHED check for kernel thread when CONFIG_PREEMPT=y
Vincent Chen
1
-1
/
+17
2019-01-07
riscv: add audit support
David Abdurachmanov
1
-2
/
+2
2018-10-22
RISC-V: SMP cleanup and new features
Palmer Dabbelt
1
-1
/
+0
2018-10-22
RISC-V: No need to pass scause as arg to do_IRQ()
Anup Patel
1
-1
/
+0
2018-10-22
Extract FPU context operations from entry.S
Alan Kao
1
-87
/
+0
2018-08-13
RISC-V: implement low-level interrupt handling
Christoph Hellwig
1
-2
/
+2
2018-03-14
RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler
Palmer Dabbelt
1
-4
/
+3
2018-02-20
RISC-V: Enable IRQ during exception handling
zongbox@gmail.com
1
-2
/
+3
2018-01-30
riscv: disable SUM in the exception handler
Christoph Hellwig
1
-3
/
+6
2018-01-07
riscv: rename SR_* constants to match the spec
Christoph Hellwig
1
-4
/
+4
2017-09-26
RISC-V: Task implementation
Palmer Dabbelt
1
-0
/
+464