aboutsummaryrefslogtreecommitdiffstats
path: root/arch/riscv/kernel (follow)
AgeCommit message (Expand)AuthorFilesLines
2018-01-07riscv: rename SR_* constants to match the specChristoph Hellwig2-6/+6
2018-01-07RISC-V: Make __NR_riscv_flush_icache visible to userspacePalmer Dabbelt2-2/+0
2017-12-11RISC-V: Remove unused CONFIG_HVC_RISCV_SBI codePalmer Dabbelt1-11/+0
2017-12-11RISC-V: Logical vs Bitwise typoDan Carpenter1-1/+1
2017-12-01RISC-V: Fixes for clean allmodconfig buildPalmer Dabbelt4-3/+15
2017-11-30RISC-V: Clean up an unused includePalmer Dabbelt1-1/+0
2017-11-30RISC-V: Allow userspace to flush the instruction cacheAndrew Waterman5-0/+67
2017-11-30RISC-V: Flush I$ when making a dirty page executableAndrew Waterman1-0/+48
2017-11-30RISC-V: Provide stub of setup_profiling_timer()Olof Johansson1-0/+7
2017-11-30RISC-V: Export some expected symbols for modulesOlof Johansson2-0/+5
2017-11-30RISC-V: move empty_zero_page definition to C and export itOlof Johansson2-3/+3
2017-11-27RISC-V: Add VDSO entries for clock_get/gettimeofday/getcpuAndrew Waterman6-1/+113
2017-11-27RISC-V: Remove __vdso_cmpxchg{32,64} symbol versionsPalmer Dabbelt1-2/+0
2017-09-26RISC-V: Build InfrastructurePalmer Dabbelt3-0/+126
2017-09-26RISC-V: User-facing APIPalmer Dabbelt12-0/+977
2017-09-26RISC-V: Task implementationPalmer Dabbelt3-0/+915
2017-09-26RISC-V: Generic library routines and assemblyPalmer Dabbelt1-0/+177
2017-09-26RISC-V: Init and Halt CodePalmer Dabbelt11-0/+1292