aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sparc/kernel/perf_event.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2010-01-04sparc64: Fix Niagara2 perf event handling.David S. Miller1-0/+11
2009-10-09sparc64: Fix niagara2 perf IRQ bits.David S. Miller1-1/+1
2009-09-29sparc64: Cache per-cpu %pcr register value in perf code.David S. Miller1-17/+42
2009-09-29sparc64: Fix comment typo in perf_event.cDavid S. Miller1-1/+1
2009-09-28sparc64: Minor coding style fixups in perf code.David S. Miller1-7/+5
2009-09-28sparc64: Add a basic conflict engine in preparation for multi-counter support.David S. Miller1-5/+64
2009-09-27sparc64: Add initial perf event conflict resolution and checks.David S. Miller1-5/+77
2009-09-26sparc: Niagara1 perf event support.David S. Miller1-0/+119
2009-09-26sparc: Add Niagara2 HW cache event support.David S. Miller1-0/+88
2009-09-26sparc: Support all ultra3 and ultra4 derivatives.David S. Miller1-10/+13
2009-09-26sparc: Support HW cache events.David S. Miller1-6/+139
2009-09-21perf: Do the big rename: Performance Counters -> Performance EventsIngo Molnar1-0/+556
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.