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2018-07-25perf/x86/intel: Support Extended PEBS for Goldmont PlusKan Liang1-6/+0
2018-07-25perf/x86/intel/ds: Handle PEBS overflow for fixed countersKan Liang1-9/+27
2018-07-25perf/x86/intel: Introduce PMU flag for Extended PEBSKan Liang1-0/+7
2018-07-25perf/x86/intel: Fix unwind errors from PEBS entries (mk-II)Peter Zijlstra1-14/+11
2018-07-15x86/events/intel/ds: Fix bts_interrupt_threshold alignmentHugh Dickins1-3/+5
2018-04-05perf/x86/intel: Move regs->flags EXACT bit initStephane Eranian1-10/+24
2018-03-29Merge branch 'perf/urgent' into perf/coreIngo Molnar1-8/+17
2018-03-27perf/x86/intel: Fix linear IP of PEBS real_ip on Haswell and later CPUsStephane Eranian1-8/+17
2018-03-24Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar1-3/+3
2018-03-20perf/x86/intel: Rename confusing 'freerunning PEBS' API and implementation to 'large PEBS'Kan Liang1-3/+3
2018-03-09perf/x86/intel/ds: Introduce ->read() function for auto-reload events and flush the PEBS buffer thereKan Liang1-0/+9
2018-03-09perf/x86/intel: Fix event update for auto-reloadKan Liang1-4/+88
2018-01-25perf/x86: Fix perf,x86,cpuhp deadlockPeter Zijlstra1-15/+18
2018-01-05x86/events/intel/ds: Use the proper cache flush method for mapping ds buffersPeter Zijlstra1-0/+16
2017-12-23x86/events/intel/ds: Map debug buffers in cpu_entry_areaHugh Dickins1-45/+80
2017-12-23x86/cpu_entry_area: Add debugstore entries to cpu_entry_areaThomas Gleixner1-2/+3
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2017-08-29perf/core, x86: Add PERF_SAMPLE_PHYS_ADDRKan Liang1-1/+1
2017-08-25perf/x86: Fix data source decoding for SkylakeAndi Kleen1-19/+32
2017-08-25perf/x86: Move Nehalem PEBS code to flagAndi Kleen1-4/+1
2017-07-21perf/x86/intel: Add proper condition to run sched_task callbacksJiri Olsa1-6/+8
2017-07-18perf/x86/intel: Fix debug_store reset field for freq eventsJiri Olsa1-0/+2
2017-07-18perf/x86/intel: Add Goldmont Plus CPU PMU supportKan Liang1-0/+6
2017-04-14perf/x86: Fix spurious NMI with PEBS Load Latency eventKan Liang1-1/+1
2017-01-14perf/x86/intel: Account interrupts for PEBS errorsJiri Olsa1-1/+5
2016-11-22perf/x86/intel: Cure bogus unwind from PEBS entriesPeter Zijlstra1-12/+23
2016-09-10Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar1-8/+11
2016-09-10perf/x86/intel: Fix PEBSv3 record drainPeter Zijlstra1-8/+11
2016-08-18perf/x86: Fix PEBS threshold initializationJiri Olsa1-1/+11
2016-08-10perf/x86: Ensure perf_sched_cb_{inc,dec}() is only called from pmu::{add,del}()Peter Zijlstra1-6/+2
2016-08-10perf/x86/intel: Rework the large PEBS setup codePeter Zijlstra1-35/+67
2016-04-23perf/x86/intel: Add Goldmont CPU supportKan Liang1-0/+6
2016-03-21perf/x86/BTS: Fix RCU usagePeter Zijlstra1-1/+4
2016-03-08perf/x86/intel: Fix PEBS data source interpretation on Nehalem/WestmereAndi Kleen1-1/+10
2016-03-08perf/x86/pebs: Add proper PEBS constraints for BroadwellStephane Eranian1-0/+24
2016-03-08perf/x86/intel: Use PAGE_SIZE for PEBS buffer size on Core2Jiri Olsa1-2/+11
2016-02-17perf/x86: Move perf_event.h to its new homeBorislav Petkov1-1/+1
2016-02-17perf/x86: Move perf_event_intel_ds.c ......... => x86/events/intel/ds.cBorislav Petkov1-0/+1368
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