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2021-10-29Merge tag 'irqchip-5.16' into irq/coreBorislav Petkov6-11/+19
2021-10-28bpf,x86: Respect X86_FEATURE_RETPOLINE*Peter Zijlstra1-59/+0
2021-10-28x86/alternative: Implement .retpoline_sites supportPeter Zijlstra1-0/+1
2021-10-28x86/retpoline: Create a retpoline thunk arrayPeter Zijlstra1-1/+7
2021-10-28x86/retpoline: Move the retpoline thunk declarations to nospec-branch.hPeter Zijlstra2-8/+7
2021-10-28x86/asm: Fixup odd GEN-for-each-reg.h usagePeter Zijlstra1-1/+1
2021-10-28x86/asm: Fix register orderPeter Zijlstra1-4/+10
2021-10-28x86/retpoline: Remove unused replacement symbolsPeter Zijlstra1-10/+0
2021-10-28x86/hyperv: Add Write/Read MSR registers via ghcb pageTianyu Lan1-14/+49
2021-10-28x86/hyperv: Add new hvcall guest address host visibility supportTianyu Lan2-1/+23
2021-10-28x86/hyperv: Initialize GHCB page in Isolation VMTianyu Lan1-0/+4
2021-10-28Merge remote-tracking branch 'tip/x86/cc' into hyperv-nextWei Liu3-12/+10
2021-10-28BackMerge tag 'v5.15-rc7' into drm-nextDave Airlie8-15/+27
2021-10-26x86/fpu/amx: Enable the AMX feature in 64-bit modeChang S. Bae1-2/+3
2021-10-26x86/fpu/amx: Define AMX state components and have it used for boot-time checksChang S. Bae3-0/+35
2021-10-26x86/fpu/xstate: Add fpstate_realloc()/free()Chang S. Bae1-0/+7
2021-10-26x86/fpu/xstate: Add XFD #NM handlerChang S. Bae1-0/+2
2021-10-26x86/fpu: Add XFD state to fpstateChang S. Bae1-0/+3
2021-10-26x86/msr-index: Add MSRs for XFDChang S. Bae1-0/+2
2021-10-26x86/cpufeatures: Add eXtended Feature Disabling (XFD) feature bitChang S. Bae1-0/+1
2021-10-26x86/fpu: Prepare fpu_clone() for dynamically enabled featuresThomas Gleixner1-1/+1
2021-10-26x86/fpu: Add basic helpers for dynamically enabled featuresThomas Gleixner1-0/+21
2021-10-26x86/arch_prctl: Add controls for dynamic XSTATE componentsChang S. Bae2-1/+5
2021-10-26x86/fpu: Add fpu_state_config::legacy_featuresThomas Gleixner1-0/+7
2021-10-26x86/fpu: Add members to struct fpu to cache permission informationThomas Gleixner1-0/+46
2021-10-25x86/sev: Expose sev_es_ghcb_hv_call() for use by HyperVTianyu Lan1-0/+6
2021-10-25KVM: x86: switch pvclock_gtod_sync_lock to a raw spinlockDavid Woodhouse1-1/+1
2021-10-25KVM: x86: On emulation failure, convey the exit reason, etc. to userspaceDavid Edmondson1-0/+3
2021-10-25KVM: x86: Get exit_reason as part of kvm_x86_ops.get_exit_infoDavid Edmondson1-3/+4
2021-10-23x86/fpu: Remove old KVM FPU interfaceThomas Gleixner1-2/+0
2021-10-23x86/kvm: Convert FPU handling to a single swap bufferThomas Gleixner2-7/+4
2021-10-23x86/fpu: Provide infrastructure for KVM FPU cleanupThomas Gleixner1-0/+13
2021-10-23x86/fpu: Prepare for sanitizing KVM FPU codeThomas Gleixner1-1/+43
2021-10-22Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds1-1/+2
2021-10-22x86/unwind: Compile kretprobe fixup code only if CONFIG_KRETPROBES=yMasami Hiramatsu1-0/+6
2021-10-22KVM: x86: Use rw_semaphore for APICv lock to allow vCPU parallelismSean Christopherson1-1/+1
2021-10-22KVM: SEV-ES: go over the sev_pio_data buffer in multiple passes if neededPaolo Bonzini1-0/+1
2021-10-22KVM: SEV-ES: rename guest_ins_data to sev_pio_dataPaolo Bonzini1-1/+1
2021-10-22x86/microcode: Use the firmware_loader built-in APIBorislav Petkov1-3/+0
2021-10-22KVM: x86: Add vendor name to kvm_x86_ops, use it for error messagesSean Christopherson1-0/+2
2021-10-22KVM: vPMU: Fill get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0Wanpeng Li1-1/+0
2021-10-22KVM: cleanup allocation of rmaps and page tracking dataDavid Stevens2-13/+7
2021-10-22x86/fpu/xstate: Move remaining xfeature helpers to coreThomas Gleixner1-13/+0
2021-10-22x86/fpu: Rework restore_regs_from_fpstate()Thomas Gleixner1-20/+7
2021-10-22x86/fpu: Mop up xfeatures_mask_uabi()Thomas Gleixner1-9/+0
2021-10-21x86/fpu: Move xstate feature masks to fpu_*_cfgThomas Gleixner1-6/+4
2021-10-21x86/fpu: Provide struct fpu_configThomas Gleixner1-0/+42
2021-10-21x86/CPU: Add support for Vortex CPUsMarcos Del Sol Vives1-1/+2
2021-10-21x86/fpu/xstate: Use fpstate for copy_uabi_to_xstate()Thomas Gleixner1-12/+0
2021-10-21x86/fpu: Add size and mask information to fpstateThomas Gleixner1-0/+12
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