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2007-10-30Blackfin arch: reclaim a few bytes from the end of our init sectionMike Frysinger1-3/+8
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-30Blackfin arch: fix libata data struct member from irq_type to irq_flagsMike Frysinger1-1/+1
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-30Blackfin arch: Fix bug set correct baud for spi mmc and enable SPI after DMA.Sonic Zhang2-4/+4
Changes: 1. The baud for spi mmc defined in board file is not used by the old spi driver. A slower value from spi framework is used instead. In latest bug fixing, the correct baud is use which is too high for spi MMC card. 2. SPI is enabled only after DMA is started. 3. MMC detection IRQ is set to 55. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-30Blackfin arch: update board defconfig files according to latest information from ADI datasheetBryan Wu7-49/+242
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: ensure that speculative loads of bad pointers don't cause us to do bad things.Robin Getz3-1/+17
Fix/change formatting of a few more things. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: Fix random crash issue found by Michael.Robin Getz1-2/+4
This is fixes a problem where we could jump to the wrong address. By doing a "p0 = reti; jump (p0)". If a different, higher level interrupt came in, just before, rather than returning to the calling function, we would return to a random place in the kernel. This very elegant fix from Bernd grabs the return location off the stack, and places it into P0, so when we do a return, it goes to the correct place. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: fix bug: tell users if the kernel is recovering from a fault conditionRobin Getz1-2/+9
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: add support for checking/clearing overruns in generic purpose Timer APIMike Frysinger1-7/+40
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: cleanup arch/blackfin/kernel/traps.c handling code.Robin Getz1-139/+179
- move the CONFIG_KGDB into one block, for easier reading - remove printk from printk_address, and pass around buffers. Also print out the labels when decoding CPLB errors, so you know exactly where the error was. - Do not use fixed addresses, becuase people do not know where they come from. - Turn the printing level down on the dump, so if you don't want, only the signal prints out - just like on other archs. If a kernel/interrupt crashes, it should dump everything all the time Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: Apply Bluetchnix vendor patch provided by Harald KrapfenbauerMichael Hennerich1-2/+40
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: fix bug BlueTechnix CM-BF537 board config uses wrong IRQ for net2272 driverMichael Hennerich1-2/+2
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: fix bug: kernel prints out error message twiceRobin Getz1-12/+18
This fixes two things: - stop calling write_lock_irq/write_unlock_irq which can turn modify irq levels - don't calling mmput when handing exceptions - since this might_sleep, which does a rti, and leaves us in kernel space (irq15, rather than irq5). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: add NFC driver support in BF527-EZKIT boardMichael Hennerich1-0/+53
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: Added support for HV Sistemas H8606 boardJavier Herrero3-2/+359
Signed-off-by: Javier Herrero <jherrero@hvsistemas.es> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-30remove the dead X86_REMOTE_DEBUG optionAdrian Bunk1-3/+0
This patch removes the dead X86_REMOTE_DEBUG option. Signed-off-by: Adrian Bunk <bunk@kernel.org>
2007-10-30x86: merge EARLY_PRINTK optionsAdrian Bunk2-6/+1
This patch merges the x86_64 EARLY_PRINTK option into the i386 one. Signed-off-by: Adrian Bunk <bunk@kernel.org>
2007-10-30x86: mm/discontig_32.c: make code staticAdrian Bunk1-2/+2
node0_bdata and paddr_to_nid() can become static. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-10-30x86: kernel/setup_32.c: unexport machine_idAdrian Bunk1-3/+0
This patch removes the unused EXPORT_SYMBOL(machine_id). Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-10-30x86 gart: rename symbols only used for the GART implementationJoerg Roedel4-13/+14
This patch renames the 4 symbols iommu_hole_init(), iommu_aperture, iommu_aperture_allowed, iommu_aperture_disabled. All these symbols are only used for the GART implementation of IOMMUs. It adds and additional gart_ prefix to them. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-10-30x86 gart: make some variables and functions staticJoerg Roedel1-4/+4
This patch makes some functions and variables static in pci-gart_64.c which are not used somewhere else. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Acked-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-10-30x86 gart: rename CONFIG_IOMMU to CONFIG_GART_IOMMUJoerg Roedel6-10/+10
This patch renames the IOMMU config option to GART_IOMMU because in fact it means the GART and not general support for an IOMMU on x86. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Acked-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-10-30x86 gart: rename iommu.h to gart.hJoerg Roedel9-9/+9
This patch renames the include file asm-x86/iommu.h to asm-x86/gart.h to make clear to which IOMMU implementation it belongs. The patch also adds "GART" to the Kconfig line. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Acked-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-10-30x86: additional CPUID strings; fix strings for AMD-ecxH. Peter Anvin2-10/+10
Additional CPUID strings (sse4_1, sse4_2, sse5, skinit, wdt); fix the positioning of the AMD ecx strings (cr8_legacy was duplicated under two different names, so the alignment of all the other strings were off by one.) Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2007-10-29Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds48-463/+697
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (34 commits) [MIPS] tb0219: Update copyright message. [MIPS] MT: Fix bug in multithreaded kernels. [MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs. Author: Ralf Baechle <ralf@linux-mips.org> [MIPS] sb1250: Enable GenBus IDE in defconfig. [MIPS] vmlinux.ld.S: correctly indent .data section [MIPS] c-r3k: Implement flush_cache_range() [MIPS] Store sign-extend register values for PTRACE_GETREGS [MIPS] Alchemy: Register platform devices [MIPS] Add len and addr validation for MAP_FIXED mappings. [MIPS] IRIX: Fix off-by-one error in signal compat code. [MIPS] time: Replace plat_timer_setup with modern APIs. [MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver. [MIPS] time: Make c0_compare_int_usable faster [MIPS] time: Fix cevt-r4k.c for 64-bit kernel [MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq(). [MIPS] txx9tmr clockevent/clocksource driver [MIPS] Add mips_hpt_frequency check to mips_clockevent_init(). [MIPS] IP32: Fixes after interrupt renumbering. [MIPS] IP27: Fix slice logic to work for arbitrary number of slices. ...
2007-10-29Revert "x86_64: allocate sparsemem memmap above 4G"Linus Torvalds1-6/+0
This reverts commit 2e1c49db4c640b35df13889b86b9d62215ade4b6. First off, testing in Fedora has shown it to cause boot failures, bisected down by Martin Ebourne, and reported by Dave Jobes. So the commit will likely be reverted in the 2.6.23 stable kernels. Secondly, in the 2.6.24 model, x86-64 has now grown support for SPARSEMEM_VMEMMAP, which disables the relevant code anyway, so while the bug is not visible any more, it's become invisible due to the code just being irrelevant and no longer enabled on the only architecture that this ever affected. Reported-by: Dave Jones <davej@redhat.com> Tested-by: Martin Ebourne <fedora@ebourne.me.uk> Cc: Zou Nan hai <nanhai.zou@intel.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Acked-by: Andy Whitcroft <apw@shadowen.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-29[MIPS] tb0219: Update copyright message.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] MT: Fix bug in multithreaded kernels.Ralf Baechle1-3/+18
When GDB writes a breakpoint into address area of inferior process the kernel needs to invalidate the modified memory in the inferior which is done by calling flush_cache_page which in turns calls r4k_flush_cache_page and local_r4k_flush_cache_page for VSMP or SMTC kernel via r4k_on_each_cpu(). As the VSMP and SMTC SMP kernels for 34K are running on a single shared caches it is possible to get away without interprocessor function calls. This optimization is implemented in r4k_on_each_cpu, so local_r4k_flush_cache_page is only ever called on the local CPU. This is where the following code in local_r4k_flush_cache_page() strikes: /* * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ if (cpu_context(smp_processor_id(), mm) == 0) return; On VSMP and SMTC had a function of cpu_context() for each CPU(TC). So in case another CPU than the CPU executing local_r4k_cache_flush_page has not accessed the mm but one of the other CPUs has there may be data to be flushed in the cache yet local_r4k_cache_flush_page will falsely return leaving the I-cache inconsistent for the breakpoint. While the issue was discovered with GDB it also exists in local_r4k_flush_cache_range() and local_r4k_flush_cache(). Fixed by introducing a new function has_valid_asid which on MT kernels returns true if a mm is active on any processor in the system. This is relativly expensive since for memory acccesses in that loop cache misses have to be assumed but it seems the most viable solution for 2.6.23 and older -stable kernels. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs.Ralf Baechle8-8/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29Author: Ralf Baechle <ralf@linux-mips.org>Ralf Baechle3-3/+3
[MIPS] MSP71xx: Fix bitrot. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] sb1250: Enable GenBus IDE in defconfig.Maciej W. Rozycki1-1/+1
Enable the onboard GenBus IDE interface in the default configuration. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] vmlinux.ld.S: correctly indent .data sectionFranck Bui-Huu1-15/+17
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] c-r3k: Implement flush_cache_range()Maciej W. Rozycki1-28/+32
Contrary to the belief of some, the R3000 and related processors did have caches, both a data and an instruction cache. Here is an implementation of r3k_flush_cache_page(), which is the processor-specific back-end for flush_cache_range(), done according to the spec in Documentation/cachetlb.txt. While at it, remove an unused local function: get_phys_page(), do some trivial formatting fixes and modernise debugging facilities. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Store sign-extend register values for PTRACE_GETREGSAtsushi Nemoto2-11/+11
A comment on ptrace_getregs() states "Registers are sign extended to fill the available space." but it is not true. Fix code to match the comment. Also fix casts on each caller to get rid of some warnings. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Alchemy: Register platform devicesFlorian Fainelli2-0/+87
This patch separates the platform devices registration for the MTX-1 specific devices: GPIO leds and watchdog. [Minor fixup and formatting change -- Ralf] Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Add len and addr validation for MAP_FIXED mappings.David Daney1-2/+7
Mmap with MAP_FIXED was not validating the addr and len parameters. This leads to the failure of GCC's gcc.c-torture/execute/loop-2[fg].c testcases when using the o32 ABI on a 64 bit kernel. These testcases try to mmap 65536 bytes at 0x7fff8000 and then access all the memory. In 2.6.18 and 2.6.23.1 (and likely other versions as well) the kernel maps the requested memory, but since half of it is above 0x80000000 a SIGBUS is generated when it is accessed. This patch moves the len validation above the MAP_FIXED processing so that it is always validated. It also adds validation to the addr parameter for MAP_FIXED mappings. Signed-off-by: David Daney <ddaney@avtrex.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] IRIX: Fix off-by-one error in signal compat code.Ralf Baechle1-2/+6
Based on original patch by Roel Kluin <12o3l@tiscali.nl>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Replace plat_timer_setup with modern APIs.Ralf Baechle3-67/+62
plat_timer_setup is no longer getting called. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver.Ralf Baechle2-2/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Make c0_compare_int_usable fasterAtsushi Nemoto1-4/+10
Try increasingly longer time periods starting of at 0x10 cycles. This should be fast on hardware and work nicely with emulators. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Fix cevt-r4k.c for 64-bit kernelAtsushi Nemoto1-2/+2
The expression "(long)(read_c0_count() - cnt)" can never be a negative value on 64-bit kernel. Cast to "int" before comparison. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().Ralf Baechle4-54/+0
They break the timer interrupt initialization and only seem to be a kludge for initialization happening in the wrong order. Further testing done by Thiemo confirms the suspicion that the other invocations also seem to have useless. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] txx9tmr clockevent/clocksource driverAtsushi Nemoto6-96/+201
Convert jmr3927_clock_event_device to more generic txx9tmr_clock_event_device which supports one-shot mode. The txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer interrupt was not available. Convert jmr3927_hpt_read to txx9_clocksource driver which does not depends jiffies anymore. The txx9_clocksource itself can be used for TX49, but normally TX49 uses higher precision clocksource_mips. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Add mips_hpt_frequency check to mips_clockevent_init().Yoichi Yuasa1-1/+1
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] IP32: Fixes after interrupt renumbering.Ralf Baechle1-51/+77
And general untangling. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] IP27: Fix slice logic to work for arbitrary number of slices.Ralf Baechle1-4/+7
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] SNI: Convert a20r timer to clockevent device.Ralf Baechle1-16/+64
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Merge eXcite plat_timer_setup into plat_time_init.Ralf Baechle1-11/+10
Fixme: At the time of this writing cevt-r4k.c doesn't yet know about how to handle the alternate timer interrupt of the RM9000. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Merge lasat plat_timer_setup into plat_time_init.Ralf Baechle1-5/+2
Since the cp0 compare interrupt handler isn't initialized by the time plat_time_init is called don't set IE_IRQ5 anymore, cevt-r4k.c will do that a little later itself. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Remove wrppmc's definition of plat_timer_setup.Ralf Baechle1-6/+0
The only thing it used to do is now done by cevt-r4k.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Cause platform definitions of plat_timer_setup to cause error.Ralf Baechle1-5/+12
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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