aboutsummaryrefslogtreecommitdiffstats
path: root/arch (follow)
AgeCommit message (Collapse)AuthorFilesLines
2008-10-02[ARM] 5248/1: wm97xx generic battery driverMarek Vašut1-0/+20
This patch adds generic battery driver for wm97xx chips. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-02[ARM] 5274/1: simplify request_standard_resources()Nicolas Pitre1-7/+2
There is no point converting memory bank addresses from physical to virtual just to convert them back to physical addresses. Furthermore this isn't "right" for highmem even if in this case the end result is the correct one. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-02powerpc: Fix boot hang regression on MPC8544DSKumar Gala1-1/+11
Commit 00c5372d37a78990c1530184a9c792ee60a30067 caused the MPC8544DS board to hang at boot. The MPC8544DS is unique in that it doesn't use the PCI slots on the ULI (unlike the MPC8572DS or MPC8610HPCD). So the dummy read at the end of the address space causes us to hang. We can detect the situation by comparing the bridge's BARs versus the root complex. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-01[ARM] 5251/1: remove old LED support for Trizeps4 SOMJürgen Schindele4-138/+1
Remove the old led support in arch/arm/mach-pxa/leds... for TRIZEPS4 SOM. It is / will be replaced by generic led driver drivers/leds/... Signed-off-by: Jürgen Schindele <linux@schindele.name> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] 5204/1: Trizeps4 SOM updateJürgen Schindele3-244/+421
- use MFP-API for GPIO - support TRIZEPS4WL module - cleanups Signed-off-by: Jrgen Schindele <linux@schindele.name> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] 5270/1: Fix Formatting in mach-sa1100/ machine filesKristoffer Ericson3-34/+34
This patch fixes formatting issues in mach-sa1100/ machine files. More specificly badge4.c,generic.c and pleb.c. Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] 5256/1: Update jornada default configKristoffer Ericson1-445/+612
This patch updates the jornada default config (which was made for 2.6.12). Plenty of development has happend since then, most importantly the SSP driver and kbd/touchscr. This config has been tested to compile and bootup properly. Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] mm: allow LH7A40x to use sparsememRussell King3-13/+14
Enable Sparsemem support for LH7A40x SoCs, while still allowing the existing discontig support for the time being. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] mm: deprecate discontigmem on ARMRussell King1-1/+5
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] mm: switch SA1100 to use sparsememRussell King2-11/+7
Tested on Assabet, and Assabet with Neponset's SDRAM at 3328M phys. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tipLinus Torvalds1-1/+1
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, vmi: fix broken LDT access x86: fix typo in enable_mtrr_cleanup early parameter
2008-10-01MN10300: Fix IRQ handlingDavid Howells3-28/+47
Fix the IRQ handling on the MN10300 arch. This patch makes a number of significant changes: (1) It separates the irq_chip definition for edge-triggered interrupts from the one for level-triggered interrupts. This is necessary because the MN10300 PIC latches the IRQ channel's interrupt request bit (GxICR_REQUEST), even after the device has ceased to assert its interrupt line and the interrupt channel has been disabled in the PIC. So for level-triggered interrupts we need to clear this bit when we re-enable - which is achieved by setting GxICR_DETECT but not GxICR_REQUEST when writing to the register. Not doing this results in spurious interrupts occurring because calling mask_ack() at the start of handle_level_irq() is insufficient - it fails to clear the REQUEST latch because the device that caused the interrupt is still asserting its interrupt line at this point. (2) IRQ disablement [irq_chip::disable_irq()] shouldn't clear the interrupt request flag for edge-triggered interrupts lest it lose an interrupt. (3) IRQ unmasking [irq_chip::unmask_irq()] also shouldn't clear the interrupt request flag for edge-triggered interrupts lest it lose an interrupt. (4) The end() operation is now left to the default (no-operation) as __do_IRQ() is compiled out. This may affect misrouted_irq(), but according to Thomas Gleixner it's the correct thing to do. (5) handle_level_irq() is used for edge-triggered interrupts rather than handle_edge_irq() as the MN10300 PIC latches interrupt events even on masked IRQ channels, thus rendering IRQ_PENDING unnecessary. It is sufficient to call mask_ack() at the start and unmask() at the end. (6) For level-triggered interrupts, ack() is now NULL as it's not used, and there is no effective ACK function on the PIC. mask_ack() is now the same as mask() as the latch continues to latch, even when the channel is masked. Further, the patch discards the disable() op implementation as its now the same as the mask() op implementation, which is used instead. It also discards the enable() op implementations as they're now the same as the unmask() op implementations, which are used instead. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-10-01[ARM] mm: enable sparsemem on clps7500 and RiscPCRussell King4-3/+35
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] mm: finish ARM sparsemem supportRussell King1-29/+57
... including some comments about the ordering required to bring sparsemem up. You have to repeatedly guess, test, reguess, try again and again to work out what the right ordering is. Many hours later... Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] mm: provide helpers for accessing membanksRussell King2-31/+39
Provide helpers for getting physical addresses or pfns from the meminfo array, and use them. Move for_each_nodebank() to asm/setup.h alongside the meminfo structure definition. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Improve non-executable supportRussell King6-58/+145
Add support for detecting non-executable stack binaries, and adjust permissions to prevent execution from data and stack areas. Also, ensure that READ_IMPLIES_EXEC is enabled for older CPUs where that is true, and for any executable-stack binary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Don't include asm/elf.h in asm codeRussell King23-26/+22
asm code really wants asm/hwcap.h, so include that instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Remove MT_NONSHARED_DEVICE aliasRussell King4-9/+7
Use MT_DEVICE_NONSHARED instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Remove MT_DEVICE_IXP2000 and associated definitionsRussell King10-49/+26
As of the previous commit, MT_DEVICE_IXP2000 encodes to the same PTE bit encoding as MT_DEVICE, so it's now redundant. Convert MT_DEVICE_IXP2000 to use MT_DEVICE instead, and remove its aliases. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Update Xscale and Xscale3 PTE mappingsRussell King2-9/+7
Use 'shared device' mappings for devices, and use the standard bit combinations for Xscale3. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] remove 'prot_pte_ext' from memory type tableRussell King3-5/+2
This member is now redundant; the memory type is encoded in the Linux PTE bits. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Convert ARMv7 to use TEX remappingRussell King1-4/+33
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Convert ARMv6 and ARMv7 to use new memory typesRussell King7-18/+40
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Convert Xscale and Xscale3 to use new memory typesRussell King3-31/+55
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Introduce new PTE memory type bitsRussell King5-42/+68
Provide L_PTE_MT_xxx definitions to describe the memory types that we use in Linux/ARM. These definitions are carefully picked such that: 1. their LSBs match what is required for pre-ARMv6 CPUs. 2. they all have a unique encoding, including after modification by build_mem_type_table() (the result being that some have more than one combination.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Re-jig Linux PTE bits to allow room for 4 memory type bitsRussell King1-4/+4
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Convert set_pte_ext implementions to macrosRussell King18-402/+177
There are actually only four separate implementations of set_pte_ext. Use assembler macros to insert code for these into the proc-*.S files. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6David S. Miller103-720/+1036
Conflicts: drivers/net/wireless/ath9k/core.c drivers/net/wireless/ath9k/main.c net/core/dev.c
2008-10-01x86: change MTRR_SANITIZER to def_bool yYinghai Lu1-2/+2
This option has been added in v2.6.26 as a default-disabled feature and went through several revisions since then. The feature fixes a wide range of MTRR setup problems that BIOSes leave us with: slow system, slow Xorg, slow system when adding lots of RAM, etc., so we want to enable it by default for v2.6.28. See: [Bug 10508] Upgrade to 4GB of RAM messes up MTRRs http://bugzilla.kernel.org/show_bug.cgi?id=10508 and the test results in: http://lkml.org/lkml/2008/9/29/273 1. hpa reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1 reg01: base=0x13c000000 (5056MB), size= 64MB: uncachable, count=1 reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1 reg03: base=0x100000000 (4096MB), size=1024MB: write-back, count=1 reg04: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1 reg05: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1 will get Found optimal setting for mtrr clean up gran_size: 1M chunk_size: 128M num_reg: 6 lose RAM: 0M range0: 0000000000000000 - 00000000c0000000 Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB hole: 00000000bf700000 - 00000000c0000000 Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC range0: 0000000100000000 - 0000000140000000 Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB hole: 000000013c000000 - 0000000140000000 Setting variable MTRR 5, base: 5056MB, range: 64MB, type UC 2. Dylan Taft reg00: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1 reg01: base=0x100000000 (4096MB), size= 512MB: write-back, count=1 reg02: base=0x120000000 (4608MB), size= 256MB: write-back, count=1 reg03: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1 reg04: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1 reg05: base=0xc7e00000 (3198MB), size= 2MB: uncachable, count=1 reg06: base=0xc8000000 (3200MB), size= 128MB: uncachable, count=1 will get Found optimal setting for mtrr clean up gran_size: 1M chunk_size: 4M num_reg: 6 lose RAM: 0M range0: 0000000000000000 - 00000000c8000000 Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB Setting variable MTRR 2, base: 3072MB, range: 128MB, type WB hole: 00000000c7e00000 - 00000000c8000000 Setting variable MTRR 3, base: 3198MB, range: 2MB, type UC rangeX: 0000000100000000 - 0000000130000000 Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB Setting variable MTRR 5, base: 4608MB, range: 256MB, type WB 3. Gabriel reg00: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1 reg01: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1 reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1 reg03: base=0x100000000 (4096MB), size= 512MB: write-back, count=1 reg04: base=0x120000000 (4608MB), size= 128MB: write-back, count=1 reg05: base=0x128000000 (4736MB), size= 64MB: write-back, count=1 reg06: base=0xcf600000 (3318MB), size= 2MB: uncachable, count=1 will get Found optimal setting for mtrr clean up gran_size: 1M chunk_size: 16M num_reg: 7 lose RAM: 0M range0: 0000000000000000 - 00000000d0000000 Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB Setting variable MTRR 2, base: 3072MB, range: 256MB, type WB hole: 00000000cf600000 - 00000000cf800000 Setting variable MTRR 3, base: 3318MB, range: 2MB, type UC rangeX: 0000000100000000 - 000000012c000000 Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB Setting variable MTRR 5, base: 4608MB, range: 128MB, type WB Setting variable MTRR 6, base: 4736MB, range: 64MB, type WB 4. Mika Fischer reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1 reg01: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1 reg02: base=0x100000000 (4096MB), size=1024MB: write-back, count=1 reg03: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1 reg04: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1 will get Found optimal setting for mtrr clean up gran_size: 1M chunk_size: 16M num_reg: 5 lose RAM: 0M range0: 0000000000000000 - 00000000c0000000 Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB hole: 00000000bf700000 - 00000000c0000000 Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC rangeX: 0000000100000000 - 0000000140000000 Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-30[ARM] mm: move vmalloc= parsing to arch/arm/mm/mmu.cRussell King3-21/+22
There's no point scattering this around the tree, the parsing of the parameter might as well live beside the code which uses it. That also means we can make vmalloc_reserve a static variable. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30[ARM] mm: move validation of membanks to one placeRussell King3-12/+19
The newly introduced sanity_check_meminfo() function should be used to collect all validation of the meminfo array, which we have in bootmem_init(). Move it there. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30x86, vmi: fix broken LDT accessZachary Amsden1-1/+1
This one took a long time to rear up because LDT usage is not very common, but the bug is quite serious. It got introduced along with another bug, already fixed, by 75b8bb3e56ca09a467fbbe5229bc68627f7445be After investigating a JRE failure, I found this bug was introduced a long time ago, and had already managed to survive another bugfix which occurred on the same line. The result is a total failure of the JRE due to LDT selectors not working properly. Signed-off-by: Zachary Amsden <zach@vmware.com> Cc: Glauber de Oliveira Costa <gcosta@redhat.com> Cc: stable@kernel.org Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-30x86: Fix broken LDT access in VMIZachary Amsden1-1/+1
After investigating a JRE failure, I found this bug was introduced a long time ago, and had already managed to survive another bugfix which occurred on the same line. The result is a total failure of the JRE due to LDT selectors not working properly. This one took a long time to rear up because LDT usage is not very common, but the bug is quite serious. It got introduced along with another bug, already fixed, by 75b8bb3e56ca09a467fbbe5229bc68627f7445be Signed-off-by: Zachary Amsden <zach@vmware.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Glauber de Oliveira Costa <gcosta@redhat.com> Cc: <stable@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-09-30[ARM] Feroceon: small cleanups to L2 cache codeNicolas Pitre1-17/+25
- Make sure that coprocessor instructions for range ops are contiguous and not reordered. - s/invalidate_and_disable_dcache/flush_and_disable_dcache/ - Don't re-enable I/D caches if they were not enabled initially. - Change some masks to shifts for better generated code. Signed-off-by: Nicolas Pitre <nico@marvell.com> Acked-by: Lennert Buytenhek <buytenh@marvell.com>
2008-09-30Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6Linus Torvalds5-9/+15
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Put the space for cpu0 per-cpu area into .data section
2008-09-30[ARM] 5272/1: remove conditional compilation in show_pte()Nicolas Pitre1-3/+2
The PTRS_PER_PMD != 1 condition can be evaluated with C code and optimized at compile time. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30[ARM] 5271/1: get rid of pages_to_mb()Nicolas Pitre1-5/+0
There is no use of this in the whole tree. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpcLinus Torvalds2-58/+54
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc: Fix failure to shutdown with CPU hotplug powerpc: Fix PCI in Holly device tree
2008-09-30[ARM] 5269/1: ARMv7: Use -march=armv7-a as compiler flagCatalin Marinas1-1/+1
The current -march=armv7a is not supported by mainline gcc. Cc: Paul Brook <paul@codesourcery.com> Cc: Wei Zhong <weizhong@broadcom.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30[ARM] dma: fix some comments in dma-mapping.hRussell King1-8/+7
... to prevent people being mislead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30[ARM] dma: don't touch cache on dma_*_for_cpu()Russell King2-11/+3
As per the dma_unmap_* calls, we don't touch the cache when a DMA buffer transitions from device to CPU ownership. Presently, no problems have been identified with speculative cache prefetching which in itself is a new feature in later architectures. We may have to revisit the DMA API later for these architectures anyway. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30x86, debug printouts: IOMMU setup failures should not be KERN_ERRAdam Jackson1-3/+3
The number of BIOSes that have an option to enable the IOMMU, or fix anything about its configuration, is vanishingly small. There's no good reason to punish quiet boot for this. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-30x86: fix typo in enable_mtrr_cleanup early parameterJ.A. Magallón1-1/+1
Correct typo for 'enable_mtrr_cleanup' early boot param name. Signed-off-by: J.A. Magallon <jamagallon@ono.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-30x86: export set_memory_ro and set_memory_rwBruce Allan1-0/+2
Export set_memory_ro() and set_memory_rw() calls for use by drivers that need to have more debug information about who might be writing to memory space. this was initially developed for use while debugging a memory corruption problem with e1000e. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-29x86: mtrr_cleanup try gran_size to less than 1MYinghai Lu1-4/+4
one have gran < 1M reg00: base=0xd8000000 (3456MB), size= 128MB: uncachable, count=1 reg01: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1 reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1 reg03: base=0x100000000 (4096MB), size= 512MB: write-back, count=1 reg04: base=0x120000000 (4608MB), size= 128MB: write-back, count=1 reg05: base=0xd7f80000 (3455MB), size= 512KB: uncachable, count=1 will get Found optimal setting for mtrr clean up gran_size: 512K chunk_size: 2M num_reg: 7 lose RAM: 0G range0: 0000000000000000 - 00000000d8000000 Setting variable MTRR 0, base: 0GB, range: 2GB, type WB Setting variable MTRR 1, base: 2GB, range: 1GB, type WB Setting variable MTRR 2, base: 3GB, range: 256MB, type WB Setting variable MTRR 3, base: 3328MB, range: 128MB, type WB hole: 00000000d7f00000 - 00000000d7f80000 Setting variable MTRR 4, base: 3455MB, range: 512KB, type UC rangeX: 0000000100000000 - 0000000128000000 Setting variable MTRR 5, base: 4GB, range: 512MB, type WB Setting variable MTRR 6, base: 4608MB, range: 128MB, type WB so start from 64k instead of 1M Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2008-09-29x86: mtrr_cleanup prepare to make gran_size to less 1MYinghai Lu1-24/+79
make the print out right with size < 1M Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2008-09-30powerpc: Fix failure to shutdown with CPU hotplugJohannes Berg1-5/+1
I tracked down the shutdown regression to CPUs not dying when being shut down during power-off. This turns out to be due to the system_state being SYSTEM_POWER_OFF, which this code doesn't take as a valid state for shutting off CPUs in. This has never made sense to me, but when I added hotplug code to implement hibernate I only "made it work" and did not question the need to check the system_state. Thomas Gleixner helped me dig, but the only thing we found is that it was added with the original commit that added CPU hotplug support. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Acked-by: Joel Schopp <jschopp@austin.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-09-30powerpc: Fix PCI in Holly device treeDavid Gibson1-53/+53
The PCI bridge on the Holly board is incorrectly represented in the device tree. The current device tree node for the PCI bridge sits under the tsi-bridge node. That's not obviously wrong, but the PCI bridge translates some PCI spaces into CPU address ranges which were not translated by the "ranges" property in tsi-bridge node. We used to get away with this problem because the PCI bridge discovery code was also buggy, assuming incorrectly that PCI host bridge nodes were always directly under the root bus and treating the translated addresses as raw CPU addresses, rather than parent bus addresses. This has since been fixed, thus breaking Holly. This could be fixed by adding extra translations to the tsi-bridge node, but this patch instead moves the Holly PCI bridge out of the tsi-bridge node to the root bus. This makes the tsi-bridge node represent only the built-in IO devices in the bridge, with a more-or-less contiguous address range. This is the same convention used on Freescale SoC chips, where the "soc" node represents only the IMMR region, and the PCI and other bus bridges are separate nodes under the root bus. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-09-29x86: mtrr_cleanup safe to get more spare regs nowYinghai Lu1-3/+1
Delay exit to make sure we can actually get the optimal result in as many cases as possible. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2008-09-29[IA64] Put the space for cpu0 per-cpu area into .data sectionTony Luck5-9/+15
Initial fix for making sure that we can access percpu variables in all C code (commit: 10617bbe84628eb18ab5f723d3ba35005adde143) inadvertantly allocated the memory in the "percpu" section of the vmlinux ELF executable. This confused kexec/dump. Signed-off-by: Tony Luck <tony.luck@intel.com>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.