aboutsummaryrefslogtreecommitdiffstats
path: root/arch (follow)
AgeCommit message (Collapse)AuthorFilesLines
2011-01-12KVM: MMU: flush TLBs on writable -> read-only spte overwriteMarcelo Tosatti1-0/+10
This can happen in the following scenario: vcpu0 vcpu1 read fault gup(.write=0) gup(.write=1) reuse swap cache, no COW set writable spte use writable spte set read-only spte Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-01-12KVM: MMU: remove kvm_mmu_set_base_ptesMarcelo Tosatti2-9/+1
Unused. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-01-12KVM: VMX: remove setting of shadow_base_ptes for EPTMarcelo Tosatti1-3/+1
The EPT present/writable bits use the same position as normal pagetable bits. Since direct_map passes ACC_ALL to mmu_set_spte, thus always setting the writable bit on sptes, use the generic PT_PRESENT shadow_base_pte. Also pass present/writable error code information from EPT violation to generic pagefault handler. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-01-12KVM: Avoid double interrupt injection with vapicAvi Kivity1-1/+2
After an interrupt injection, the PPR changes, and we have to reflect that into the vapic. This causes a KVM_REQ_EVENT to be set, which causes the whole interrupt injection routine to be run again (harmlessly). Optimize by only setting KVM_REQ_EVENT if the ppr was lowered; otherwise there is no chance that a new injection is needed. Signed-off-by: Avi Kivity <avi@redhat.com>
2011-01-12KVM: SVM: Fold save_host_msrs() and load_host_msrs() into their callersAvi Kivity1-20/+6
This abstraction only serves to obfuscate. Remove. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: SVM: Move fs/gs/ldt save/restore to heavyweight exit pathAvi Kivity1-14/+21
ldt is never used in the kernel context; same goes for fs (x86_64) and gs (i386). So save/restore them in the heavyweight exit path instead of the lightweight path. By itself, this doesn't buy us much, but it paves the way for moving vmload and vmsave to the heavyweight exit path, since they modify the same registers. [jan: fix copy/pase mistake on i386] Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: SVM: Move svm->host_gs_base into a separate structureAvi Kivity1-3/+5
More members will join it soon. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: SVM: Move guest register save out of interrupts disabled sectionAvi Kivity1-5/+5
Saving guest registers is just a memory copy, and does not need to be in the critical section. Move outside the critical section to improve latency a bit. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: x86: Add missing inline tag to kvm_read_and_reset_pf_reasonJan Kiszka1-1/+1
May otherwise generates build warnings about unused kvm_read_and_reset_pf_reason if included without CONFIG_KVM_GUEST enabled. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: Move KVM context switch into own functionAndi Kleen1-25/+38
gcc 4.5 with some special options is able to duplicate the VMX context switch asm in vmx_vcpu_run(). This results in a compile error because the inline asm sequence uses an on local label. The non local label is needed because other code wants to set up the return address. This patch moves the asm code into an own function and marks that explicitely noinline to avoid this problem. Better would be probably to just move it into an .S file. The diff looks worse than the change really is, it's all just code movement and no logic change. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: x86: Mark kvm_arch_setup_async_pf staticJan Kiszka1-1/+1
It has no user outside mmu.c and also no prototype. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: Send async PF when guest is not in userspace too.Gleb Natapov1-1/+2
If guest indicates that it can handle async pf in kernel mode too send it, but only if interrupts are enabled. Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: Let host know whether the guest can handle async PF in non-userspace context.Gleb Natapov4-2/+8
If guest can detect that it runs in non-preemptable context it can handle async PFs at any time, so let host know that it can send async PF even if guest cpu is not in userspace. Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM paravirt: Handle async PF in non preemptable contextGleb Natapov1-6/+34
If async page fault is received by idle task or when preemp_count is not zero guest cannot reschedule, so do sti; hlt and wait for page to be ready. vcpu can still process interrupts while it waits for the page to be ready. Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: Inject asynchronous page fault into a PV guest if page is swapped out.Gleb Natapov3-5/+42
Send async page fault to a PV guest if it accesses swapped out memory. Guest will choose another task to run upon receiving the fault. Allow async page fault injection only when guest is in user mode since otherwise guest may be in non-sleepable context and will not be able to reschedule. Vcpu will be halted if guest will fault on the same page again or if vcpu executes kernel code. Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: Handle async PF in a guest.Gleb Natapov6-9/+243
When async PF capability is detected hook up special page fault handler that will handle async page fault events and bypass other page faults to regular page fault handler. Also add async PF handling to nested SVM emulation. Async PF always generates exit to L1 where vcpu thread will be scheduled out until page is available. Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM paravirt: Add async PF initialization to PV guest.Gleb Natapov2-0/+98
Enable async PF in a guest if async PF capability is discovered. Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: Add PV MSR to enable asynchronous page faults delivery.Gleb Natapov3-2/+42
Guest enables async PF vcpu functionality using this MSR. Reviewed-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM paravirt: Move kvm_smp_prepare_boot_cpu() from kvmclock.c to kvm.c.Gleb Natapov3-12/+13
Async PF also needs to hook into smp_prepare_boot_cpu so move the hook into generic code. Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: Add memory slot versioning and use it to provide fast guest write interfaceGleb Natapov1-0/+1
Keep track of memslots changes by keeping generation number in memslots structure. Provide kvm_write_guest_cached() function that skips gfn_to_hva() translation if memslots was not changed since previous invocation. Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: Retry fault before vmentryGleb Natapov4-12/+28
When page is swapped in it is mapped into guest memory only after guest tries to access it again and generate another fault. To save this fault we can map it immediately since we know that guest is going to access the page. Do it only when tdp is enabled for now. Shadow paging case is more complicated. CR[034] and EFER registers should be switched before doing mapping and then switched back. Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-12KVM: Halt vcpu if page it tries to access is swapped outGleb Natapov6-5/+183
If a guest accesses swapped out memory do not swap it in from vcpu thread context. Schedule work to do swapping and put vcpu into halted state instead. Interrupts will still be delivered to the guest and if interrupt will cause reschedule guest will continue to run another task. [avi: remove call to get_user_pages_noio(), nacked by Linus; this makes everything synchrnous again] Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-02KVM: Don't reset mmu context unnecessarily when updating EFERAvi Kivity1-1/+0
The only bit of EFER that affects the mmu is NX, and this is already accounted for (LME only takes effect when changing cr0). Based on a patch by Hillf Danton. Signed-off-by: Avi Kivity <avi@redhat.com>
2011-01-02KVM: i8259: initialize isr_ackAvi Kivity1-0/+2
isr_ack is never initialized. So, until the first PIC reset, interrupts may fail to be injected. This can cause Windows XP to fail to boot, as reported in the fallout from the fix to https://bugzilla.kernel.org/show_bug.cgi?id=21962. Reported-and-tested-by: Nicolas Prochazka <prochazka.nicolas@gmail.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-12-29KVM: MMU: Fix incorrect direct gfn for unpaged mode shadowAvi Kivity1-1/+2
We use the physical address instead of the base gfn for the four PAE page directories we use in unpaged mode. When the guest accesses an address above 1GB that is backed by a large host page, a BUG_ON() in kvm_mmu_set_gfn() triggers. Resolves: https://bugzilla.kernel.org/show_bug.cgi?id=21962 Reported-and-tested-by: Nicolas Prochazka <prochazka.nicolas@gmail.com> KVM-Stable-Tag. Signed-off-by: Avi Kivity <avi@redhat.com>
2010-12-18Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileLinus Torvalds5-13/+37
* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: arch/tile: handle rt_sigreturn() more cleanly arch/tile: handle CLONE_SETTLS in copy_thread(), not user space
2010-12-18Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linusLinus Torvalds1-0/+4
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: MIPS: Fix build errors in sc-mips.c
2010-12-18Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6Linus Torvalds5-14/+57
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: x86: avoid high BIOS area when allocating address space x86: avoid E820 regions when allocating address space x86: avoid low BIOS area when allocating address space resources: add arch hook for preventing allocation in reserved areas Revert "resources: support allocating space within a region from the top down" Revert "PCI: allocate bus resources from the top down" Revert "x86/PCI: allocate space from the end of a region, not the beginning" Revert "x86: allocate space within a region top-down" Revert "PCI: fix pci_bus_alloc_resource() hang, prefer positive decode" PCI: Update MCP55 quirk to not affect non HyperTransport variants
2010-12-17arch/tile: handle rt_sigreturn() more cleanlyChris Metcalf4-13/+29
The current tile rt_sigreturn() syscall pattern uses the common idiom of loading up pt_regs with all the saved registers from the time of the signal, then anticipating the fact that we will clobber the ABI "return value" register (r0) as we return from the syscall by setting the rt_sigreturn return value to whatever random value was in the pt_regs for r0. However, this breaks in our 64-bit kernel when running "compat" tasks, since we always sign-extend the "return value" register to properly handle returned pointers that are in the upper 2GB of the 32-bit compat address space. Doing this to the sigreturn path then causes occasional random corruption of the 64-bit r0 register. Instead, we stop doing the crazy "load the return-value register" hack in sigreturn. We already have some sigreturn-specific assembly code that we use to pass the pt_regs pointer to C code. We extend that code to also set the link register to point to a spot a few instructions after the usual syscall return address so we don't clobber the saved r0. Now it no longer matters what the rt_sigreturn syscall returns, and the pt_regs structure can be cleanly and completely reloaded. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2010-12-17arch/tile: handle CLONE_SETTLS in copy_thread(), not user spaceChris Metcalf1-0/+8
Previously we were just setting up the "tp" register in the new task as started by clone() in libc. However, this is not quite right, since in principle a signal might be delivered to the new task before it had its TLS set up. (Of course, this race window still exists for resetting the libc getpid() cached value in the new task, in principle. But in any case, we are now doing this exactly the way all other architectures do it.) This change is important for 2.6.37 since the tile glibc we will be submitting upstream will not set TLS in user space any more, so it will only work on a kernel that has this fix. It should also be taken for 2.6.36.x in the stable tree if possible. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Cc: stable <stable@kernel.org>
2010-12-17MIPS: Fix build errors in sc-mips.cKevin Cernekee1-0/+4
Seen with malta_defconfig on Linus' tree: CC arch/mips/mm/sc-mips.o arch/mips/mm/sc-mips.c: In function 'mips_sc_is_activated': arch/mips/mm/sc-mips.c:77: error: 'config2' undeclared (first use in this function) arch/mips/mm/sc-mips.c:77: error: (Each undeclared identifier is reported only once arch/mips/mm/sc-mips.c:77: error: for each function it appears in.) arch/mips/mm/sc-mips.c:81: error: 'tmp' undeclared (first use in this function) make[2]: *** [arch/mips/mm/sc-mips.o] Error 1 make[1]: *** [arch/mips/mm] Error 2 make: *** [arch/mips] Error 2 [Ralf: Cosmetic changes to minimize the number of arguments passed to mips_sc_is_activated] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1752/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-17x86: avoid high BIOS area when allocating address spaceBjorn Helgaas2-1/+5
This prevents allocation of the last 2MB before 4GB. The experiment described here shows Windows 7 ignoring the last 1MB: https://bugzilla.kernel.org/show_bug.cgi?id=23542#c27 This patch ignores the top 2MB instead of just 1MB because H. Peter Anvin says "There will be ROM at the top of the 32-bit address space; it's a fact of the architecture, and on at least older systems it was common to have a shadow 1 MiB below." Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-12-17x86: avoid E820 regions when allocating address spaceBjorn Helgaas1-1/+37
When we allocate address space, e.g., to assign it to a PCI device, don't allocate anything mentioned in the BIOS E820 memory map. On recent machines (2008 and newer), we assign PCI resources from the windows described by the ACPI PCI host bridge _CRS. On many Dell machines, these windows overlap some E820 reserved areas, e.g., BIOS-e820: 00000000bfe4dc00 - 00000000c0000000 (reserved) pci_root PNP0A03:00: host bridge window [mem 0xbff00000-0xdfffffff] If we put devices at 0xbff00000, they don't work, probably because that's really RAM, not I/O memory. This patch prevents that by removing the 0xbfe4dc00-0xbfffffff area from the "available" resource. I'm not very happy with this solution because Windows solves the problem differently (it seems to ignore E820 reserved areas and it allocates top-down instead of bottom-up; details at comment 45 of the bugzilla below). That means we're vulnerable to BIOS defects that Windows would not trip over. For example, if BIOS described a device in ACPI but didn't mention it in E820, Windows would work fine but Linux would fail. Reference: https://bugzilla.kernel.org/show_bug.cgi?id=16228 Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-12-17x86: avoid low BIOS area when allocating address spaceBjorn Helgaas3-3/+12
This implements arch_remove_reservations() so allocate_resource() can avoid any arch-specific reserved areas. This currently just avoids the BIOS area (the first 1MB), but could be used for E820 reserved areas if that turns out to be necessary. We previously avoided this area in pcibios_align_resource(). This patch moves the test from that PCI-specific path to a generic path, so *all* resource allocations will avoid this area. Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-12-17Revert "x86/PCI: allocate space from the end of a region, not the beginning"Bjorn Helgaas1-11/+6
This reverts commit dc9887dc02e37bcf83f4e792aa14b07782ef54cf. Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-12-17Revert "x86: allocate space within a region top-down"Bjorn Helgaas1-1/+0
This reverts commit 1af3c2e45e7a641e774bbb84fa428f2f0bf2d9c9. Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-12-17Merge branch 'for_linus' of git://github.com/at91linux/linux-2.6-at91Linus Torvalds5-136/+55
* 'for_linus' of git://github.com/at91linux/linux-2.6-at91: at91: Refactor Stamp9G20 and PControl G20 board file at91: Fix uhpck clock rate in upll case
2010-12-17Merge branch 'kvm-updates/2.6.37' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds5-12/+15
* 'kvm-updates/2.6.37' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: Fix preemption counter leak in kvm_timer_init() KVM: enlarge number of possible CPUID leaves KVM: SVM: Do not report xsave in supported cpuid KVM: Fix OSXSAVE after migration
2010-12-17at91: Refactor Stamp9G20 and PControl G20 board fileChristian Glindkamp4-135/+54
As PControl G20 is a carrier board for the Stamp9G20 SoM, some code can be shared. Therefore board-stamp9g20.c is refactored to allow reusing the SoM initialization and board-pcontrol-g20.c is modified to use it. Signed-off-by: Christian Glindkamp <christian.glindkamp@taskit.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-12-17at91: Fix uhpck clock rate in upll caseRyan Mallon1-1/+1
The uhpck clock should be divided from the utmi clock, not its parent (main). This change is mostly cosmetic as the uhpck rate value is not used anywhere except for the debugfs clock output. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-12-16Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linusLinus Torvalds28-146/+339
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (28 commits) MIPS: Add a CONFIG_FORCE_MAX_ZONEORDER Kconfig option. MIPS: LD/SD o32 macro GAS fix update MIPS: Alchemy: fix build with SERIAL_8250=n MIPS: Rename mips_dma_cache_sync back to dma_cache_sync MIPS: MT: Fix typo in comment. SSB: Fix nvram_get on BCM47xx platform MIPS: BCM47xx: Swap serial console if ttyS1 was specified. MIPS: BCM47xx: Use sscanf for parsing mac address MIPS: BCM47xx: Fill values for b43 into SSB sprom MIPS: BCM47xx: Do not read config from CFE MIPS: FDT size is a be32 MIPS: Fix CP0 COUNTER clockevent race MIPS: Fix regression on BCM4710 processor detection MIPS: JZ4740: Fix pcm device name MIPS: Separate two consecutive loads in memset.S MIPS: Send proper signal and siginfo on FP emulator faults. MIPS: AR7: Fix loops per jiffies on TNETD7200 devices MIPS: AR7: Fix double ar7_gpio_init declaration MIPS: Rework GENERIC_HARDIRQS Kconfig. MIPS: Alchemy: Add return value check for strict_strtoul() ...
2010-12-16MIPS: Add a CONFIG_FORCE_MAX_ZONEORDER Kconfig option.David Daney1-0/+22
For huge page support with base page size of 16K or 32K, we have to increase the MAX_ORDER so that huge pages can be allocated. [Ralf: I don't think a user should have to configure obscure constants like this but for the time being this will have to suffice.] Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1685/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16MIPS: LD/SD o32 macro GAS fix updateMaciej W. Rozycki2-4/+20
I am about to commit: http://sourceware.org/ml/binutils/2010-10/msg00033.html that fixes a problem with the LD/SD macro currently implemented by GAS for the o32 ABI in an inconsistent way. This is best illustrated with a simple program, which I'm copying here from the message above for easier reference: $ cat ld.s ld $5,32767($4) ld $5,32768($4) This gets assebled into the following output: $ mips-linux-as -32 -mips3 -o ld.o ld.s $ mips-linux-objdump -d ld.o ld.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <.text>: 0: dc857fff ld a1,32767(a0) 4: 3c010001 lui at,0x1 8: 00810821 addu at,a0,at c: 8c258000 lw a1,-32768(at) 10: 8c268004 lw a2,-32764(at) ... Oops! The GAS fix makes the macro behave in a consistent way and pairs of LW/SW instructions to be output as appropriate regardless of the size of the offset associated with the address used. The machine instruction is still available, but to reach it macros have to be disabled first. This has a side effect of requiring the use of a machine-addressable memory operand. As some platforms require 64-bit operations for accesses to some I/O registers LD/SD instructions are used in a couple of places in Linux regardless of the ABI selected. Here's a fix for some pieces of code affected I've been able to track down. The fix should be backwards compatible with all supported binutils releases in existence and can be used as a reference for any other places or off-tree code. The use of the "R" constraint guarantees a machine-addressable operand. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1680/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16MIPS: Alchemy: fix build with SERIAL_8250=nManuel Lauss1-0/+2
In commit 7d172bfe ("Alchemy: Add UART PM methods") I introduced platform PM methods which call a function of the 8250 driver; this patch works around link failures when the kernel is built without 8250 support. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1737/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16MIPS: Rename mips_dma_cache_sync back to dma_cache_syncRalf Baechle1-1/+3
This fixes IP22 and IP28 build errors. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16MIPS: MT: Fix typo in comment.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16MIPS: BCM47xx: Swap serial console if ttyS1 was specified.Hauke Mehrtens1-0/+16
Some devices like the Netgear WGT634U are using ttyS1 for default console output. We should switch to that console if it was given in the kernel_args parameters. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/1848/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16MIPS: BCM47xx: Use sscanf for parsing mac addressHauke Mehrtens2-20/+10
Instead of writing own function for parsing the mac address we now use sscanf. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/1847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16MIPS: BCM47xx: Fill values for b43 into SSB spromHauke Mehrtens1-22/+92
Fill the sprom with all available values from the nvram. Most of these new values are needed for the b43 or b43legacy driver. Parts of this patch have been in OpenWRT for a long time and were written by Michael Buesch. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/1846/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16MIPS: BCM47xx: Do not read config from CFEHauke Mehrtens1-19/+9
The config options read out here are not stored in CFE but only in NVRAM on the devices. Remove reading from CFE and only access the NVRAM. Reading out CFE does not harm but is useless here. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/1845/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.