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2005-11-07[PATCH] ppc32: Add Yucca (440SPe eval board) platformRoland Dreier6-2/+523
Add support for AMCC PowerPC 440SPe "Yucca" eval board platform. Signed-off-by: Roland Dreier <rolandd@cisco.com> Cc: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07[PATCH] ppc32: Add 440SPe supportRoland Dreier11-6/+862
Add support for the AMCC PowerPC 440SPe SoC, including PCI Express in root port mode. Signed-off-by: Roland Dreier <rolandd@cisco.com> Cc: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07[PATCH] ppc32: Dump error status for both PLB segments on 440SPRoland Dreier1-0/+11
The PowerPC 440SP SoC has two Processor Local Bus (PLB) segments (a high-throughput segment and a low-latency segment). Fix our PLB register definitions to cope with this, and add code to dump the status of both segments when a machine check occurs. Signed-off-by: Roland Dreier <rolandd@cisco.com> Cc: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07[PATCH] ppc32: Allow ERPN for early serial to depend on CPU typeRoland Dreier1-2/+2
The PowerPC 440SPe supports up to 16 GB of RAM, and therefore its IO registers are at 0x4_xxxx_xxxx instead of being at 0x1_xxxx_xxxx like most other PPC 440 chips. To allow for this, this patch moves the definition of the ERPN used for mapping UART0 from being hard-coded in the head_44x.S assembly code to being defined in ibm44x.h. Signed-off-by: Roland Dreier <rolandd@cisco.com> Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07[PATCH] ppc32: add watchdog & RTC support for Marvell EV64360BP boardLee Nicks3-20/+66
This patch adds watchdog, RTC support for Marvell EV64360BP board. Signed-off-by: Lee Nicks <allinux@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07[PATCH] ppc: Fix ppc32 build after 64K pagesBenjamin Herrenschmidt2-2/+3
Oops, some last minute changes caused the 64K pages patch to break ppc32 build, this fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07[PATCH] ppc64: Fix zImage bootBenjamin Herrenschmidt1-2/+9
The zImage wrapper has a bug where it doesn't claim() the memory for the kernel properly, it forgets to take into account the offset between the ELF header and the kernel itself. This results on some machines, like G5s, into a kernel that crashes at boot when clearing the BSS. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07[PATCH] POWERPC/PPC64: Fix CONFIG_SMP=n build for ppc64Olof Johansson2-0/+2
Two CONFIG_SMP=n build fixes due to missing <asm/smp.h> includes. Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07[PATCH] ia64: re-implement dma_get_cache_alignment to avoid EXPORT_SYMBOLJohn W. Linville1-0/+7
The current ia64 implementation of dma_get_cache_alignment does not work for modules because it relies on a symbol which is not exported. Direct access to a global is a little ugly anyway, so this patch re-implements dma_get_cache_alignment in a manner similar to what is currently used for x86_64. Signed-off-by: John W. Linville <linville@tuxdriver.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07[PATCH] ppc64: Fix bug in SLB miss handler for hugepagesDavid Gibson3-6/+19
This patch, however, should be applied on top of the 64k-page-size patch to fix some problems with hugepage (some pre-existing, another introduced by this patch). The patch fixes a bug in the SLB miss handler for hugepages on ppc64 introduced by the dynamic hugepage patch (commit id c594adad5653491813959277fb87a2fef54c4e05) due to a misunderstanding of the srd instruction's behaviour (mea culpa). The problem arises when a 64-bit process maps some hugepages in the low 4GB of the address space (unusual). In this case, as well as the 256M segment in question being marked for hugepages, other segments at 32G intervals will be incorrectly marked for hugepages. In the process, this patch tweaks the semantics of the hugepage bitmaps to be more sensible. Previously, an address below 4G was marked for hugepages if the appropriate segment bit in the "low areas" bitmask was set *or* if the low bit in the "high areas" bitmap was set (which would mark all addresses below 1TB for hugepage). With this patch, any given address is governed by a single bitmap. Addresses below 4GB are marked for hugepage if and only if their bit is set in the "low areas" bitmap (256M granularity). Addresses between 4GB and 1TB are marked for hugepage iff the low bit in the "high areas" bitmap is set. Higher addresses are marked for hugepage iff their bit in the "high areas" bitmap is set (1TB granularity). To avoid conflicts, this patch must be applied on top of BenH's pending patch for 64k base page size [0]. As such, this patch also addresses a hugepage problem introduced by that patch. That patch allows hugepages of 1MB in size on hardware which supports it, however, that won't work when using 4k pages (4 level pagetable), because in that case hugepage PTEs are stored at the PMD level, and each PMD entry maps 2MB. This patch simply disallows hugepages in that case (we can do something cleverer to re-enable them some other day). Built, booted, and a handful of hugepage related tests passed on POWER5 LPAR (both ARCH=powerpc and ARCH=ppc64). [0] http://gate.crashing.org/~benh/ppc64-64k-pages.diff Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-06Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds8-23/+203
2005-11-06[PATCH] ppc64: support 64k pagesBenjamin Herrenschmidt34-952/+2374
Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel base page size to 64K. The resulting kernel still boots on any hardware. On current machines with 4K pages support only, the kernel will maintain 16 "subpages" for each 64K page transparently. Note that while real 64K capable HW has been tested, the current patch will not enable it yet as such hardware is not released yet, and I'm still verifying with the firmware architects the proper to get the information from the newer hypervisors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-06[ARM] Fix /proc/cpuinfo format for ARM SMPRussell King1-1/+6
glibc expects to count lines beginning with "processor" to determine the number of processors, not lines beginning with "Processor". So, give glibc the format it expects. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06[ARM] Don't call dump_cpu_info unless we're bootingRussell King1-1/+2
We don't want to call dump_cpu_info() from cpu_init() after boot since it produces a lot of unnecessary noise - since cpu_init() gets called on resume and hotplug cpu insertion events. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06[ARM] Fix second missing declaration of cache_is_vivt()Russell King1-1/+0
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06[ARM] Fix missing declaration of cache_is_vivt()Russell King1-0/+1
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06[ARM] 3113/1: PXA: Allow machines to override (and also reuse) pxa pm functionsRichard Purdie1-4/+12
Patch from Richard Purdie Update the PXA pm.c file to allow machines (such as the Sharp Zaurus) to override the standard pm functions but reuse/wrap them where needed. The init call is made slightly earlier to give machine code an init level to override them in removing any race. Signed-off-by: Richard Purdie Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06[ARM] 3115/1: small optimizations to exception vector entry codeNicolas Pitre1-8/+7
Patch from Nicolas Pitre Since we know the value of cpsr on entry, we can replace the bic+orr with a single eor. Also remove a possible result delay (at least on XScale). Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06[ARM] 3114/1: use ixp2000_reg_wrb in ixp2000 uengine loaderLennert Buytenhek1-6/+5
Patch from Lennert Buytenhek Make the uengine loader use ixp2000_reg_wrb in the right places. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06[ARM] 3089/1: ixp4xx AHB/PCI endianness fixAlessandro Zummo1-1/+1
Patch from Alessandro Zummo This patch fixes AHB/PCI endianness problems when the processor is in little-endian mode. The patch configures the CSR register closely following the directives in [1], paragraph 4.1, page 19. According to the considerations in [1], page 11, while the AHB bus supports both endian modes, on the IXP4XX it always uses big-endian. The PCI bus is connected to the South AHB. A wrong setting in the CSR register will thus cause a malfunctional PCI bus. A schematic diagram of the bus interconnections on the IXP4XX can be found in [1], page 18. The patch has been verified to work on the NSLU2 in both LE and BE modes. The author is Peter Korsgaard. [1] Intel® IXP4XX Product Line of Network Processors and IXC1100 Control Plane Processor: Understanding Big Endian and Little Endian Modes http://www.intel.com/design/network/applnots/25423701.pdf Signed-off-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06[ARM] 3088/1: PXA: Add machine support for the Sharp SL-6000x series of PDAsDirk Opfer3-2/+170
Patch from Dirk Opfer This patch adds basic machine support for the Sharp SL-6000x (Tosa) PDAs. Signed-off-by: Dirk Opfer Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-05[PATCH] reset tss->io_bitmap_owner in sys_ioperm()Bart Oldeman1-0/+3
my patch "x86: initialise tss->io_bitmap_owner to something" (commit ID d5cd4aadd3d220afac8e3e6d922e333592551f7d) introduced a problem with a program (DOSEMU) that called ioperm after already doing some port i/o. The problem is that a process switch return causes tss->io_bitmap_base to be set to IO_BITMAP_OFFSET so that the fault (that *really* sets the io bitmap) never triggers. This fixes that regression. Signed-off-by: Bart Oldeman <bartoldeman@users.sourceforge.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-04Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc-mergeLinus Torvalds104-1128/+7146
2005-11-05powerpc: Fix vmlinux.lds.S for 32-bitPaul Mackerras1-25/+5
We can't currently use asm-ppc/page.h in vmlinux.lds.S, so until we have a merged page.h, define PAGE_SIZE and KERNELBASE locally. Also gets rid of some dynamic executable cruft that we had for 32-bit. With -Ttext=$(KERNELBASE) this didn't cause any problem, but when we changed to putting . = KERNELBASE in the vmlinux.lds.S this cruft caused the text to get linked at 0xa0 instead of 0xc0000000. Oops. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-05powerpc: Merge smp.c and smp.hPaul Mackerras9-192/+157
This also moves setup_cpu_maps to setup-common.c (calling it smp_setup_cpu_maps) and uses it on both 32-bit and 64-bit. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-04[PATCH] ARM: Reverted 2918/1: [update] Base port of Comdial MP1000 platfromRussell King8-1204/+2
No longer maintained
2005-11-04[ARM] 3097/1: change library link orderingNicolas Pitre1-1/+1
Patch from Nicolas Pitre We have an optimized sha1 routine (arch/arm/lib/sha1.S) meant to override the generic one in lib/sha1.c. Unfortunately lib/lib.a is listed _before_ arch/arm/lib/lib.a in the link argument list and therefore the architecture specific lib functions are not picked up before the generic versions. This patch is a quick fix to change that ordering for ARM. Here's what the kbuild maintainer had to say about it (was also CC'd on lkml): On Wed, 2 Nov 2005, Sam Ravnborg wrote: > This looks like an obvious way to achive correct ordering. > We could change it so arch defines always took precedence but > the above is so simple that it is not worth the effort. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-04[ARM] 3087/1: PXA2xx flash platform device conversionTodd Poynor2-2/+168
Patch from Todd Poynor Add platform devices for flash to Lubbock and Mainstone board files. Once in place, the two existing mtd map drivers for the boards will be converted to use a single pxa2xx map driver in the linux-mtd tree. Take 4: flash_platform_data .map_name vs. .name cleaned up, resync with merged irda patch context. Signed-off-by: Todd Poynor <tpoynor@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-04[ARM] 3086/1: ixp2xxx error irq handlingDave Jiang1-0/+46
Patch from Dave Jiang This provides support for IXP2xxx error interrupt handling. Previously there was a patch to remove this (although the original stuff was broken). Well, now the error bits are needed again. These are used extensively by the micro-engine drivers according to Deepak and also we will need it for the new EDAC code that Alan Cox is trying to push into the main kernel. Re-submit of 3072/1, generated against git tree pulled today. AFAICT, this git tree pulled in all the ARM changes that's in arm.diff. Please let me know if there are additional changes. Thx! Signed-off-by: Dave Jiang <djiang@mvista.com> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-04[ARM] 3094/1: remove PLD stuff from old uaccess codeNicolas Pitre1-116/+16
Patch from Nicolas Pitre ARM processors that have pld instructions are not using those copy_user implementation anymore. Let's remove the useless PLD lines which were half wrong anyway. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-04Merge branch 'for-paulus' of git://kernel/home/michael/src/work/Paul Mackerras19-77/+6022
2005-11-04powerpc: Merge smp-tbsync.c (the generic timebase sync routine)Paul Mackerras5-65/+65
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-04Merge with PaulusMichael Ellerman21-175/+300
2005-11-04powerpc: Implement smp_release_cpus() in C not asmMichael Ellerman4-39/+21
There's no reason for smp_release_cpus() to be asm, and most people can make more sense of C code. Add an extern declaration to smp.h and remove the custom one in machine_kexec.c Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2005-11-03[ARM] Fix IXDP2x01 config filesDeepak Saxena2-3/+3
IXDP2401 config file has wrong baudrate and both boards have 3 UARTs. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03[ARM] Merge SMP treeRussell King3-1/+14
2005-11-03[ARM] 3092/1: remove excessive print format paddingNicolas Pitre1-4/+4
Patch from Nicolas Pitre Using a llx format to print addresses that might possibly be (only) 36 bits wide make sense. However making it a zero padded 16 char wide field is a bit excessive and useless. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03[ARM SMP] Add configuration option for ARMv6K processorsRussell King3-1/+14
The 'K' extension adds several new instructions to the ARMv6 ISA which are primerily useful for SMP. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03[ARM] Add Realview default configuration fileRussell King1-0/+789
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03[ARM] Fix more 3016/1 breakageRussell King2-10/+10
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03powerpc: Cleanup vpa codeMichael Ellerman2-10/+19
register_vpa() doesn't actually do a VPA register call it just uses the flags you pass it, so rename it to vpa_call() to be clearer. We can then define register_vpa() and unregister_vpa() which are both simple wrappers around vpa_call(). (we'll need unregister_vpa() for kexec soon) We can then cleanup vpa_init(), and because vpa_init() is only called from platforms/pseries we remove the definition in asm-ppc64/smp.h. Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
2005-11-03Merge git://oak/home/sfr/kernels/iseries/workPaul Mackerras5-3/+140
2005-11-03[PATCH] ppc32: Fixed warning in m8xx_setup.cVitaly Bordug1-0/+1
This adds missing header and thus fix the warning issued by ming prototype. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-03[PATCH] ppc32 8xx: fix cpm_dpalloc() commentMarcelo Tosatti1-3/+2
Current comment on top of m8xx_cpm_dpinit is wrong. Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-03[PATCH] ppc32 8xx: export symbols required for modular IDEMarcelo Tosatti1-0/+5
This fixes these warnings: Building modules, stage 2. MODPOST *** Warning: "__ide_mm_insl" [drivers/ide/ide-core.ko] undefined! *** Warning: "__ide_mm_outsw" [drivers/ide/ide-core.ko] undefined! *** Warning: "__ide_mm_insw" [drivers/ide/ide-core.ko] undefined! *** Warning: "__ide_mm_outsl" [drivers/ide/ide-core.ko] undefined! Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-03[PATCH] powerpc: always init nvram on 64-bit powermacDavid Woodhouse1-1/+1
Currently there is no Kconfig symbol to indicate that we want nvram support on 64-bit kernels; it's assumed we always want it, so make the powermac setup code always initialize the pmac nvram code if 64-bit. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-03[PATCH] ppc: Fix build warnings in arch/ppc/kernel/traps.cBecky Bruce1-4/+4
The latest updates to bug.h generate build warnings in traps.c in arch/ppc. Fix print format specifiers to account for change of line type to long from int. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-03[PATCH] ppc64: Fix add notifier crashesJohn Rose2-3/+4
The extraction of PCI stuff from struct device_node left some false assumptions in notifier code. As a result, dynamic add crashes when non-PCI nodes are added. This patch fixes these assumptions. Signed-off-by: John Rose <johnrose@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-03powerpc: move include/asm-ppc64/ppc32.h to arch/powerpc/kernelStephen Rothwell2-1/+139
It is only included by signal_32.c Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2005-11-03powerpc: move ppc64/kernel/signal.c to arch/powerpcStephen Rothwell3-2/+1
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>