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2014-11-24MIPS: bcm3384: Initial commit of bcm3384 platform supportKevin Cernekee13-0/+698
2014-11-24MIPS: Create a helper function for DT setupKevin Cernekee4-22/+22
2014-11-24MIPS: BMIPS: Add PRId for BMIPS5200 (Whirlwind)Kevin Cernekee2-0/+2
2014-11-24MIPS: BMIPS: Add special cache handling in c-r4k.cKevin Cernekee1-0/+43
2014-11-24MIPS: BMIPS: Let each platform customize the CPU1 IRQ maskKevin Cernekee2-2/+5
2014-11-24MIPS: BMIPS: Select the appropriate L1_CACHE_SHIFT for 438x and 5000 CPUsKevin Cernekee1-0/+2
2014-11-24MIPS: Allow MIPS_CPU_SCACHE to be used with different line sizesKevin Cernekee1-1/+1
2014-11-24MIPS: BMIPS: Explicitly configure reset vectors prior to secondary bootKevin Cernekee1-21/+8
2014-11-24MIPS: BMIPS: Mask off timer IRQs when hot-unplugging a CPUJon Fraser1-0/+1
2014-11-24MIPS: BMIPS: Allow BMIPS3300 to utilize SMP ebase relocation codeJon Fraser1-0/+1
2014-11-24MIPS: BMIPS: Introduce helper function to change the reset vectorKevin Cernekee1-7/+58
2014-11-24MIPS: BMIPS: Align secondary boot sequence with latest firmware releasesKevin Cernekee1-11/+1
2014-11-24MIPS: Loongson1B: Add a clockevent/clocksource using PWM TimerKelvin Cheung4-31/+266
2014-11-24MIPS: Loongson1B: Some fixes/updates for LS1BKelvin Cheung9-31/+283
2014-11-24MIPS: Loongson1B: Improve early printkKelvin Cheung2-17/+14
2014-11-24MIPS: Loongson1B: Fix reboot problem on LS1BKelvin Cheung2-13/+18
2014-11-24MIPS: DMA: Explain the lack of special handling for R14000/R16000.Ralf Baechle1-0/+5
2014-11-24MIPS: BCM47XX: Clean up nvram headerRafał Miłecki3-39/+33
2014-11-24MIPS: BCM47XX: Use mtd as an alternative way/API to get NVRAM contentRafał Miłecki1-4/+38
2014-11-24MIPS: Kconfig option to better exercise/debug hybrid FPRsPaul Burton2-0/+31
2014-11-24MIPS: ELF: Set FP mode according to .MIPS.abiflagsPaul Burton4-20/+211
2014-11-24MIPS: ELF: Add definition for the .MIPS.abiflags sectionPaul Burton1-0/+25
2014-11-24MIPS: Support for hybrid FPRsPaul Burton5-10/+100
2014-11-24MIPS: Ensure Config5.UFE is clear on bootPaul Burton1-1/+1
2014-11-24MIPS: detect presence of the FRE & UFR bitsPaul Burton3-0/+7
2014-11-24MIPS: define bits introduced for hybrid FPRsPaul Burton1-0/+3
2014-11-24MIPS: Loongson-3: Add RS780/SBX00 HPET supportHuacai Chen6-1/+350
2014-11-24MIPS: Loongson-3: Add oprofile supportHuacai Chen3-0/+225
2014-11-24MIPS: Loongson: Improve LEFI firmware interfaceHuacai Chen14-42/+234
2014-11-24MIPS: Loongson: Allow booting from any coreHuacai Chen7-36/+67
2014-11-24MIPS: Loongson-3: Add PHYS48_TO_HT40 supportHuacai Chen3-3/+22
2014-11-24MIPS: R3000: Remove redundant parenthesesIsamu Mogi1-1/+1
2014-11-24MIPS: R3000: Replace magic numbers with macrosIsamu Mogi1-5/+6
2014-11-24MIPS: Remove __strlen_user().Ralf Baechle3-34/+0
2014-11-24MIPS: BCM47XX: Initialize bcma bus later (with mm available)Rafał Miłecki3-6/+38
2014-11-24MIPS: BCM47XX: Move SPROM fallback code into sprom.cRafał Miłecki3-56/+73
2014-11-24MIPS: BCM47XX: Make bcma init NVRAM instead of bcm47xx polling itRafał Miłecki1-40/+2
2014-11-24MIPS: BCM47XX: Make ssb init NVRAM instead of bcm47xx polling itRafał Miłecki2-21/+10
2014-11-24MIPS: BCM47XX: Get rid of calls to KSEG1ADDRRafał Miłecki1-12/+32
2014-11-24MIPS: Move gic.h to include/linux/irqchip/mips-gic.hAndrew Bresticker17-342/+16
2014-11-24irqchip: mips-gic: Use proper iomem accessorsAndrew Bresticker1-65/+7
2014-11-24MIPS: Malta: Stop using GIC REG macrosAndrew Bresticker1-9/+9
2014-11-24MIPS: SEAD3: Stop using GIC REG macrosAndrew Bresticker1-4/+4
2014-11-24irqchip: mips-gic: Export function to read counter widthAndrew Bresticker2-8/+2
2014-11-24MIPS: Malta: Use gic_read_count() to read GIC timerAndrew Bresticker1-11/+3
2014-11-24MIPS: SEAD3: Use generic plat_irq_dispatchAndrew Bresticker1-22/+1
2014-11-24MIPS: Malta: Use generic plat_irq_dispatchAndrew Bresticker1-92/+0
2014-11-24irqchip: mips-gic: Remove unnecessary globalsAndrew Bresticker1-5/+0
2014-11-24irqchip: mips-gic: Support local interruptsAndrew Bresticker8-57/+56
2014-11-24irqchip: mips-gic: Use separate edge/level irq_chipsAndrew Bresticker1-1/+0
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